Commit graph

2034 commits

Author SHA1 Message Date
wangjianyu3
929acd26e0 xtensa/esp32s3: fix esp32s3_cam uninit/stop_capture bugs
Fix several issues in the ESP32-S3 CAM driver:

- stop_capture: reset DMA channel, CAM module and AFIFO under
  spinlock to fully quiesce hardware before returning. Clear
  pending VSYNC interrupt to prevent stale ISR firing.

- uninit: reset CAM/AFIFO before releasing DMA to prevent
  in-flight transfers after channel detach. Use esp_teardown_irq
  with correct peripheral ID (ESP32S3_PERIPH_LCD_CAM) instead of
  irq_detach which corrupts the shared IRQ mapping table. Mask
  interrupts and clear pending flags under spinlock before
  detaching handler.

- uninit: preserve XCLK output so the sensor remains accessible
  via I2C for subsequent re-initialization.

- set_buf/uninit: track driver-allocated vs user-provided frame
  buffers with fb_allocated flag to prevent double-free when
  using V4L2 USERPTR mode.

Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
2026-04-10 10:47:07 +02:00
Eren Terzioglu
44ffb7521b arch/xtensa/esp32: Fix IRAM heap boot issue
Fix IRAM heap boot issue for esp32

Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
2026-04-09 20:14:44 +08:00
aviralgarg05
54ee939f82 arch/espressif: serialize Wi-Fi RX queue access.
Protect the common Espressif Wi-Fi netdev RX queue with a spinlock. The Wi-Fi RX callback enqueues packets while the netdev upper-half RX thread dequeues them, and the IOB queue helpers are not internally serialized.

Under sustained receive traffic that race can corrupt the queue state, strand IOBs, and degrade throughput over time as reported in issue #16915.

Initialize the lock during device setup and use it when clearing the queue on ifup, enqueueing received packets, and dequeuing them for the upper half.

Signed-off-by: aviralgarg05 <gargaviral99@gmail.com>
2026-04-08 15:04:31 -03:00
Piyush Patle
13d0e64ee6 style: fix checkpatch issues after debug.h move
Fixed copespell errors, for CI sucess!

Signed-off-by: Piyush Patle <piyushpatle228@gmail.com>
2026-04-07 07:50:06 -03:00
Piyush Patle
0dccc8ba21 include/debug.h: Move to include/nuttx/debug.h
debug.h is a NuttX-specific, non-POSIX header. Placing it in the
top-level include/ directory creates naming conflicts with external
projects that define their own debug.h.
This commit moves the canonical header to include/nuttx/debug.h,
following the NuttX convention for non-POSIX/non-standard headers,
and updates all in-tree references.

A backward-compatibility shim is left at include/debug.h that
emits a deprecation #warning and re-includes <nuttx/debug.h>,
allowing out-of-tree code to continue building while migrating.

Signed-off-by: Piyush Patle <piyushpatle228@gmail.com>
2026-04-07 07:50:06 -03:00
Piyush Patle
579684974a espressif/ws2812: include esp_rmt.h in ws2812 headers
esp_ws2812.h exposes esp_ws2812_setup() with a struct rmt_dev_s * argument
but did not include esp_rmt.h directly.

After guarding the LIRC board registration path with CONFIG_DRIVERS_RC,
non-RC ESP configs no longer pulled in the RMT type indirectly and CI
started failing with an incomplete struct rmt_dev_s declaration.

Include esp_rmt.h in the Xtensa and RISC-V ws2812 headers.

Signed-off-by: Piyush Patle <piyushpatle228@gmail.com>
2026-04-04 11:18:32 -03:00
Piyush Patle
140f2c1c78 docs/rc: document RC/LIRC drivers and remove empty drivers/rmt files
Add documentation for the RC/LIRC character driver subsystem covering
device registration, the LIRC interface, and usage from user space.

Remove placeholder empty files under drivers/rmt that were left over
from the rmtchar era and are no longer referenced.

Signed-off-by: Piyush Patle <piyushpatle228@gmail.com>
2026-04-04 11:18:32 -03:00
Piyush Patle
7b590f9c43 espressif/rmt: replace rmtchar with arch-specific lirc adapter
Replace the ESP-specific rmtchar upper-half with arch-local esp_lirc
adapters for Xtensa and RISC-V.

 This moves the RMT upper-half out of drivers/rmt, registers LIRC
 devices from the ESP board bring-up paths, and removes the old common
 rmtchar driver and headers.

 Also update the ESP Kconfig and build wiring to build esp_lirc when
 ESP_RMT and DRIVERS_RC are enabled.

 Fixes discovered during hardware validation:
  - register TX as /dev/lirc1 so RX and TX do not collide
  - parse the RX worker thread argument from the correct argv slot
  - keep RX devices from advertising TX capability

Signed-off-by: Piyush Patle <piyushpatle228@gmail.com>
2026-04-04 11:18:32 -03:00
wangjianyu3
c100e9a9e8 esp_i2s: use actual channel count for BCLK calculation
The I2S BCLK frequency is calculated as:
  bclk = sample_rate * total_slot * data_width

Previously, total_slot was always taken from the static config
(esp_i2s0_config / esp_i2s1_config), which is hardcoded to 2.
This is correct for mono and stereo, but wrong for TDM modes
with more than 2 channels (e.g. 4-channel recording with ES7210).

With 4 channels but total_slot=2, the BCLK is only half of what
it should be, causing the actual sample rate to be half of the
requested rate (e.g. requesting 16 kHz actually samples at 8 kHz).

Replace priv->config->total_slot with MAX(priv->channels, 2) in
all three BCLK calculation sites (i2s_check_mclkfrequency and
i2s_set_clock for both master and slave paths). The MIN of 2
preserves the I2S protocol requirement that at least 2 slots
exist even for mono, while correctly scaling for multi-channel
TDM configurations.

Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
2026-04-03 13:34:36 +08:00
wangjianyu3
3b1aac55a8 esp_i2s: fix I2S RX DMA path for ESP32-S3
Fix multiple bugs in the I2S RX receive path on ESP32-S3 with GDMA:

- Set streaming=true in i2s_rxdma_start so completed buffers are not
  incorrectly marked AUDIO_APB_FINAL
- Restore up_enable_irq calls for DMA interrupt after esp_dma_load
  resets the channel
- Skip i2s_hal_rx_reset/rx_reset_fifo on ESP32-S3 which clears the
  TDM slot configuration set by i2s_configure
- Accept 1-16 RX channels on ESP32-S3 (was limited to 2)
- Add getreg32 read-back after DMA start to flush CPU write buffer
- Auto-stop RX channel when no pending buffers remain, preventing
  hardware from running without DMA descriptors after stop
- Remove duplicate return OK in i2s_rxdma_start
- Fix i2s_ll_tx_enable_mono_mode to i2s_ll_rx_enable_mono_mode in
  i2s_rxchannels
- Fix tx_slot_cfg.std to rx_slot_cfg.std in RX PCM slot config
- Fix DMA direction, peripheral ID, data_width, rx_start sequencing,
  and rx_eof_num word count in RX path
- Fix esp32s3_board_i2s.c I2S port index

Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
2026-04-03 13:34:36 +08:00
wangjianyu3
f92b3d8d79 arch/xtensa/esp32s3: fix CAM DMA race and heap-allocate descriptors
- Remove debug polling loop from esp32s3_cam_start_capture() that
  busy-waited on DMA status register.

- Fix DMA ISR race: stop DMA before invoking capture callback to
  prevent ISR re-triggering while callback processes the buffer.
  Check priv->capturing before restarting DMA in ISR.

- Move DMA descriptors from struct to heap allocation, avoiding
  stack/BSS alignment issues with cache-line-aligned descriptors.

Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
2026-03-29 12:35:22 -03:00
Tiago Medicci Serrano
c17e16eaed xtensa/espressif: Update common-source integration for Xtensa devices
This commit updates the common-source integration for Xtensa-based
Espressif devices (ESP32, ESP32-S2, and ESP32-S3). This is part of a larger
common-source update split by architecture for better maintainability.

Major components updated:
- IRQ allocator refactoring with intr_alloc integration
- Common-source drivers (GPIO, RMT, I2C, SPI, UART, etc.)
- Espressif components upgrade to release/master.b-test
- Peripheral drivers (ADC, PWM, LEDC, MCPWM, PCNT, Temperature Sensor, etc.)
- Wireless adapters (Wi-Fi and BLE)
- esp_timer migration to the common-source path for Xtensa devices
- Common-source power management implementation (auto-sleep and wakeup paths)
- Board defconfigs for all Xtensa Espressif boards
- SMP support improvements for ESP32-S3
- Critical section handling improvements

Key architectural changes:
- IRQ Allocator: The new interrupt allocator enables multiple mapping
  options from interrupt sources to CPU interrupts, providing flexibility
  required by modern peripherals. Although this introduces breaking changes
  to the interrupt handling API, the required ARCH_MINIMAL_VECTORTABLE
  Kconfig option is explicitly checked during startup to ensure proper
  configuration. This validation prevents runtime issues from configuration
  mismatches.
- Xtensa-specific interrupt handling via esp_xtensa_intr.c providing
  NuttX-native implementations of xt_ints_on/off and interrupt handlers,
  avoiding conflicts with NuttX's core Xtensa macros.
- Timer/RTC unification: ESP32/ESP32-S2/ESP32-S3 move from chip-specific
  RTC/RT-timer code to common-source Espressif integration, including
  esp_timer_adapter/esp_rtc paths and the required bringup/defconfig updates.
- Power management consolidation: Xtensa PM follows the common-source
  implementation, including common-source auto-sleep behavior, UART/Wi-Fi
  wakeup coordination, and tickless-safe sleep flow compatibility.

Note: This is a large commit to maintain bisectability. Breaking the
changes into smaller commits would result in non-building intermediate
states across the common-source infrastructure update.

Tested configurations:
- All defconfigs were tested, including `ostest`.

Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
2026-03-29 00:33:11 +08:00
simbit18
0a76e9fe8a arch\xtensa: Fix Kconfig style
- Remove spaces from Kconfig

- Add TABs

- Add comments

Signed-off-by: simbit18 <simbit18@gmail.com>
2026-03-26 13:39:41 -04:00
simbit18
cf0b8d04ad arch\xtensa: Fix Make style
- Remove spaces from make file

Signed-off-by: simbit18 <simbit18@gmail.com>
2026-03-23 18:16:46 -04:00
Huang Qi
e3eeaefd6d style: Fix "the the" typo across the codebase.
Fix 269 occurrences of duplicate "the" word typo found in 209 files
across source code, header files, and configuration.

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2026-03-23 11:07:49 +01:00
Eren Terzioglu
77f2f7989d arch/xtensa/espressif: Add AES accelerator support
Add AES accelerator support for esp32[-s2|-s3]

Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
2026-03-17 18:45:53 -03:00
wangjianyu3
370921aeba arch/xtensa/esp32s3: add CAM DVP imgdata driver
Add ESP32-S3 CAM controller driver implementing the NuttX imgdata
interface. Supports 8-bit DVP camera input with DMA-based frame
capture, VSYNC interrupt handling, and PSRAM frame buffer allocation.

The driver is sensor-agnostic: resolution and pixel format are
negotiated at runtime through the V4L2 pipeline. XCLK output
(24 MHz) is started during initialization for sensor communication.

Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
2026-03-16 17:26:27 -03:00
Eren Terzioglu
515e87391a arch/xtensa/espressif: Add SHA accelerator features
Add SHA accelerator features for esp32[-s2|-s3]

Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
2026-03-16 11:09:49 +08:00
Tiago Medicci Serrano
18be6955c6 arch/xtensa/src/common: Create SoC-specific initialization routine
This commits adds a function that can be implemented by any vendor
to allow SoC-specific functions to be called by `up_initialize`.
Please note that `up_initialize` is provided by the arch level, but
it doesn't allow SoC-specific initialization. Although it could be
possible to run such initialization on board-level, semantically
it isn't related to the board, but with the SoC. As an example of
such implementation, some SoCs require RTC subsystem initialization
to occur before the OS is completely initialized.

Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
2026-02-27 08:12:19 -03:00
Chip L.
6cb6c45987 arch/xtensa/esp32: Fix buffer overflow in SPI poll exchange
The esp32_spi_poll_exchange() function previously used a hardcoded
length of sizeof(uint32_t) (4 bytes) for memcpy() operations and
pointer increments, disregarding the actual remaining transfer_size.

When an SPI transaction involved a data length not aligned to 4 bytes
(such as a 1-byte payload commonly used in sub-GHz radio drivers),
the driver forced a 4-byte memory transfer. This caused out-of-bounds
reads and writes, leading to stack smashing and fatal CPU exceptions
(e.g., EXCCAUSE=0000).

This patch resolves the memory corruption vulnerability by:
1. Calculating a precise `chunk` size for each iteration, strictly
   bounded by the remaining `transfer_size`.
2. Limiting the memcpy() operations and the subsequent pointer
   increments (tp and rp) to this exact chunk size.
3. Zero-initializing the temporary TX register (w_wd) before copying
   to clear padding and prevent reading uninitialized memory.
4. Adding a NULL check for the receive pointer (rp) prior to the
   memcpy operation to prevent unintended memory writes.

Signed-off-by: Chip L. <chplee@gmail.com>
2026-02-27 08:10:46 -03:00
Eren Terzioglu
90147a72c2 arch/xtensa/espressif: Fix SHA errors
Fix SHA errors for esp32[-s2|-s3]

Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
2026-02-24 12:57:46 +01:00
Vlad Pruteanu
4775f5ba21 xtensa/esp32: Fix HMAC-SHA when a long key is used
When using a key that is longer than the block size of the hashing
algorithm used, the key must be hashed before it is used.

Signed-off-by: Vlad Pruteanu <pruteanuvlad1611@yahoo.com>
2026-02-24 08:32:19 -03:00
Filipe Cavalcanti
293d33f5dd arch/xtensa/esp32: select I2C_DRIVER on I2C
Automatically select I2C_DRIVER when ESP32_I2C is selected.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2026-02-20 14:56:54 +01:00
SPRESENSE
72b67832ea Makefile: Remove make depend files by make distclean
Intermediate files of make depend like .ddc and .dds may remain
when make is interrupted. Remove them using make distclean.

Signed-off-by: SPRESENSE <41312067+SPRESENSE@users.noreply.github.com>
2026-02-16 16:27:57 +01:00
wangzhi16
a2e8a5464e arch/xtensa: replace critical_section with spinlock.
The benefits of doing this are:

1. It makes the code logic clearer, with different resources protected by different locks.

2. It improves system responsiveness and avoids contention issues caused by acquiring the same large lock.

Signed-off-by: wangzhi16 <wangzhi16@xiaomi.com>
2026-02-02 21:17:20 +08:00
zhanghongyu
a7567677a8 netdev_driver: add carrier_on to xxx_ifup where carrier_on is absent
since the judgment for network card selection was changed from IS_UP to
IS_RUNNING, drivers that lack carrier_on need to add the carrier_on
operation; otherwise, network access issues will occur.

Signed-off-by: zhanghongyu <zhanghongyu@xiaomi.com>
2026-02-02 13:23:05 +08:00
Adwait Godbole
5c43ef4eaf arch: xtensa: fix INT32_C macro to match int32_t type
INT32_C(x) is currently defined as x ## ll on Xtensa, which
produces a long long int constant. However, int32_t is
defined as long int on this architecture.

This mismatch can break C++ template overload resolution
and causes build failures in downstream projects such as PX4.

Fix the macro by using x ## l so INT32_C expands to the same
underlying type as int32_t.

Signed-off-by: Adwait Godbole <adwaitngodbole@gmail.com>
2026-02-02 10:47:55 +08:00
nope
f375093a25 arch/esp32s3/spi: make sure spi don't send wrong bytes when dma is enabled
SPI transmits incorrect bytes when DMA is enabled and `txbuffer` of
`esp32s3_spi_dma_exchange()` is NULL, causing mounted FAT32 SD cards
to fail with -ENODEV during read operations.

Signed-off-by: liu <liu334275@gmail.com>
2026-01-31 02:50:52 +08:00
wangzhi16
364a633ec3 sched/signal: Optimize code logic
Adjust the up_schedule_sigaction function to facilitate subsequent spinlock optimization work.

Signed-off-by: wangzhi16 <wangzhi16@xiaomi.com>
2026-01-27 21:24:31 +08:00
nuttxs
fa2d2b8898 boards/xtensa: fixes for compilation and start-up issues when legacy
boot mode is configured

1. Explicitly define the .rtc_reserved section to ensure RTC data
that requires fixed address is correctly placed and does not
conflict with other sections
2. When legacy boot is configured, vecbase must also be set and
clear the BSS section
3. Cache must be disabled during Flash operations, so all
Flash-operation-related functions must be placed in IRAM
(internal RAM). Update the linker script for legacy boot mode

Signed-off-by: nuttxs <zhaoqing.zhang@sony.com>
2026-01-26 19:22:14 -03:00
Eren Terzioglu
2dbdcd603f arch/xtensa: Fix esp32s2 SPI errors
Fix esp32s2 SPI DMA and SPI3 errors

Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
2026-01-27 03:09:34 +08:00
trns1997
9159f6e353 build/cmake: Add toolchain C++ library linking for all platforms.
Extend CONFIG_LIBCXXTOOLCHAIN support to all remaining platforms
in CMake builds by explicitly locating and linking libstdc++.a
from the toolchain. This prevents build failures caused by STL
header/library mismatches where toolchain headers are included
without the corresponding library.
* Adds nuttx_find_toolchain_lib() calls for all platforms.
* Aligns CMake behavior with Make build system.

Signed-off-by: trns1997 <trns1997@gmail.com>
2026-01-24 19:30:21 +08:00
chenxiaoyi
dbbcd7c88c arch/xtensa: remove the use of XCHAL_SYSCALL_LEVEL
After PR#14672, there is no use of XCHAL_SYSCALL_LEVEL.

Signed-off-by: chenxiaoyi <chenxiaoyi@xiaomi.com>
2026-01-23 10:52:43 +08:00
chenxiaoyi
775c95a599 arch/xtensa: delete XCHAL_SYSCALL_LEVEL macro definition
After PR#14672, there is no use of XCHAL_SYSCALL_LEVEL.

Signed-off-by: chenxiaoyi <chenxiaoyi@xiaomi.com>
2026-01-23 10:52:43 +08:00
hujun5
a3273e6a96 arch: Add stack alignment and stack size checking when CONFIG_TLS_ALIGNED=y
Add validation to ensure allocated stack size does not exceed TLS_MAXSTACK when
CONFIG_TLS_ALIGNED is enabled, and verify proper stack alignment using STACK_ALIGN_MASK
across all architectures. This improves stack safety and prevents potential TLS overflow conditions.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2026-01-22 22:18:11 +08:00
hujun5
6f03601169 arch: rename STACK_ALIGNMENT to STACKFRAME_ALIGN across all architectures
Rename STACK_ALIGNMENT macro to STACKFRAME_ALIGN throughout the codebase
to provide clearer naming semantics. The new name better reflects the macro's
purpose of frame alignment rather than general stack alignment.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2026-01-22 15:37:24 +08:00
hujun5
63e59e26c0 arch: move some macros to public code.
Move stack alignment and kernel stack macros from architecture-specific internal
headers to public include/nuttx/irq.h. Consolidates duplicate definitions across
17 architecture families, reducing code duplication while enabling common code
to access these core alignment utilities without architecture dependencies.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2026-01-20 01:53:08 +08:00
hujun5
8bb250a4c0 arch: move STACK_ALIGNMENT to irq.h
Move STACK_ALIGNMENT macro definitions from architecture-specific internal
headers to public irq.h headers. This enables common code to directly access
STACK_ALIGNMENT without requiring internal header inclusion, improving code
organization and reducing header dependencies. Applies to all architectures:
ARM, ARM64, AVR, HC, MIPS, or1k, Renesas, RISC-V, SIM, SPARC, TriCore, x86,
x86_64, Xtensa, Z16, and Z80.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2026-01-19 14:43:43 +08:00
wangchengdong
1b8d8f7565 arch/xtensa: Add support to disable signals actions related data struct
Add support to disable signals actions related struct

Co-authored-by: guoshichao <guoshichao@xiaomi.com>
Signed-off-by: Chengdong Wang <wangchengdong@lixiang.com>
2026-01-18 08:24:13 -03:00
hujun5
657ac8317e arch: fix addrenv_switch changing this_task causing exceptions
After addrenv_switch(), the current running task (this_task) may change due to
deferred work execution. Update all architecture interrupt, syscall, and exit
handlers to re-fetch tcb = this_task() after addrenv_switch(). Ensures scheduler
and context operations use the correct TCB, preventing context corruption and
exceptions across SMP and memory-protected builds.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2026-01-17 18:23:06 -03:00
ligd
113bb02568 checkstack: fix access overflow when checkstack
We should check length first, and then check the value

Signed-off-by: ligd <liguiding1@xiaomi.com>
2026-01-17 18:04:28 -03:00
wangchengdong
15f6e399b8 nuttx/arch: merge tickless and tick process
merge nxsched_timer_expiration() into nxsched_process_timer()
    to improve code efficient

Signed-off-by: Chengdong Wang <wangchengdong@lixiang.com>
2026-01-12 16:20:42 +08:00
simbit18
bfa7025c28 arch/xtensa: Fix Kconfig style
- Replace help => ---help---

- Remove TAB

- Add comments

Signed-off-by: simbit18 <simbit18@gmail.com>
2026-01-06 06:35:08 +08:00
rongyichang
3a0ab84855 xtensa/esp32s3: fix dcache flush error in up_flush_dcache
The items is not used in up_flush_dcache, and we should use it in
function cache_invalidate_dcache_items.

Signed-off-by: rongyichang <rongyichang@xiaommi.com>
2026-01-01 07:26:25 -03:00
anjiahao
0a2b01950c sched:use tcb_s inside of task_tcb_s , remove all cast
Simplify the code and remove different tcb

Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2025-12-22 17:55:45 +08:00
Alan Carvalho de Assis
30a7420349 boards/esp32: Add initial support to heltec_wifi_lora32
This commit adds basic/initial support to Heltec WiFi LoRa32 board.

Signed-off-by: Alan C. Assis <acassis@gmail.com>
2025-12-21 15:18:08 -03:00
Alan Carvalho de Assis
3bf8b55d64 arch/xtensa/esp32: Add CONFIG_ESP32_IGNORE_CHIP_REVISION_CHECK
This commit add the option that was missing in the esp32_start.c
to ignore the chip version for boards with old ESP32 silicon tape out.

Signed-off-by: Alan C. Assis <acassis@gmail.com>
2025-12-21 15:18:08 -03:00
zhanghongyu
aa8ffea3cf netdev_upperhalf: convert Kconfig to variable
Upperhalf supports multiple working modes at the same time,
which is specified by NIC when register

Signed-off-by: zhanghongyu <zhanghongyu@xiaomi.com>
2025-12-14 10:01:22 +08:00
Filipe Cavalcanti
49d6177c68 espressif: automate build system for flash enc
Modifies Kconfig and build tools to support flash encryption
and E-Fuse burning when flash encryption is enabled.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2025-12-11 11:29:26 +01:00
Filipe Cavalcanti
8f42a6f6d7 arch/xtensa: add critical section on e-fuse bringup
The efuse initialization requires critical section to avoid a very
hidden corner case when flash encryption is enabled.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2025-12-11 11:29:26 +01:00