Commit graph

4 commits

Author SHA1 Message Date
Abhishek Mishra
0577a674e7 boards/risc-v/esp32c3: add ESP32-C3 SuperMini support
Add board files, nsh/usbnsh/gpio/wifi configs, and documentation
with V1601 pinout photos.

Assisted-by: Cursor:Grok-4.6
Signed-off-by: Abhishek Mishra <mishra.abhishek2808@gmail.com>
2026-09-13 08:29:50 -03:00
simbit18
9035fba275 ci/testlist/risc-v-02.dat: Added boards build with CMake
-  Boards build by CMake

    esp32c3-xiao

    esp32-c3-zero

Signed-off-by: simbit18 <simbit18@gmail.com>
2026-04-22 06:22:36 +08:00
Lup Yuen Lee
80d03cb296 CI: Split the RISC-V Build Jobs into smaller jobs
To speed up the CI Workflow, this PR splits the CI Build Jobs for RISC-V into smaller jobs. Each job will now complete within 1 hour.

Before the PR: There are 2 jobs for RISC-V, each requiring more than 1.5 hours
- `risc-v-01` (1 hour 42 mins): BL602, Ox64, ESP32-C3 / C6 / H2
- `risc-v-02` (1 hour 41 mins): K230, Icicle, QEMU, RV32M1-Vega

After the PR: The build is spread across 6 jobs for RISC-V, each job completes within 1 hour
- `risc-v-01` (19 mins): BL602, Ox64
- `risc-v-02` (44 mins): ESP32-C3
- `risc-v-03` (45 mins): ESP32-C6, ESP32-H2
- `risc-v-04` (31 mins): K230, Icicle
- `risc-v-05` (41 mins): QEMU CITest
- `risc-v-06` (38 mins): Rest of QEMU, RV32M1-Vega

Following the same convention as the Arm32 Build Jobs, the above jobs are sorted by Target Name. Performance of the RISC-V Build Jobs is discussed in https://github.com/apache/nuttx/issues/13775
2024-10-10 08:44:02 +08:00
simbit18
3637040d73 tools/ci/testlist: Added jobs to speed up CI checks.
Divided jobs risc-v and xtensa to finish workflow under 2 hours.
2024-07-30 01:43:29 +08:00
Renamed from tools/ci/testlist/risc-v.dat (Browse further)