Gregory Nutt
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319ca7c2ce
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Fix typos in AVR32 Kconfig files. From Stefan Sperling
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2014-06-23 11:20:33 -06:00 |
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Gregory Nutt
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19c1bd3a45
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Fix typos in AVR32 Kconfig files. From Stefan Sperling
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2014-06-23 11:20:33 -06:00 |
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Gregory Nutt
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4e3c794363
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SAMA5D4: Add missing mappings for the VDEC and L2CC memory regions
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2014-06-21 14:25:47 -06:00 |
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Gregory Nutt
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04e6fdf043
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SAMA5D4: Add missing mappings for the VDEC and L2CC memory regions
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2014-06-21 14:25:47 -06:00 |
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Gregory Nutt
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4b9666658e
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Correct type of SAMA5 arm_decodefiq() return value
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2014-06-21 10:34:35 -06:00 |
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Gregory Nutt
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942d24a005
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Correct type of SAMA5 arm_decodefiq() return value
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2014-06-21 10:34:35 -06:00 |
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Gregory Nutt
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0a134f0158
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Need to enable FIQ in initial task state; Improve H32/64 test in IRQ handling
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2014-06-21 09:55:09 -06:00 |
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Gregory Nutt
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190cbc766e
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Need to enable FIQ in initial task state; Improve H32/64 test in IRQ handling
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2014-06-21 09:55:09 -06:00 |
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Gregory Nutt
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40b7ddf68e
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SAMA5: FIQs should be disabled along with IRQs on most exeptions in most configuratinons. arm_decodefiq and arm_decodeirq are mutually exclusive and, hence, can use the same interrupt stack
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2014-06-20 18:49:01 -06:00 |
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Gregory Nutt
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1186290a8d
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SAMA5: FIQs should be disabled along with IRQs on most exeptions in most configuratinons. arm_decodefiq and arm_decodeirq are mutually exclusive and, hence, can use the same interrupt stack
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2014-06-20 18:49:01 -06:00 |
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Gregory Nutt
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c68d2532be
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SAMA5D4: Add support for secure/FIQ interrupts; SAIC supports need to be be enabled unconditionally
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2014-06-20 18:16:41 -06:00 |
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Gregory Nutt
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3f6b1642ca
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SAMA5D4: Add support for secure/FIQ interrupts; SAIC supports need to be be enabled unconditionally
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2014-06-20 18:16:41 -06:00 |
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Gregory Nutt
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8f4f73884b
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SAMA5D4: Fix MATRIX32 base address
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2014-06-20 18:15:13 -06:00 |
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Gregory Nutt
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9542994616
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SAMA5D4: Fix MATRIX32 base address
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2014-06-20 18:15:13 -06:00 |
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Gregory Nutt
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8fb8774c26
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SAMA5D4: Minor fixes to get working with SAMA5D3 again
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2014-06-20 16:01:45 -06:00 |
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Gregory Nutt
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ec0fc7756b
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SAMA5D4: Minor fixes to get working with SAMA5D3 again
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2014-06-20 16:01:45 -06:00 |
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Gregory Nutt
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0a2133b57f
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SAMA5D4: Add partial support for secure interrupt controller (SAIC)
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2014-06-20 15:22:00 -06:00 |
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Gregory Nutt
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fb25ba907c
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SAMA5D4: Add partial support for secure interrupt controller (SAIC)
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2014-06-20 15:22:00 -06:00 |
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Gregory Nutt
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aecddf9b52
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SAMA5D4: USART peripheral clock appears to be MCK/2
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2014-06-20 11:40:36 -06:00 |
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Gregory Nutt
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083986e814
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SAMA5D4: USART peripheral clock appears to be MCK/2
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2014-06-20 11:40:36 -06:00 |
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Gregory Nutt
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b31f34cf94
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SAMA5D4-EK: Make sure that the H32MX divider is set; correct sense of bit driver red LED
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2014-06-20 10:33:33 -06:00 |
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Gregory Nutt
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a55457b175
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SAMA5D4-EK: Make sure that the H32MX divider is set; correct sense of bit driver red LED
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2014-06-20 10:33:33 -06:00 |
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Gregory Nutt
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9869c9b50d
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SAMA5D4: Fix peripheral clocking macros: AIC and L2CC are continuously clocked
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2014-06-19 15:52:42 -06:00 |
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Gregory Nutt
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ac6b64dac3
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SAMA5D4: Fix peripheral clocking macros: AIC and L2CC are continuously clocked
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2014-06-19 15:52:42 -06:00 |
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Gregory Nutt
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c14d80ee25
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SAMA5D4: Initial bring-up fixes
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2014-06-19 14:16:36 -06:00 |
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Gregory Nutt
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231fd1b5c8
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SAMA5D4: Initial bring-up fixes
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2014-06-19 14:16:36 -06:00 |
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Gregory Nutt
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ce390e12a8
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Costmetic update to comments/README file
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2014-06-18 17:40:06 -06:00 |
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Gregory Nutt
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acf42e2ce4
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Costmetic update to comments/README file
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2014-06-18 17:40:06 -06:00 |
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Gregory Nutt
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902c1342b9
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Cosmetic cleanup
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2014-06-18 08:24:53 -06:00 |
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Gregory Nutt
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2b5f8dbba5
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Cosmetic cleanup
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2014-06-18 08:24:53 -06:00 |
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Gregory Nutt
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e2ede42d14
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SAMA5D4: XDMAC driver now compiles error/warning free (still untested)
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2014-06-17 16:31:09 -06:00 |
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Gregory Nutt
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9c0de33715
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SAMA5D4: XDMAC driver now compiles error/warning free (still untested)
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2014-06-17 16:31:09 -06:00 |
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Gregory Nutt
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4b3342fd96
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SAMA5D4: More progress on XDMAC driver (still no complete); Also fixes some critical errors in the SAMA5D3 DMA definitions
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2014-06-17 13:18:52 -06:00 |
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Gregory Nutt
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9d44747f60
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SAMA5D4: More progress on XDMAC driver (still no complete); Also fixes some critical errors in the SAMA5D3 DMA definitions
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2014-06-17 13:18:52 -06:00 |
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Gregory Nutt
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5d73322dc7
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SAMA5D4: Correct MATRIX register addresses
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2014-06-14 10:42:53 -06:00 |
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Gregory Nutt
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260c2676d4
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SAMA5D4: Correct MATRIX register addresses
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2014-06-14 10:42:53 -06:00 |
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Gregory Nutt
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1a236c13de
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SAMA5D4: Implement SDRAM initialization
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2014-06-14 10:42:26 -06:00 |
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Gregory Nutt
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37d06c7444
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SAMA5D4: Implement SDRAM initialization
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2014-06-14 10:42:26 -06:00 |
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Gregory Nutt
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9e7eb2d12d
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SAMA5D4: Fix some memory remapping issues; updates to comments and README files
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2014-06-14 08:02:58 -06:00 |
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Gregory Nutt
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d80c55e8b6
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SAMA5D4: Fix some memory remapping issues; updates to comments and README files
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2014-06-14 08:02:58 -06:00 |
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Gregory Nutt
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cf72b05936
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SAMA5: XDMAC update (still not complete)
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2014-06-13 11:59:44 -06:00 |
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Gregory Nutt
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2c6c1685de
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SAMA5: XDMAC update (still not complete)
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2014-06-13 11:59:44 -06:00 |
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Gregory Nutt
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ab79090ce0
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SAMA5D4: Initial XDMAC driver logic; initial check-in is little more the the DMAC driver with some name changes
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2014-06-12 16:33:04 -06:00 |
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Gregory Nutt
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2423ef3fdc
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SAMA5D4: Initial XDMAC driver logic; initial check-in is little more the the DMAC driver with some name changes
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2014-06-12 16:33:04 -06:00 |
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Gregory Nutt
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a2cb59cab8
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First check-in of Lazlo's PF_PACKET 'raw' socket implementation
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2014-06-12 11:52:06 -06:00 |
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Gregory Nutt
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faaf641490
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First check-in of Lazlo's PF_PACKET 'raw' socket implementation
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2014-06-12 11:52:06 -06:00 |
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Gregory Nutt
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a23245781a
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STM32: Handle setting of USART CR1_M when 8 bits of data plus parity
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2014-06-11 15:49:54 -06:00 |
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Gregory Nutt
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3bfc1effaf
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STM32: Handle setting of USART CR1_M when 8 bits of data plus parity
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2014-06-11 15:49:54 -06:00 |
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Gregory Nutt
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5009def270
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Typo in last SAMA5D4 commit
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2014-06-11 13:43:54 -06:00 |
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Gregory Nutt
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fd710fc8db
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Typo in last SAMA5D4 commit
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2014-06-11 13:43:54 -06:00 |
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