Commit graph

21952 commits

Author SHA1 Message Date
Gregory Nutt
319ca7c2ce Fix typos in AVR32 Kconfig files. From Stefan Sperling 2014-06-23 11:20:33 -06:00
Gregory Nutt
19c1bd3a45 Fix typos in AVR32 Kconfig files. From Stefan Sperling 2014-06-23 11:20:33 -06:00
Gregory Nutt
4e3c794363 SAMA5D4: Add missing mappings for the VDEC and L2CC memory regions 2014-06-21 14:25:47 -06:00
Gregory Nutt
04e6fdf043 SAMA5D4: Add missing mappings for the VDEC and L2CC memory regions 2014-06-21 14:25:47 -06:00
Gregory Nutt
4b9666658e Correct type of SAMA5 arm_decodefiq() return value 2014-06-21 10:34:35 -06:00
Gregory Nutt
942d24a005 Correct type of SAMA5 arm_decodefiq() return value 2014-06-21 10:34:35 -06:00
Gregory Nutt
0a134f0158 Need to enable FIQ in initial task state; Improve H32/64 test in IRQ handling 2014-06-21 09:55:09 -06:00
Gregory Nutt
190cbc766e Need to enable FIQ in initial task state; Improve H32/64 test in IRQ handling 2014-06-21 09:55:09 -06:00
Gregory Nutt
40b7ddf68e SAMA5: FIQs should be disabled along with IRQs on most exeptions in most configuratinons. arm_decodefiq and arm_decodeirq are mutually exclusive and, hence, can use the same interrupt stack 2014-06-20 18:49:01 -06:00
Gregory Nutt
1186290a8d SAMA5: FIQs should be disabled along with IRQs on most exeptions in most configuratinons. arm_decodefiq and arm_decodeirq are mutually exclusive and, hence, can use the same interrupt stack 2014-06-20 18:49:01 -06:00
Gregory Nutt
c68d2532be SAMA5D4: Add support for secure/FIQ interrupts; SAIC supports need to be be enabled unconditionally 2014-06-20 18:16:41 -06:00
Gregory Nutt
3f6b1642ca SAMA5D4: Add support for secure/FIQ interrupts; SAIC supports need to be be enabled unconditionally 2014-06-20 18:16:41 -06:00
Gregory Nutt
8f4f73884b SAMA5D4: Fix MATRIX32 base address 2014-06-20 18:15:13 -06:00
Gregory Nutt
9542994616 SAMA5D4: Fix MATRIX32 base address 2014-06-20 18:15:13 -06:00
Gregory Nutt
8fb8774c26 SAMA5D4: Minor fixes to get working with SAMA5D3 again 2014-06-20 16:01:45 -06:00
Gregory Nutt
ec0fc7756b SAMA5D4: Minor fixes to get working with SAMA5D3 again 2014-06-20 16:01:45 -06:00
Gregory Nutt
0a2133b57f SAMA5D4: Add partial support for secure interrupt controller (SAIC) 2014-06-20 15:22:00 -06:00
Gregory Nutt
fb25ba907c SAMA5D4: Add partial support for secure interrupt controller (SAIC) 2014-06-20 15:22:00 -06:00
Gregory Nutt
aecddf9b52 SAMA5D4: USART peripheral clock appears to be MCK/2 2014-06-20 11:40:36 -06:00
Gregory Nutt
083986e814 SAMA5D4: USART peripheral clock appears to be MCK/2 2014-06-20 11:40:36 -06:00
Gregory Nutt
b31f34cf94 SAMA5D4-EK: Make sure that the H32MX divider is set; correct sense of bit driver red LED 2014-06-20 10:33:33 -06:00
Gregory Nutt
a55457b175 SAMA5D4-EK: Make sure that the H32MX divider is set; correct sense of bit driver red LED 2014-06-20 10:33:33 -06:00
Gregory Nutt
9869c9b50d SAMA5D4: Fix peripheral clocking macros: AIC and L2CC are continuously clocked 2014-06-19 15:52:42 -06:00
Gregory Nutt
ac6b64dac3 SAMA5D4: Fix peripheral clocking macros: AIC and L2CC are continuously clocked 2014-06-19 15:52:42 -06:00
Gregory Nutt
c14d80ee25 SAMA5D4: Initial bring-up fixes 2014-06-19 14:16:36 -06:00
Gregory Nutt
231fd1b5c8 SAMA5D4: Initial bring-up fixes 2014-06-19 14:16:36 -06:00
Gregory Nutt
ce390e12a8 Costmetic update to comments/README file 2014-06-18 17:40:06 -06:00
Gregory Nutt
acf42e2ce4 Costmetic update to comments/README file 2014-06-18 17:40:06 -06:00
Gregory Nutt
902c1342b9 Cosmetic cleanup 2014-06-18 08:24:53 -06:00
Gregory Nutt
2b5f8dbba5 Cosmetic cleanup 2014-06-18 08:24:53 -06:00
Gregory Nutt
e2ede42d14 SAMA5D4: XDMAC driver now compiles error/warning free (still untested) 2014-06-17 16:31:09 -06:00
Gregory Nutt
9c0de33715 SAMA5D4: XDMAC driver now compiles error/warning free (still untested) 2014-06-17 16:31:09 -06:00
Gregory Nutt
4b3342fd96 SAMA5D4: More progress on XDMAC driver (still no complete); Also fixes some critical errors in the SAMA5D3 DMA definitions 2014-06-17 13:18:52 -06:00
Gregory Nutt
9d44747f60 SAMA5D4: More progress on XDMAC driver (still no complete); Also fixes some critical errors in the SAMA5D3 DMA definitions 2014-06-17 13:18:52 -06:00
Gregory Nutt
5d73322dc7 SAMA5D4: Correct MATRIX register addresses 2014-06-14 10:42:53 -06:00
Gregory Nutt
260c2676d4 SAMA5D4: Correct MATRIX register addresses 2014-06-14 10:42:53 -06:00
Gregory Nutt
1a236c13de SAMA5D4: Implement SDRAM initialization 2014-06-14 10:42:26 -06:00
Gregory Nutt
37d06c7444 SAMA5D4: Implement SDRAM initialization 2014-06-14 10:42:26 -06:00
Gregory Nutt
9e7eb2d12d SAMA5D4: Fix some memory remapping issues; updates to comments and README files 2014-06-14 08:02:58 -06:00
Gregory Nutt
d80c55e8b6 SAMA5D4: Fix some memory remapping issues; updates to comments and README files 2014-06-14 08:02:58 -06:00
Gregory Nutt
cf72b05936 SAMA5: XDMAC update (still not complete) 2014-06-13 11:59:44 -06:00
Gregory Nutt
2c6c1685de SAMA5: XDMAC update (still not complete) 2014-06-13 11:59:44 -06:00
Gregory Nutt
ab79090ce0 SAMA5D4: Initial XDMAC driver logic; initial check-in is little more the the DMAC driver with some name changes 2014-06-12 16:33:04 -06:00
Gregory Nutt
2423ef3fdc SAMA5D4: Initial XDMAC driver logic; initial check-in is little more the the DMAC driver with some name changes 2014-06-12 16:33:04 -06:00
Gregory Nutt
a2cb59cab8 First check-in of Lazlo's PF_PACKET 'raw' socket implementation 2014-06-12 11:52:06 -06:00
Gregory Nutt
faaf641490 First check-in of Lazlo's PF_PACKET 'raw' socket implementation 2014-06-12 11:52:06 -06:00
Gregory Nutt
a23245781a STM32: Handle setting of USART CR1_M when 8 bits of data plus parity 2014-06-11 15:49:54 -06:00
Gregory Nutt
3bfc1effaf STM32: Handle setting of USART CR1_M when 8 bits of data plus parity 2014-06-11 15:49:54 -06:00
Gregory Nutt
5009def270 Typo in last SAMA5D4 commit 2014-06-11 13:43:54 -06:00
Gregory Nutt
fd710fc8db Typo in last SAMA5D4 commit 2014-06-11 13:43:54 -06:00