Gregory Nutt
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e4981b09d9
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SAMA5 timer/counter: Add support for a one-shot timer wrapper around the low-level timer/counter logic. This also involved several changes that rippled into the ADC driver (untested).
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2014-08-09 15:27:55 -06:00 |
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Gregory Nutt
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d8aa6c01bd
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SAMA5 timer/counter: Add support for a one-shot timer wrapper around the low-level timer/counter logic. This also involved several changes that rippled into the ADC driver (untested).
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2014-08-09 15:27:55 -06:00 |
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Gregory Nutt
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c7662e3f92
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SAMA5 T/C: Can now handle non-constant BOARD_MCK_FREQUENCY. Also now supports methods to attach user interrupt handlers
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2014-08-09 10:30:45 -06:00 |
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Gregory Nutt
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5803fb78b8
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SAMA5 T/C: Can now handle non-constant BOARD_MCK_FREQUENCY. Also now supports methods to attach user interrupt handlers
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2014-08-09 10:30:45 -06:00 |
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Gregory Nutt
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5d143578b0
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Fix errors in documentation and comments related to the Tickless OS. From Vijay Kumar
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2014-08-09 06:41:38 -06:00 |
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Gregory Nutt
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da0de3284e
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Fix errors in documentation and comments related to the Tickless OS. From Vijay Kumar
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2014-08-09 06:41:38 -06:00 |
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Gregory Nutt
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6455f60c60
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Remove os_internal.h it has been replace by several new header files under sched/. There have been some sneak inclusion paths via os_internal.h, so expect a few compilation errors for some architectures
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2014-08-08 18:39:28 -06:00 |
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Gregory Nutt
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e1769b22f1
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Remove os_internal.h it has been replace by several new header files under sched/. There have been some sneak inclusion paths via os_internal.h, so expect a few compilation errors for some architectures
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2014-08-08 18:39:28 -06:00 |
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Gregory Nutt
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4dc151097e
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Replace os_internal.h with sched/sched.h in files that actually reference something in sched.h
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2014-08-08 17:53:55 -06:00 |
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Gregory Nutt
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d798dd37a7
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Replace os_internal.h with sched/sched.h in files that actually reference something in sched.h
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2014-08-08 17:53:55 -06:00 |
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Gregory Nutt
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c98ece6bec
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Move task control files from sched/ to sched/task
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2014-08-08 16:44:08 -06:00 |
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Gregory Nutt
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23a334c066
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Move task control files from sched/ to sched/task
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2014-08-08 16:44:08 -06:00 |
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Gregory Nutt
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1c99d53bb1
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Move clock functions from sched/ to sched/clock
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2014-08-08 14:43:02 -06:00 |
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Gregory Nutt
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d4b56eb3cc
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Move clock functions from sched/ to sched/clock
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2014-08-08 14:43:02 -06:00 |
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Gregory Nutt
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192f82f380
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Move interrupt dispatch logic from sched/ to sched/irq
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2014-08-08 14:31:15 -06:00 |
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Gregory Nutt
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85e8117062
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Move interrupt dispatch logic from sched/ to sched/irq
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2014-08-08 14:31:15 -06:00 |
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Gregory Nutt
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39183d37b8
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Change all time conversions. Yech. New timer units in microseconds breaks all existing logic that used milliseconds in the conversions. Something likely got broken doing this, probably because I confused a MSEC2TICK conversion with a TICK2MSEC conversion. Also, the tickless OS no appears fully functional and passes the OS test on the simulator with no errors
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2014-08-07 18:00:38 -06:00 |
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Gregory Nutt
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c9661ad5a7
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Change all time conversions. Yech. New timer units in microseconds breaks all existing logic that used milliseconds in the conversions. Something likely got broken doing this, probably because I confused a MSEC2TICK conversion with a TICK2MSEC conversion. Also, the tickless OS no appears fully functional and passes the OS test on the simulator with no errors
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2014-08-07 18:00:38 -06:00 |
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Gregory Nutt
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8b2a8fceba
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Change CONFIG_MSEC_PER_TICK to CONFIG_USEC_PER_TICK. This gives more options for system timers in general, but more importantly, let's us realize higher resolution for the case of CONFIG_SCHED_TICKLESS=y -- of course, at the risk of some new interger overvflow problems
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2014-08-07 13:42:47 -06:00 |
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Gregory Nutt
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0aa7209765
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Change CONFIG_MSEC_PER_TICK to CONFIG_USEC_PER_TICK. This gives more options for system timers in general, but more importantly, let's us realize higher resolution for the case of CONFIG_SCHED_TICKLESS=y -- of course, at the risk of some new interger overvflow problems
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2014-08-07 13:42:47 -06:00 |
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Gregory Nutt
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f140e112e0
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Implements the tickless OS
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2014-08-07 11:39:16 -06:00 |
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Gregory Nutt
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520a51a3e1
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Implements the tickless OS
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2014-08-07 11:39:16 -06:00 |
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Gregory Nutt
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c275ebef35
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Add support for a simulated interval timer support verification of the tickless OS.
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2014-08-06 18:29:29 -06:00 |
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Gregory Nutt
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dc48bec019
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Add support for a simulated interval timer support verification of the tickless OS.
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2014-08-06 18:29:29 -06:00 |
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Gregory Nutt
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595ec296fb
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Don't build in sched_processtimer.c if CONFIG_SCHED_TICKLESS is selected.
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2014-08-06 18:27:10 -06:00 |
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Gregory Nutt
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cc7cb0f031
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Don't build in sched_processtimer.c if CONFIG_SCHED_TICKLESS is selected.
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2014-08-06 18:27:10 -06:00 |
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Gregory Nutt
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94afad9b70
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if CONFIG_SCHED_TICKLESS is defined, then the global variable g_system_timer does not exist
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2014-08-06 18:26:16 -06:00 |
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Gregory Nutt
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0452b1555b
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if CONFIG_SCHED_TICKLESS is defined, then the global variable g_system_timer does not exist
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2014-08-06 18:26:16 -06:00 |
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Gregory Nutt
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594083d870
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Rename up_timerinit() to up_timer_initailize(); Add prototypes for candidate interfaces for the tickless OS; Don't build existing timer initialization logic if CONFIG_SCHED_TICKLESS is defined.
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2014-08-06 16:26:01 -06:00 |
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Gregory Nutt
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736d3c169a
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Rename up_timerinit() to up_timer_initailize(); Add prototypes for candidate interfaces for the tickless OS; Don't build existing timer initialization logic if CONFIG_SCHED_TICKLESS is defined.
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2014-08-06 16:26:01 -06:00 |
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Gregory Nutt
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d4a29fcf7e
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SAMA5D3 HSMCI: TX DMA is again disabled
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2014-08-05 07:07:39 -06:00 |
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Gregory Nutt
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7b9c44101d
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SAMA5D3 HSMCI: TX DMA is again disabled
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2014-08-05 07:07:39 -06:00 |
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Gregory Nutt
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553a16fac5
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SAMA5 PCK: Add Main clock as an option for the PCK clock source
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2014-08-03 10:17:50 -06:00 |
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Gregory Nutt
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159bcc255d
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SAMA5 PCK: Add Main clock as an option for the PCK clock source
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2014-08-03 10:17:50 -06:00 |
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Gregory Nutt
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1fc8f2b06d
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SAMA5 SSC: Verify that the requested bit width is supported. Correct some alignment tests that depend upon the data bit width.
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2014-08-02 14:26:49 -06:00 |
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Gregory Nutt
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c75bf6d741
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SAMA5 SSC: Verify that the requested bit width is supported. Correct some alignment tests that depend upon the data bit width.
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2014-08-02 14:26:49 -06:00 |
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Gregory Nutt
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715cf207ea
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SAMA5 WM8904: Fix errors in programmable clock output configuration
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2014-08-01 15:18:58 -06:00 |
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Gregory Nutt
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83dab03576
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SAMA5 WM8904: Fix errors in programmable clock output configuration
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2014-08-01 15:18:58 -06:00 |
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Gregory Nutt
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5e92347d60
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SAMA5 SSC: Start Delay is now configurable
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2014-08-01 14:10:37 -06:00 |
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Gregory Nutt
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805a02965c
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SAMA5 SSC: Start Delay is now configurable
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2014-08-01 14:10:37 -06:00 |
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Gregory Nutt
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d68a6059e0
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SAMA5 SSC: Frame Synch Delay is now configurable
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2014-08-01 12:25:31 -06:00 |
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Gregory Nutt
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50bd2ba46c
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SAMA5 SSC: Frame Synch Delay is now configurable
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2014-08-01 12:25:31 -06:00 |
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Gregory Nutt
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c2c2921901
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SAMA5D SSC: Needs to account for data offset in audio buffer.
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2014-07-31 19:14:24 -06:00 |
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Gregory Nutt
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0b4090df0d
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SAMA5D SSC: Needs to account for data offset in audio buffer.
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2014-07-31 19:14:24 -06:00 |
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Gregory Nutt
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513329fd24
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SAMA5D3X-EK: Add support for the WM8904 audio CODEC
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2014-07-31 11:14:57 -06:00 |
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Gregory Nutt
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c657139b30
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SAMA5D3X-EK: Add support for the WM8904 audio CODEC
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2014-07-31 11:14:57 -06:00 |
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Gregory Nutt
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ffcc0b8da3
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SAMA5: Changes needed for a clean SAMA5D3 build after all of the recent SAMA5D4 changes.
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2014-07-31 11:09:56 -06:00 |
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Gregory Nutt
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24af676c05
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SAMA5: Changes needed for a clean SAMA5D3 build after all of the recent SAMA5D4 changes.
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2014-07-31 11:09:56 -06:00 |
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Gregory Nutt
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c0c4cda763
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SAMA5 HSMCI: e-enable TX DMA and verify that DMA writes to the SD card are functional. They are so now TX DMA is re-enabled in the driver. This might affect the SAMA5D3 platforms where the TX DMA problem was found. The SAMA4D3 and 4 use the same HSMCI driver. Much has change since then and it is not surprising that DMA is now functional. However, the has not be re-verified on the SAMA5D3 which has a different DMA controller.
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2014-07-30 11:20:06 -06:00 |
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Gregory Nutt
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276cc44878
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SAMA5 HSMCI: e-enable TX DMA and verify that DMA writes to the SD card are functional. They are so now TX DMA is re-enabled in the driver. This might affect the SAMA5D3 platforms where the TX DMA problem was found. The SAMA4D3 and 4 use the same HSMCI driver. Much has change since then and it is not surprising that DMA is now functional. However, the has not be re-verified on the SAMA5D3 which has a different DMA controller.
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2014-07-30 11:20:06 -06:00 |
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