Commit graph

21952 commits

Author SHA1 Message Date
Gregory Nutt
6f9f4bd9a3 Calypso: SPI built only if CONFIG_SPI 2015-04-05 13:26:25 -06:00
Gregory Nutt
9487f4628f Calypso: SPI built only if CONFIG_SPI 2015-04-05 13:26:25 -06:00
Gregory Nutt
faa11b6e64 Update comments and README 2015-04-05 07:22:46 -06:00
Gregory Nutt
fca4c51420 Update comments and README 2015-04-05 07:22:46 -06:00
Gregory Nutt
63b5863f33 SAMV7: Fix SDRAM initialization instabiilties by changing the order of initialization 2015-04-04 19:58:31 -06:00
Gregory Nutt
cf4bbae526 SAMV7: Fix SDRAM initialization instabiilties by changing the order of initialization 2015-04-04 19:58:31 -06:00
Gregory Nutt
accdce0a84 SAMV7: Apparently the data sheet is wrong, SDRAM clocking must be enabled at the PMC or the SDRAM does not work! The data sheet says that there is no clock control for SDRAMC 2015-04-04 19:04:29 -06:00
Gregory Nutt
c1886c6181 SAMV7: Apparently the data sheet is wrong, SDRAM clocking must be enabled at the PMC or the SDRAM does not work! The data sheet says that there is no clock control for SDRAMC 2015-04-04 19:04:29 -06:00
Gregory Nutt
e44201ce5f SAMV7: Fix a errort in GPIO bit encoding. Correct naming of a variable 2015-04-04 16:54:53 -06:00
Gregory Nutt
8aeaff1e95 SAMV7: Fix a errort in GPIO bit encoding. Correct naming of a variable 2015-04-04 16:54:53 -06:00
Gregory Nutt
1f8ee8a5ac SAMV7: Fix typo in some GPIO definitions 2015-04-04 14:04:58 -06:00
Gregory Nutt
fda98ebeab SAMV7: Fix typo in some GPIO definitions 2015-04-04 14:04:58 -06:00
Gregory Nutt
fd9164a18a More renaming: up_lcdinitialize->board_lcd_initialize, up_lcdgetdev->board_lcd_getdev, up_lcduninitialize->board_lcd_uninitialize 2015-04-04 11:49:15 -06:00
Gregory Nutt
02beb0d449 More renaming: up_lcdinitialize->board_lcd_initialize, up_lcdgetdev->board_lcd_getdev, up_lcduninitialize->board_lcd_uninitialize 2015-04-04 11:49:15 -06:00
Gregory Nutt
9ac9bcc28e SAMV71-XULT ILI9488 LCD driver is code complete but untested 2015-04-03 16:36:58 -06:00
Gregory Nutt
0cf5088475 SAMV71-XULT ILI9488 LCD driver is code complete but untested 2015-04-03 16:36:58 -06:00
Gregory Nutt
841854956a SAMV7: Add SMC register definition header file; SAMV71-Xult: Add an LCD driver. The initial commit is simply the SAVM4E-EK ILI9375 driver will bogus name changes to ILI9488. 2015-04-03 10:28:32 -06:00
Gregory Nutt
b72cf3366c SAMV7: Add SMC register definition header file; SAMV71-Xult: Add an LCD driver. The initial commit is simply the SAVM4E-EK ILI9375 driver will bogus name changes to ILI9488. 2015-04-03 10:28:32 -06:00
Gregory Nutt
69d2d77424 Move include/nuttx/timer.h, rtc.h and watchdog.h to include/nuttx/timers/. 2015-04-01 12:37:44 -06:00
Gregory Nutt
0ec67181c9 Move include/nuttx/timer.h, rtc.h and watchdog.h to include/nuttx/timers/. 2015-04-01 12:37:44 -06:00
Gregory Nutt
85b18f87b0 rch_tcinitialize() and arch_tcunitinitialize() renamed to board_tsc_setup() and board_tsc_teardown(). These are not long called directly by applications but only indirectly throught the crappy boardctl() OS interface. 2015-03-31 13:21:25 -06:00
Gregory Nutt
cf95d1a995 rch_tcinitialize() and arch_tcunitinitialize() renamed to board_tsc_setup() and board_tsc_teardown(). These are not long called directly by applications but only indirectly throught the crappy boardctl() OS interface. 2015-03-31 13:21:25 -06:00
Gregory Nutt
e5fd084af2 SAMV71-XULT: Add option to support connection of the maXTouch Xplained Pro on the 50-pin LCD connector 2015-03-31 09:01:38 -06:00
Gregory Nutt
eb21ad0cf2 SAMV71-XULT: Add option to support connection of the maXTouch Xplained Pro on the 50-pin LCD connector 2015-03-31 09:01:38 -06:00
Gregory Nutt
0e9f358060 SAMV7 Ethernet: Fix a write-past-end-of-buffer and trash-the-heap problem 2015-03-29 16:45:05 -06:00
Gregory Nutt
8aa133029f SAMV7 Ethernet: Fix a write-past-end-of-buffer and trash-the-heap problem 2015-03-29 16:45:05 -06:00
Gregory Nutt
f073092fad The STM32F4Discovery board doesn't come with a Low speed external oscillator so the default LSE source for the RTC doesn't work.
In stm32_rtcc.c the up_rtcinitialize() logic doesn't work with the LSI. The check on RTC_MAGIC on the BK0R register lead to rtc_setup() call that rightfully enables the lsi clock; but the next times, when the rtc is already setup, the rtc_resume() call does NOT start the lsi clock!

The right place to put LSE/LSI initialisation is inside stm32_stdclockconfig() in stm32fxxxxx_rcc.c.  Doing this I checked the possible uses of the LSI and the LSE sources: the LSI can be used for RTC and/or the IWDG, while the LSE only for the RTC (and to output the MCO1 pin)..

This change is not verifed for any other platforms.

From Leo Aloe3132
2015-03-29 15:34:48 -06:00
Gregory Nutt
f1c79423e1 The STM32F4Discovery board doesn't come with a Low speed external oscillator so the default LSE source for the RTC doesn't work.
In stm32_rtcc.c the up_rtcinitialize() logic doesn't work with the LSI. The check on RTC_MAGIC on the BK0R register lead to rtc_setup() call that rightfully enables the lsi clock; but the next times, when the rtc is already setup, the rtc_resume() call does NOT start the lsi clock!

The right place to put LSE/LSI initialisation is inside stm32_stdclockconfig() in stm32fxxxxx_rcc.c.  Doing this I checked the possible uses of the LSI and the LSE sources: the LSI can be used for RTC and/or the IWDG, while the LSE only for the RTC (and to output the MCO1 pin)..

This change is not verifed for any other platforms.

From Leo Aloe3132
2015-03-29 15:34:48 -06:00
Gregory Nutt
d3beea967d Cortex-M7: Add support for enabled the D-Cache in write only mode.
SAMV7 Ethernet:  I- and D-Cache are now enabled in the netnsh/ configuration.  D-Cache is enabled in write-though mode.  This mode is necessary because the DMA descriptors are each 8-bytes in size but the D-Cache cache line is 32-bits in size. So it is impossible make coherency for every 8-byte DMA descriptor without write-through.
2015-03-29 14:42:03 -06:00
Gregory Nutt
dab3dbc75b Cortex-M7: Add support for enabled the D-Cache in write only mode.
SAMV7 Ethernet:  I- and D-Cache are now enabled in the netnsh/ configuration.  D-Cache is enabled in write-though mode.  This mode is necessary because the DMA descriptors are each 8-bytes in size but the D-Cache cache line is 32-bits in size. So it is impossible make coherency for every 8-byte DMA descriptor without write-through.
2015-03-29 14:42:03 -06:00
Gregory Nutt
ae0b0ca3fd SAMV7/Cortex-M7: Add support for write through D-Cache. SAMV7 Ethernet look like it needs this 2015-03-29 13:09:22 -06:00
Gregory Nutt
4593fe3797 SAMV7/Cortex-M7: Add support for write through D-Cache. SAMV7 Ethernet look like it needs this 2015-03-29 13:09:22 -06:00
Gregory Nutt
ef1dda9207 PIC32MZ Ethernet: Add support for LAN4720A and fix IRQ namespace. From Kristopher Tate 2015-03-29 07:18:17 -06:00
Gregory Nutt
c221547be4 PIC32MZ Ethernet: Add support for LAN4720A and fix IRQ namespace. From Kristopher Tate 2015-03-29 07:18:17 -06:00
Gregory Nutt
70dc3d68c5 PIC32MZ: Correct the base address of Ethernet registers. From Kristopher Tate 2015-03-29 07:15:29 -06:00
Gregory Nutt
e8b232fc41 PIC32MZ: Correct the base address of Ethernet registers. From Kristopher Tate 2015-03-29 07:15:29 -06:00
Gregory Nutt
947d1056ac PIC32MZ: Rename Ethernet files to proper convention. From Kristopher Tate. 2015-03-29 07:10:13 -06:00
Gregory Nutt
6b3c199d9f PIC32MZ: Rename Ethernet files to proper convention. From Kristopher Tate. 2015-03-29 07:10:13 -06:00
Gregory Nutt
18b26dc8e6 Clean up pointer handling to make code more readability. This re-introduces the compiler optimization problem but this is the correct thing to do. I will have to drop back from -Os to -O2. 2015-03-28 14:46:35 -06:00
Gregory Nutt
a60fa12e86 Clean up pointer handling to make code more readability. This re-introduces the compiler optimization problem but this is the correct thing to do. I will have to drop back from -Os to -O2. 2015-03-28 14:46:35 -06:00
Gregory Nutt
b15cd1653f SAMV7 EMAC: Fix alignment issue: RX buffers need to be invalidated. This means the alignment of buffers must be at least to the data cache line size at both ends of the buffer 2015-03-28 13:09:01 -06:00
Gregory Nutt
d2fd139ebc SAMV7 EMAC: Fix alignment issue: RX buffers need to be invalidated. This means the alignment of buffers must be at least to the data cache line size at both ends of the buffer 2015-03-28 13:09:01 -06:00
Gregory Nutt
afd737ddcc SAMV7 EMAC: Sometimes TX is not started when TSTART is set??? Workaround seems to be to set it twice. Restored full optimization. Also CONFIG_NET_NOINTS is set so that interrupt level provessing is avoided 2015-03-28 09:42:45 -06:00
Gregory Nutt
d7dbdfef58 SAMV7 EMAC: Sometimes TX is not started when TSTART is set??? Workaround seems to be to set it twice. Restored full optimization. Also CONFIG_NET_NOINTS is set so that interrupt level provessing is avoided 2015-03-28 09:42:45 -06:00
Gregory Nutt
750fad37f0 SAMV7 Ethernet: Fix some errors in circular queue handling 2015-03-27 13:04:43 -06:00
Gregory Nutt
79734c3c13 SAMV7 Ethernet: Fix some errors in circular queue handling 2015-03-27 13:04:43 -06:00
Gregory Nutt
dd33bb14ac Fix another typo in the modified assertion logi 2015-03-27 13:02:46 -06:00
Gregory Nutt
72c923ff0b Fix another typo in the modified assertion logi 2015-03-27 13:02:46 -06:00
Gregory Nutt
a8cba44e0f Fix a typo in the last commit 2015-03-27 10:58:52 -06:00
Gregory Nutt
ee506c42f5 Fix a typo in the last commit 2015-03-27 10:58:52 -06:00