The bootloader image has no linked HPWORK or LPWORK consumers, but
enabling both queues pulls unused scheduler code into its constrained
OCRAM region.
Disable the predefined work queues and let deferred memory reclamation
fall back to the idle thread.
Assisted-by: Codex:GPT-5
Signed-off-by: DuoYuWang <thirteenking.wang@gmail.com>
Describe the handle-based custom queue APIs, worker-pool creation and
teardown, periodic requeue, cancellation semantics, and return values.
Clarify that libc user work queue APIs use blocking synchronization and
must only be called from task context, while kernel and Flat queue and
asynchronous cancellation operations remain ISR-safe.
Assisted-by: Codex:GPT-5
Signed-off-by: DuoYuWang <thirteenking.wang@gmail.com>
Replace the local EINTR retry loop with nxsem_wait_uninterruptible().
This keeps the master implementation aligned with the libc semaphore API
without changing cancellation behavior.
Keep the cleanup separate so release branches where the helper is not
available to Protected user space can use the functional commit without a
downstream compatibility patch.
Assisted-by: Codex:GPT-5
Signed-off-by: DuoYuWang <thirteenking.wang@gmail.com>
Implement the handle-based create, queue, priority, cancellation, and
teardown APIs for CONFIG_LIBC_USRWORK. Custom queues use configurable
pthread worker pools while the predefined USRWORK queue remains available.
Match scheduler-backend delay, replacement, cancellation, and lifecycle
semantics. Restrict the libc backend to task context because it uses
blocking synchronization.
Tested on an STM32H7 PX4 FMUv6C with ostest wqueue in Protected user space.
Assisted-by: Codex:GPT-5
Signed-off-by: DuoYuWang <thirteenking.wang@gmail.com>
Replace the local EINTR retry loop with
nxsem_wait_uninterruptible(). This keeps the master implementation
aligned with the semaphore API without changing cancellation behavior.
Keep the cleanup separate so release branches where the helper is
unavailable can use the lifecycle commit without a downstream
compatibility patch.
Assisted-by: Codex:GPT-5
Signed-off-by: DuoYuWang <thirteenking.wang@gmail.com>
Factor the common queueing logic used by work_queue_wq() and
work_queue_next_wq() into a private helper.
Preserve existing timing semantics: regular work calculates its absolute
expiration before taking the queue lock, while periodic work advances the
previous expiration under the lock.
This is a code deduplication change with no public API or behavior changes.
Assisted-by: Codex:GPT-5
Signed-off-by: DuoYuWang <thirteenking.wang@gmail.com>
Prevent work_queue_free() from destroying predefined queues or freeing a
custom queue from one of its own callbacks. Mark teardown under the queue
lock, reject new submissions, return pending work to its owner, and wait for
every worker before releasing queue resources.
Clean up partially created worker pools, reject invalid delays, safely
replace pending periodic work, and make synchronous cancellation wait for
every concurrent callback using the same work structure.
Tested on an STM32H7 PX4 FMUv6C with the matching ostest suite in Flat and
Protected kernel builds.
Assisted-by: Codex:GPT-5
Signed-off-by: DuoYuWang <thirteenking.wang@gmail.com>
When a real UART (CONFIG_UARTx_SERIAL_CONSOLE) is selected as the
system console while CONFIG_ESP32S3_USBSERIAL is also enabled (e.g. to
keep /dev/ttyACM0 available as a secondary device alongside an
external console UART), the unconditional
#ifdef CONFIG_ESP32S3_USBSERIAL
# define CONSOLE_DEV g_uart_usbserial
#endif
block silently redefines CONSOLE_DEV, clobbering the correct earlier
definition that pointed it at the chosen UART device.
Confirmed on real hardware (Seeed XIAO ESP32-S3): with UART0 selected
as console and USBSERIAL also enabled, the board boot-looped on
RTCWDT_RTC_RST every ~8s, never reaching NSH. With this fix, NSH comes
up normally over UART0 and /dev/ttyACM0 remains available.
Signed-off-by: Felipe Moura <moura.fmo@gmail.com>
Assisted-by: Claude:claude-sonnet-5
Pre-existing violations in this file, reported by checkpatch because the
preceding commit touches it, and requested by a reviewer.
Three "Missing blank line after declarations", in the BIOC_PARTINFO,
MTDIOC_ERASESTATE and register-time-erase blocks.
The rest were one problem: the whole mtd_loop_ioctl() switch body sits two
columns short of NuttX style. With `switch` at 2 and its brace at 4, case
labels belong at 6 — as they already are in filemtd_ioctl() earlier in this
same file — but here the comments and cases sit at 4 and everything under
them follows suit, which checkpatch reports as 21 separate comment,
alignment and brace errors. Reindented the block to match, including the
two stray closing lines that had drifted to seven and five columns.
Whitespace only: `git diff -w` is empty apart from the three added blank
lines, and the brace count is unchanged. checkpatch is clean against
master.
Signed-off-by: AlmAck <gluca86@gmail.com>
filemtd_initialize() opens its backing file with
mode = O_RDONLY | O_WRONLY | O_CLOEXEC;
Commit 6161c73639 introduced this when it replaced the non-standard
O_RDOK | O_WROK pair, describing the change as a pure text substitution.
That held while the access mode was a genuine bitmask: O_RDONLY was
(1 << 0), O_WRONLY was (1 << 1), and O_RDWR was both bits, so the OR
produced O_RDWR. O_ACCMODE was defined as an alias for O_RDWR.
Commit 9e141acab3 then aligned the flags with Linux. The low two bits
became an enumeration -- O_RDONLY 0, O_WRONLY 1, O_RDWR 2 -- and
O_ACCMODE stopped being an alias for O_RDWR and became an independent
mask of 3. OR-ing two members of that enumeration is no longer
meaningful: O_RDONLY | O_WRONLY evaluates to 1, and masking it with
O_ACCMODE yields O_WRONLY.
The file is therefore opened write-only, and fs_read.c rejects every
read on it with -EACCES. The failure does not name filemtd: on the
simulator it surfaces as a LittleFS mount of a filemtd-backed partition
returning -ENOSPC, after which nothing on that volume works.
This appears to be an isolated miss rather than a pattern. Grepping the
tree for the same construct -- two access-mode constants OR-ed together
-- finds only this one call site. The one remaining place that
bit-tests the mode, fs/xipfs/xipfs_vfs.c:606, happens to be correct
under the new values (and would have been wrong under the old ones).
The hostfs NUTTX_O_* mirror and host_oflags_convert() were updated in
lockstep and switch on the masked value.
Signed-off-by: AlmAck <gluca86@gmail.com>
Fix bug where "nuttx.bin" was written to nuttx.asm instead of appending
nuttx.asm to nuttx.manifest
Signed-off-by: Antoine Juckler <ajuckler@users.noreply.github.com>
The apps tree is apps/mlearning, but documentation lived under the
misspelled mlearing path as title-only stubs. TensorFlow Lite Micro and
standalone CMSIS-NN had no pages.
Rename the directory to mlearning, document each package from the
current Kconfig and build files, and add the sim:tflm board
configuration.
Assisted-by: Cursor:Grok-4.6
Signed-off-by: Abhishek Mishra <mishra.abhishek2808@gmail.com>
This commit add support to GD32VW553-HMQ board based on GigaDevice
GD32VM553K_START as base.
No AI used for this board, the but GD32VM553K_START was developed
by Jorge Guzman with help from Claude Code.
Signed-off-by: Alan C. Assis <acassis@gmail.com>
Assign the per-CPU area using the HART to CPU mapping instead of the
order in which HARTs register. This keeps interrupt stack assignment
consistent with the logical CPU and avoids incorrect per-CPU IRQ stack
selection when HART boot order differs.
Signed-off-by: Megha Rajput <i.meghar.2408@gmail.com>
NuttX CI runtime test cases have migrated to NTFC.
Remove the unused pytest harness and related files.
Assisted-by: Claude Code
Signed-off-by: raiden00pl <raiden00@railab.me>
When NuttX sim is connected via pipe (e.g. by an automation tool),
if the host side does not read stdout in time, the pipe buffer fills
up and write(1, ...) blocks the entire sim process. This happens
inside host_uninterruptible (irq disabled), so the NuttX scheduler
is completely frozen and all threads stop.
Set fd=1 (stdout) to O_NONBLOCK so that write() returns EAGAIN
instead of blocking. The TX data stays in the NuttX xmit buffer
and sim_tty_work retries every 1ms until the pipe has space.
Signed-off-by: ligd <liguangdi1@xiaomi.com>
Add support for legacy xAPIC alongside x2APIC.
This way we can run nuttx x86_64 on qemu without the --enable-kvm option
Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
This reverts commit 7cc6707a76.
Felipe Moura de Oliveira reported on the dev mailing list that this
commit hangs boot on real Seeed XIAO ESP32-S3 Sense hardware (chip
rev v0.2): both defconfigs (combo, usbnsh) never reach nx_start after
a normal reset (no console output, no USB enumeration; only ROM
download mode via the BOOT strap pin responds). JTAG (OpenOCD + GDB)
shows the core statically stuck inside the chip boot ROM address
range (0x40034000-0x40048000), with nx_start never reached at its
own address (0x42011068) in that build. Reverting only this commits
defconfig changes on top of current master fixes the boot.
Local static analysis (before/after build product comparison via
esptool image_info and readelf -S) ruled out image size/segment
count as the cause: both binaries have 3 segments, identical IRAM
segment address/size byte-for-byte, and the flash-mapped code/data
growth from this change is ~14.7KB total against an 8MB flash
budget. No hardware matching the reported board was available
locally to reproduce or bisect further; reverting to unblock master
per the reporters request while root cause is investigated with
real hardware access.
Reference: https://www.mail-archive.com/dev@nuttx.apache.org/msg15063.html
Assisted-by: Kiro:claude-sonnet-5
Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
The F412 has 256KiB of system SRAM at 0x20000000 and no CCM. The F2/F4
heap map had no F412 entry, so it used the 128KiB default at
0x20020000 and left the upper half unused.
Signed-off-by: Jacob Dahl <dahl.jakejacob@gmail.com>
Switch every qemu-armv7a defconfig whose init entry point was nsh_main
(6 configs: full, gdbstub, nsh, rpproxy, rpserver, smp) to nxinit
(init_main). nsh now runs as a "console sh" service started by init.rc
instead of being the top-level init task.
Each switched defconfig only gains the nxinit-essential keys (minimal
delta):
- CONFIG_INIT_ENTRYPOINT="init_main"
- CONFIG_SYSTEM_NXINIT=y plus its Kconfig deps not already set:
CONFIG_EXPERIMENTAL, CONFIG_LIBC_EXECFUNCS, CONFIG_SCHED_CHILD_STATUS
(depends on CONFIG_SCHED_HAVE_PARENT)
- CONFIG_ETC_ROMFS=y / CONFIG_FS_ROMFS=y to ship init.rc via ROMFS
No stack-size overrides: INIT_STACKSIZE/SYSTEM_NSH_STACKSIZE keep their
Kconfig defaults.
Add boards/arm/qemu/qemu-armv7a/src/etc/init.d/init.rc, shipped via ROMFS
in the Make build (RCSRCS) and CMake (nuttx_add_romfs()), gated on
CONFIG_ETC_ROMFS && CONFIG_SYSTEM_NXINIT.
Testing: qemu-armv7a:nsh (and smp with -smp 4) boot into nxinit with nsh
spawned as its service (init task = init_main, sh = its child), confirmed
via qemu-system-arm in an earlier run of this series. Note: current
apache/master fails to build qemu-armv7a locally this round (missing
arm_timer.h) independent of this change.
Assisted-by: opencode-agent/claude-opus-4-8
Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
Switch every qemu-armv8a defconfig whose init entry point was nsh_main
(20 configs) to nxinit (init_main). nsh now runs as a "console sh"
service started by init.rc instead of being the top-level init task.
Each switched defconfig only gains the nxinit-essential keys (minimal
delta):
- CONFIG_INIT_ENTRYPOINT="init_main"
- CONFIG_SYSTEM_NXINIT=y plus its Kconfig deps not already set:
CONFIG_EXPERIMENTAL, CONFIG_LIBC_EXECFUNCS, CONFIG_SCHED_CHILD_STATUS
(depends on CONFIG_SCHED_HAVE_PARENT)
- CONFIG_ETC_ROMFS=y / CONFIG_FS_ROMFS=y to ship init.rc via ROMFS
No stack-size overrides: INIT_STACKSIZE/SYSTEM_NSH_STACKSIZE keep their
Kconfig defaults (DEFAULT_TASK_STACKSIZE, already 8192 on this board).
Add boards/arm64/qemu/qemu-armv8a/src/etc/init.d/init.rc, shipped via
ROMFS in the Make build (RCSRCS) and CMake (nuttx_add_romfs()), gated on
CONFIG_ETC_ROMFS && CONFIG_SYSTEM_NXINIT. Omitting this ROMFS plumbing
causes a link-time "undefined reference to romfs_img".
Testing: qemu-armv8a:nsh (and nsh_smp with -smp 4) boot into nxinit with
nsh spawned as its service (init task = init_main, sh = its child),
confirmed via qemu-system-aarch64 in an earlier run of this series. The
removed explicit 8192 stack sizes equal this board's DEFAULT_TASK_STACKSIZE,
so runtime behavior is unchanged. Note: current apache/master fails to
build locally this round (empty -Wstack-usage=, missing libfdt.h)
independent of this change.
Assisted-by: opencode-agent/claude-opus-4-8
Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
Switch every sim/sim/sim defconfig whose init entry point was nsh_main
(81 configs) to nxinit (init_main). nsh now runs as a "console sh"
service started by init.rc instead of being the top-level init task.
Each switched defconfig only gains the nxinit-essential keys (minimal
delta, regenerated so no unrelated options leak in):
- CONFIG_INIT_ENTRYPOINT="init_main"
- CONFIG_SYSTEM_NXINIT=y plus its Kconfig deps that were not already set:
CONFIG_EXPERIMENTAL, CONFIG_LIBC_EXECFUNCS, CONFIG_SCHED_CHILD_STATUS
(which depends on CONFIG_SCHED_HAVE_PARENT)
- CONFIG_ETC_ROMFS=y / CONFIG_FS_ROMFS=y to ship init.rc via ROMFS
No stack-size overrides are added: INIT_STACKSIZE and SYSTEM_NSH_STACKSIZE
keep their Kconfig defaults (DEFAULT_TASK_STACKSIZE).
Five configs (dynconns, module, module32, sotest, sotest32) had
CONFIG_BINFMT_DISABLE=y, which blocks CONFIG_LIBC_EXECFUNCS and thus
CONFIG_SYSTEM_NXINIT. Since nxinit spawns services via exec(), binfmt is
re-enabled in those five. They also enable CONFIG_LIBC_ENVPATH but did
not ship a /bin, so nxinit's posix_spawnp("sh") resolved via PATH and
failed with ENOENT ("Error Starting service 'console': 2"). Add
CONFIG_FS_BINFS=y and CONFIG_PATH_INITIAL="/bin" to those five so the
builtin apps are visible under /bin and the console service starts,
matching the working sim:nsh config.
citest additionally needed CONFIG_ETC_ROMFSDEVNO=1 (matching the 53
other sim configs that already set it to avoid the same collision):
sim_registerblockdevice() (arch/sim/src/sim/sim_blockdevice.c, called
from up_initialize() before any application task starts) unconditionally
registers a FAT ramdisk at /dev/ram0 whenever CONFIG_FS_FAT is set, and
citest is one of the few switched configs with CONFIG_FS_FAT=y that had
never overridden CONFIG_ETC_ROMFSDEVNO away from its Kconfig default of
0. With nxinit, romdisk_register() for /etc's ROMFS at that same minor
number then fails with -EEXIST and nxinit aborts with "Error Opening
/etc/init.d/init.rc" since it treats a missing init.rc as fatal;
nsh_main() silently tolerated the identical failure before this switch
(logs "init: open failed: 2" and continues to the nsh prompt), so the
/etc mount had actually never worked for citest even pre-nxinit.
Add boards/sim/sim/sim/src/etc/init.d/init.rc (registers a "console sh"
service guarded by CONFIG_SYSTEM_NSH; "on init" starts it), shipped via
ROMFS in the Make build (RCSRCS) and CMake (nuttx_add_romfs()), both gated
on CONFIG_ETC_ROMFS && CONFIG_SYSTEM_NXINIT so non-nxinit configs are
unaffected.
Switching to nxinit means nsh_main()/nsh_initialize() (which used to run
/etc/init.d/rc.sysinit and rcS to mount /tmp and /data) no longer runs on
the 46 sim configs that already had CONFIG_ETC_ROMFS=y on master, so
those mounts would otherwise be lost. /bin (binfs) and /proc (procfs) are
unaffected: sim_bringup() (called from board_late_initialize(), before
any entrypoint task starts, independent of nsh_main/init_main) already
mounts them unconditionally on master, and this PR does not touch that
file. init.rc's "on init" action reproduces the rest of rc.sysinit's
mounts (tmpfs, or the FAT-backed /tmp ramdisk via mkrd + mkfatfs + mount
for boards without CONFIG_FS_TMPFS) plus the hostfs /data mount that
used to live in rcS, inlining them directly instead of spawning the
standalone rcsysinit/rcS scripts through a "service ... oneshot"
indirection. nxinit has no builtin mount/mkrd/mkfatfs yet, so each of
these commands still resolves through its posix_spawnp() sh fallback;
that limitation is unchanged by this PR and is left for a follow-up
(either a native mount() call in sim_bringup() for the fixed-path
mounts, or a builtin in nxinit). The 6 configs that also enable
CONFIG_FS_FAT get an explicit CONFIG_ETC_FATDEVNO=2 so this ramdisk does
not collide with /etc's romdisk.
Now that every sim nsh_main + CONFIG_ETC_ROMFS config has switched to
nxinit, boards/sim/sim/sim/src/etc/init.d/rcS and rc.sysinit are dead
code: no remaining sim config calls nsh_initialize() (the only caller of
those scripts), so remove both files outright and drop them from
boards/sim/sim/sim/src/CMakeLists.txt and Makefile's ROMFS RCSRCS list
(init.rc is shipped instead, as above, only when CONFIG_SYSTEM_NXINIT=y).
The remaining ROMFS-enabled sim configs whose entrypoint isn't nsh_main
(nxlines/nxwm/toybox) never executed rcS/rc.sysinit either (their
entrypoint never calls nsh_initialize()), so they lose nothing but a few
unused bytes from their ROMFS image; sim:nxlines was rebuilt to confirm
it still links and boots with an empty etc/init.d/.
init.rc also uses <nuttx/macro.h>'s CONCATENATE() instead of a local
CONCAT_()/CONCAT() pair, matching existing NuttX convention instead of
duplicating a macro the tree already provides.
sim:windows and sim:windows64 are excluded and stay on nsh_main: they
build under MSVC in CI, and CONFIG_SYSTEM_NXINIT pulls in
apps/system/nxinit/action.c, which fails to compile under MSVC because
list_peek_head_type() (include/nuttx/list.h) uses a GCC
statement-expression the MSVC C compiler does not support; separately,
CONFIG_ETC_ROMFS routes them through nuttx_add_romfs()'s POSIX-shell
genromfs/xxd/sed custom build step, which cmd.exe cannot parse either.
Both are pre-existing MSVC gaps in nxinit/the ROMFS CMake helper, not
something this defconfig-only PR should fix, so these two configs are
left on nsh_main.
Testing (sim, host gcc): sim:nsh boots into nxinit with nsh spawned as
its service (init task = init_main, sh = its child), and now shows the
same five mount points as master (/bin /data /etc /proc /tmp), matching
the pre-switch nsh_main baseline; /data round-trips a write to the host
filesystem. The five binfmt configs reach an interactive nsh prompt
(help/uname work) instead of failing to start the console; e.g.
sim:module:
BEFORE fix: Error Starting service 'console': 2
AFTER fix: nsh> help / nsh> uname -a (console up)
init.rc's inlined FAT/tmpfs mount was verified by preprocessing it with
cpp under both CONFIG_FS_FAT and CONFIG_FS_TMPFS: the expansion matches
rc.sysinit's mount sequence (CONCATENATE() resolves to /dev/ram2, etc.).
sim:citest specifically verified with gdb: before the ETC_ROMFSDEVNO fix,
register_blockdriver("/dev/ram0") is called twice (once by
sim_registerblockdevice() from up_initialize(), once by nx_romfsetc());
the second call returns -EEXIST and nxinit aborts. After setting
CONFIG_ETC_ROMFSDEVNO=1, sim:citest boots cleanly into nxinit (ps shows
init_main waiting on its child sh, matching sim:nsh), and the compiled
ROMFS image contains only init.rc. sim:nxlines, a non-nxinit
CONFIG_ETC_ROMFS config, was rebuilt to confirm it still links and boots
with the now-empty etc/init.d/ (rcS/rc.sysinit removed).
Assisted-by: opencode-agent/claude-sonnet-5
Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
Adds a section covering CONFIG_SENSORS_LSM6DS3TRC_FIFO: what it changes
(one interrupt/I2C read per watermark instead of per sample) and its
three limitations while it's on -- both sub-sensors forced to the same
ODR, temperature no longer per-sample (one read per drain applied to
the whole batch), and both sub-sensors must stay physically enabled
regardless of subscription, since the chip's FIFO write trigger needs
both running -- plus the watermark/ORB-buffer-size relationship callers
need to respect.
Also documents a related chip quirk found during bench testing:
diff_words reads 0 at the exact moment a real FIFO overrun occurs, even
though the FIFO is still completely full of valid, retained data (a
forced read past that point recovers real samples, not garbage). This
isn't a bug in this driver: ST's own engineers confirm the same
behavior for this chip family on their community forum (thread
"LSM6DS3 FIFO status clarification", td-p/184022), and the mainline
Linux st_lsm6dsx driver doesn't attempt to recover from it either -- it
only special-cases an empty FIFO, not an overrun one. Documenting this
in a comment rather than adding recovery logic: with the small
watermark this driver uses, reaching a real overrun at all means the
drain has already fallen many seconds behind, and ST's own guidance for
this condition is to avoid it via watermark sizing rather than recover
from it.
Signed-off-by: Felipe Moura <moura.fmo@gmail.com>
Hardware testing (single-topic FIFO subscriptions, register dumps via
manual i2c commands) turned up two independent bugs that together
made the FIFO silently never accumulate data for a single-topic (e.g.
accel-only) subscription, while showing FIFO_STATUS2 stuck reporting
OVER_RUN and FIFO_FULL_SMART with a simultaneous zero DIFF_FIFO count:
- The LSM6DS3TR-C's FIFO write trigger (data-ready-based, the only mode
this driver uses) only fires while BOTH the accelerometer and the
gyroscope are physically running, regardless of which one(s) are
actually decimated into the FIFO pattern -- confirmed in the
datasheet's FIFO section ("the ODR must be lower than or equal to
both the accelerometer and gyroscope ODRs") and reproduced by
register-level testing with the unsubscribed sensor powered down vs.
powered up. lsm6ds3trc_fifo_configure() now forces whichever
sub-sensor isn't subscribed to run at the shared rate anyway (still
excluded from the pattern, so this costs no extra I2C bandwidth on
drain, just that sensor's own unavoidable power draw), and brings it
back down once neither sub-sensor is subscribed.
- Separately, lsm6ds3trc_fifo_configure() reconfigured decimation,
watermark and ODR while the FIFO was still running in Continuous
mode from a previous configuration. Reproduced manually: reconfiguring
live leaves FIFO_STATUS1/2 stuck reporting a stale diff count even
once the trigger fix above is in place; resetting through Bypass mode
first (which also empties the FIFO) before writing the new settings,
the same procedure the datasheet documents for changing FIFO
settings, and only re-entering Continuous mode last, is what actually
gets the diff counter to track correctly.
Also fixes two bit-definition bugs found while cross-referencing the
real ST datasheet instead of the in-tree lsm6dsl.h header used as a
starting point: MASK_FIFO_DIFF_HI was 4 bits (0x0f) instead of the
documented 3 (0x07), and MASK_DEC_FIFO_XL/SHIFT_DEC_FIFO_GY assumed
2-bit decimation fields instead of the documented 3-bit ones.
Verified on hardware: accel-only, gyro-only, and both-topics
subscriptions all now drain cleanly at the configured watermark with
no overrun, sustained over tens of seconds of continuous streaming.
Signed-off-by: Felipe Moura <moura.fmo@gmail.com>
Previously, activate() always fell back to a hardcoded ODR_52HZ (or the
other sub-sensor's rate, in FIFO mode) whenever a sub-sensor went from
disabled to enabled, discarding whatever rate the application had
explicitly requested via set_interval() before disabling it. An
application that only ever wants, say, 25Hz would see the sensor
restart at 52Hz on every re-activation, and in FIFO mode this fills the
FIFO faster than intended, defeating the point of choosing a lower ODR
for power savings.
Add last_odr, which -- unlike odr -- survives being disabled. activate()
now restores it on the next enable, only falling back to ODR_52HZ on a
sub-sensor's genuine first-ever activation.
Signed-off-by: Felipe Moura <moura.fmo@gmail.com>
Interrupt-driven mode so far pushes one uORB event per physical sample:
one I2C burst read and one interrupt per sample, at whatever ODR the
topic is running. That's the dominant power cost for a
battery-constrained use case sampling continuously -- draining the
chip's FIFO in batches cuts both by roughly the watermark size.
The LSM6DS3TR-C's FIFO is the older ST "pattern" style (no per-sample
tag byte, unlike LSM6DSO/ISM330): FIFO_CTRL3's per-sub-sensor decimation
bits choose which of gyro/accel feed the FIFO (0 = excluded, 1 = no
decimation -- only 0/1 are used here), FIFO_CTRL5 sets one shared
FIFO-only ODR, and FIFO_STATUS1/2's DIFF_FIFO reports how many 16-bit
words are waiting. Reused the existing INT1 wiring, but switched from
DRDY (per-sample) to FTH (threshold reached) when
CONFIG_SENSORS_LSM6DS3TRC_FIFO is on -- new bool that's a whole-driver
mode switch, not a per-instance choice, so a board doesn't change; only
its Kconfig does.
lsm6ds3trc_fifo_configure() re-derives and writes the decimation bits,
FIFO ODR, and watermark threshold (in words = watermark-in-samples *
words-per-pattern, 3 with one sub-sensor active or 6 with both) from
current dev->gyro/accel enabled+odr state; called from activate() and
set_interval(). Both sub-sensors are forced to the same ODR while FIFO
is on -- decimation factors > 1 for independent per-topic rates is real
complexity (matching ODR ratios to decimation values) left for later.
lsm6ds3trc_fifo_worker() replaces lsm6ds3trc_worker() under the Kconfig
guard: reads DIFF_FIFO, bursts that many words (rounded down to a whole
pattern chunk, capped at 2x the configured watermark so a late drain
doesn't overflow the read buffer -- whatever's left over just waits in
the chip's own FIFO for the next drain), then walks the buffer decoding
each chunk into a push_event() same as before. FIFO entries don't carry
their own timestamp, so each one is interpolated backwards from the
ISR's timestamp by the configured ODR interval. Temperature isn't part
of the FIFO pattern (FIFO_TEMP_EN stays off to keep the pattern width
simple); one direct OUT_TEMP_L read per drain is applied to the whole
batch instead.
Validated on the bench, both pattern widths: with both topics
subscribed (6-word pattern) and with only the accelerometer (3-word),
samples arrive in watermark-sized bursts with interpolated timestamps
spaced by the exact configured ODR interval (52Hz -> 19230us between
every consecutive sample, matched exactly), sane accel/gyro values, no
I2C errors, no overruns, sustained for 15+ seconds continuous.
Assisted-by: Claude <noreply@anthropic.com>
Signed-off-by: Felipe Moura <moura.fmo@gmail.com>
FOREACH_ARG() hands the position of each argument as the expression
"count - N", which can be used as a value but cannot be pasted into an
identifier, because "##" pastes a single token. Hand it out as a
literal instead, so that an action macro can build a symbol name out of
it, which is what a subsystem needs when the link order of its objects
has to follow the declaration order.
The list is reversed through REVERSE_ARG() so that the position becomes
the level of the chain, and each step emits the recursion before its own
action so that the actions still come out in the order the arguments
were given. This is how the same problem is solved upstream in Zephyr,
whose FOR_EACH_IDX() also reverses the list before walking a per arity
chain.
The index values are unchanged, so the arithmetic use keeps working:
NOTE_PRINTF_TYPES(), the only user in tree, produces the same tags for
every argument count. It now supplies the leading zero itself, because
FOREACH_ARG() no longer expands to "0" when the list is empty. An empty
list expanding to nothing is what lets an action expanding to
declarations be used at file scope.
Assisted-by: Claude Code
Signed-off-by: Jorge Guzman <jorge.gzm@gmail.com>
nuttx-ntfc-testing's release-0.0.1 tag pins ntfc.yaml's citest
requirement to CONFIG_INIT_ENTRYPOINT=nsh_main, so any sim/citest
defconfig that switches to a different init entrypoint (e.g. nxinit's
init_main) fails CI with:
OSError: Missing kconfig dependency: ['CONFIG_INIT_ENTRYPOINT', 'nsh_main']
Maintainer raiden00pl cut nuttx-ntfc-testing release-0.0.2, which drops
that CONFIG_INIT_ENTRYPOINT requirement from ntfc.yaml, and requested
both nuttx and nuttx-apps workflows be updated to it:
https://github.com/apache/nuttx-ntfc-testing/issues/7#issuecomment-5480486089
Only the `git clone -b release-0.0.1` line is changed; the unrelated
`ntfc==0.0.1` PyPI package pin is untouched.
Assisted-by: opencode-agent/claude-sonnet-5
Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
make export writes several names into LDNAME for boards that use
more than one linker script. The exported toolchain.cmake only
prefixed the first file, so ld searched for the rest in the
application build directory.
Normalize NUTTX_PATH so the generated -T arguments do not keep
the scripts/../scripts form.
Fixesapache/nuttx#19820.
Signed-off-by: Zhaoqi Xu <lzy00419@outlook.com>
Wire the RTL8721F (amebagreen2) into the shared Ameba timer driver
(arch/arm/src/common/ameba/ameba_timer.c), registered at /dev/timer0
(TIM1) and /dev/timer1 (TIM2). Only the per-chip base addresses, RCC
masks and IRQs differ, so this adds a small ameba_timer_chip.h (the two
32-bit basic LTIM timers at 0x40819200 / 0x40819400, 32.768 kHz,
APBPeriph_LTIM1/2, IRQ_TIMER1/2, verified against the SoC hal_platform.h
/ sysreg_lsys.h / vector table) plus the Make.defs/CMakeLists build
hooks, the fwlib ram_common/ameba_tim.c RAM source (now also pulled in
by CONFIG_AMEBA_TIMER, matching the PWM rule), the board bring-up
registration and a timer defconfig. The shared driver is unchanged.
TIM0 is left untouched because the boot ROM claims it as the always-on
system timer; reprogramming it would break every SDK delay.
Assisted-by: Claude <noreply@anthropic.com>
Signed-off-by: dechao_gong <dechao_gong@realsil.com.cn>
Wire the RTL8720F into the shared Ameba timer driver
(arch/arm/src/common/ameba/ameba_timer.c), registered at /dev/timer0
(TIM1) and /dev/timer1 (TIM2). Only the per-chip base addresses, RCC
masks and IRQs differ, so this adds a small ameba_timer_chip.h (the two
32-bit basic LTIM timers at 0x40808200 / 0x40808400, 32.768 kHz,
APBPeriph_LTIM1/2, IRQ_TIMER1/2, verified against the SoC hal_platform.h
/ sysreg_lsys.h / vector table) plus the Make.defs/CMakeLists build
hooks, the fwlib ram_common/ameba_tim.c RAM source (now also pulled in
by CONFIG_AMEBA_TIMER, matching the PWM rule), the board bring-up
registration and a timer defconfig. The shared driver is unchanged.
TIM0 is left untouched because the boot ROM claims it as the always-on
system timer; reprogramming it would break every SDK delay.
Assisted-by: Claude <noreply@anthropic.com>
Signed-off-by: dechao_gong <dechao_gong@realsil.com.cn>
Add a parameterised NuttX timer lower-half for the Realtek Ameba
general-purpose timers, sitting on the SDK fwlib RTIM register layer and
registered at /dev/timerN. The shared driver
(arch/arm/src/common/ameba/ameba_timer.c) reads a per-chip instance
table (ameba_timer_chip.h) for each timer's base, input clock, RCC gate
masks and IRQ; the period is programmed directly in microseconds and
converted to the 32-bit auto-reload with one clkfreq formula.
On the pke8721daf two of the 32.768 kHz "basic" (LTIM) timers are
exposed: /dev/timer0 is TIM1 and /dev/timer1 is TIM2. TIM0 is left
untouched because the boot ROM claims it as the always-on system timer
(SYSTIMER); reprogramming it would break every SDK delay. The RTIM
time-base entry points resolve to ROM, while the interrupt-clear and
period-change helpers come from the fwlib RAM source ameba_tim.c (shared
with the PWM driver).
Verified on hardware with examples/timer against both devices: the
update interrupt fires at the requested 1 s interval (measured with the
independent ROM SYSTIMER = 32768 ticks = 1.000 s).
Also whitelist the vendor RTIM_ symbol prefix in tools/nxstyle.c,
alongside the existing RCC_/SYSTIMER_ Ameba SDK entries.
Assisted-by: Claude <noreply@anthropic.com>
Signed-off-by: dechao_gong <dechao_gong@realsil.com.cn>
Whitespace only: blank lines after declarations, misindented switch
bodies and brace alignment. nxstyle runs over the whole of any file a
change touches, and merging the CAN ioctl options renames a config in
every SocketCAN driver.
Assisted-by: Claude:claude-fable-5
Signed-off-by: Jacob Dahl <dahl.jakejacob@gmail.com>
TX-complete and the deadline watchdog each queued their own callback on
the same work_s, and work_queue() cancels whatever is pending when a
work_s is reused, so whichever ran second was dropped: deadlines were
left set, the TX interrupt mask stayed off, or expired frames were never
aborted. Both now queue imxrt_tx_work(), which retires completions
before it aborts expired mailboxes.
Add SIOCGCANERRORS so a socket can read fault confinement, TEC/REC, a
monotonic bus error count and the RX mailbox overrun count. SIOCGCANSTATE
reports sleep/operational, not fault confinement, hence a new command.
The error count is sampled from the clear-on-read ESR1 error flags at
every driver entry rather than from ERRINT, which fires per error frame
and storms at bus rate once the bus is dead. Frames the CAN socket layer
drops for want of an IOB now count as rx_dropped in the netdev
statistics as well as in the global CAN statistics.
Tested on an i.MX RT1176 (ARK FMU-v6XRT) running PX4 with two DroneCAN
nodes: unplugging one node the ioctl reports error-passive, TEC 128,
REC 0 and a monotonic error count, matching ECR/ESR1 read over SWD at
20 Hz, while the other interface stays error-active with zero errors.
Assisted-by: Claude:claude-fable-5
Signed-off-by: Jacob Dahl <dahl.jakejacob@gmail.com>
NETDEV_CAN_BITRATE_IOCTL, NETDEV_CAN_FILTER_IOCTL and
NETDEV_CAN_STATE_IOCTL guarded identical option blocks, and every
SIOCxCANxxx case in netdev_ifr_ioctl() forwarded a member of the same
ifr_ifru union to d_ioctl(). One option and one case block now cover
all of the CAN commands; drivers and defconfigs are updated to the
new name.
Assisted-by: Claude:claude-fable-5
Signed-off-by: Jacob Dahl <dahl.jakejacob@gmail.com>
The SIOCxCANxxFILTER cases in fdcan_netdev_ioctl() call
stm32_addextfilter(), stm32_delextfilter(), stm32_addstdfilter() and
stm32_delstdfilter(), none of which exist anywhere in the tree. The
block only ever compiled because no stm32h7 config enables
NETDEV_CAN_FILTER_IOCTL; enabling it breaks the link. The commands now
fall through to the existing -ENOTSUP default, which is also what a
caller observed before.
Assisted-by: Claude:claude-fable-5
Signed-off-by: Jacob Dahl <dahl.jakejacob@gmail.com>
48-pin 1MB F412. CE was the only 48-pin part listed, so boards using
STM32F412CGU6 had to select a 512KB chip. Feature counts are identical
to CE, so it shares the block.
Assisted-by: Claude:claude-opus-5
Signed-off-by: Jacob Dahl <dahl.jakejacob@gmail.com>
100-pin 1MB F412 (LQFP/UFBGA). Without this, boards using
STM32F412VGH6 have to select the 48-pin 512KB CE.
STM32_NGPIO is 113 rather than the real 81 I/Os because
STM32_NGPIO_PORTS is (N+15)>>4 and 81 yields six ports A-F, so
PH0/PH1 could not be configured. 113 matches ZG and gives A-H.
CE/ZG chip.h counts and the family HAVE_* list are corrected in
the same change: CE has no FSMC, the die has TIM6/7/9-14 and
SPI4/5, ZG USART is 4, I2S is 5. FSMC is only bonded on 100/144-pin,
so HAVE_FSMC is selected on VG/ZG and not on CE.
Signed-off-by: Jacob Dahl <dahl.jakejacob@gmail.com>
CONFIG_ESP32S3_TICKLESS hangs forever the first time a task calls a
sleep/timeout with a fractional-second component of roughly 134ms or
more (e.g. usleep(500000)) while another task is also pending a
timeout.
Root cause: NSEC_2_CTICK() computes ((nsec) * CTICK_PER_USEC) /
NSEC_PER_USEC. `nsec` (struct timespec's tv_nsec) is a 32-bit `long`,
and CTICK_PER_USEC is 16 (the S3's systimer runs at 16MHz), so the
multiplication overflows a 32-bit signed int for any tv_nsec at or
above INT32_MAX / 16 (~134,217,728 ns). The overflowed (negative)
result then gets added into up_timer_start()'s `uint64_t cpu_ticks`,
wrapping around to a value near UINT64_MAX. tickless_setcounter()
then programs the systimer alarm that many ticks in the future --
effectively never -- so nxsched_process_timer() is never called and
the waiting task sleeps forever.
Reproduced on real esp32s3-xiao hardware: apps/testing/ostest hung
indefinitely right after starting user_main(), whose first statement
is usleep(500000). Instrumented up_timer_start() to print its inputs
and observed exactly the described overflow (cpu_ticks close to
UINT64_MAX for tv_nsec=510000000). Confirmed root cause is the
concurrent-timeout case specifically: user_main's usleep() alone
works, and ostest_main's own usleep() alone works, but the two
together (matching ostest's actual task_create() + concurrent
usleep() pattern) reproduce the hang every time.
Fix: cast to uint64_t before multiplying in all three *_2_CTICK
macros, forcing 64-bit arithmetic throughout, matching how the
CTICK_2_* (division) macros are already overflow-safe.
Validated on esp32s3-xiao: with the fix, the full ostest suite (built
with CONFIG_ESP32S3_TICKLESS=y) runs past the point it used to hang
and completes end to end.
Note: while testing, ostest's own round-robin test (rr_test) failed
near the end of the run -- the two same-priority SCHED_RR threads did
not appear to interleave under tickless. That looks like a separate,
likely more architectural issue (time-slice preemption needs its own
periodic re-arm, independent of one-shot sleep timeouts) and is not
addressed by this fix; filing separately.
Signed-off-by: Felipe Moura <moura.fmo@gmail.com>
Replace iLD union types and __mfcr/__mtcr intrinsics with uint32_t
and tricore_mfcr/tricore_mtcr. Replace the iLD-specific
to HW full capacity (8 sets / 24 data / 16 code regions).
Signed-off-by: zhangyu117 <zhangyu117@xiaomi.com>
Refactor kflags/uflags into a per-set flags[] array indexed by set
number, and add a cpuset field to filter regions per CPU. Rewrite
mpu_initialize to loop over all protection sets.
Signed-off-by: zhangyu117 <zhangyu117@xiaomi.com>
C++ strict mode drops the GNU ", ##__VA_ARGS__" comma elision, so
GET_ARG_COUNT() and REVERSE_ARG() misselect their dispatch entry with
zero varargs. Centralize the empty-argument handling in GET_ARG_COUNT
(via __VA_OPT__ for C++) and make REVERSE_ARG and FOREACH_ARG dispatch
through CONCATENATE(prefix, GET_ARG_COUNT(...)), removing the two
duplicated 33-entry selector lists.
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
string(REPLACE) splits on every space, so a flag such as
-I"/path with spaces" becomes several bogus compile options.
Use separate_arguments(UNIX_COMMAND), matching EXTRA_FLAGS.
Signed-off-by: Zhaoqi Xu <lzy00419@outlook.com>
Both files put the body of the relocation switch at the same indent as the
switch braces, so nxstyle reports forty-four errors in each and any patch
whose hunks land near them fails the check job.
Giving the body its level takes the bit diagrams in the comments one column
past the line limit. The rulers say Instr rather than Instructions, which is
enough and is what the same rulers further down already do. A comment that
had no code on its line becomes a sentence of its own, and two that were a
column out are put right.
Whitespace and comments only. Compiled before and after for cortex-m7 and
cortex-m33: the disassembly is identical.
Signed-off-by: Marco Casaroli <marco.casaroli@gmail.com>
