Commit graph

24546 commits

Author SHA1 Message Date
alexcekay
1446961c87 arch/arm/stm32h7: Fix SPI RX DMA returning stale DCACHE data
In sporadic cases it is possible that a SPI exchange returns stale RX data from the DCACHE.

This occurs when:
- DCACHE is enabled
- DMA is used

The impact of this can be hard to debug and vanishes when the timing even changes minimally.

This is caused by the DCACHE being invalidated before the actual DMA transaction starts which violates
the recommendations from AN4839 and also does not match the implementation of other drivers on the STM32H7/STM32F7.

Fixed by invalidating the DCACHE right before the actual read, which matches the implementation
of the STM32F7 SPI driver.

Signed-off-by: alexcekay <alexander@auterion.com>
2026-04-23 16:28:36 +02:00
raiden00pl
94e5fb9d3e boards/stm32l4: migrate to new pinmap
migrate stm32l4 to new pinmap

Signed-off-by: raiden00pl <raiden00@railab.me>
2026-04-23 20:34:00 +08:00
Tiago Medicci Serrano
629d0fe356 arch/[risc-v|xtensa]: Re-add RMT_LOOP_TEST_MODE Kconfig entry
The PR #18654 removed the Kconfig option `RMT_LOOP_TEST_MODE` used
by Espressif's RMT peripheral. This commit reintroduces it as a
lower-half driver interface used to enable internal loopback tests.

Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
2026-04-23 09:31:36 +08:00
raiden00pl
8b0f684a05 arch/arm/src/stm32f0l0g0: remove STM32F0G0L0_USE_LEGACY_PINMAP
remove STM32F0G0L0_USE_LEGACY_PINMAP and all references

Signed-off-by: raiden00pl <raiden00@railab.me>
2026-04-23 09:30:53 +08:00
raiden00pl
6ab27b3a8a arch/arm/src/stm32f7: remove STM32F7_USE_LEGACY_PINMAP
remove STM32F7_USE_LEGACY_PINMAP option and all references

Signed-off-by: raiden00pl <raiden00@railab.me>
2026-04-23 09:30:53 +08:00
raiden00pl
c4586c0742 arch/arm/src/stm32h7: remove STM32H7_USE_LEGACY_PINMAP
remove STM32H7_USE_LEGACY_PINMAP option and all references

Signed-off-by: raiden00pl <raiden00@railab.me>
2026-04-23 09:30:53 +08:00
aviralgarg05
59d44c4997 boards/arm/stm32: switch nucleo-f412zg console to USART3 VCP
Enable USART3 support for STM32F412 and use it as the default NUCLEO-F412ZG nsh console path.

The ST-LINK virtual COM port on this board is wired to USART3 on PD8/PD9. Restore USART2 to its header-pin routing, switch the nsh defconfig to USART3, and update the board documentation to match the shipped solder-bridge configuration described in issue #17722.

Signed-off-by: aviralgarg05 <gargaviral99@gmail.com>
2026-04-22 01:14:39 +02:00
simbit18
b37b22eacd cmake: Moved the creation of the nxtmpdir folder to the root CMake file
- Moved the creation of the `nxtmpdir` folder for third-party packages to the root  `CMakeLists.txt` file.

cmake/nuttx_3rdparty.cmake

- Add the nuttx_remove_nxtmpdir function to remove the third-party cache directory under nuttx/../nxtmpdir

Signed-off-by: simbit18 <simbit18@gmail.com>
2026-04-22 06:22:36 +08:00
Shunchao Hu
04cc4740ea arch/xtensa: Scope Wi-Fi disconnect case declarations.
- fix a "a label can only be part of a statement and
  a declaration is not a statement" compile error.
- toolchain xtensa-esp32s3-elf-gcc
  (crosstool-NG esp-2021r2) 8.4.0

Signed-off-by: Shunchao Hu <ankohuu@gmail.com>
2026-04-21 22:06:52 +08:00
raiden00pl
a9e9607d95 arch/x86_64/intel64: fix signal delivery race in x86_64_sigdeliver
copy logic from arm64 to fix SMP bugs in the signal trampoline
caused signals to be lost or mis-delivered in ostest signest_test
on qemu-intel64/jumbo.

Also update comments so this logic is easier to follow

Signed-off-by: raiden00pl <raiden00@railab.me>
2026-04-21 21:57:44 +08:00
Filipe Cavalcanti
c47a984b63 arch/xtensa: remove _info from startup of ESP32
During startup we should avoid using _info since the system is not
fully initialized. Default to use ets_printf which is safe for
this scenario.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2026-04-21 09:43:38 +08:00
yanxingyu17
02407ad192 arch/risc-v/cmake: fix linker option case in Toolchain.cmake.
Fix lowercase -wl to correct -Wl for GCC linker pass-through
option in LTO full configuration. The lowercase form is not
recognized by the linker, causing --print-memory-usage to be
silently ignored.

Signed-off-by: v-yanxingyu <v-yanxingyu@xiaomi.com>
2026-04-20 17:44:39 +02:00
Eren Terzioglu
50fb11492c arch/risc-v/espressif: Fix auto light sleep enable flag
Fix auto light sleep enable flag

Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
2026-04-20 15:08:27 +02:00
Filipe Cavalcanti
0e5e71cc08 arch/risc-v: update MCUBoot slot size and offsets
Increase image slot size from ~1MB to ~1.4MB to allow more features by default.
Solves issues when enabling debug features would extrapolate the slot size.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2026-04-19 07:10:31 -03:00
daniellizewski
1632beaede arch/arm/src/stm32h5/stm32_usbdrdhost.c: Fixed Hub support
Fixed a few bugs in the initial stm32_usbdrdhost.c implementation
when using a USB hub. Fixed fault when freeing control endpoints.
Fixed crash when disconnecting devices from hubs due ot use after free.

Signed-off-by: daniellizewski <daniellizewski@geotab.com>
2026-04-19 14:24:40 +08:00
Tiago Medicci Serrano
d6a55824b3 arch/risc-v/esp32p4: Implements PSRAM support for ESP32-P4
This commit implements the in-package PSRAM support for ESP32-P4.

Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
2026-04-18 19:17:31 -03:00
raiden00pl
a33c555b5e arch/stm32f0l0g0/stm32_serial_v2.c: fix compilation error
fix compilation error for CONFIG_SERIAL_TERMIOS=y

chip/stm32_serial_v2.c:923:35: error: 'struct up_dev_s' has no member named 'rxftcfg'
  923 |   regval |= USART_CR3_RXFTCFG(priv->rxftcfg);

Signed-off-by: raiden00pl <raiden00@railab.me>
2026-04-17 14:18:51 +02:00
Norihiko Itou
83efa44f0c arch/arm: add STM32H755XI chip
Support STM32H755XI chip.
The STM32H755XI is a chip with a different package than the STM32H755II.

Signed-off-by: Norihiko Itou <itounrh@jae.co.jp>
2026-04-17 13:18:02 +02:00
daniellizewski
c205505ca9 arch/arm/src/stm32h5/stm32_serial.c: Fixed compiler warning
Added missing #ifdef to avoid compiler warning when DMA is not used.

Signed-off-by: daniellizewski <daniellizewski@geotab.com>
2026-04-17 12:42:12 +08:00
daniellizewski
532fede38b arch/arm/src/stm32h5: Add support for USB host
Added stm32_usbdrdhost.c which adds USB FS host mode support using the
embedded PHY. Added Kconfig to select Device or Host.

Example config nucleo-h563zi:usbmsc added to test functionality

Signed-off-by: daniellizewski <daniellizewski@geotab.com>
2026-04-17 12:42:12 +08:00
Eren Terzioglu
56a4a05b34 arch/risc-v/espressif: Add DFS feature
Add DFS feature for riscv based Espressif devices

Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
2026-04-15 18:38:02 +02:00
Eren Terzioglu
5cc000ceb0 arch/risc-vespressif: Fix i2c slave irq callback build error
Fix i2c slave irq callback build error for risc-v based Espressif devices

Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
2026-04-15 18:38:02 +02:00
Eren Terzioglu
3acfea8efc arch/risc-v/espressif: Fix Kconfig option for TWAI
Fix Kconfig option for about on risc-v based Espressif chips

Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
2026-04-15 14:29:17 +02:00
Filipe Cavalcanti
3f16c4a06e arch/risc-v: custom compilation options on some cache sources
This change sets three new compilation flags for avoiding cache miss
when using optimized builds and cache is manipulated.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2026-04-14 17:44:07 -03:00
Filipe Cavalcanti
723051d322 arch/risc-v/espressif: fix CMake linking of mbedtls on Wi-Fi support
Fix improper linking against 'arch' when it should link against 'nuttx' target.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2026-04-14 17:44:07 -03:00
Filipe Cavalcanti
5adbddf52a arch/risc-v: fix linker script manipulation on CMake for Espressif devices
This changes enables the use of the preprocessor function (nuttx_generate_preprocess_target) so it can properly
process the linker scripts, instead of using the original ones (must process some `#ifdefs`).

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2026-04-14 17:44:07 -03:00
zhanxiaoqi
8c82d20caf arch/arm: Fix the compilation error
When the macro SDADC_HAVE_TIMER is enabled, a compilation
error will occur due to the missing semicolon after the variable.

Signed-off-by: zhanxiaoqi <zhanxiaoqi@bytedance.com>
2026-04-14 18:15:01 +02:00
bijunda
e874561291 sim: replace posix timer with GCD dispatch timer on macOS
macOS does not provide full POSIX timer support for the host-side
simulator build, so references to timer_t and timer_create can fail when
building sim:fb on Apple hosts. Replace the POSIX timer path with a
Grand Central Dispatch timer on macOS while keeping the existing POSIX
implementation for other hosts.

The dispatch timer raises SIGALRM from its event handler so the host
side keeps the same timer-driven behavior expected by the simulator.
This preserves the existing timing model and fixes the macOS host build
failure for sim:fb.

Signed-off-by: Peter Bee <bijunda@bytedance.com>
2026-04-14 19:40:10 +08:00
bijunda
333815c594 build(sim): fix macOS XQuartz include and library paths for sim:fb
macOS does not ship X11 headers and libraries in the default system
search paths, so sim:fb fails to build unless the XQuartz installation
prefix is detected explicitly. Probe /opt/X11 first and fall back to
/usr/X11 so the simulator can find the required X11 headers and libs on
common macOS setups.

This fixes the sim:fb build failure on macOS hosts that rely on XQuartz
for X11 development files.

Signed-off-by: Peter Bee <bijunda@bytedance.com>
2026-04-14 19:40:10 +08:00
Tiago Medicci Serrano
36f07f5c44 arch/xtensa/esp32: Fix ROM strdup heap issue in USER_HEAP mode
When ESP32's flat build mode is selected with the external PSRAM
on USER_HEAP mode, the ROM strdup internally calls malloc which may
be mapped to a different heap than lib_free, causing cross-heap
allocation issues and system crashes.

This commit adds a new Kconfig option ESP32_DONT_USE_ROM_LIBC to
allow using NuttX libc instead of ROM newlib functions. When
USER_HEAP mode is selected, this option is automatically enabled.

Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
2026-04-14 09:21:17 +02:00
461911662
877ddd06a8 arch/xtensa/esp32s3: Fix ROM strdup heap issue in USER_HEAP mode
In ESP32-S3 flat build with USER_HEAP mode, ROM strdup internally calls
malloc which may be mapped to a different heap than lib_free, causing
cross-heap allocation issues and system crashes.

This commit adds a new Kconfig option ESP32S3_DONT_USE_ROM_LIBC to
allow using NuttX libc instead of ROM newlib functions. When USER_HEAP
mode is selected, this option is automatically enabled.

Fixes: 60ca804b56 ("esp32s3: Fix bug related to the PSRAM-allocated task stack")

Signed-off-by: 461911662 <461911662@qq.com>
Reviewed-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
Reviewed-by: Almir Okato <almir.okato@espressif.com>
Reviewed-by: Eren Terzioglu <eren.terzioglu@espressif.com>
2026-04-14 09:21:17 +02:00
Peter van der Perk
143938777a arch/arm/imx9: eDMA5 don't enable all interrupts
Fixes irq_unexpected_isr when receiving interrupts not used
by the M7 core

Signed-off-by: Peter van der Perk <peter.vanderperk@nxp.com>
2026-04-14 04:05:52 +02:00
raiden00pl
1513b3e20c arch/nrf52|nrf53: add qencoder support
add qencoder support for nrf52 and nrf53

Signed-off-by: raiden00pl <raiden00@railab.me>
2026-04-12 19:41:52 -04:00
raiden00pl
5bacc302eb arch/stm32f0l0g0: add qencoder support
add QENCODER support for STM32F0/L0/G0/C0

Signed-off-by: raiden00pl <raiden00@railab.me>
2026-04-12 19:41:29 -04:00
raiden00pl
afda7316e5 arch/stm32f0l0g0/tim: TIM2 is 32-bit on F0/G0/C0
fix TIM2 width - it is 32-bit on F0/G0/C0 but 16-bit on C0

Signed-off-by: raiden00pl <raiden00@railab.me>
2026-04-12 19:41:29 -04:00
raiden00pl
6928384019 arch/stm32{f7|h7|l4|l5|u5}: remove references to CONFIG_STM32_TIMx_QECLKOUT
Remove useless references to CONFIG_STM32_TIMx_QECLKOUT

Signed-off-by: raiden00pl <raiden00@railab.me>
2026-04-12 10:52:36 -04:00
Filipe Cavalcanti
8fb8c2dca5 arch/xtensa: register Wi-Fi IRQs in non_iram mask for SPI flash
Wi-Fi used a locally allocated vector_desc, so those CPU interrupt lines
were never recorded in the HAL non_iram_int_mask.
During SPI flash, esp_intr_noniram_disable() therefore did not mask them,
and Wi-Fi ISRs could still run with the cache off.
Now, Wi-Fi IRQs are treated as non-IRAM and get masked while flash/cache is suspended.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2026-04-11 13:40:44 +08:00
Filipe Cavalcanti
e8bcbbc5d3 arch/risc-v: register Wi-Fi IRQs in non_iram mask for SPI flash
Wi-Fi used a locally allocated vector_desc, so those CPU interrupt lines
were never recorded in the HAL non_iram_int_mask.
During SPI flash, esp_intr_noniram_disable() therefore did not mask them,
and Wi-Fi ISRs could still run with the cache off.
Now, Wi-Fi IRQs are treated as non-IRAM and get masked while flash/cache is suspended.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2026-04-11 13:40:44 +08:00
wangjianyu3
0885b45256 xtensa/esp32s3: refactor cam driver to use cam_ll HAL layer
Replace direct putreg32/getreg32 register accesses in esp32s3_cam.c
with cam_ll_* inline functions from Espressif's esp_hal_cam component.
This reduces maintenance burden by using the vendor-provided HAL
abstraction instead of raw register manipulation.

Changes:
- Add lcd_cam_dev_t *hw pointer to driver struct
- Use cam_ll_start/stop/reset/fifo_reset for CAM control
- Use cam_ll_get_interrupt_status/clear_interrupt_status for ISR
- Use cam_ll_set_recv_data_bytelen for DMA buffer length
- Use cam_ll_select_clk_src/set_group_clock_coeff for clock config
- Use cam_ll_enable_vsync_filter/set_vsync_filter_thres
- Use cam_ll_enable_vsync_generate_eof/enable_rgb_yuv_convert
- Use struct access for interrupt enable (cam_ll_enable_interrupt
  requires __DECLARE_RCC_ATOMIC_ENV not available in NuttX)
- Add esp_hal_cam include paths to hal.mk

Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
2026-04-11 13:36:53 +08:00
Tiago Medicci Serrano
745f7542d9 arch/risc-v: Enable low power mode for ESP32-P4
This commit introduces the necessary changes to enable low power
mode for ESP32-P4. Please check the corresponding documentation.

Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
2026-04-10 14:33:52 -03:00
Tiago Medicci Serrano
213a651509 arch/risc-v/esp32[-c3|-c6|-h2]: Add auto sleep
Add auto sleep for risc-v based Espressif devices

Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
2026-04-10 20:34:46 +08:00
Vlad Pruteanu
ad168fdf2d arch/xtensa/esp32: Add support for hardware accelerated PBKDF2
This adds support for the PBKDF2 algorithm in the ESP32 crypto
driver. Here, it will take advantage of the hardware-accelerated
implementation of SHA.

Signed-off-by: Vlad Pruteanu <pruteanuvlad1611@yahoo.com>
2026-04-10 20:32:46 +08:00
simbit18
4f1a3356f9 arch/risc-v/src/common/espressif: Aligned Cmake with Make
Add:
- replace rmtchar with arch-specific lirc adapter apache#18654

Signed-off-by: simbit18 <simbit18@gmail.com>
2026-04-10 08:34:41 -03:00
karaketir16
d09bfc021d rp23xx: add hardware SHA-256 cryptodev support
Add an RP23xx hardware crypto driver for /dev/crypto with SHA-256
support backed by the RP2350 SHA accelerator.

Wire the new driver into the RP23xx ARM build and register
CRYPTO_SHA2_256 through cryptodev.

Also fix the RP23xx SHA256 CSR BSWAP bit definition in both the ARM and
RISC-V RP23xx headers. The previous value used bit 18, but the RP2350
hardware uses bit 12. Without this fix, the accelerator hashed input
words with the wrong byte order and produced incorrect digests.

Signed-off-by: karaketir16 <osmankaraketir@gmail.com>
2026-04-10 17:02:57 +08:00
wangjianyu3
7c451141f5 xtensa/esp32s3: cam driver support MMAP buffer allocation
Implement imgdata_ops alloc/free callbacks so the V4L2 framework
can use MMAP mode to allocate frame buffers with proper GDMA
alignment.  This lets applications avoid hardcoding platform-
specific alignment values.

- Add esp32s3_cam_alloc() using kmm_memalign with the alignment
  derived from the GDMA external memory block size setting.
- Add esp32s3_cam_free() wrapper around kmm_free.
- Introduce ESP32S3_CAM_EXT_MEMBLK / ESP32S3_CAM_DMA_ALIGN macros
  so the block size enum and byte alignment are defined in one
  place and stay in sync automatically.

Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
2026-04-10 10:47:07 +02:00
wangjianyu3
929acd26e0 xtensa/esp32s3: fix esp32s3_cam uninit/stop_capture bugs
Fix several issues in the ESP32-S3 CAM driver:

- stop_capture: reset DMA channel, CAM module and AFIFO under
  spinlock to fully quiesce hardware before returning. Clear
  pending VSYNC interrupt to prevent stale ISR firing.

- uninit: reset CAM/AFIFO before releasing DMA to prevent
  in-flight transfers after channel detach. Use esp_teardown_irq
  with correct peripheral ID (ESP32S3_PERIPH_LCD_CAM) instead of
  irq_detach which corrupts the shared IRQ mapping table. Mask
  interrupts and clear pending flags under spinlock before
  detaching handler.

- uninit: preserve XCLK output so the sensor remains accessible
  via I2C for subsequent re-initialization.

- set_buf/uninit: track driver-allocated vs user-provided frame
  buffers with fb_allocated flag to prevent double-free when
  using V4L2 USERPTR mode.

Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
2026-04-10 10:47:07 +02:00
Peter Barada
60ae1681a2 arm/imx6: Fix IMX_IRQ definitions
arch/arm/include/imx6/irq.h looks to originally be for i.MX6 Quad
and includes multiple (re)definitions of IRQ names, some of which are
different or don't exist on i.MX6 SoloLite/Solo/Dual/DualLite.
Update irq.h to specify/reserve IRQ names/numbers as defined by the
IM6SDLRM, IMX6DLRM, and IMX6DQRM reference manuals.

Signed-off-by Peter Barada <peter.barada@gmail.com>
2026-04-10 10:28:39 +08:00
Eren Terzioglu
44ffb7521b arch/xtensa/esp32: Fix IRAM heap boot issue
Fix IRAM heap boot issue for esp32

Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
2026-04-09 20:14:44 +08:00
Pavel Pisa
b6cb94a06d arch/arm/stm32h7: fix stm32_mdio private structure use
The struct stm32_mdio_bus_s aka g_stm32_mdio_bus
has not been referenced at all, because  mdio_register()
allocates its own structure. Then lower half drivers
receive only their respective part in mdio_read()
and mdio_write() because MDIO_WRITE/MDIO_READ provides
only d->lower to the specific lower level drivers.

Signed-off-by: Pavel Pisa <pisa@fel.cvut.cz>
2026-04-09 13:21:50 +02:00
aviralgarg05
54ee939f82 arch/espressif: serialize Wi-Fi RX queue access.
Protect the common Espressif Wi-Fi netdev RX queue with a spinlock. The Wi-Fi RX callback enqueues packets while the netdev upper-half RX thread dequeues them, and the IOB queue helpers are not internally serialized.

Under sustained receive traffic that race can corrupt the queue state, strand IOBs, and degrade throughput over time as reported in issue #16915.

Initialize the lock during device setup and use it when clearing the queue on ifup, enqueueing received packets, and dequeuing them for the upper half.

Signed-off-by: aviralgarg05 <gargaviral99@gmail.com>
2026-04-08 15:04:31 -03:00