Nine of the seventeen configurations that set CONFIG_NXFLAT are on the CI
blacklist, and they are exactly the ones that build a module: the converter
they need was not in the tree. ldnxflat is in it now, so eagle100:nxflat and
lm3s6965-ek:qemu-nxflat come off the list. Both were built with the toolchain
CI uses.
The other seven stay off for reasons of their own. The thttpd configurations
need CONFIG_BOARDCTL_ROMDISK, which their defconfigs do not set, and the older
boards define their own CPICFLAGS without filtering --fixed-r9 out, so the
compiler refuses r9 as the PIC register.
Assisted-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
Signed-off-by: Marco Casaroli <marco.casaroli@gmail.com>
Add an initial port for the AIFoundry Erbium Minion core running on the
public ET-platform system emulator (erbium_emu). NuttX boots directly
from a firmware ELF at 0x40000200, runs in machine mode on hart 0 with
SMP disabled, and parks secondary harts before they touch memory.
The chip layer provides startup, PLIC interrupts, the UART0 console
driver and the machine timer. Context switching, FPU save/restore,
heap, idle and timer handling reuse the common RISC-V code. Atomics use
interrupt masking because the core does not implement the A extension.
Erbium implements the F extension but executes fdiv/fsqrt and FENCE.I
in microcode, which a standalone image does not provide. The board build
files pass -mno-fdiv to GCC when the FPU is enabled, so those operations
use software helpers. Startup initializes the FPU without the common
FENCE.I sequence, and the board configurations disable the dynamic ELF
loader, which also relies on FENCE.I.
Add minion:nsh and minion:ostest configurations, Make and CMake
support, CMake CI build entries, and a host script that runs prebuilt
images in the emulator and checks the console and OS test results.
Tested with emulator revision 836a4ab600e9 and xPack GCC 14.3.0: both
configurations build with Make and CMake, ostest exits with status 0
including the FPU tests, and the NSH console, procfs, timer and UART
receive paths work. Silicon, SMP, protected builds and reboot are not
covered by this initial port.
Signed-off-by: Afonso Oliveira <afonso.oliveira707@gmail.com>
There is a issue that exist on esptool and was fixed on version
5.3.0: https://github.com/espressif/esptool/releases/tag/v5.3.0
elf2image: Correct pad length for ram-only-header flash segments (Sylvio Alves - c637749)
Signed-off-by: Alan C. Assis <acassis@gmail.com>
The download link is dead: bitbucket.org/nuttx/buildroot is gone, and the
buildroot that still carries ldnxflat is github.com/patacongo/buildroot.
The instructions were also more than is needed. mknxflat came in tree with
PR #19600, so only ldnxflat has to be built, and an ordinary arm-none-eabi
GCC compiles and links NXFLAT modules: a board does not have to select
CONFIG_ARM_TOOLCHAIN_BUILDROOT to use them. What ldnxflat does need is a
binutils source and build tree, because it reads its input through libbfd.
The CI test list said mknxflat is what the container lacks. It is in tree
now; ldnxflat is the one that is missing.
Assisted-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
Signed-off-by: Marco Casaroli <marco.casaroli@gmail.com>
NuttX CI runtime test cases have migrated to NTFC.
Remove the unused pytest harness and related files.
Assisted-by: Claude Code
Signed-off-by: raiden00pl <raiden00@railab.me>
Required to run the qemu-intel64 citest/NTFC configuration on CI; the
image only shipped qemu-system-arm and qemu-system-misc.
Signed-off-by: raiden00pl <raiden00@railab.me>
An FDPIC module is compiled by the stock arm-none-eabi GCC, which emits
correct FDPIC objects for both C and C++, but it cannot be assembled or
linked by that toolchain: its as rejects the FDPIC relocations, and its ld
carries the armelf emulation alone.
Linking FDPIC objects with the stock ld does not fail, which is the awkward
part. It produces an object marked "UNIX - System V" instead of "ARM FDPIC"
and turns every import into an R_ARM_JUMP_SLOT where the ABI wants an
R_ARM_FUNCDESC_VALUE. A jump slot is one word and a descriptor is two, a
code address and the GOT that goes with it, so the module links cleanly and
then calls out of itself with the caller's data base still in the PIC
register.
No distribution packages the arm-uclinuxfdpiceabi target, so the image
builds it, the way the Renesas stage already builds its own binutils. Only
binutils is needed, no GCC and no C library, so the stage takes about a
minute and the install is 20 MB stripped.
The tarball comes from sourceware.org, the binutils project's own host,
because ftp.gnu.org is not reliably reachable from every builder. curl runs
with --fail so that a bad fetch says so, rather than piping an error page
into tar and failing as "File format not recognized".
Signed-off-by: Marco Casaroli <marco.casaroli@gmail.com>
Python warns about return statements inside finally blocks because they
can suppress pending exceptions. Move the returns after the try/finally
and try/except bodies so normal return values stay the same while
unexpected exceptions are no longer swallowed.
Signed-off-by: Old-Ding <ai.neo.ae86@gmail.com>
The xipfs configuration enabled CONFIG_NXFLAT and the nxflatxip example,
whose build runs mknxflat to generate the module thunk. The NXFLAT tools
are not installed in the CI container, so every CI build of this
configuration failed with "mknxflat: command not found".
* xipfs keeps the file system, the xipfs command and the test suite. It
builds with a plain toolchain, so CI still covers the file system code.
* xipfs-nxflat adds CONFIG_NXFLAT and CONFIG_EXAMPLES_NXFLATXIP and is
excluded from the CI build list, the same treatment the other NXFLAT
configurations already get (eagle100:nxflat, lm3s6965-ek:qemu-nxflat,
olimex-lpc1766stk:thttpd-nxflat).
Impact: CI and board configurations only. No source or runtime change.
Assisted-by: Claude Code:claude-opus-5
Signed-off-by: Marco Casaroli <marco.casaroli@gmail.com>
Ignores Python defconfig from esp32p4-tab5 board.
Python builds are excluded due to its long build time.
Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
New RISC-V chip port for the GigaDevice GD32VW55x (Nuclei N307, Wi-Fi 6
and BLE 5.3 combo), with the GD32VW553K-START board.
Core:
- ECLIC interrupt controller, clock tree (160 MHz / 40 MHz HXTAL),
64-bit machine timer, serial (USART0/UART1/UART2) and RTC.
- The instruction cache must be enabled in head.S or the UART drops
characters under load; the mask ROM uses the first 0x200 bytes of SRAM
so the image is linked at 0x20000200; the RTC needs PMU_CTL0.BKPWEN or
the register writes are silently discarded.
- The ECLIC only auto-clears the interrupt pending bit in hardware-vectored
mode, so the trap dispatch clears it for edge-triggered sources or they
re-fire forever (level-triggered peripherals clear their own).
Peripherals: DMA (8 channels), GPIO + EXTI, SPI (optional DMA), I2C0/I2C1
(the new STM32-v2-style IP, not the GD32F4 one), ADC, PWM and input
capture on the timers, both watchdogs, PROGMEM, TRNG and CRC. All use
the standard NuttX lower-half interfaces and direct register access, not
the vendor SPL. Three user LEDs (GPIOC), and a software reset through the
Nuclei SysTimer.
Internal flash: it is a system-in-package NOR die behind the real-time
decryption block, so it is not programmed through the FMC registers -- the
driver goes through the mask ROM API (rom_flash_*), the same way the
vendor code does. PROGMEM can be mounted as LittleFS; the region sits
below the Wi-Fi NVDS and must not overlap it.
Wi-Fi (wlan0), station and softAP:
- The MAC/PHY, RF and WPA supplicant are linked as prebuilt BSD-3
libraries. They are RTOS-agnostic, so the OS binding is a sys_* facade
on NuttX primitives (gdwifi/wrapper_nuttx.c). Critical sections mask by
ECLIC priority threshold, not by disabling every interrupt, or the MAC
misses its microsecond deadlines.
- The lwIP stack of the SDK is not used: the interface is a
netdev_lowerhalf driver driven by the standard tools (wapi, ifup, renew,
ping, dhcpd). EAPOL is handed to the supplicant instead of the IP
stack. The lowerhalf "priority" field is the work-queue id (HPWORK/
LPWORK), not a task priority -- a wrong value makes receive() never run
and every packet is dropped.
- The vendor gives the radio 32 KB of shared SRAM as an extra heap; this
needs CONFIG_MM_REGIONS >= 2 or the kernel silently drops the region.
- The DHCP client needs CONFIG_NETUTILS_DHCPC_BOOTP_FLAGS=0x8000 so the
server answers the OFFER by broadcast.
- softAP (wapi master mode -> wifi_management_ap_start): the single-VIF
firmware does station or AP at a time. Use WPA2, not WPA3: the SAE
handshake is deep on the stack and overflows the elliptic-curve crypto
with the default task stacks, so the Wi-Fi configs raise
CONFIG_INIT_STACKSIZE/DEFAULT_TASK_STACKSIZE.
Vendor SDK: cloned by the build at "context" time, pinned to a validated
commit and patched in place -- so CI can build with nothing preinstalled,
the same pattern as esp-hal-3rdparty. The prebuilt libraries are built
for the hard-float ilp32f ABI.
BLE 5.3, marked EXPERIMENTAL and off by default: the prebuilt libble is an
all-in-one controller plus RivieraWaves host (GAP/GATT/SMP inside the blob)
with no HCI transport, so the port drives the vendor host directly
(ble_adp_*, ble_adv_*, ble_gap_*) instead of registering a bt_driver_s.
The SDK's radio interrupt handlers must be attached to the NuttX IRQ table
(they are reached through the ECLIC hardware vector table in the vendor
build); attaching also keeps --gc-sections from dropping them. It ships
with no configuration; enabling it advertises as "NuttX", connectable.
Boards: gd32vw553k-start with nsh, wapi, sta_softap, periph and littlefs
configurations, and the board added to the CI build list.
Tested on hardware (GD32VW553K-START): NSH, the peripheral drivers
(TRNG entropy and the LEDs exercised), LittleFS (write, read, survives a
reboot), the full Wi-Fi station path (scan, WPA2, DHCP, ping to the
internet), the softAP (a client associates with WPA2, gets an address
from the board's DHCP server, and pings the board), and BLE (advertises as
"NuttX"; a central connects and enumerates the GATT database).
Assisted-by: Claude Opus 4.8
Signed-off-by: Jorge Guzman <jorge.gzm@gmail.com>
fix
Error: Refusing to load formula px4/px4/genromfs from untrusted tap px4/px4.
Run `brew trust --formula px4/px4/genromfs` or `brew trust px4/px4` to trust it.
Error: Process completed with exit code 1.
Homebrew 6.0+ refuses to load formulae from third-party taps unless they
are explicitly trusted ("Refusing to load formula ... from untrusted tap").
Trust each tap non-interactively before installing from it. Without this,
`brew install` aborts before pouring any package (including ccache).
`brew trust` only exists on Homebrew 6.0+; guard it so older versions,
which don't gate untrusted taps, skip it silently.
50161b1f09/Tools/setup/macos.sh (L54-L64)
Signed-off-by: simbit18 <simbit18@gmail.com>
Move the stm32l1 sources, headers and boards into arch/arm/src/stm32l1,
arch/arm/include/stm32l1 and boards/arm/stm32l1, then finalize the split:
source each split family directly in arch/arm/Kconfig and boards/Kconfig and
remove the now-empty combined arch/arm/src/stm32 and boards/arm/stm32 trees.
BREAKING CHANGE: The legacy STM32 architecture and board paths were split into
stm32f1, stm32l1, stm32f2, stm32f3, stm32f4, and stm32g4 directories.
Out-of-tree boards must move from stm32 to the matching split family.
Signed-off-by: raiden00pl <raiden00@railab.me>
Even after installing the ftdi library on CI it doesn't work to
compile the sim:ft2232h_gpio, so remove it from CI test.
Signed-off-by: Alan C. Assis <acassis@gmail.com>
This commit adds a defconfig for enabling the NuttX Web Panel on
ESP32-P4. It also create entries to automatically call the Web
panel application after system's boot up.
The `webpanel` is removed from regular ESP32-P4 CI testing because
it ships with Python and that would overload CI infrastructure.
Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
This commit is needed to get PR #18951 passing on CI test.
I think this USB Device could be used in the future to do
real hardware tests, including automated tests on our CI.
Signed-off-by: Alan C. Assis <acassis@gmail.com>
The repo bitbucket.org/nuttx/tools is no longer available. This PR changes it to to github.com/patacongo/tools, as explained in https://github.com/apache/nuttx/pull/18890. This PR updates the URL in Dockerfile and Docs.
Signed-off-by: Lup Yuen Lee <luppy@appkaki.com>
Remove `esp32p4-function-ev-board:python` defconfig from being
built for the regular CI pipelines to avoid overloading it.
Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
For boards b-g431b-esc1/nsh, nucleo-g431kb/nsh and nucleo-g431rb/nsh,
the `.data` section of nuttx.elf overflows the 128 KB flash region by a
few hundred bytes on default GNU EABI builds:
arm-none-eabi-ld: nuttx section `.data' will not fit in region `flash'
arm-none-eabi-ld: region `flash' overflowed by 296 bytes
Enabling CONFIG_LTO_FULL=y in the corresponding defconfigs brings flash
usage back below the 128 KB limit (~93%).
Additionally, fix arch/arm/src/cmake/gcc.cmake so that when LTO is
enabled it always uses the gcc-ar / gcc-nm / gcc-ranlib wrappers, not
just when CONFIG_ARM_TOOLCHAIN_GNU_EABI is also set. CI tooling (via
tools/testbuild.sh) configures cmake first, then flips the toolchain
choice in .config with kconfig-tweak before running `cmake --build`.
With the previous "ARM_TOOLCHAIN_GNU_EABI && !LTO_NONE" guard the
regen step would switch to plain `ar` for the .a files, even though the
linker driver picked at configure time is still arm-none-eabi-g++ and
the object files contain GCC LTO IR. The result was a flood of
"undefined reference to `printf' / `free' / `puts' ..." link errors
when running tools/testbuild.sh -A -N -R on the *_CLANG variants.
Now that we are inside gcc.cmake the toolchain is unambiguously GCC,
so dropping the redundant CONFIG_ARM_TOOLCHAIN_GNU_EABI conjunct keeps
the LTO-aware ar wrappers in place across kconfig-tweak toolchain
switches.
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Introduce minimal chip support for the STMicro STM32N6 family
(Cortex-M55, ARMv8.1-M with TrustZone and FPU), sufficient to bring
up an NSH console over USART1.
Scope (deliberately minimal first drop):
- Chip selector ARCH_CHIP_STM32N6 wired into arch/arm/Kconfig and
chip-name mapping ("stm32n6").
- Sub-Kconfig under arch/arm/src/stm32n6 with the STM32N657X0 chip
selector and a single user-selectable USART (USART1).
- Boot path: stm32_start with a naked dispatcher that clears the
boot-ROM MSPLIM/PSPLIM stack limits before any compiler-emitted
prologue, then runs vector relocation and SRAM-only heap init.
The chip runs entirely in the Secure state; SAU is left in its
reset configuration.
- PLL1-based clock tree fed from HSI64 targeting 200 MHz CPU, with
USART1 kernel-clock routed to HSI for a predictable BRR that is
independent of any later clock change.
- Low-level USART driver with full serial framework support.
stm32_serial.c is adapted from arch/arm/src/stm32h5/stm32_serial.c
(sibling ARMv8-M Mainline port with the same USART IP), stripped
of DMA-RX, LPUART, the per-USART2..5 plumbing, RS-485 driver-enable,
TIOCSINVERT/SWAP and HALFDUPLEX paths.
- SysTick system timer.
- GPIO, PWR and RCC helpers.
TrustZone, MPU, I/D-cache and Helium (MVE) are left disabled to
minimise bring-up surface; these will be added in follow-up patches
alongside the drivers that need them.
Signed-off-by: ImBonkers <samuelnlinden@pm.me>
Upgrades esptool from v4.8.dev4 to v5.2.0, enabling support for newer chips.
Also adds 'upgrade pip' to allow this upgrade.
Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
This is necessary because new defconfig were recently added to
Xtensa-based Espressif SoCs and the build job may exceed 2 hours.
In order to avoid increasing job timeout, a specific job for each
supported SoC (ESP32, ESP32-S2 and ESP32-S3) was created instead.
Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
This bl602evb:elf configuration has caused job risc-v-01 to fail on several occasions.
riscv-none-elf-ld: cannot find /github/workspace/sources/nuttx/arch/risc-v/src/crt0.o: No such file or directory
https://github.com/apache/nuttx/pull/17792
Added -bl602evb:elf to the risc-v-01.dat file to skip the build.
Signed-off-by: simbit18 <simbit18@gmail.com>
macos-15-intel and macos-14 Apple Silicon
- bloaty()
aligned with the latest version
macos-15-intel
- avr_gcc_toolchain()
Latest version not available for Intel,
so it needs to be built from source, which takes over an hour.
The latest version prebuilt for Intel is 9.4.0
Added an workaround for installation.
Signed-off-by: simbit18 <simbit18@gmail.com>
Clean up the CMake configuration by removing the obsolete
`BUILD_OOTCPP` guard. This variable is no longer required
since out-of-tree build handling is now managed via the
enhanced `nuttx_add_subdirectory()` with EXCLUDE support.
* Simplifies CMake configuration command.
* Avoids redundant or unused build options.
Signed-off-by: trns1997 <trns1997@gmail.com>
Introduce a new CI test to validate out-of-tree builds
and prevent regressions in the `make export` workflow.
Specifically, this change adds `test-oot-build.sh` that:
* Builds NuttX using a selected configuration.
* Runs `make export` to generate the export package.
* Copies the `nuttx-export` to the OOT build project.
* Verifies that compilation and linking succeed.
Signed-off-by: trns1997 <trns1997@gmail.com>
- CMake added board Raspberry Pi Pico
- Added the entry:
CMake,raspberrypi-pico:bmp280
to the file arm-06.dat.
- Moved the search for the Python 3 interpreter to the
root CMakefile to avoid unnecessary repetition.
Signed-off-by: simbit18 <simbit18@gmail.com>
