From fbbc455c8d578f16758c41f366e82a32a5a63e96 Mon Sep 17 00:00:00 2001 From: YAMAMOTO Takashi Date: Sun, 22 Nov 2020 21:26:15 +0900 Subject: [PATCH] arch/arm/src/stm32f7/stm32_adc.c: Fix syslog formats --- arch/arm/src/stm32f7/stm32_adc.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/arch/arm/src/stm32f7/stm32_adc.c b/arch/arm/src/stm32f7/stm32_adc.c index ac0ab6fc012..0dde2113158 100644 --- a/arch/arm/src/stm32f7/stm32_adc.c +++ b/arch/arm/src/stm32f7/stm32_adc.c @@ -47,6 +47,7 @@ #include #include +#include #include #include #include @@ -1413,17 +1414,19 @@ static void adc_reset(FAR struct adc_dev_s *dev) leave_critical_section(flags); - ainfo("SR: 0x%08x CR1: 0x%08x CR2: 0x%08x\n", + ainfo("SR: 0x%08" PRIx32 " CR1: 0x%08" PRIx32 + " CR2: 0x%08" PRIx32 "\n", adc_getreg(priv, STM32_ADC_SR_OFFSET), adc_getreg(priv, STM32_ADC_CR1_OFFSET), adc_getreg(priv, STM32_ADC_CR2_OFFSET)); - ainfo("SQR1: 0x%08x SQR2: 0x%08x SQR3: 0x%08x\n", + ainfo("SQR1: 0x%08" PRIx32 " SQR2: 0x%08" PRIx32 + " SQR3: 0x%08" PRIx32 "\n", adc_getreg(priv, STM32_ADC_SQR1_OFFSET), adc_getreg(priv, STM32_ADC_SQR2_OFFSET), adc_getreg(priv, STM32_ADC_SQR3_OFFSET)); - ainfo("CCR: 0x%08x\n", getreg32(STM32_ADC_CCR)); + ainfo("CCR: 0x%08" PRIx32 "\n", getreg32(STM32_ADC_CCR)); } /****************************************************************************