diff --git a/arch/risc-v/src/mpfs/mpfs_cache.c b/arch/risc-v/src/mpfs/mpfs_cache.c index a01e0cffd25..7a5f96d5b9f 100644 --- a/arch/risc-v/src/mpfs/mpfs_cache.c +++ b/arch/risc-v/src/mpfs/mpfs_cache.c @@ -90,8 +90,7 @@ void mpfs_enable_cache(void) uint64_t *p_scratchpad = (uint64_t *)MPFS_ZERO_DEVICE_BOTTOM; uint32_t ways_inc; uint32_t inc; - uint64_t current_way = 1 << (((LIBERO_SETTING_WAY_ENABLE + 1) - - LIBERO_SETTING_NUM_SCRATCH_PAD_WAYS)); + uint64_t current_way = 0x1; /* Increasing the ways decreases the 2 MB l2lim area: * - Way0: 0x081e0000 - 0x08200000 @@ -147,6 +146,30 @@ void mpfs_enable_cache(void) putreg32(LIBERO_SETTING_WAY_MASK_U54_4_ICACHE, MPFS_CACHE_WAY_MASK_U54_4_ICACHE); + /* Sanity check: the scratchpad area is not configured in use as + * cache on any master + */ + +#if LIBERO_SETTING_NUM_SCRATCH_PAD_WAYS != 0 + static_assert(( + (LIBERO_SETTING_WAY_MASK_DMA | + LIBERO_SETTING_WAY_MASK_AXI4_PORT_0 | + LIBERO_SETTING_WAY_MASK_AXI4_PORT_1 | + LIBERO_SETTING_WAY_MASK_AXI4_PORT_2 | + LIBERO_SETTING_WAY_MASK_AXI4_PORT_3 | + LIBERO_SETTING_WAY_MASK_E51_DCACHE | + LIBERO_SETTING_WAY_MASK_E51_ICACHE | + LIBERO_SETTING_WAY_MASK_U54_1_DCACHE | + LIBERO_SETTING_WAY_MASK_U54_1_ICACHE | + LIBERO_SETTING_WAY_MASK_U54_2_DCACHE | + LIBERO_SETTING_WAY_MASK_U54_2_ICACHE | + LIBERO_SETTING_WAY_MASK_U54_3_DCACHE | + LIBERO_SETTING_WAY_MASK_U54_3_ICACHE | + LIBERO_SETTING_WAY_MASK_U54_4_DCACHE | + LIBERO_SETTING_WAY_MASK_U54_4_ICACHE) & + ((1 << LIBERO_SETTING_NUM_SCRATCH_PAD_WAYS) - 1)) == 0); +#endif + /* Assign ways to Zero Device */ for (ways_inc = 0; ways_inc < LIBERO_SETTING_NUM_SCRATCH_PAD_WAYS; diff --git a/boards/risc-v/mpfs/icicle/include/board_liberodefs.h b/boards/risc-v/mpfs/icicle/include/board_liberodefs.h index fd19f9fec7f..ce114ee48c5 100644 --- a/boards/risc-v/mpfs/icicle/include/board_liberodefs.h +++ b/boards/risc-v/mpfs/icicle/include/board_liberodefs.h @@ -598,21 +598,21 @@ /* Cache settings */ -#define LIBERO_SETTING_WAY_MASK_DMA 0x0000f0ff -#define LIBERO_SETTING_WAY_MASK_AXI4_PORT_0 0x0000f0ff -#define LIBERO_SETTING_WAY_MASK_AXI4_PORT_1 0x0000f0ff -#define LIBERO_SETTING_WAY_MASK_AXI4_PORT_2 0x0000f0ff -#define LIBERO_SETTING_WAY_MASK_AXI4_PORT_3 0x0000f0ff -#define LIBERO_SETTING_WAY_MASK_E51_DCACHE 0x0000f0ff -#define LIBERO_SETTING_WAY_MASK_E51_ICACHE 0x0000f0ff -#define LIBERO_SETTING_WAY_MASK_U54_1_DCACHE 0x0000f0ff -#define LIBERO_SETTING_WAY_MASK_U54_1_ICACHE 0x0000f0ff -#define LIBERO_SETTING_WAY_MASK_U54_2_DCACHE 0x0000f0ff -#define LIBERO_SETTING_WAY_MASK_U54_2_ICACHE 0x0000f0ff -#define LIBERO_SETTING_WAY_MASK_U54_3_DCACHE 0x0000f0ff -#define LIBERO_SETTING_WAY_MASK_U54_3_ICACHE 0x0000f0ff -#define LIBERO_SETTING_WAY_MASK_U54_4_DCACHE 0x0000f0ff -#define LIBERO_SETTING_WAY_MASK_U54_4_ICACHE 0x0000f0ff +#define LIBERO_SETTING_WAY_MASK_DMA 0x00000ff0 +#define LIBERO_SETTING_WAY_MASK_AXI4_PORT_0 0x00000ff0 +#define LIBERO_SETTING_WAY_MASK_AXI4_PORT_1 0x00000ff0 +#define LIBERO_SETTING_WAY_MASK_AXI4_PORT_2 0x00000ff0 +#define LIBERO_SETTING_WAY_MASK_AXI4_PORT_3 0x00000ff0 +#define LIBERO_SETTING_WAY_MASK_E51_DCACHE 0x00000ff0 +#define LIBERO_SETTING_WAY_MASK_E51_ICACHE 0x00000ff0 +#define LIBERO_SETTING_WAY_MASK_U54_1_DCACHE 0x00000ff0 +#define LIBERO_SETTING_WAY_MASK_U54_1_ICACHE 0x00000ff0 +#define LIBERO_SETTING_WAY_MASK_U54_2_DCACHE 0x00000ff0 +#define LIBERO_SETTING_WAY_MASK_U54_2_ICACHE 0x00000ff0 +#define LIBERO_SETTING_WAY_MASK_U54_3_DCACHE 0x00000ff0 +#define LIBERO_SETTING_WAY_MASK_U54_3_ICACHE 0x00000ff0 +#define LIBERO_SETTING_WAY_MASK_U54_4_DCACHE 0x00000ff0 +#define LIBERO_SETTING_WAY_MASK_U54_4_ICACHE 0x00000ff0 #define LIBERO_SETTING_NUM_SCRATCH_PAD_WAYS 0x00000004 #define LIBERO_SETTING_L2_SHUTDOWN_CR 0x00000000 #define LIBERO_SETTING_WAY_ENABLE 0x0000000b diff --git a/boards/risc-v/mpfs/m100pfsevp/include/board_liberodefs.h b/boards/risc-v/mpfs/m100pfsevp/include/board_liberodefs.h index d515512f901..ff4631c1622 100644 --- a/boards/risc-v/mpfs/m100pfsevp/include/board_liberodefs.h +++ b/boards/risc-v/mpfs/m100pfsevp/include/board_liberodefs.h @@ -594,21 +594,21 @@ /* Cache settings */ -#define LIBERO_SETTING_WAY_MASK_DMA 0x0000f0ff -#define LIBERO_SETTING_WAY_MASK_AXI4_PORT_0 0x0000f0ff -#define LIBERO_SETTING_WAY_MASK_AXI4_PORT_1 0x0000f0ff -#define LIBERO_SETTING_WAY_MASK_AXI4_PORT_2 0x0000f0ff -#define LIBERO_SETTING_WAY_MASK_AXI4_PORT_3 0x0000f0ff -#define LIBERO_SETTING_WAY_MASK_E51_DCACHE 0x0000f0ff -#define LIBERO_SETTING_WAY_MASK_E51_ICACHE 0x0000f0ff -#define LIBERO_SETTING_WAY_MASK_U54_1_DCACHE 0x0000f0ff -#define LIBERO_SETTING_WAY_MASK_U54_1_ICACHE 0x0000f0ff -#define LIBERO_SETTING_WAY_MASK_U54_2_DCACHE 0x0000f0ff -#define LIBERO_SETTING_WAY_MASK_U54_2_ICACHE 0x0000f0ff -#define LIBERO_SETTING_WAY_MASK_U54_3_DCACHE 0x0000f0ff -#define LIBERO_SETTING_WAY_MASK_U54_3_ICACHE 0x0000f0ff -#define LIBERO_SETTING_WAY_MASK_U54_4_DCACHE 0x0000f0ff -#define LIBERO_SETTING_WAY_MASK_U54_4_ICACHE 0x0000f0ff +#define LIBERO_SETTING_WAY_MASK_DMA 0x00000ff0 +#define LIBERO_SETTING_WAY_MASK_AXI4_PORT_0 0x00000ff0 +#define LIBERO_SETTING_WAY_MASK_AXI4_PORT_1 0x00000ff0 +#define LIBERO_SETTING_WAY_MASK_AXI4_PORT_2 0x00000ff0 +#define LIBERO_SETTING_WAY_MASK_AXI4_PORT_3 0x00000ff0 +#define LIBERO_SETTING_WAY_MASK_E51_DCACHE 0x00000ff0 +#define LIBERO_SETTING_WAY_MASK_E51_ICACHE 0x00000ff0 +#define LIBERO_SETTING_WAY_MASK_U54_1_DCACHE 0x00000ff0 +#define LIBERO_SETTING_WAY_MASK_U54_1_ICACHE 0x00000ff0 +#define LIBERO_SETTING_WAY_MASK_U54_2_DCACHE 0x00000ff0 +#define LIBERO_SETTING_WAY_MASK_U54_2_ICACHE 0x00000ff0 +#define LIBERO_SETTING_WAY_MASK_U54_3_DCACHE 0x00000ff0 +#define LIBERO_SETTING_WAY_MASK_U54_3_ICACHE 0x00000ff0 +#define LIBERO_SETTING_WAY_MASK_U54_4_DCACHE 0x00000ff0 +#define LIBERO_SETTING_WAY_MASK_U54_4_ICACHE 0x00000ff0 #define LIBERO_SETTING_NUM_SCRATCH_PAD_WAYS 0x00000004 #define LIBERO_SETTING_L2_SHUTDOWN_CR 0x00000000 #define LIBERO_SETTING_WAY_ENABLE 0x0000000b