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https://github.com/apache/nuttx.git
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boards/rv-virt: Supports FPU test and ostest in both rv32/rv64
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
This commit is contained in:
Huang Qi
Xiang Xiao
parent
c1ea37742b
commit
f40a673fdf
4 changed files with 167 additions and 2 deletions
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@ -66,4 +66,6 @@ CONFIG_STACK_COLORATION=y
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CONFIG_START_MONTH=12
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CONFIG_START_YEAR=2021
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CONFIG_SYSTEM_NSH=y
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CONFIG_TESTING_OSTEST=y
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CONFIG_TESTING_OSTEST_FPUSIZE=528
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CONFIG_USEC_PER_TICK=1000
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71
boards/risc-v/qemu-rv/rv-virt/configs/nsh64/defconfig
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71
boards/risc-v/qemu-rv/rv-virt/configs/nsh64/defconfig
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@ -0,0 +1,71 @@
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#
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# This file is autogenerated: PLEASE DO NOT EDIT IT.
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#
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# You can use "make menuconfig" to make any modifications to the installed .config file.
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# You can then do "make savedefconfig" to generate a new defconfig file that includes your
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# modifications.
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#
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# CONFIG_DISABLE_OS_API is not set
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# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
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# CONFIG_NSH_DISABLEBG is not set
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# CONFIG_NSH_DISABLE_CAT is not set
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# CONFIG_NSH_DISABLE_CD is not set
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# CONFIG_NSH_DISABLE_FREE is not set
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# CONFIG_NSH_DISABLE_HELP is not set
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# CONFIG_NSH_DISABLE_LOSMART is not set
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# CONFIG_NSH_DISABLE_LS is not set
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# CONFIG_NSH_DISABLE_MOUNT is not set
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# CONFIG_NSH_DISABLE_PS is not set
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# CONFIG_NSH_DISABLE_PSSTACKUSAGE is not set
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# CONFIG_NSH_DISABLE_UNAME is not set
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CONFIG_16550_ADDRWIDTH=0
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CONFIG_16550_UART0=y
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CONFIG_16550_UART0_BASE=0x10000000
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CONFIG_16550_UART0_CLOCK=3686400
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CONFIG_16550_UART0_IRQ=37
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CONFIG_16550_UART0_SERIAL_CONSOLE=y
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CONFIG_16550_UART=y
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CONFIG_ARCH="risc-v"
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CONFIG_ARCH_BOARD="rv-virt"
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CONFIG_ARCH_BOARD_QEMU_RV_VIRT=y
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CONFIG_ARCH_CHIP="qemu-rv"
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CONFIG_ARCH_CHIP_QEMU_RV64=y
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CONFIG_ARCH_CHIP_QEMU_RV=y
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CONFIG_ARCH_CHIP_QEMU_RV_ISA_A=y
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CONFIG_ARCH_CHIP_QEMU_RV_ISA_C=y
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CONFIG_ARCH_CHIP_QEMU_RV_ISA_M=y
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CONFIG_ARCH_INTERRUPTSTACK=2048
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CONFIG_ARCH_RISCV=y
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CONFIG_ARCH_STACKDUMP=y
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CONFIG_BINFMT_DISABLE=y
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CONFIG_BOARD_LOOPSPERMSEC=6366
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CONFIG_BUILTIN=y
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CONFIG_CLOCK_MONOTONIC=y
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CONFIG_DEBUG_FULLOPT=y
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CONFIG_DEBUG_SYMBOLS=y
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CONFIG_DEFAULT_SMALL=y
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CONFIG_DEV_ZERO=y
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CONFIG_FS_PROCFS=y
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CONFIG_IDLETHREAD_STACKSIZE=2048
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CONFIG_INIT_ENTRYPOINT="nsh_main"
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CONFIG_INTELHEX_BINARY=y
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CONFIG_LIBC_FLOATINGPOINT=y
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CONFIG_LIBC_PERROR_STDOUT=y
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CONFIG_LIBC_STRERROR=y
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CONFIG_NFILE_DESCRIPTORS_PER_BLOCK=6
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CONFIG_NSH_ARCHINIT=y
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CONFIG_NSH_BUILTIN_APPS=y
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CONFIG_NSH_FILEIOSIZE=64
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CONFIG_PREALLOC_TIMERS=0
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CONFIG_RAM_SIZE=33554432
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CONFIG_RAM_START=0x80000000
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CONFIG_RR_INTERVAL=200
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CONFIG_SCHED_WAITPID=y
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CONFIG_SERIAL_UART_ARCH_MMIO=y
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CONFIG_STACK_COLORATION=y
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CONFIG_START_MONTH=12
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CONFIG_START_YEAR=2021
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CONFIG_SYSTEM_NSH=y
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CONFIG_TESTING_OSTEST=y
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CONFIG_TESTING_OSTEST_FPUSIZE=264
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CONFIG_USEC_PER_TICK=1000
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@ -1,5 +1,5 @@
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############################################################################
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# boards/risc-v/rv32m1/rv32m1-vega/src/Makefile
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# boards/risc-v/qemu-rv/rv-virt/src/Makefile
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#
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# Licensed to the Apache Software Foundation (ASF) under one or more
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# contributor license agreements. See the NOTICE file distributed with
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@ -22,6 +22,6 @@ include $(TOPDIR)/Make.defs
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RCSRCS = etc/init.d/rcS
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CSRCS = qemu_rv_appinit.c
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CSRCS = qemu_rv_appinit.c qemu_rv_ostest.c
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include $(TOPDIR)/boards/Board.mk
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92
boards/risc-v/qemu-rv/rv-virt/src/qemu_rv_ostest.c
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92
boards/risc-v/qemu-rv/rv-virt/src/qemu_rv_ostest.c
Normal file
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@ -0,0 +1,92 @@
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/****************************************************************************
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* boards/risc-v/qemu-rv/rv-virt/src/qemu_rv_ostest.c
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <stdint.h>
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#include <stdbool.h>
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#include <string.h>
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#include <syscall.h>
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#include <nuttx/irq.h>
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* Configuration ************************************************************/
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#undef HAVE_FPU
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#if defined(CONFIG_ARCH_FPU) && \
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!defined(CONFIG_TESTING_OSTEST_FPUTESTDISABLE) && \
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defined(CONFIG_TESTING_OSTEST_FPUSIZE) && \
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defined(CONFIG_SCHED_WAITPID)
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# define HAVE_FPU 1
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#endif
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#ifdef HAVE_FPU
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#if CONFIG_TESTING_OSTEST_FPUSIZE != (8 * FPU_XCPT_REGS)
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# error "CONFIG_TESTING_OSTEST_FPUSIZE has the wrong size"
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#endif
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/****************************************************************************
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* Private Data
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****************************************************************************/
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static uintptr_t g_saveregs[XCPTCONTEXT_REGS];
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/* Given an array of size CONFIG_TESTING_OSTEST_FPUSIZE, this function will
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* return the current FPU registers.
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*/
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void arch_getfpu(FAR uint32_t *fpusave)
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{
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irqstate_t flags;
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/* Take a snapshot of the thread context right now */
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flags = enter_critical_section();
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riscv_saveusercontext(g_saveregs);
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/* Return only the floating register values */
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memcpy(fpusave, &g_saveregs[INT_XCPT_REGS], INT_REG_SIZE * FPU_XCPT_REGS);
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leave_critical_section(flags);
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}
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/* Given two arrays of size CONFIG_TESTING_OSTEST_FPUSIZE this function
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* will compare them and return true if they are identical.
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*/
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bool arch_cmpfpu(FAR const uint32_t *fpusave1, FAR const uint32_t *fpusave2)
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{
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return memcmp(fpusave1, fpusave2, INT_REG_SIZE * FPU_XCPT_REGS) == 0;
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}
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#endif /* HAVE_FPU */
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