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drivers/mtd: Add 4-byte addressing support for W25Q256 and W25Q512.
This commit adds 4-byte address mode support to the Winbond W25 SPI NOR flash driver (drivers/mtd/w25.c): - Detect W25_JEDEC_CAPACITY_256MBIT (0x19) and W25_JEDEC_CAPACITY_512MBIT (0x20). - Send W25_EN4B (0xB7) command to enter 4-byte address mode on initialization when chip capacity >= 256Mbit. - Expand w25_dev_s nsectors to uint32_t to support chips > 128Mbit. - Add w25_sendaddr() helper supporting both 3-byte and 4-byte addressing for sector erase, byte read, page write, and byte write. - Verified on hardware with Winbond W25Q256JV (256Mbit / 32MB): both raw MTD block access at >20MB (>16MB boundary) and SmartFS mounting and file reading are verified working. Assisted-by: gemini-3.8-flash Signed-off-by: Daniel P. Carvalho <danieloak@gmail.com>
This commit is contained in:
Daniel P. Carvalho
Alan C. Assis
parent
14b62c50f3
commit
f2713d9511
1 changed files with 102 additions and 24 deletions
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@ -96,6 +96,8 @@
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#define W25_BE 0xd8 /* Block Erase (64KB) */
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#define W25_SE 0x20 /* Sector erase (4KB) */
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#define W25_CE 0xc7 /* Chip erase */
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#define W25_EN4B 0xb7 /* Enter 4-byte address mode */
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#define W25_EX4B 0xe9 /* Exit 4-byte address mode */
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#define W25_PD 0xb9 /* Power down */
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#define W25_PURDID 0xab /* Release PD, Device ID */
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#define W25_RDMFID 0x90 /* Read Manufacturer / Device */
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@ -127,6 +129,8 @@
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#define W25_JEDEC_CAPACITY_32MBIT 0x16 /* 1024x4096 = 32Mbit memory capacity */
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#define W25_JEDEC_CAPACITY_64MBIT 0x17 /* 2048x4096 = 64Mbit memory capacity */
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#define W25_JEDEC_CAPACITY_128MBIT 0x18 /* 4096x4096 = 128Mbit memory capacity */
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#define W25_JEDEC_CAPACITY_256MBIT 0x19 /* 8192x4096 = 256Mbit memory capacity */
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#define W25_JEDEC_CAPACITY_512MBIT 0x20 /* 16384x4096 = 512Mbit memory capacity */
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#define NSECTORS_2MBIT 64 /* 64 sectors x 4096 bytes/sector = 256Kb */
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#define NSECTORS_8MBIT 256 /* 256 sectors x 4096 bytes/sector = 1Mb */
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@ -134,6 +138,8 @@
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#define NSECTORS_32MBIT 1024 /* 1024 sectors x 4096 bytes/sector = 4Mb */
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#define NSECTORS_64MBIT 2048 /* 2048 sectors x 4096 bytes/sector = 8Mb */
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#define NSECTORS_128MBIT 4096 /* 4096 sectors x 4096 bytes/sector = 16Mb */
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#define NSECTORS_256MBIT 8192 /* 8192 sectors x 4096 bytes/sector = 32Mb */
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#define NSECTORS_512MBIT 16384 /* 16384 sectors x 4096 bytes/sector = 64Mb */
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/* Status register bit definitions */
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@ -239,8 +245,9 @@ struct w25_dev_s
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{
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struct mtd_dev_s mtd; /* MTD interface */
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FAR struct spi_dev_s *spi; /* Saved SPI interface instance */
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uint16_t nsectors; /* Number of erase sectors */
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uint32_t nsectors; /* Number of erase sectors */
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uint8_t prev_instr; /* Previous instruction given to W25 device */
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uint8_t addresslen; /* Address length in bytes: 3 or 4 */
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#if defined(CONFIG_W25_SECTOR512) && !defined(CONFIG_W25_READONLY)
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uint8_t flags; /* Buffered sector flags */
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@ -259,12 +266,14 @@ static inline void w25_purdid(FAR struct w25_dev_s *priv);
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static void w25_lock(FAR struct spi_dev_s *spi);
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static inline void w25_unlock(FAR struct spi_dev_s *spi);
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static inline int w25_readid(FAR struct w25_dev_s *priv);
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static void w25_enter4b(FAR struct w25_dev_s *priv);
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#ifndef CONFIG_W25_READONLY
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static void w25_unprotect(FAR struct w25_dev_s *priv);
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#endif
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static uint8_t w25_waitwritecomplete(FAR struct w25_dev_s *priv);
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static inline void w25_wren(FAR struct w25_dev_s *priv);
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static inline void w25_wrdi(FAR struct w25_dev_s *priv);
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static inline void w25_sendaddr(FAR struct w25_dev_s *priv, off_t address);
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static bool w25_is_erased(struct w25_dev_s *priv,
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off_t address,
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off_t size);
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@ -436,6 +445,10 @@ static inline int w25_readid(struct w25_dev_s *priv)
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memory == W25Q_JEDEC_MEMORY_TYPE_C ||
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memory == W25Q_JEDEC_MEMORY_TYPE_D))
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{
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/* Default to 3-byte address mode */
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priv->addresslen = 3;
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/* Okay.. is it a FLASH capacity that we understand? If so, save
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* the FLASH capacity.
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*/
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@ -447,7 +460,7 @@ static inline int w25_readid(struct w25_dev_s *priv)
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if (capacity == W25_JEDEC_CAPACITY_2MBIT)
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{
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priv->nsectors = NSECTORS_2MBIT;
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priv->nsectors = NSECTORS_2MBIT;
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}
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/* 8M-bit / 1M-byte
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@ -457,7 +470,7 @@ static inline int w25_readid(struct w25_dev_s *priv)
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else if (capacity == W25_JEDEC_CAPACITY_8MBIT)
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{
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priv->nsectors = NSECTORS_8MBIT;
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priv->nsectors = NSECTORS_8MBIT;
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}
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/* 16M-bit / 2M-byte (2,097,152)
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@ -467,7 +480,7 @@ static inline int w25_readid(struct w25_dev_s *priv)
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else if (capacity == W25_JEDEC_CAPACITY_16MBIT)
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{
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priv->nsectors = NSECTORS_16MBIT;
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priv->nsectors = NSECTORS_16MBIT;
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}
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/* 32M-bit / 4M-byte (4,194,304)
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@ -477,7 +490,7 @@ static inline int w25_readid(struct w25_dev_s *priv)
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else if (capacity == W25_JEDEC_CAPACITY_32MBIT)
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{
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priv->nsectors = NSECTORS_32MBIT;
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priv->nsectors = NSECTORS_32MBIT;
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}
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/* 64M-bit / 8M-byte (8,388,608)
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@ -487,7 +500,7 @@ static inline int w25_readid(struct w25_dev_s *priv)
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else if (capacity == W25_JEDEC_CAPACITY_64MBIT)
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{
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priv->nsectors = NSECTORS_64MBIT;
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priv->nsectors = NSECTORS_64MBIT;
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}
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/* 128M-bit / 16M-byte (16,777,216)
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@ -497,7 +510,29 @@ static inline int w25_readid(struct w25_dev_s *priv)
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else if (capacity == W25_JEDEC_CAPACITY_128MBIT)
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{
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priv->nsectors = NSECTORS_128MBIT;
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priv->nsectors = NSECTORS_128MBIT;
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}
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/* 256M-bit / 32M-byte (33,554,432)
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*
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* W25Q256JV
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*/
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else if (capacity == W25_JEDEC_CAPACITY_256MBIT)
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{
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priv->nsectors = NSECTORS_256MBIT;
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priv->addresslen = 4;
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}
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/* 512M-bit / 64M-byte (67,108,864)
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*
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* W25Q512JV, W25Q512NW
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*/
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else if (capacity == W25_JEDEC_CAPACITY_512MBIT)
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{
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priv->nsectors = NSECTORS_512MBIT;
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priv->addresslen = 4;
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}
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else
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{
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@ -517,6 +552,30 @@ static inline int w25_readid(struct w25_dev_s *priv)
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return -ENODEV;
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}
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/****************************************************************************
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* Name: w25_enter4b
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****************************************************************************/
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static void w25_enter4b(FAR struct w25_dev_s *priv)
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{
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/* Lock and configure the SPI bus */
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w25_lock(priv->spi);
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/* Select this FLASH part */
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SPI_SELECT(priv->spi, SPIDEV_FLASH(0), true);
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/* Send the "Enter 4-byte Address Mode (EN4B)" instruction */
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SPI_SEND(priv->spi, W25_EN4B);
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/* Deselect the FLASH and unlock the bus */
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SPI_SELECT(priv->spi, SPIDEV_FLASH(0), false);
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w25_unlock(priv->spi);
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}
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/****************************************************************************
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* Name: w25_unprotect
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****************************************************************************/
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@ -697,6 +756,22 @@ static bool w25_is_erased(struct w25_dev_s *priv, off_t address, off_t size)
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return true;
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}
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/****************************************************************************
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* Name: w25_sendaddr
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****************************************************************************/
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static inline void w25_sendaddr(FAR struct w25_dev_s *priv, off_t address)
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{
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if (priv->addresslen == 4)
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{
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SPI_SEND(priv->spi, (address >> 24) & 0xff);
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}
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SPI_SEND(priv->spi, (address >> 16) & 0xff);
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SPI_SEND(priv->spi, (address >> 8) & 0xff);
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SPI_SEND(priv->spi, address & 0xff);
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}
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/****************************************************************************
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* Name: w25_sectorerase
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****************************************************************************/
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@ -737,9 +812,7 @@ static void w25_sectorerase(struct w25_dev_s *priv, off_t sector)
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* (those corresponding to the sector) have any meaning.
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*/
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SPI_SEND(priv->spi, (address >> 16) & 0xff);
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SPI_SEND(priv->spi, (address >> 8) & 0xff);
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SPI_SEND(priv->spi, address & 0xff);
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w25_sendaddr(priv, address);
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/* Deselect the FLASH */
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@ -814,9 +887,7 @@ static void w25_byteread(FAR struct w25_dev_s *priv, FAR uint8_t *buffer,
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/* Send the address high byte first. */
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SPI_SEND(priv->spi, (address >> 16) & 0xff);
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SPI_SEND(priv->spi, (address >> 8) & 0xff);
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SPI_SEND(priv->spi, address & 0xff);
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w25_sendaddr(priv, address);
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/* Send a dummy byte */
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@ -869,9 +940,7 @@ static void w25_pagewrite(struct w25_dev_s *priv, FAR const uint8_t *buffer,
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/* Send the address high byte first. */
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SPI_SEND(priv->spi, (address >> 16) & 0xff);
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SPI_SEND(priv->spi, (address >> 8) & 0xff);
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SPI_SEND(priv->spi, address & 0xff);
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w25_sendaddr(priv, address);
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/* Then send the page of data */
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@ -928,9 +997,7 @@ static inline void w25_bytewrite(struct w25_dev_s *priv,
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/* Send the page offset high byte first. */
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SPI_SEND(priv->spi, (offset >> 16) & 0xff);
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SPI_SEND(priv->spi, (offset >> 8) & 0xff);
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SPI_SEND(priv->spi, offset & 0xff);
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w25_sendaddr(priv, offset);
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/* Then write the specified number of bytes */
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@ -1049,6 +1116,7 @@ static void w25_cacheerase(struct w25_dev_s *priv, off_t sector)
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if (!IS_ERASED(priv))
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{
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off_t esectno = sector >> (W25_SECTOR_SHIFT - W25_SECTOR512_SHIFT);
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w25_finfo("sector: %ld esectno: %d\n", sector, esectno);
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w25_sectorerase(priv, esectno);
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@ -1094,6 +1162,7 @@ static void w25_cachewrite(FAR struct w25_dev_s *priv,
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{
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off_t esectno = sector >>
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(W25_SECTOR_SHIFT - W25_SECTOR512_SHIFT);
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w25_finfo("sector: %ld esectno: %d\n", sector, esectno);
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w25_sectorerase(priv, esectno);
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@ -1344,6 +1413,7 @@ static int w25_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
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{
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FAR struct mtd_geometry_s *geo =
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(FAR struct mtd_geometry_s *)((uintptr_t)arg);
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if (geo)
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{
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memset(geo, 0, sizeof(*geo));
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@ -1381,6 +1451,7 @@ static int w25_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
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{
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FAR struct partition_info_s *info =
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(FAR struct partition_info_s *)arg;
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if (info != NULL)
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{
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#ifdef CONFIG_W25_SECTOR512
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@ -1401,19 +1472,19 @@ static int w25_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
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case MTDIOC_BULKERASE:
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{
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/* Erase the entire device */
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/* Erase the entire device */
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w25_lock(priv->spi);
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ret = w25_chiperase(priv);
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w25_unlock(priv->spi);
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w25_lock(priv->spi);
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ret = w25_chiperase(priv);
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w25_unlock(priv->spi);
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}
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break;
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case MTDIOC_ERASESTATE:
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{
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FAR uint8_t *result = (FAR uint8_t *)arg;
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*result = W25_ERASED_STATE;
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*result = W25_ERASED_STATE;
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ret = OK;
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}
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break;
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@ -1492,6 +1563,13 @@ FAR struct mtd_dev_s *w25_initialize(FAR struct spi_dev_s *spi)
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}
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else
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{
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/* Enter 4-byte address mode if required */
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if (priv->addresslen == 4)
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{
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w25_enter4b(priv);
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}
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/* Make sure that the FLASH is unprotected so that we can write
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* into it.
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*/
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