diff --git a/arch/xtensa/Kconfig b/arch/xtensa/Kconfig
index 57511473efd..5a3794ff3b2 100644
--- a/arch/xtensa/Kconfig
+++ b/arch/xtensa/Kconfig
@@ -88,6 +88,7 @@ config ARCH_CHIP_ESP32S3
 	select ARCH_HAVE_MMU
 	select ARCH_HAVE_ADDRENV
 	select ARCH_NEED_ADDRENV_MAPPING
+	select ARCH_HAVE_ELF_EXECUTABLE
 	select ARCH_HAVE_MULTICPU
 	select ARCH_HAVE_RESET
 	select ARCH_HAVE_TEXT_HEAP
diff --git a/arch/xtensa/src/esp32s3/chip_macros.h b/arch/xtensa/src/esp32s3/chip_macros.h
index 652d95a3a31..963fa91d174 100644
--- a/arch/xtensa/src/esp32s3/chip_macros.h
+++ b/arch/xtensa/src/esp32s3/chip_macros.h
@@ -33,7 +33,7 @@
 #endif
 #endif
 
-#if defined(CONFIG_ESP32S3_WCL) && defined(CONFIG_BUILD_PROTECTED)
+#if defined(CONFIG_ESP32S3_WCL) && !defined(CONFIG_BUILD_FLAT)
 #include "hardware/esp32s3_wcl_core.h"
 #endif
 
@@ -47,7 +47,7 @@
 
 #define HANDLER_SECTION .iram1
 
-#if defined(CONFIG_ESP32S3_WCL) && defined(CONFIG_BUILD_PROTECTED)
+#if defined(CONFIG_ESP32S3_WCL) && !defined(CONFIG_BUILD_FLAT)
 
 /* Definitions for the Worlds reserved for Kernel and Userspace */
 
diff --git a/arch/xtensa/src/esp32s3/esp32s3_allocateheap.c b/arch/xtensa/src/esp32s3/esp32s3_allocateheap.c
index fbab081a550..11034a9b5ef 100644
--- a/arch/xtensa/src/esp32s3/esp32s3_allocateheap.c
+++ b/arch/xtensa/src/esp32s3/esp32s3_allocateheap.c
@@ -96,6 +96,17 @@ void up_allocate_heap(void **heap_start, size_t *heap_size)
 
   utop  = ALIGN_DOWN(ets_rom_layout_p->dram0_rtos_reserved_start, 256);
 
+#  elif defined(CONFIG_BUILD_KERNEL)
+  /* There is no single user heap in a kernel build:  each task group grows
+   * its own out of the page pool as it is created.  nx_start() knows this
+   * and never asks -- MM_KERNEL_USRHEAP_INIT is undefined for BUILD_KERNEL
+   * -- so report an empty heap and let the assertion below catch it if this
+   * ever is reached.
+   */
+
+  ubase = 0;
+  utop  = 0;
+
 #  elif defined(CONFIG_BUILD_FLAT)
 #    ifdef MM_USER_HEAP_EXTRAM
   ubase = (uintptr_t)esp_spiram_allocable_vaddr_start();
@@ -160,6 +171,16 @@ void up_allocate_kheap(void **heap_start, size_t *heap_size)
 
   kbase = (uintptr_t)_sheap;
   ktop  = KDRAM_END;
+#elif defined(CONFIG_BUILD_KERNEL)
+  /* A kernel build has a single kernel heap and one user heap per task
+   * group, the latter grown out of the page pool by pgalloc().  So the whole
+   * internal DRAM heap belongs to the kernel here, whether or not PSRAM is
+   * fitted:  PSRAM backs the page pool, not this heap.
+   */
+
+  kbase = (uintptr_t)_sheap + XTENSA_IMEM_REGION_SIZE;
+  ktop  = (uintptr_t)ets_rom_layout_p->dram0_rtos_reserved_start;
+
 #elif defined(CONFIG_BUILD_FLAT)
 #  ifdef MM_USER_HEAP_IRAM
   /* Skip internal heap region if CONFIG_XTENSA_IMEM_USE_SEPARATE_HEAP is
diff --git a/boards/xtensa/esp32s3/common/scripts/esp32s3_sections.ld b/boards/xtensa/esp32s3/common/scripts/esp32s3_sections.ld
index e0384d88f42..8fc6d5a484d 100644
--- a/boards/xtensa/esp32s3/common/scripts/esp32s3_sections.ld
+++ b/boards/xtensa/esp32s3/common/scripts/esp32s3_sections.ld
@@ -22,6 +22,19 @@
 
 #include <nuttx/config.h>
 
+/* A kernel build archives the architecture objects into libkarch.a rather
+ * than libarch.a, so the placement rules below have to name the right one.
+ * Getting this wrong is silent and fatal: the octal-flash bring-up functions
+ * stay in mapped flash and are called while that mapping is being
+ * reconfigured.
+ */
+
+#ifdef CONFIG_BUILD_KERNEL
+#  define ARCHLIB *libkarch.a
+#else
+#  define ARCHLIB *libarch.a
+#endif
+
 /* Default entry point: */
 
 ENTRY(__start);
@@ -165,20 +178,20 @@ SECTIONS
     *libpp.a:wifi_slp_iram.*(.literal .text .literal.* .text.*)
     *libpp.a:wifi_or_slp_iram.*(.literal .text .literal.* .text.*)
     *libpp.a:wifi_slp_rx_iram.*(.literal .text .literal.* .text.*)
-    *libarch.a:*esp_loader.*(.literal .text .literal.* .text.*)
-    *libarch.a:esp32s3_cpuindex.*(.literal .text .literal.* .text.*)
-    *libarch.a:esp32s3_user.*(.literal .text .literal.* .text.*)
-    *libarch.a:esp32s3_spiflash.*(.literal .text .literal.* .text.*)
-    *libarch.a:xtensa_assert.*(.literal .text .literal.* .text.*)
-    *libarch.a:xtensa_cpuint.*(.literal .text .literal.* .text.*)
-    *libarch.a:xtensa_cpupause.*(.literal .text .literal.* .text.*)
-    *libarch.a:xtensa_irqdispatch.*(.literal .text .literal.* .text.*)
-    *libarch.a:xtensa_modifyreg32.*(.literal .text .literal.* .text.*)
-    *libarch.a:xtensa_testset.*(.literal .text .literal.* .text.*)
-    *libarch.a:esp_app_desc.*(.literal .text .literal.* .text.*)
-    *libarch.a:intr_alloc.*(.literal.esp_intr_get_intno .text.esp_intr_get_intno)
-    *libarch.a:xtensa_intr.*(.literal.xt_get_interrupt_handler .text.xt_get_interrupt_handler)
-    *libarch.a:xtensa_intr.*(.literal.xt_get_interrupt_handler_arg .text.xt_get_interrupt_handler_arg)
+    ARCHLIB:*esp_loader.*(.literal .text .literal.* .text.*)
+    ARCHLIB:esp32s3_cpuindex.*(.literal .text .literal.* .text.*)
+    ARCHLIB:esp32s3_user.*(.literal .text .literal.* .text.*)
+    ARCHLIB:esp32s3_spiflash.*(.literal .text .literal.* .text.*)
+    ARCHLIB:xtensa_assert.*(.literal .text .literal.* .text.*)
+    ARCHLIB:xtensa_cpuint.*(.literal .text .literal.* .text.*)
+    ARCHLIB:xtensa_cpupause.*(.literal .text .literal.* .text.*)
+    ARCHLIB:xtensa_irqdispatch.*(.literal .text .literal.* .text.*)
+    ARCHLIB:xtensa_modifyreg32.*(.literal .text .literal.* .text.*)
+    ARCHLIB:xtensa_testset.*(.literal .text .literal.* .text.*)
+    ARCHLIB:esp_app_desc.*(.literal .text .literal.* .text.*)
+    ARCHLIB:intr_alloc.*(.literal.esp_intr_get_intno .text.esp_intr_get_intno)
+    ARCHLIB:xtensa_intr.*(.literal.xt_get_interrupt_handler .text.xt_get_interrupt_handler)
+    ARCHLIB:xtensa_intr.*(.literal.xt_get_interrupt_handler_arg .text.xt_get_interrupt_handler_arg)
 
     *libc.a:sq_remlast.*(.literal .text .literal.* .text.*)
 
@@ -199,11 +212,11 @@ SECTIONS
     *libsched.a:stack_monitor.*(.literal .text .literal.* .text.*)
 
 #ifdef CONFIG_ESP32S3_SPEED_UP_ISR
-    *libarch.a:xtensa_switchcontext.*(.literal.up_switch_context .text.up_switch_context)
+    ARCHLIB:xtensa_switchcontext.*(.literal.up_switch_context .text.up_switch_context)
 
-    *libarch.a:esp32s3_timerisr.*(.literal.systimer_isr .text.systimer_isr)
-    *libarch.a:esp32s3_idle.*(.literal.up_idle .text.up_idle)
-    *libarch.a:esp32s3_dma.*(.literal.esp32s3_dma_load .text.esp32s3_dma_load \
+    ARCHLIB:esp32s3_timerisr.*(.literal.systimer_isr .text.systimer_isr)
+    ARCHLIB:esp32s3_idle.*(.literal.up_idle .text.up_idle)
+    ARCHLIB:esp32s3_dma.*(.literal.esp32s3_dma_load .text.esp32s3_dma_load \
                              .literal.esp32s3_dma_enable .text.esp32s3_dma_enable)
 
     *libsched.a:sched_processtimer.*(.literal.nxsched_process_timer .text.nxsched_process_timer)
@@ -219,12 +232,12 @@ SECTIONS
     *libc.a:sq_remfirst.*(.literal.sq_remfirst .text.sq_remfirst)
 #endif
 
-    *libarch.a:esp32s3_spi_timing.*(.literal .text .literal.* .text.*)
+    ARCHLIB:esp32s3_spi_timing.*(.literal .text .literal.* .text.*)
 #ifdef CONFIG_ESP32S3_SPIRAM_MODE_QUAD
-    *libarch.a:esp32s3_psram_quad.*(.literal .text .literal.* .text.*)
+    ARCHLIB:esp32s3_psram_quad.*(.literal .text .literal.* .text.*)
 #endif
 #ifdef CONFIG_ESP32S3_SPIRAM_MODE_OCT
-    *libarch.a:esp32s3_psram_octal.*(.literal .text .literal.* .text.*)
+    ARCHLIB:esp32s3_psram_octal.*(.literal .text .literal.* .text.*)
 #endif
 #if defined(CONFIG_STACK_CANARIES) && \
     (defined(CONFIG_ESP32S3_SPIFLASH) || \
@@ -232,98 +245,98 @@ SECTIONS
     *libc.a:lib_stackchk.*(.literal .text .literal.* .text.*)
 #endif
 
-    *libarch.a:*brownout_hal.*(.text .text.* .literal .literal.*)
-    *libarch.a:*cpu.*(.text .text.* .literal .literal.*)
-    *libarch.a:*gpio_hal.*(.text .text.* .literal .literal.*)
-    *libarch.a:*periph_ctrl.*(.text .text.* .literal .literal.*)
-    *libarch.a:*clk.*(.text .text.* .literal .literal.*)
-    *libarch.a:*efuse_hal.*(.literal.is_eco0 .text.is_eco0)
-    *libarch.a:*efuse_utility.*(.text .text.* .literal .literal.*)
-    *libarch.a:*esp_clk.*(.text .text.* .literal .literal.*)
-    *libarch.a:*esp_clk_tree.*(.text .text.* .literal .literal.*)
-    *libarch.a:*esp_clk_tree_common.*(.text .text.* .literal .literal.*)
-    *libarch.a:*clk_tree_hal.*(.text .text.* .literal .literal.*)
-    *libarch.a:*rtc_init.*(.text .text.* .literal .literal.*)
-    *libarch.a:*rtc_clk.*(.text .text.* .literal .literal.*)
-    *libarch.a:*rtc_clk_init.*(.text .text.* .literal .literal.*)
-    *libarch.a:*rtc_sleep.*(.text .text.* .literal .literal.*)
-    *libarch.a:*rtc_time.*(.text .text.* .literal .literal.*)
-    *libarch.a:*regi2c_ctrl.*(.text .text.* .literal .literal.*)
-    *libarch.a:*uart_hal_iram.*(.text .text.* .literal .literal.*)
-    *libarch.a:*wdt_hal_iram.*(.text .text.* .literal .literal.*)
-    *libarch.a:*bootloader_banner_wrap.*(.text .text.* .literal .literal.*)
-    *libarch.a:*bootloader_init.*(.text .text.* .literal .literal.*)
-    *libarch.a:*bootloader_common.*(.text .text.* .literal .literal.*)
-    *libarch.a:*bootloader_common_loader.*(.text .text.* .literal .literal.*)
-    *libarch.a:*bootloader_console.*(.text .text.* .literal .literal.*)
-    *libarch.a:*bootloader_console_loader.*(.text .text.* .literal .literal.*)
-    *libarch.a:*bootloader_esp32s3.*(.text .text.* .literal .literal.*)
-    *libarch.a:*bootloader_flash.*(.text .text.* .literal .literal.*)
-    *libarch.a:*bootloader_flash_config_esp32s3.*(.text .text.* .literal .literal.*)
-    *libarch.a:*bootloader_clock_init.*(.text .text.* .literal .literal.*)
-    *libarch.a:*bootloader_clock_loader.*(.text .text.* .literal .literal.*)
-    *libarch.a:*bootloader_efuse.*(.text .text.* .literal .literal.*)
-    *libarch.a:*bootloader_panic.*(.text .text.* .literal .literal.*)
-    *libarch.a:*bootloader_mem.*(.text .text.* .literal .literal.*)
-    *libarch.a:*bootloader_random.*(.text .text.* .literal .literal.*)
-    *libarch.a:*bootloader_random*.*(.literal.bootloader_random_disable .text.bootloader_random_disable)
-    *libarch.a:*bootloader_random*.*(.literal.bootloader_random_enable .text.bootloader_random_enable)
-    *libarch.a:*bootloader_random_esp32s3.*(.text .text.* .literal .literal.*)
-    *libarch.a:*esp_image_format.*(.text .text.* .literal .literal.*)
-    *libarch.a:*bootloader_soc.*(.text .text.* .literal .literal.*)
-    *libarch.a:*bootloader_sha.*(.text .text.* .literal .literal.*)
-    *libarch.a:*flash_encrypt.*(.text .text.* .literal .literal.*)
-    *libarch.a:*cache_hal.*(.text .text.* .literal .literal.*)
-    *libarch.a:*uart_hal.*(.text .text.* .literal .literal.*)
-    *libarch.a:*mpu_hal.*(.text .text.* .literal .literal.*)
-    *libarch.a:*mmu_hal.*(.text .text.* .literal .literal.*)
-    *libarch.a:*efuse_hal.*(.text .text.* .literal .literal.*)
-    *libarch.a:*uart_periph.*(.text .text.* .literal .literal.*)
-    *libarch.a:*esp_rom_uart.*(.text .text.* .literal .literal.*)
-    *libarch.a:*esp_rom_sys.*(.text .text.* .literal .literal.*)
-    *libarch.a:*esp_rom_spiflash.*(.text .text.* .literal .literal.*)
-    *libarch.a:*esp_rom_cache_esp32s2_esp32s3.*(.text .text.* .literal .literal.*)
-    *libarch.a:*esp_rom_wdt.*(.text .text.* .literal .literal.*)
-    *libarch.a:*log.*(.text .text.* .literal .literal.*)
-    *libarch.a:*log_lock.*(.literal .literal.* .text .text.*)
-    *libarch.a:*log_print.*(.literal .literal.* .text .text.*)
-    *libarch.a:*log_timestamp.*(.literal.esp_log_early_timestamp .text.esp_log_early_timestamp)
-    *libarch.a:*log_timestamp.*(.literal.esp_log_timestamp .text.esp_log_timestamp)
-    *libarch.a:*log_timestamp_common.*(.literal .literal.* .text .text.*)
-    *libarch.a:*log_write.*(.literal.esp_log_write .text.esp_log_write)
-    *libarch.a:*log_write.*(.literal.esp_log_writev .text.esp_log_writev)
-    *libarch.a:*cpu_region_protect.*(.text .text.* .literal .literal.*)
-    *libarch.a:*mspi_timing_tuning.*(.text .text.* .literal .literal.*)
-    *libarch.a:*mspi_timing_config.*(.text .text.* .literal .literal.*)
-    *libarch.a:*esp_rom_cache_esp32s2_esp32s3.*(.literal .text .literal.* .text.*)
-    *libarch.a:*flash_qio_mode.*(.text .text.* .literal .literal.*)
-    *libarch.a:*spi_flash_wrap.*(.text .text.* .literal .literal.*)
-    *libarch.a:*spi_flash_oct_flash_init.*(.text .text.* .literal .literal.*)
-    *libarch.a:*spi_flash_hpm_enable.*(.text .text.* .literal .literal.*)
-    *libarch.a:esp_spiflash.*(.literal .text .literal.* .text.*)
-    *libarch.a:esp_flash_api.*(.text .text.* .literal .literal.*)
-    *libarch.a:esp_flash_spi_init.*(.text .text.* .literal .literal.*)
-    *libarch.a:spi_flash_hal_iram.*(.literal .literal.* .text .text.*)
-    *libarch.a:spi_flash_encrypt_hal_iram.*(.text .text.* .literal .literal.*)
-    *libarch.a:spi_flash_hal_gpspi.*(.literal .literal.* .text .text.*)
-    *libarch.a:spi_flash_chip*.*(.literal .literal.* .text .text.*)
-    *libarch.a:spi_flash_wrap.*(.literal .literal.* .text .text.*)
-    *libarch.a:spi_flash_os_func_noos.*(.literal .literal.* .text .text.*)
-    *libarch.a:spi_flash_os_func_app.*(.literal .literal.* .text .text.*)
-    *libarch.a:flash_brownout_hook.*(.literal .literal.* .text .text.*)
-    *libarch.a:esp_cache_utils.*(.literal .literal.* .text .text.*)
-    *libarch.a:cache_utils.*(.literal .literal.* .text .text.*)
-    *libarch.a:memspi_host_driver.*(.literal .literal.* .text .text.*)
-    *libarch.a:critical_section.*(.literal .literal.* .text .text.*)
-    *libarch.a:os.*(.literal.nuttx_enter_critical .text.nuttx_enter_critical)
-    *libarch.a:os.*(.literal.nuttx_exit_critical .text.nuttx_exit_critical)
-    *libarch.a:*sleep_modes.*(.literal.esp_sleep_sub_mode_force_disable* .text.esp_sleep_sub_mode_force_disable*)
-    *libarch.a:intr_alloc.*(.literal.esp_intr_get_intno .text.esp_intr_get_intno)
-    *libarch.a:intr_alloc.*(.literal.esp_intr_get_cpu .text.esp_intr_get_cpu)
-    *libarch.a:interrupt.*(.literal.intr_handler_get .text.intr_handler_get)
-    *libarch.a:interrupt.*(.literal.intr_handler_get_arg .text.intr_handler_get_arg)
-    *libarch.a:interrupt.*(.literal.intr_get_item .text.intr_get_item)
-    *libarch.a:interrupt.*(.literal.intr_handler_get_arg .text.intr_handler_get_arg)
+    ARCHLIB:*brownout_hal.*(.text .text.* .literal .literal.*)
+    ARCHLIB:*cpu.*(.text .text.* .literal .literal.*)
+    ARCHLIB:*gpio_hal.*(.text .text.* .literal .literal.*)
+    ARCHLIB:*periph_ctrl.*(.text .text.* .literal .literal.*)
+    ARCHLIB:*clk.*(.text .text.* .literal .literal.*)
+    ARCHLIB:*efuse_hal.*(.literal.is_eco0 .text.is_eco0)
+    ARCHLIB:*efuse_utility.*(.text .text.* .literal .literal.*)
+    ARCHLIB:*esp_clk.*(.text .text.* .literal .literal.*)
+    ARCHLIB:*esp_clk_tree.*(.text .text.* .literal .literal.*)
+    ARCHLIB:*esp_clk_tree_common.*(.text .text.* .literal .literal.*)
+    ARCHLIB:*clk_tree_hal.*(.text .text.* .literal .literal.*)
+    ARCHLIB:*rtc_init.*(.text .text.* .literal .literal.*)
+    ARCHLIB:*rtc_clk.*(.text .text.* .literal .literal.*)
+    ARCHLIB:*rtc_clk_init.*(.text .text.* .literal .literal.*)
+    ARCHLIB:*rtc_sleep.*(.text .text.* .literal .literal.*)
+    ARCHLIB:*rtc_time.*(.text .text.* .literal .literal.*)
+    ARCHLIB:*regi2c_ctrl.*(.text .text.* .literal .literal.*)
+    ARCHLIB:*uart_hal_iram.*(.text .text.* .literal .literal.*)
+    ARCHLIB:*wdt_hal_iram.*(.text .text.* .literal .literal.*)
+    ARCHLIB:*bootloader_banner_wrap.*(.text .text.* .literal .literal.*)
+    ARCHLIB:*bootloader_init.*(.text .text.* .literal .literal.*)
+    ARCHLIB:*bootloader_common.*(.text .text.* .literal .literal.*)
+    ARCHLIB:*bootloader_common_loader.*(.text .text.* .literal .literal.*)
+    ARCHLIB:*bootloader_console.*(.text .text.* .literal .literal.*)
+    ARCHLIB:*bootloader_console_loader.*(.text .text.* .literal .literal.*)
+    ARCHLIB:*bootloader_esp32s3.*(.text .text.* .literal .literal.*)
+    ARCHLIB:*bootloader_flash.*(.text .text.* .literal .literal.*)
+    ARCHLIB:*bootloader_flash_config_esp32s3.*(.text .text.* .literal .literal.*)
+    ARCHLIB:*bootloader_clock_init.*(.text .text.* .literal .literal.*)
+    ARCHLIB:*bootloader_clock_loader.*(.text .text.* .literal .literal.*)
+    ARCHLIB:*bootloader_efuse.*(.text .text.* .literal .literal.*)
+    ARCHLIB:*bootloader_panic.*(.text .text.* .literal .literal.*)
+    ARCHLIB:*bootloader_mem.*(.text .text.* .literal .literal.*)
+    ARCHLIB:*bootloader_random.*(.text .text.* .literal .literal.*)
+    ARCHLIB:*bootloader_random*.*(.literal.bootloader_random_disable .text.bootloader_random_disable)
+    ARCHLIB:*bootloader_random*.*(.literal.bootloader_random_enable .text.bootloader_random_enable)
+    ARCHLIB:*bootloader_random_esp32s3.*(.text .text.* .literal .literal.*)
+    ARCHLIB:*esp_image_format.*(.text .text.* .literal .literal.*)
+    ARCHLIB:*bootloader_soc.*(.text .text.* .literal .literal.*)
+    ARCHLIB:*bootloader_sha.*(.text .text.* .literal .literal.*)
+    ARCHLIB:*flash_encrypt.*(.text .text.* .literal .literal.*)
+    ARCHLIB:*cache_hal.*(.text .text.* .literal .literal.*)
+    ARCHLIB:*uart_hal.*(.text .text.* .literal .literal.*)
+    ARCHLIB:*mpu_hal.*(.text .text.* .literal .literal.*)
+    ARCHLIB:*mmu_hal.*(.text .text.* .literal .literal.*)
+    ARCHLIB:*efuse_hal.*(.text .text.* .literal .literal.*)
+    ARCHLIB:*uart_periph.*(.text .text.* .literal .literal.*)
+    ARCHLIB:*esp_rom_uart.*(.text .text.* .literal .literal.*)
+    ARCHLIB:*esp_rom_sys.*(.text .text.* .literal .literal.*)
+    ARCHLIB:*esp_rom_spiflash.*(.text .text.* .literal .literal.*)
+    ARCHLIB:*esp_rom_cache_esp32s2_esp32s3.*(.text .text.* .literal .literal.*)
+    ARCHLIB:*esp_rom_wdt.*(.text .text.* .literal .literal.*)
+    ARCHLIB:*log.*(.text .text.* .literal .literal.*)
+    ARCHLIB:*log_lock.*(.literal .literal.* .text .text.*)
+    ARCHLIB:*log_print.*(.literal .literal.* .text .text.*)
+    ARCHLIB:*log_timestamp.*(.literal.esp_log_early_timestamp .text.esp_log_early_timestamp)
+    ARCHLIB:*log_timestamp.*(.literal.esp_log_timestamp .text.esp_log_timestamp)
+    ARCHLIB:*log_timestamp_common.*(.literal .literal.* .text .text.*)
+    ARCHLIB:*log_write.*(.literal.esp_log_write .text.esp_log_write)
+    ARCHLIB:*log_write.*(.literal.esp_log_writev .text.esp_log_writev)
+    ARCHLIB:*cpu_region_protect.*(.text .text.* .literal .literal.*)
+    ARCHLIB:*mspi_timing_tuning.*(.text .text.* .literal .literal.*)
+    ARCHLIB:*mspi_timing_config.*(.text .text.* .literal .literal.*)
+    ARCHLIB:*esp_rom_cache_esp32s2_esp32s3.*(.literal .text .literal.* .text.*)
+    ARCHLIB:*flash_qio_mode.*(.text .text.* .literal .literal.*)
+    ARCHLIB:*spi_flash_wrap.*(.text .text.* .literal .literal.*)
+    ARCHLIB:*spi_flash_oct_flash_init.*(.text .text.* .literal .literal.*)
+    ARCHLIB:*spi_flash_hpm_enable.*(.text .text.* .literal .literal.*)
+    ARCHLIB:esp_spiflash.*(.literal .text .literal.* .text.*)
+    ARCHLIB:esp_flash_api.*(.text .text.* .literal .literal.*)
+    ARCHLIB:esp_flash_spi_init.*(.text .text.* .literal .literal.*)
+    ARCHLIB:spi_flash_hal_iram.*(.literal .literal.* .text .text.*)
+    ARCHLIB:spi_flash_encrypt_hal_iram.*(.text .text.* .literal .literal.*)
+    ARCHLIB:spi_flash_hal_gpspi.*(.literal .literal.* .text .text.*)
+    ARCHLIB:spi_flash_chip*.*(.literal .literal.* .text .text.*)
+    ARCHLIB:spi_flash_wrap.*(.literal .literal.* .text .text.*)
+    ARCHLIB:spi_flash_os_func_noos.*(.literal .literal.* .text .text.*)
+    ARCHLIB:spi_flash_os_func_app.*(.literal .literal.* .text .text.*)
+    ARCHLIB:flash_brownout_hook.*(.literal .literal.* .text .text.*)
+    ARCHLIB:esp_cache_utils.*(.literal .literal.* .text .text.*)
+    ARCHLIB:cache_utils.*(.literal .literal.* .text .text.*)
+    ARCHLIB:memspi_host_driver.*(.literal .literal.* .text .text.*)
+    ARCHLIB:critical_section.*(.literal .literal.* .text .text.*)
+    ARCHLIB:os.*(.literal.nuttx_enter_critical .text.nuttx_enter_critical)
+    ARCHLIB:os.*(.literal.nuttx_exit_critical .text.nuttx_exit_critical)
+    ARCHLIB:*sleep_modes.*(.literal.esp_sleep_sub_mode_force_disable* .text.esp_sleep_sub_mode_force_disable*)
+    ARCHLIB:intr_alloc.*(.literal.esp_intr_get_intno .text.esp_intr_get_intno)
+    ARCHLIB:intr_alloc.*(.literal.esp_intr_get_cpu .text.esp_intr_get_cpu)
+    ARCHLIB:interrupt.*(.literal.intr_handler_get .text.intr_handler_get)
+    ARCHLIB:interrupt.*(.literal.intr_handler_get_arg .text.intr_handler_get_arg)
+    ARCHLIB:interrupt.*(.literal.intr_get_item .text.intr_get_item)
+    ARCHLIB:interrupt.*(.literal.intr_handler_get_arg .text.intr_handler_get_arg)
 
     *libc.a:*lib_instrument.*(.text .text.* .literal .literal.*)
     *libc.a:arch_atomic.*(.text .text.* .literal .literal.*)
@@ -452,7 +465,7 @@ SECTIONS
     esp32s3_region.*(.rodata .rodata.*)
 
     *libphy.a:(.rodata  .rodata.*)
-    *libarch.a:xtensa_context.*(.rodata  .rodata.*)
+    ARCHLIB:xtensa_context.*(.rodata  .rodata.*)
 #if defined(CONFIG_STACK_CANARIES) && \
     (defined(CONFIG_ESP32S3_SPIFLASH) || \
      defined(CONFIG_ESP32S3_SPIRAM))
@@ -460,89 +473,89 @@ SECTIONS
 #endif
 
     *libsched.a:*sched_get_stackinfo.*(.rodata .rodata.*)
-    *libarch.a:*esp_loader.*(.rodata .rodata.*)
-    *libarch.a:esp32s3_spiflash.*(.rodata .rodata.*)
-    *libarch.a:esp_spiflash.*(.rodata .rodata.*)
-    *libarch.a:*efuse_utility.*(.rodata .rodata.*)
-    *libarch.a:*brownout.*(.rodata .rodata.*)
-    *libarch.a:*cpu.*(.rodata .rodata.*)
-    *libarch.a:*gpio_hal.*(.rodata .rodata.*)
-    *libarch.a:*periph_ctrl.*(.rodata .rodata.*)
-    *libarch.a:*clk.*(.rodata .rodata.*)
-    *libarch.a:*esp_clk.*(.rodata .rodata.*)
-    *libarch.a:*esp_clk_tree.*(.rodata .rodata.*)
-    *libarch.a:*esp_clk_tree_common.*(.rodata .rodata.*)
-    *libarch.a:*clk_tree_hal.*(.rodata .rodata.*)
-    *libarch.a:*rtc_init.*(.rodata .rodata.*)
-    *libarch.a:*rtc_clk.*(.rodata .rodata.*)
-    *libarch.a:*rtc_clk_init.*(.rodata .rodata.*)
-    *libarch.a:*rtc_sleep.*(.rodata .rodata.*)
-    *libarch.a:*rtc_time.*(.rodata .rodata.*)
-    *libarch.a:*regi2c_ctrl.*(.rodata .rodata.*)
-    *libarch.a:*uart_hal_iram.*(.rodata .rodata.*)
-    *libarch.a:*wdt_hal_iram.*(.rodata .rodata.*)
-    *libarch.a:*bootloader_banner_wrap.*(.rodata .rodata.*)
-    *libarch.a:*bootloader_init.*(.rodata .rodata.*)
-    *libarch.a:*bootloader_common.*(.rodata .rodata.*)
-    *libarch.a:*bootloader_common_loader.*(.rodata .rodata.*)
-    *libarch.a:*bootloader_console.*(.rodata .rodata.*)
-    *libarch.a:*bootloader_console_loader.*(.rodata .rodata.*)
-    *libarch.a:*bootloader_esp32s3.*(.rodata .rodata.*)
-    *libarch.a:*bootloader_flash.*(.rodata .rodata.*)
-    *libarch.a:*bootloader_flash_config_esp32s3.*(.rodata .rodata.*)
-    *libarch.a:*bootloader_clock_init.*(.rodata .rodata.*)
-    *libarch.a:*bootloader_clock_loader.*(.rodata .rodata.*)
-    *libarch.a:*bootloader_efuse.*(.rodata .rodata.*)
-    *libarch.a:*bootloader_panic.*(.rodata .rodata.*)
-    *libarch.a:*bootloader_mem.*(.rodata .rodata.*)
-    *libarch.a:*bootloader_random.*(.rodata .rodata.*)
-    *libarch.a:*bootloader_random_esp32s3.*(.rodata .rodata.*)
-    *libarch.a:*esp_image_format.*(.rodata .rodata.*)
-    *libarch.a:*bootloader_soc.*(.rodata .rodata.*)
-    *libarch.a:*bootloader_sha.*(.rodata .rodata.*)
-    *libarch.a:*flash_encrypt.*(.rodata .rodata.*)
-    *libarch.a:*cache_hal.*(.rodata .rodata.*)
-    *libarch.a:*uart_hal.*(.rodata .rodata.*)
-    *libarch.a:*mpu_hal.*(.rodata .rodata.*)
-    *libarch.a:*mmu_hal.*(.rodata .rodata.*)
-    *libarch.a:*uart_periph.*(.rodata .rodata.*)
-    *libarch.a:*esp_rom_uart.*(.rodata .rodata.*)
-    *libarch.a:*esp_rom_sys.*(.rodata .rodata.*)
-    *libarch.a:*esp_rom_spiflash.*(.rodata .rodata.*)
-    *libarch.a:*esp_rom_cache_esp32s2_esp32s3.*(.rodata .rodata.*)
-    *libarch.a:*esp_rom_wdt.*(.rodata .rodata.*)
-    *libarch.a:*efuse_hal.*(.rodata .rodata.*)
-    *libarch.a:*log.*(.rodata .rodata.*)
-    *libarch.a:*log_noos.*(.rodata .rodata.*)
-    *libarch.a:*cpu_region_protect.*(.rodata .rodata.*)
-    *libarch.a:*mspi_timing_tuning.*(.rodata .rodata.*)
-    *libarch.a:*mspi_timing_config.*(.rodata .rodata.*)
+    ARCHLIB:*esp_loader.*(.rodata .rodata.*)
+    ARCHLIB:esp32s3_spiflash.*(.rodata .rodata.*)
+    ARCHLIB:esp_spiflash.*(.rodata .rodata.*)
+    ARCHLIB:*efuse_utility.*(.rodata .rodata.*)
+    ARCHLIB:*brownout.*(.rodata .rodata.*)
+    ARCHLIB:*cpu.*(.rodata .rodata.*)
+    ARCHLIB:*gpio_hal.*(.rodata .rodata.*)
+    ARCHLIB:*periph_ctrl.*(.rodata .rodata.*)
+    ARCHLIB:*clk.*(.rodata .rodata.*)
+    ARCHLIB:*esp_clk.*(.rodata .rodata.*)
+    ARCHLIB:*esp_clk_tree.*(.rodata .rodata.*)
+    ARCHLIB:*esp_clk_tree_common.*(.rodata .rodata.*)
+    ARCHLIB:*clk_tree_hal.*(.rodata .rodata.*)
+    ARCHLIB:*rtc_init.*(.rodata .rodata.*)
+    ARCHLIB:*rtc_clk.*(.rodata .rodata.*)
+    ARCHLIB:*rtc_clk_init.*(.rodata .rodata.*)
+    ARCHLIB:*rtc_sleep.*(.rodata .rodata.*)
+    ARCHLIB:*rtc_time.*(.rodata .rodata.*)
+    ARCHLIB:*regi2c_ctrl.*(.rodata .rodata.*)
+    ARCHLIB:*uart_hal_iram.*(.rodata .rodata.*)
+    ARCHLIB:*wdt_hal_iram.*(.rodata .rodata.*)
+    ARCHLIB:*bootloader_banner_wrap.*(.rodata .rodata.*)
+    ARCHLIB:*bootloader_init.*(.rodata .rodata.*)
+    ARCHLIB:*bootloader_common.*(.rodata .rodata.*)
+    ARCHLIB:*bootloader_common_loader.*(.rodata .rodata.*)
+    ARCHLIB:*bootloader_console.*(.rodata .rodata.*)
+    ARCHLIB:*bootloader_console_loader.*(.rodata .rodata.*)
+    ARCHLIB:*bootloader_esp32s3.*(.rodata .rodata.*)
+    ARCHLIB:*bootloader_flash.*(.rodata .rodata.*)
+    ARCHLIB:*bootloader_flash_config_esp32s3.*(.rodata .rodata.*)
+    ARCHLIB:*bootloader_clock_init.*(.rodata .rodata.*)
+    ARCHLIB:*bootloader_clock_loader.*(.rodata .rodata.*)
+    ARCHLIB:*bootloader_efuse.*(.rodata .rodata.*)
+    ARCHLIB:*bootloader_panic.*(.rodata .rodata.*)
+    ARCHLIB:*bootloader_mem.*(.rodata .rodata.*)
+    ARCHLIB:*bootloader_random.*(.rodata .rodata.*)
+    ARCHLIB:*bootloader_random_esp32s3.*(.rodata .rodata.*)
+    ARCHLIB:*esp_image_format.*(.rodata .rodata.*)
+    ARCHLIB:*bootloader_soc.*(.rodata .rodata.*)
+    ARCHLIB:*bootloader_sha.*(.rodata .rodata.*)
+    ARCHLIB:*flash_encrypt.*(.rodata .rodata.*)
+    ARCHLIB:*cache_hal.*(.rodata .rodata.*)
+    ARCHLIB:*uart_hal.*(.rodata .rodata.*)
+    ARCHLIB:*mpu_hal.*(.rodata .rodata.*)
+    ARCHLIB:*mmu_hal.*(.rodata .rodata.*)
+    ARCHLIB:*uart_periph.*(.rodata .rodata.*)
+    ARCHLIB:*esp_rom_uart.*(.rodata .rodata.*)
+    ARCHLIB:*esp_rom_sys.*(.rodata .rodata.*)
+    ARCHLIB:*esp_rom_spiflash.*(.rodata .rodata.*)
+    ARCHLIB:*esp_rom_cache_esp32s2_esp32s3.*(.rodata .rodata.*)
+    ARCHLIB:*esp_rom_wdt.*(.rodata .rodata.*)
+    ARCHLIB:*efuse_hal.*(.rodata .rodata.*)
+    ARCHLIB:*log.*(.rodata .rodata.*)
+    ARCHLIB:*log_noos.*(.rodata .rodata.*)
+    ARCHLIB:*cpu_region_protect.*(.rodata .rodata.*)
+    ARCHLIB:*mspi_timing_tuning.*(.rodata .rodata.*)
+    ARCHLIB:*mspi_timing_config.*(.rodata .rodata.*)
 #ifdef CONFIG_ESP32S3_SPIRAM_MODE_QUAD
-    *libarch.a:esp32s3_psram_quad.*(.rodata .rodata.*)
+    ARCHLIB:esp32s3_psram_quad.*(.rodata .rodata.*)
 #endif
 #ifdef CONFIG_ESP32S3_SPIRAM_MODE_OCT
-    *libarch.a:esp32s3_psram_octal.*(.rodata .rodata.*)
+    ARCHLIB:esp32s3_psram_octal.*(.rodata .rodata.*)
 #endif
-    *libarch.a:*flash_qio_mode.*(.rodata .rodata.*)
-    *libarch.a:*spi_flash_wrap.*(.rodata .rodata.*)
-    *libarch.a:*spi_flash_oct_flash_init.*(.rodata .rodata.*)
-    *libarch.a:*spi_flash_hpm_enable.*(.rodata .rodata.*)
-    *libarch.a:esp_flash_api.*(.rodata .rodata.*)
-    *libarch.a:esp_flash_spi_init.*(.rodata .rodata.*)
-    *libarch.a:spi_flash_hal_iram.*(.rodata .rodata.*)
-    *libarch.a:spi_flash_encrypt_hal_iram.*(.rodata .rodata.*)
-    *libarch.a:spi_flash_hal_gpspi.*(.rodata .rodata.*)
-    *libarch.a:spi_flash_chip*.*(.rodata .rodata.*)
-    *libarch.a:spi_flash_wrap.*(.rodata .rodata.*)
-    *libarch.a:spi_flash_os_func_noos.*(.rodata .rodata.*)
-    *libarch.a:spi_flash_os_func_app.*(.rodata .rodata.*)
-    *libarch.a:flash_brownout_hook.*(.rodata .rodata.*)
-    *libarch.a:esp_cache_utils.*(.rodata .rodata.*)
-    *libarch.a:cache_utils.*(.rodata .rodata.*)
-    *libarch.a:memspi_host_driver.*(.rodata .rodata.*)
-    *libarch.a:critical_section.*(.rodata .rodata.*)
-    *libarch.a:os.*(.rodata.g_int_flags_count .rodata.g_int_flags)
-    *libarch.a:*sleep_modes.*(.rodata.esp_sleep_sub_mode_force_disable*)
+    ARCHLIB:*flash_qio_mode.*(.rodata .rodata.*)
+    ARCHLIB:*spi_flash_wrap.*(.rodata .rodata.*)
+    ARCHLIB:*spi_flash_oct_flash_init.*(.rodata .rodata.*)
+    ARCHLIB:*spi_flash_hpm_enable.*(.rodata .rodata.*)
+    ARCHLIB:esp_flash_api.*(.rodata .rodata.*)
+    ARCHLIB:esp_flash_spi_init.*(.rodata .rodata.*)
+    ARCHLIB:spi_flash_hal_iram.*(.rodata .rodata.*)
+    ARCHLIB:spi_flash_encrypt_hal_iram.*(.rodata .rodata.*)
+    ARCHLIB:spi_flash_hal_gpspi.*(.rodata .rodata.*)
+    ARCHLIB:spi_flash_chip*.*(.rodata .rodata.*)
+    ARCHLIB:spi_flash_wrap.*(.rodata .rodata.*)
+    ARCHLIB:spi_flash_os_func_noos.*(.rodata .rodata.*)
+    ARCHLIB:spi_flash_os_func_app.*(.rodata .rodata.*)
+    ARCHLIB:flash_brownout_hook.*(.rodata .rodata.*)
+    ARCHLIB:esp_cache_utils.*(.rodata .rodata.*)
+    ARCHLIB:cache_utils.*(.rodata .rodata.*)
+    ARCHLIB:memspi_host_driver.*(.rodata .rodata.*)
+    ARCHLIB:critical_section.*(.rodata .rodata.*)
+    ARCHLIB:os.*(.rodata.g_int_flags_count .rodata.g_int_flags)
+    ARCHLIB:*sleep_modes.*(.rodata.esp_sleep_sub_mode_force_disable*)
 
     *libc.a:arch_atomic.*(.rodata .rodata.*)
 
@@ -655,15 +668,15 @@ SECTIONS
 
     _srodata = ABSOLUTE(.);
     *(EXCLUDE_FILE (esp32s3_start.* esp32s3_region.*
-                    *libarch.a:*esp_loader.*
-                    *libarch.a:esp32s3_spiflash.*
-                    *libarch.a:*cache_hal.* *libarch.a:*mmu_hal.*
-                    *libarch.a:*mpu_hal.*) .rodata)
+                    ARCHLIB:*esp_loader.*
+                    ARCHLIB:esp32s3_spiflash.*
+                    ARCHLIB:*cache_hal.* ARCHLIB:*mmu_hal.*
+                    ARCHLIB:*mpu_hal.*) .rodata)
     *(EXCLUDE_FILE (esp32s3_start.* esp32s3_region.*
-                    *libarch.a:*esp_loader.*
-                    *libarch.a:esp32s3_spiflash.*
-                    *libarch.a:*cache_hal.* *libarch.a:*mmu_hal.*
-                    *libarch.a:*mpu_hal.*) .rodata.*)
+                    ARCHLIB:*esp_loader.*
+                    ARCHLIB:esp32s3_spiflash.*
+                    ARCHLIB:*cache_hal.* ARCHLIB:*mmu_hal.*
+                    ARCHLIB:*mpu_hal.*) .rodata.*)
 
 #ifdef CONFIG_ESPRESSIF_WIRELESS
     *(.rodata_wlog_verbose.*)
diff --git a/boards/xtensa/esp32s3/common/scripts/legacy_sections.ld b/boards/xtensa/esp32s3/common/scripts/legacy_sections.ld
index cdff5755c48..26d4a0890a7 100644
--- a/boards/xtensa/esp32s3/common/scripts/legacy_sections.ld
+++ b/boards/xtensa/esp32s3/common/scripts/legacy_sections.ld
@@ -22,6 +22,19 @@
 
 #include <nuttx/config.h>
 
+/* A kernel build archives the architecture objects into libkarch.a rather
+ * than libarch.a, so the placement rules below have to name the right one.
+ * Getting this wrong is silent and fatal: the octal-flash bring-up functions
+ * stay in mapped flash and are called while that mapping is being
+ * reconfigured.
+ */
+
+#ifdef CONFIG_BUILD_KERNEL
+#  define ARCHLIB *libkarch.a
+#else
+#  define ARCHLIB *libarch.a
+#endif
+
 /* Default entry point: */
 
 ENTRY(__start);
@@ -78,19 +91,19 @@ SECTIONS
 
     *(.iram1 .iram1.*)
 
-    *libarch.a:esp32s3_cpuindex.*(.literal .text .literal.* .text.*)
-    *libarch.a:esp32s3_user.*(.literal .text .literal.* .text.*)
-    *libarch.a:esp32s3_spiflash.*(.literal .text .literal.* .text.*)
-    *libarch.a:xtensa_assert.*(.literal .text .literal.* .text.*)
-    *libarch.a:xtensa_cpuint.*(.literal .text .literal.* .text.*)
-    *libarch.a:xtensa_cpupause.*(.literal .text .literal.* .text.*)
-    *libarch.a:xtensa_irqdispatch.*(.literal .text .literal.* .text.*)
-    *libarch.a:xtensa_modifyreg32.*(.literal .text .literal.* .text.*)
-    *libarch.a:xtensa_testset.*(.literal .text .literal.* .text.*)
-    *libarch.a:esp_app_desc.*(.literal .text .literal.* .text.*)
+    ARCHLIB:esp32s3_cpuindex.*(.literal .text .literal.* .text.*)
+    ARCHLIB:esp32s3_user.*(.literal .text .literal.* .text.*)
+    ARCHLIB:esp32s3_spiflash.*(.literal .text .literal.* .text.*)
+    ARCHLIB:xtensa_assert.*(.literal .text .literal.* .text.*)
+    ARCHLIB:xtensa_cpuint.*(.literal .text .literal.* .text.*)
+    ARCHLIB:xtensa_cpupause.*(.literal .text .literal.* .text.*)
+    ARCHLIB:xtensa_irqdispatch.*(.literal .text .literal.* .text.*)
+    ARCHLIB:xtensa_modifyreg32.*(.literal .text .literal.* .text.*)
+    ARCHLIB:xtensa_testset.*(.literal .text .literal.* .text.*)
+    ARCHLIB:esp_app_desc.*(.literal .text .literal.* .text.*)
 
-    *libarch.a:*esp_rom_spiflash.*(.literal .text .literal.* .text.*)
-    *libarch.a:*esp_rom_cache_esp32s2_esp32s3.*(.literal .text .literal.* .text.*)
+    ARCHLIB:*esp_rom_spiflash.*(.literal .text .literal.* .text.*)
+    ARCHLIB:*esp_rom_cache_esp32s2_esp32s3.*(.literal .text .literal.* .text.*)
 
     *libc.a:sq_remlast.*(.literal .text .literal.* .text.*)
 
@@ -112,11 +125,11 @@ SECTIONS
     *libc.a:arch_atomic.*(.literal .text .literal.* .text.*)
 
 #ifdef CONFIG_ESP32S3_SPEED_UP_ISR
-    *libarch.a:xtensa_switchcontext.*(.literal.up_switch_context .text.up_switch_context)
+    ARCHLIB:xtensa_switchcontext.*(.literal.up_switch_context .text.up_switch_context)
 
-    *libarch.a:esp32s3_timerisr.*(.literal.systimer_isr .text.systimer_isr)
-    *libarch.a:esp32s3_idle.*(.literal.up_idle .text.up_idle)
-    *libarch.a:esp32s3_dma.*(.literal.esp32s3_dma_load .text.esp32s3_dma_load \
+    ARCHLIB:esp32s3_timerisr.*(.literal.systimer_isr .text.systimer_isr)
+    ARCHLIB:esp32s3_idle.*(.literal.up_idle .text.up_idle)
+    ARCHLIB:esp32s3_dma.*(.literal.esp32s3_dma_load .text.esp32s3_dma_load \
                              .literal.esp32s3_dma_enable .text.esp32s3_dma_enable)
 
     *libsched.a:sched_processtimer.*(.literal.nxsched_process_timer .text.nxsched_process_timer)
@@ -132,33 +145,33 @@ SECTIONS
     *libc.a:sq_remfirst.*(.literal.sq_remfirst .text.sq_remfirst)
 #endif
 
-    *libarch.a:esp32s3_spi_timing.*(.literal .text .literal.* .text.*)
+    ARCHLIB:esp32s3_spi_timing.*(.literal .text .literal.* .text.*)
 #ifdef CONFIG_ESP32S3_SPIRAM_MODE_QUAD
-    *libarch.a:esp32s3_psram_quad.*(.literal .text .literal.* .text.*)
+    ARCHLIB:esp32s3_psram_quad.*(.literal .text .literal.* .text.*)
 #endif
 #ifdef CONFIG_ESP32S3_SPIRAM_MODE_OCT
-    *libarch.a:esp32s3_psram_octal.*(.literal .text .literal.* .text.*)
+    ARCHLIB:esp32s3_psram_octal.*(.literal .text .literal.* .text.*)
 #endif
 #if defined(CONFIG_STACK_CANARIES) && \
     (defined(CONFIG_ESP32S3_SPIFLASH) || \
      defined(CONFIG_ESP32S3_SPIRAM))
     *libc.a:lib_stackchk.*(.literal .text .literal.* .text.*)
 #endif
-    *libarch.a:*cache_hal.*(.text .text.* .literal .literal.*)
-    *libarch.a:*esp_rom_cache_esp32s2_esp32s3.*(.literal .text .literal.* .text.*)
-    *libarch.a:esp_cache.*(.literal .literal.* .text .text.*)
-    *libarch.a:cache_utils.*(.literal .literal.* .text .text.*)
-    *libarch.a:spi_flash_hal_iram.*(.literal .literal.* .text .text.*)
-    *libarch.a:spi_flash_hal_gpspi.*(.literal .literal.* .text .text.*)
-    *libarch.a:spi_flash_encrypt_hal_iram.*(.text .text.* .literal .literal.*)
-    *libarch.a:spi_flash_chip*.*(.literal .literal.* .text .text.*)
-    *libarch.a:spi_flash_wrap.*(.literal .literal.* .text .text.*)
-    *libarch.a:esp_spiflash.*(.literal .text .literal.* .text.*)
-    *libarch.a:esp_flash_spi_init.*(.text .text.* .literal .literal.*)
-    *libarch.a:esp_flash_api.*(.text .text.* .literal .literal.*)
-    *libarch.a:spi_flash_os_func*.*(.literal .literal.* .text .text.*)
-    *libarch.a:*flash_brownout_hook.*(.literal .literal.* .text .text.*)
-    *libarch.a:memspi_host_driver.*(.literal .literal.* .text .text.*)
+    ARCHLIB:*cache_hal.*(.text .text.* .literal .literal.*)
+    ARCHLIB:*esp_rom_cache_esp32s2_esp32s3.*(.literal .text .literal.* .text.*)
+    ARCHLIB:esp_cache.*(.literal .literal.* .text .text.*)
+    ARCHLIB:cache_utils.*(.literal .literal.* .text .text.*)
+    ARCHLIB:spi_flash_hal_iram.*(.literal .literal.* .text .text.*)
+    ARCHLIB:spi_flash_hal_gpspi.*(.literal .literal.* .text .text.*)
+    ARCHLIB:spi_flash_encrypt_hal_iram.*(.text .text.* .literal .literal.*)
+    ARCHLIB:spi_flash_chip*.*(.literal .literal.* .text .text.*)
+    ARCHLIB:spi_flash_wrap.*(.literal .literal.* .text .text.*)
+    ARCHLIB:esp_spiflash.*(.literal .text .literal.* .text.*)
+    ARCHLIB:esp_flash_spi_init.*(.text .text.* .literal .literal.*)
+    ARCHLIB:esp_flash_api.*(.text .text.* .literal .literal.*)
+    ARCHLIB:spi_flash_os_func*.*(.literal .literal.* .text .text.*)
+    ARCHLIB:*flash_brownout_hook.*(.literal .literal.* .text .text.*)
+    ARCHLIB:memspi_host_driver.*(.literal .literal.* .text .text.*)
 
     *(.wifirxiram .wifirxiram.*)
     *(.wifi0iram  .wifi0iram.*)
@@ -242,27 +255,27 @@ SECTIONS
     *(.dram1 .dram1.*)
 
     *libphy.a:(.rodata  .rodata.*)
-    *libarch.a:xtensa_context.*(.rodata  .rodata.*)
-    *libarch.a:*cache_hal.*(.rodata .rodata.*)
+    ARCHLIB:xtensa_context.*(.rodata  .rodata.*)
+    ARCHLIB:*cache_hal.*(.rodata .rodata.*)
 #if defined(CONFIG_STACK_CANARIES) && \
     (defined(CONFIG_ESP32S3_SPIFLASH) || \
      defined(CONFIG_ESP32S3_SPIRAM))
     *libc.a:lib_stackchk.*(.rodata  .rodata.*)
 #endif
 
-    *libarch.a:esp_cache.*(.rodata .rodata.*)
-    *libarch.a:cache_utils.*(.rodata .rodata.*)
-    *libarch.a:spi_flash_hal_iram.*(.rodata .rodata.*)
-    *libarch.a:spi_flash_hal_gpspi.*(.rodata .rodata.*)
-    *libarch.a:spi_flash_encrypt_hal_iram.*(.rodata .rodata.*)
-    *libarch.a:spi_flash_chip*.*(.rodata .rodata.*)
-    *libarch.a:spi_flash_wrap.*(.rodata .rodata.*)
-    *libarch.a:esp_spiflash.*(.rodata .rodata.*)
-    *libarch.a:esp_flash_spi_init.*(.rodata .rodata.*)
-    *libarch.a:esp_flash_api.*(.rodata .rodata.*)
-    *libarch.a:spi_flash_os_func*.*(.rodata .rodata.*)
-    *libarch.a:flash_brownout_hook.*(.rodata .rodata.*)
-    *libarch.a:memspi_host_driver.*(.rodata .rodata.*)
+    ARCHLIB:esp_cache.*(.rodata .rodata.*)
+    ARCHLIB:cache_utils.*(.rodata .rodata.*)
+    ARCHLIB:spi_flash_hal_iram.*(.rodata .rodata.*)
+    ARCHLIB:spi_flash_hal_gpspi.*(.rodata .rodata.*)
+    ARCHLIB:spi_flash_encrypt_hal_iram.*(.rodata .rodata.*)
+    ARCHLIB:spi_flash_chip*.*(.rodata .rodata.*)
+    ARCHLIB:spi_flash_wrap.*(.rodata .rodata.*)
+    ARCHLIB:esp_spiflash.*(.rodata .rodata.*)
+    ARCHLIB:esp_flash_spi_init.*(.rodata .rodata.*)
+    ARCHLIB:esp_flash_api.*(.rodata .rodata.*)
+    ARCHLIB:spi_flash_os_func*.*(.rodata .rodata.*)
+    ARCHLIB:flash_brownout_hook.*(.rodata .rodata.*)
+    ARCHLIB:memspi_host_driver.*(.rodata .rodata.*)
     *libc.a:arch_atomic.*(.rodata .rodata.*)
     _edata = ABSOLUTE(.);
     . = ALIGN(4);
diff --git a/boards/xtensa/esp32s3/esp32s3-devkit/configs/kernel_oct/defconfig b/boards/xtensa/esp32s3/esp32s3-devkit/configs/kernel_oct/defconfig
new file mode 100644
index 00000000000..0e494c08f5c
--- /dev/null
+++ b/boards/xtensa/esp32s3/esp32s3-devkit/configs/kernel_oct/defconfig
@@ -0,0 +1,101 @@
+#
+# This file is autogenerated: PLEASE DO NOT EDIT IT.
+#
+# You can use "make menuconfig" to make any modifications to the installed .config file.
+# You can then do "make savedefconfig" to generate a new defconfig file that includes your
+# modifications.
+#
+# CONFIG_ARCH_LEDS is not set
+# CONFIG_NSH_ARGCAT is not set
+# CONFIG_NSH_CMDOPT_HEXDUMP is not set
+CONFIG_ARCH="xtensa"
+CONFIG_ARCH_ADDRENV=y
+CONFIG_ARCH_BOARD="esp32s3-devkit"
+CONFIG_ARCH_BOARD_COMMON=y
+CONFIG_ARCH_BOARD_ESP32S3_DEVKIT=y
+CONFIG_ARCH_CHIP="esp32s3"
+CONFIG_ARCH_CHIP_ESP32S3=y
+CONFIG_ARCH_CHIP_ESP32S3WROOM2N32R8V=y
+CONFIG_ARCH_DATA_NPAGES=8
+CONFIG_ARCH_DATA_VBASE=0x3d000000
+CONFIG_ARCH_HEAP_NPAGES=8
+CONFIG_ARCH_HEAP_VBASE=0x3d200000
+CONFIG_ARCH_INTERRUPTSTACK=2048
+CONFIG_ARCH_IRQ_TO_NDX=y
+CONFIG_ARCH_KERNEL_STACKSIZE=8192
+CONFIG_ARCH_MINIMAL_VECTORTABLE_DYNAMIC=y
+CONFIG_ARCH_NUSER_INTERRUPTS=2
+CONFIG_ARCH_PGPOOL_MAPPING=y
+CONFIG_ARCH_PGPOOL_PBASE=0x360000
+CONFIG_ARCH_PGPOOL_SIZE=4194304
+CONFIG_ARCH_PGPOOL_VBASE=0x3c400000
+CONFIG_ARCH_STACKDUMP=y
+CONFIG_ARCH_TEXT_NPAGES=8
+CONFIG_ARCH_TEXT_VBASE=0x42800000
+CONFIG_ARCH_USE_MMU=y
+CONFIG_ARCH_XTENSA=y
+CONFIG_BINFMT_ELF_EXECUTABLE=y
+CONFIG_BOARD_INITTHREAD_STACKSIZE=2048
+CONFIG_BOARD_LOOPSPERMSEC=16717
+CONFIG_BUILD_KERNEL=y
+CONFIG_DEBUG_BINFMT=y
+CONFIG_DEBUG_BINFMT_ERROR=y
+CONFIG_DEBUG_BINFMT_INFO=y
+CONFIG_DEBUG_BINFMT_WARN=y
+CONFIG_DEBUG_FEATURES=y
+CONFIG_DEBUG_FULLOPT=y
+CONFIG_DEBUG_SCHED=y
+CONFIG_DEBUG_SCHED_ERROR=y
+CONFIG_DEBUG_SYMBOLS=y
+CONFIG_DEFAULT_TASK_STACKSIZE=8192
+CONFIG_ELF=y
+CONFIG_ESP32S3_FLASH_MODE_OCT=y
+CONFIG_ESP32S3_FLASH_SAMPLE_MODE_STR=y
+CONFIG_ESP32S3_SPIFLASH=y
+CONFIG_ESP32S3_SPIRAM=y
+CONFIG_ESP32S3_SPIRAM_MODE_OCT=y
+CONFIG_ESP32S3_UART0=y
+CONFIG_ESP32S3_WCL=y
+CONFIG_FS_PROCFS=y
+CONFIG_FS_ROMFS=y
+CONFIG_HAVE_CXX=y
+CONFIG_HAVE_CXXINITIALIZE=y
+CONFIG_HOST_MACOS=y
+CONFIG_IDLETHREAD_STACKSIZE=3072
+CONFIG_INIT_FILEPATH="/system/bin/init"
+CONFIG_INIT_MOUNT=y
+CONFIG_INIT_MOUNT_FLAGS=0x1
+CONFIG_INIT_MOUNT_TARGET="/system/bin"
+CONFIG_INTELHEX_BINARY=y
+CONFIG_IRQ_WORK_STACKSIZE=2048
+CONFIG_LIBC_ENVPATH=y
+CONFIG_LIBC_EXECFUNCS=y
+CONFIG_LINE_MAX=64
+CONFIG_MM_PGALLOC=y
+CONFIG_MM_PGSIZE=65536
+CONFIG_NSH_DISABLE_LOSMART=y
+CONFIG_NSH_FILEIOSIZE=512
+CONFIG_NSH_FILE_APPS=y
+CONFIG_NSH_READLINE=y
+CONFIG_PATH_INITIAL="/system/bin"
+CONFIG_PREALLOC_TIMERS=4
+CONFIG_PTHREAD_STACK_DEFAULT=2048
+CONFIG_RAM_SIZE=114688
+CONFIG_RAM_START=0x20000000
+CONFIG_RAW_BINARY=y
+CONFIG_RR_INTERVAL=200
+CONFIG_SCHED_HAVE_PARENT=y
+CONFIG_SCHED_LPWORK=y
+CONFIG_SCHED_LPWORKSTACKSIZE=2048
+CONFIG_SCHED_WAITPID=y
+CONFIG_STACK_COLORATION=y
+CONFIG_START_DAY=6
+CONFIG_START_MONTH=12
+CONFIG_START_YEAR=2011
+CONFIG_SYSLOG_BUFFER=y
+CONFIG_SYSTEM_NSH=y
+CONFIG_SYSTEM_NSH_PROGNAME="init"
+CONFIG_TESTING_GETPRIME=y
+CONFIG_TESTING_OSTEST=y
+CONFIG_TESTING_OSTEST_FPUTESTDISABLE=y
+CONFIG_UART0_SERIAL_CONSOLE=y
diff --git a/boards/xtensa/esp32s3/esp32s3-devkit/src/.gitignore b/boards/xtensa/esp32s3/esp32s3-devkit/src/.gitignore
new file mode 100644
index 00000000000..a33bdfee200
--- /dev/null
+++ b/boards/xtensa/esp32s3/esp32s3-devkit/src/.gitignore
@@ -0,0 +1 @@
+romfs_boot.c
diff --git a/boards/xtensa/esp32s3/esp32s3-devkit/src/Make.defs b/boards/xtensa/esp32s3/esp32s3-devkit/src/Make.defs
index 496bb5d4323..6b51a194124 100644
--- a/boards/xtensa/esp32s3/esp32s3-devkit/src/Make.defs
+++ b/boards/xtensa/esp32s3/esp32s3-devkit/src/Make.defs
@@ -22,6 +22,33 @@
 
 CSRCS = esp32s3_boot.c esp32s3_bringup.c
 
+# A kernel build boots its init process out of a ROMFS image built from
+# apps/bin by apps/tools/mkromfsimg.sh.  Until that has been generated,
+# romfs_stub.c supplies an empty placeholder so the kernel still builds.
+#
+# The placeholder is always compiled, and defines the image away once the
+# real one exists, rather than being swapped out for it:  both define
+# romfs_img, so an object left behind by an earlier build would otherwise
+# still satisfy the link and quietly produce a kernel with no init process.
+
+ifeq ($(CONFIG_BUILD_KERNEL),y)
+CSRCS += romfs_stub.c
+ifneq ($(wildcard $(BOARD_DIR)$(DELIM)src$(DELIM)romfs_boot.c),)
+CSRCS += romfs_boot.c
+CFLAGS += -DHAVE_ROMFS_BOOT
+
+# Defining the placeholder away is a change in CFLAGS, and make cannot see
+# one:  an object compiled before the image was generated is newer than its
+# source and is not rebuilt.  It still defines romfs_img, and being the
+# earlier member of libboard.a it is the one that satisfies the link -- so
+# the kernel boots with a one-byte ROMFS and cannot start init, in a build
+# where nothing failed.  Tie the placeholder to the generated image so that
+# it is recompiled whenever the image is regenerated.
+
+romfs_stub$(OBJEXT): $(BOARD_DIR)$(DELIM)src$(DELIM)romfs_boot.c
+endif
+endif
+
 ifeq ($(CONFIG_BOARDCTL_RESET),y)
 CSRCS += esp32s3_reset.c
 endif
diff --git a/boards/xtensa/esp32s3/esp32s3-devkit/src/esp32s3_bringup.c b/boards/xtensa/esp32s3/esp32s3-devkit/src/esp32s3_bringup.c
index 7be79bcc86f..061595d574d 100644
--- a/boards/xtensa/esp32s3/esp32s3-devkit/src/esp32s3_bringup.c
+++ b/boards/xtensa/esp32s3/esp32s3-devkit/src/esp32s3_bringup.c
@@ -163,8 +163,22 @@
 #  endif
 #endif
 
+#ifdef CONFIG_BUILD_KERNEL
+#  include <nuttx/drivers/ramdisk.h>
+#  include "romfs.h"
+#endif
+
 #include "esp32s3-devkit.h"
 
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#ifdef CONFIG_BUILD_KERNEL
+#  define SECTORSIZE   512
+#  define NSECTORS(b)  (((b) + SECTORSIZE - 1) / SECTORSIZE)
+#endif
+
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -189,6 +203,31 @@ int esp32s3_bringup(void)
   bool i2s_enable_rx;
 #endif
 
+#ifdef CONFIG_BUILD_KERNEL
+  /* A kernel build has no built-in applications: the init process and every
+   * other user program is a separate ELF living in the boot ROMFS image.
+   * Publish it as a RAM disk here so that nx_start_application() can mount
+   * it at CONFIG_INIT_MOUNT_TARGET and exec CONFIG_INIT_FILEPATH from it.
+   * An unpopulated image means romfs_boot.c was never generated -- see
+   * apps/tools/mkromfsimg.sh -- so there is nothing to register.
+   */
+
+  if (NSECTORS(romfs_img_len) > 1)
+    {
+      ret = romdisk_register(0, romfs_img, NSECTORS(romfs_img_len),
+                             SECTORSIZE);
+      if (ret < 0)
+        {
+          syslog(LOG_ERR, "ERROR: Failed to register boot ROMFS: %d\n", ret);
+        }
+    }
+  else
+    {
+      syslog(LOG_ERR, "ERROR: Boot ROMFS image is empty; the init process "
+                      "cannot be started\n");
+    }
+#endif
+
 #if defined(CONFIG_ESP32S3_SPIRAM) && \
     defined(CONFIG_ESP32S3_SPIRAM_BANKSWITCH_ENABLE)
   ret = esp_himem_init();
@@ -350,6 +389,7 @@ int esp32s3_bringup(void)
 
 #ifdef CONFIG_ESPRESSIF_TEMP
   struct esp_temp_sensor_config_t cfg = TEMPERATURE_SENSOR_CONFIG(10, 50);
+
   ret = esp_temperature_sensor_initialize(cfg);
   if (ret < 0)
     {
@@ -606,6 +646,7 @@ int esp32s3_bringup(void)
   };
 
   struct dac_dev_s *dev = esp_sdminitialize(config);
+
   ret = dac_register("/dev/dac0", dev);
   if (ret < 0)
     {
diff --git a/boards/xtensa/esp32s3/esp32s3-devkit/src/romfs.h b/boards/xtensa/esp32s3/esp32s3-devkit/src/romfs.h
new file mode 100644
index 00000000000..658fad31438
--- /dev/null
+++ b/boards/xtensa/esp32s3/esp32s3-devkit/src/romfs.h
@@ -0,0 +1,39 @@
+/****************************************************************************
+ * boards/xtensa/esp32s3/esp32s3-devkit/src/romfs.h
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+#ifndef __BOARDS_XTENSA_ESP32S3_ESP32S3_DEVKIT_SRC_ROMFS_H
+#define __BOARDS_XTENSA_ESP32S3_ESP32S3_DEVKIT_SRC_ROMFS_H
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+/* The boot ROMFS image holding the user-space programs of a kernel build.
+ * The real image is generated from apps/bin by apps/tools/mkromfsimg.sh into
+ * romfs_boot.c; romfs_stub.c provides a weak, empty placeholder so that the
+ * kernel still links before that step has been run.
+ */
+
+extern const unsigned char romfs_img[];
+extern const unsigned int romfs_img_len;
+
+#endif /* __BOARDS_XTENSA_ESP32S3_ESP32S3_DEVKIT_SRC_ROMFS_H */
diff --git a/boards/xtensa/esp32s3/esp32s3-devkit/src/romfs_stub.c b/boards/xtensa/esp32s3/esp32s3-devkit/src/romfs_stub.c
new file mode 100644
index 00000000000..f01bd6f1c38
--- /dev/null
+++ b/boards/xtensa/esp32s3/esp32s3-devkit/src/romfs_stub.c
@@ -0,0 +1,56 @@
+/****************************************************************************
+ * boards/xtensa/esp32s3/esp32s3-devkit/src/romfs_stub.c
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/compiler.h>
+
+#ifndef HAVE_ROMFS_BOOT
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+/* Placeholder for the boot ROMFS image of a kernel build.  It lets the
+ * kernel link before apps/tools/mkromfsimg.sh has generated the real
+ * romfs_boot.c.  A kernel built against this placeholder has no user-space
+ * programs and so cannot start its init process; esp32s3_bringup() says so
+ * on the console.
+ *
+ * HAVE_ROMFS_BOOT is defined by src/Make.defs once the generated image is in
+ * place, and this file then contributes nothing.
+ */
+
+const unsigned char aligned_data(4) romfs_img[] =
+{
+  0x00
+};
+
+const unsigned int romfs_img_len = 1;
+
+#endif /* !HAVE_ROMFS_BOOT */
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/