From efedf48cde116e54556ddd9903a67ee5059222cc Mon Sep 17 00:00:00 2001 From: lipengfei28 Date: Wed, 25 Dec 2024 16:30:39 +0800 Subject: [PATCH] arch/arm64: use up_prioritize_irq and up_set_type_irq instead arm64_gic_irq_set_priority use use up_prioritize_irq and up_set_type_irq as std api Signed-off-by: lipengfei28 --- arch/arm64/src/a64/a64_serial.c | 3 +- arch/arm64/src/a64/a64_twi.c | 3 +- arch/arm64/src/bcm2711/bcm2711_gpio.c | 3 +- arch/arm64/src/bcm2711/bcm2711_i2c.c | 3 +- arch/arm64/src/bcm2711/bcm2711_sdio.c | 3 +- arch/arm64/src/bcm2711/bcm2711_serial.c | 3 +- arch/arm64/src/bcm2711/bcm2711_spi.c | 3 +- arch/arm64/src/common/arm64_gic.h | 10 ---- arch/arm64/src/common/arm64_gicv2.c | 50 ------------------- arch/arm64/src/common/arm64_gicv3.c | 45 ----------------- arch/arm64/src/rk3399/rk3399_serial.c | 3 +- arch/arm64/src/zynq-mpsoc/zynq_serial.c | 3 +- .../arm64/a64/pinephone/src/pinephone_touch.c | 3 +- 13 files changed, 20 insertions(+), 115 deletions(-) diff --git a/arch/arm64/src/a64/a64_serial.c b/arch/arm64/src/a64/a64_serial.c index b795faf6296..737623869aa 100644 --- a/arch/arm64/src/a64/a64_serial.c +++ b/arch/arm64/src/a64/a64_serial.c @@ -648,7 +648,8 @@ static int a64_uart_attach(struct uart_dev_s *dev) /* Set Interrupt Priority in Generic Interrupt Controller v2 */ - arm64_gic_irq_set_priority(port->irq_num, 0, IRQ_TYPE_LEVEL); + up_prioritize_irq(port->irq_num, 0); + up_set_irq_type(port->irq_num, IRQ_HIGH_LEVEL); /* Enable UART Interrupt */ diff --git a/arch/arm64/src/a64/a64_twi.c b/arch/arm64/src/a64/a64_twi.c index 79d913a72f1..a016c0151e7 100644 --- a/arch/arm64/src/a64/a64_twi.c +++ b/arch/arm64/src/a64/a64_twi.c @@ -1845,7 +1845,8 @@ static void twi_hw_initialize(struct a64_twi_priv_s *priv) /* Set Interrupt Priority in Generic Interrupt Controller v2 */ - arm64_gic_irq_set_priority(priv->config->irq, IRQ_TYPE_LEVEL, 0); + up_prioritize_irq(priv->config->irq, 0); + up_set_irq_type(priv->config->irq, IRQ_HIGH_LEVEL); /* Enable TWI Interrupt */ diff --git a/arch/arm64/src/bcm2711/bcm2711_gpio.c b/arch/arm64/src/bcm2711/bcm2711_gpio.c index f155e58a66a..e47ae8580ea 100644 --- a/arch/arm64/src/bcm2711/bcm2711_gpio.c +++ b/arch/arm64/src/bcm2711/bcm2711_gpio.c @@ -272,7 +272,8 @@ static int bcm2711_gpio_irqs_init(void) for (int i = 0; i < NUM_GPIO_IRQS; i++) { up_enable_irq(g_gpio_irqs[i]); - arm64_gic_irq_set_priority(g_gpio_irqs[i], 0, IRQ_TYPE_LEVEL); + up_prioritize_irq(g_gpio_irqs[i], 0); + up_set_irq_type(g_gpio_irqs[i], IRQ_HIGH_LEVEL); } /* Mark as initialized. */ diff --git a/arch/arm64/src/bcm2711/bcm2711_i2c.c b/arch/arm64/src/bcm2711/bcm2711_i2c.c index 706c0002299..c5aa8ea1db2 100644 --- a/arch/arm64/src/bcm2711/bcm2711_i2c.c +++ b/arch/arm64/src/bcm2711/bcm2711_i2c.c @@ -1106,7 +1106,8 @@ struct i2c_master_s *bcm2711_i2cbus_initialize(int port) /* Enable interrupt handler */ - arm64_gic_irq_set_priority(BCM_IRQ_VC_I2C, 0, IRQ_TYPE_EDGE); + up_prioritize_irq(BCM_IRQ_VC_I2C, 0); + up_set_irq_type(BCM_IRQ_VC_I2C, IRQ_RISING_EDGE); up_enable_irq(BCM_IRQ_VC_I2C); g_i2c_irqinit = true; /* Mark IRQ handler as initialized */ i2cinfo("I2C IRQ enabled\n"); diff --git a/arch/arm64/src/bcm2711/bcm2711_sdio.c b/arch/arm64/src/bcm2711/bcm2711_sdio.c index a0d395b4e6c..8e54c2e6e4f 100644 --- a/arch/arm64/src/bcm2711/bcm2711_sdio.c +++ b/arch/arm64/src/bcm2711/bcm2711_sdio.c @@ -1068,7 +1068,8 @@ static int bcm2711_attach(FAR struct sdio_dev_s *dev) /* Enable the interrupt handler */ - arm64_gic_irq_set_priority(BCM_IRQ_VC_EMMC, 0, IRQ_TYPE_LEVEL); + up_prioritize_irq(BCM_IRQ_VC_EMMC, 0); + up_set_irq_type(BCM_IRQ_VC_EMMC, IRQ_HIGH_LEVEL); up_enable_irq(BCM_IRQ_VC_EMMC); g_emmc_irqinit = true; mcinfo("EMMC IRQ enabled."); diff --git a/arch/arm64/src/bcm2711/bcm2711_serial.c b/arch/arm64/src/bcm2711/bcm2711_serial.c index dc4d0c04152..15ebc54dc45 100644 --- a/arch/arm64/src/bcm2711/bcm2711_serial.c +++ b/arch/arm64/src/bcm2711/bcm2711_serial.c @@ -568,7 +568,8 @@ static int bcm2711_miniuart_attach(struct uart_dev_s *dev) /* Set interrupt priority in GICv2 */ - arm64_gic_irq_set_priority(BCM_IRQ_VC_AUX, 0, IRQ_TYPE_LEVEL); + up_prioritize_irq(BCM_IRQ_VC_AUX, 0); + up_set_irq_type(BCM_IRQ_VC_AUX, IRQ_HIGH_LEVEL); /* Enable UART interrupt */ diff --git a/arch/arm64/src/bcm2711/bcm2711_spi.c b/arch/arm64/src/bcm2711/bcm2711_spi.c index 585c63215b6..28f27cf8d2b 100644 --- a/arch/arm64/src/bcm2711/bcm2711_spi.c +++ b/arch/arm64/src/bcm2711/bcm2711_spi.c @@ -1020,7 +1020,8 @@ struct spi_dev_s *bcm2711_spibus_initialize(int port) return NULL; } - arm64_gic_irq_set_priority(BCM_IRQ_VC_SPI, 0, IRQ_TYPE_LEVEL); + up_prioritize_irq(BCM_IRQ_VC_SPI, 0); + up_set_irq_type(BCM_IRQ_VC_SPI, IRQ_HIGH_LEVEL); up_enable_irq(BCM_IRQ_VC_SPI); g_interrupts = true; diff --git a/arch/arm64/src/common/arm64_gic.h b/arch/arm64/src/common/arm64_gic.h index f1c0fcd5d5b..ffb5f10bba1 100644 --- a/arch/arm64/src/common/arm64_gic.h +++ b/arch/arm64/src/common/arm64_gic.h @@ -248,10 +248,6 @@ #define GICD_ICFGR_MASK BIT_MASK(2) #define GICD_ICFGR_TYPE BIT(1) -/* BIT(0) reserved for IRQ_ZERO_LATENCY */ -#define IRQ_TYPE_LEVEL BIT(1) -#define IRQ_TYPE_EDGE BIT(2) - #define GIC_SPI_INT_BASE 32 #define GIC_SPI_MAX_INTID 1019 #define GIC_IS_SPI(intid) (((intid) >= GIC_SPI_INT_BASE) && \ @@ -261,10 +257,6 @@ #define GIC_DIST_IROUTER 0x6000 #define IROUTER(base, n) (base + GIC_DIST_IROUTER + (n) * 8) -/* BIT(0) reserved for IRQ_ZERO_LATENCY */ -#define IRQ_TYPE_LEVEL BIT(1) -#define IRQ_TYPE_EDGE BIT(2) - #define IRQ_DEFAULT_PRIORITY 0xa0 #define GIC_IRQ_SGI0 0 @@ -300,8 +292,6 @@ bool arm64_gic_irq_is_enabled(unsigned int intid); int arm64_gic_initialize(void); -void arm64_gic_irq_set_priority(unsigned int intid, unsigned int prio, - uint32_t flags); /**************************************************************************** * Name: arm64_decodeirq diff --git a/arch/arm64/src/common/arm64_gicv2.c b/arch/arm64/src/common/arm64_gicv2.c index 2c19a55b50a..ef9fb5e3433 100644 --- a/arch/arm64/src/common/arm64_gicv2.c +++ b/arch/arm64/src/common/arm64_gicv2.c @@ -1373,56 +1373,6 @@ int up_set_irq_type(int irq, int mode) return -EINVAL; } -/**************************************************************************** - * Name: arm64_gic_irq_set_priority - * - * Description: - * Set the interrupt priority and type. - * - * If CONFIG_SMP is not selected, the cpuset is ignored and SGI is sent - * only to the current CPU. - * - * Input Parameters - * intid - The SGI interrupt ID (0-15) - * prio - The interrupt priority - * flags - Bit IRQ_TYPE_EDGE is 1 if interrupt should be edge-triggered - * - * Returned Value: - * None - * - ****************************************************************************/ - -void arm64_gic_irq_set_priority(unsigned int intid, unsigned int prio, - uint32_t flags) -{ - int ret; - - /* Disable the interrupt */ - - up_disable_irq(intid); - - /* Set the interrupt priority */ - - ret = up_prioritize_irq(intid, prio); - DEBUGASSERT(ret == OK); - - /* Configure interrupt type */ - - if (!GIC_IS_SGI(intid)) - { - if (flags & IRQ_TYPE_EDGE) - { - ret = up_set_irq_type(intid, IRQ_RISING_EDGE); - DEBUGASSERT(ret == OK); - } - else - { - ret = up_set_irq_type(intid, IRQ_HIGH_LEVEL); - DEBUGASSERT(ret == OK); - } - } -} - /**************************************************************************** * Name: arm64_gic_initialize * diff --git a/arch/arm64/src/common/arm64_gicv3.c b/arch/arm64/src/common/arm64_gicv3.c index c725aafd1df..e776dd6e92a 100644 --- a/arch/arm64/src/common/arm64_gicv3.c +++ b/arch/arm64/src/common/arm64_gicv3.c @@ -156,51 +156,6 @@ static inline void arm64_gic_write_irouter(uint64_t val, unsigned int intid) putreg64(val, addr); } -void arm64_gic_irq_set_priority(unsigned int intid, unsigned int prio, - uint32_t flags) -{ - uint32_t mask = BIT(intid & (GIC_NUM_INTR_PER_REG - 1)); - uint32_t idx = intid / GIC_NUM_INTR_PER_REG; - uint32_t shift; - uint32_t val; - unsigned long base = GET_DIST_BASE(intid); - irqstate_t irq_flags; - - /* Disable the interrupt */ - - putreg32(mask, ICENABLER(base, idx)); - gic_wait_rwp(intid); - - /* PRIORITYR registers provide byte access */ - - putreg8(prio & GIC_PRI_MASK, IPRIORITYR(base, intid)); - - /* Interrupt type config */ - - if (!GIC_IS_SGI(intid)) - { - idx = intid / GIC_NUM_CFG_PER_REG; - shift = (intid & (GIC_NUM_CFG_PER_REG - 1)) * 2; - - /* GICD_ICFGR requires full 32-bit RMW operations. - * Each interrupt uses 2 bits; thus updates must be synchronized - * to avoid losing configuration in concurrent environments. - */ - - irq_flags = spin_lock_irqsave(&g_gic_lock); - - val = getreg32(ICFGR(base, idx)); - val &= ~(GICD_ICFGR_MASK << shift); - if (flags & IRQ_TYPE_EDGE) - { - val |= (GICD_ICFGR_TYPE << shift); - } - - putreg32(val, ICFGR(base, idx)); - spin_unlock_irqrestore(&g_gic_lock, irq_flags); - } -} - /*************************************************************************** * Name: up_set_irq_type * diff --git a/arch/arm64/src/rk3399/rk3399_serial.c b/arch/arm64/src/rk3399/rk3399_serial.c index cb7c3968675..1ab9c3ed86a 100644 --- a/arch/arm64/src/rk3399/rk3399_serial.c +++ b/arch/arm64/src/rk3399/rk3399_serial.c @@ -641,7 +641,8 @@ static int a64_uart_attach(struct uart_dev_s *dev) /* Set Interrupt Priority in Generic Interrupt Controller v2 */ - arm64_gic_irq_set_priority(port->irq_num, 0, IRQ_TYPE_LEVEL); + up_prioritize_irq(port->irq_num, 0); + up_set_irq_type(port->irq_num, IRQ_RISING_EDGE); /* Enable UART Interrupt */ diff --git a/arch/arm64/src/zynq-mpsoc/zynq_serial.c b/arch/arm64/src/zynq-mpsoc/zynq_serial.c index 9285b952fe0..8b63a91c3f2 100644 --- a/arch/arm64/src/zynq-mpsoc/zynq_serial.c +++ b/arch/arm64/src/zynq-mpsoc/zynq_serial.c @@ -775,7 +775,8 @@ static int zynq_uart_attach(struct uart_dev_s *dev) /* Set Interrupt Priority in Generic Interrupt Controller v2 */ - arm64_gic_irq_set_priority(port->irq_num, 0, IRQ_TYPE_LEVEL); + up_prioritize_irq(port->irq_num, 0); + up_set_irq_type(port->irq_num, IRQ_HIGH_LEVEL); /* Enable UART Interrupt */ diff --git a/boards/arm64/a64/pinephone/src/pinephone_touch.c b/boards/arm64/a64/pinephone/src/pinephone_touch.c index 138140e2a84..3b581f13603 100644 --- a/boards/arm64/a64/pinephone/src/pinephone_touch.c +++ b/boards/arm64/a64/pinephone/src/pinephone_touch.c @@ -117,7 +117,8 @@ static int pinephone_gt9xx_irq_attach(const struct gt9xx_board_s *state, /* Set Interrupt Priority in Generic Interrupt Controller v2 */ - arm64_gic_irq_set_priority(A64_IRQ_PH_EINT, 0, IRQ_TYPE_EDGE); + up_prioritize_irq(A64_IRQ_PH_EINT, 0); + up_set_irq_type(A64_IRQ_PH_EINT, IRQ_RISING_EDGE); /* Enable Interrupts for Port PH */