From ee06211e057ba9da9a21041fa95b0b31e774a785 Mon Sep 17 00:00:00 2001 From: p-szafonimateusz Date: Fri, 7 Mar 2025 13:56:42 +0100 Subject: [PATCH] arch/x86_64/intel64: fix build break for timerisr fix these errors when build with CONFIG_SCHED_TICKLESS=n: 1. intel64_tsc_timerisr.c:56: multiple definition of `g_x86_64_timer_freq'; 2. intel64_cpustart.c:196: undefined reference to `get_tsc_adjust' Signed-off-by: p-szafonimateusz --- arch/x86_64/src/intel64/Kconfig | 4 ++-- arch/x86_64/src/intel64/intel64_tsc_timerisr.c | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/x86_64/src/intel64/Kconfig b/arch/x86_64/src/intel64/Kconfig index 9787d989670..1d13fce8a7a 100644 --- a/arch/x86_64/src/intel64/Kconfig +++ b/arch/x86_64/src/intel64/Kconfig @@ -23,10 +23,10 @@ config ARCH_INTEL64_HAVE_TSC config ARCH_INTEL64_HAS_TSC_ADJUST bool "MSR_IA32_TSC_ADJUST support" - depends on ARCH_INTEL64_HAVE_TSC + depends on ARCH_INTEL64_HAVE_TSC && SCHED_TICKLESS default y ---help--- - MSR_IA32_TSC_ADJUST is used to adjust the offset of the Time Stamp Counter (TSC). + MSR_IA32_TSC_ADJUST is used to adjust the offset of the Time Stamp Counter (TSC). config ARCH_INTEL64_CACHE_LINESIZE diff --git a/arch/x86_64/src/intel64/intel64_tsc_timerisr.c b/arch/x86_64/src/intel64/intel64_tsc_timerisr.c index b2dc70e4354..23d9eadda4c 100644 --- a/arch/x86_64/src/intel64/intel64_tsc_timerisr.c +++ b/arch/x86_64/src/intel64/intel64_tsc_timerisr.c @@ -55,7 +55,7 @@ * Private Data ****************************************************************************/ -unsigned long g_x86_64_timer_freq; +extern unsigned long g_x86_64_timer_freq; /**************************************************************************** * Private Functions