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Documentation/arm/ra8m1: Add Renesas RA8M1 documentation
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Add platform and EK-RA8M1 board documentation. Co-Authored-By: Claude Sonnet 5 <noreply@anthropic.com> Signed-off-by: leocafonso <leocafonso@gmail.com>
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Documentation/platforms/arm/ra8m1/boards/ek-ra8m1/index.rst
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========
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EK-RA8M1
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========
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This is a port of NuttX to the Renesas EK-RA8M1 evaluation kit, featuring
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the R7FA8M1AHECBD (BGA224) MCU: an Arm Cortex-M85 running at up to
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480 MHz, with 2016 KiB of code flash, 896 KiB of SRAM and 12 KiB of data
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flash.
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.. figure:: ek-ra8m1-board_0.webp
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:scale: 50 %
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:align: center
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See the `Renesas website
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<https://www.renesas.com/en/design-resources/boards-kits/ek-ra8m1>`_ for
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information about the EK-RA8M1.
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Flat, no-TrustZone image
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=========================
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This port does not use TrustZone: it is a flat image that always runs in
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the secure state, and it uses the secure memory and register aliases
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throughout (RA8M1 User's Manual Table 4.1) -- code flash at ``0x0200_0000``,
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SRAM at ``0x2200_0000``, data flash at ``0x2700_0000``. The non-secure
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aliases (``0x12xx_xxxx``/``0x32xx_xxxx``/``0x37xx_xxxx``) are not used.
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The EK-RA8M1 ships with the TrustZone security partition set to the
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Renesas FSP sample project's boundary. A flat
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NuttX image needs the whole flash marked secure instead, which has to be
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set once with the flash programmer before the first NuttX image is
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written (see `Loading Code`_ below).
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Clocking
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========
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``include/board.h`` configures this clock tree from the EK-RA8M1's 20 MHz
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resonator (see ``arch/arm/src/ra8m1/ra_clockconfig.h`` for how every
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option is derived and validated):
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============ ========================================= ==========
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Clock Source Frequency
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============ ========================================= ==========
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MOSC 20 MHz resonator on EXTAL/XTAL 20 MHz
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PLL1 MOSC / 2, x96 960 MHz VCO
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CPUCLK PLL1 output P / 1 480 MHz
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ICLK PLL1 output P / 2 240 MHz
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PCLKA PLL1 output P / 4 120 MHz
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PCLKB PLL1 output P / 8 60 MHz
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PCLKC PLL1 output P / 8 60 MHz
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PCLKD PLL1 output P / 4 120 MHz
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PCLKE PLL1 output P / 2 240 MHz
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FCLK PLL1 output P / 8 60 MHz
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BCLK PLL1 output P / 4 120 MHz
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SCICLK PLL1 output Q / 4 120 MHz
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============ ========================================= ==========
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SCICLK feeds the baud rate generator of every SCI UART; it is only
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configured (and its PLL only started) when at least one ``CONFIG_RA_SCIn_UART``
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is enabled. 120 MHz was chosen because it gives 115200 baud with 0.16 %
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error (the reset default, the 8 MHz MOCO, gives 3.5 % error).
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Buttons and LEDs
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================
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Buttons
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-------
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No push-buttons are wired into this port.
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LEDs
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----
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The EK-RA8M1 has three user LEDs:
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==== ==== ======
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LED GPIO Colour
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==== ==== ======
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LED1 P600 Blue
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LED2 P414 Green
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LED3 P107 Red
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==== ==== ======
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They are driven active-high in this port (``ra8m1_userleds.c``,
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``ra8m1_autoleds.c``); this has not been confirmed on hardware, so if a
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board turns out to be wired the other way, invert the levels there.
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These LEDs are not used by the board port unless ``CONFIG_ARCH_LEDS`` is
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defined. In that case, the usage is defined in ``include/board.h`` and
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``src/ra8m1_autoleds.c``:
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================== ========================= ====== ====== ======
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SYMBOL MEANING LED1 LED2 LED3
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================== ========================= ====== ====== ======
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LED_STARTED NuttX has been started OFF OFF OFF
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LED_HEAPALLOCATE Heap has been allocated OFF OFF OFF
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LED_IRQSENABLED Interrupts enabled OFF OFF OFF
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LED_STACKCREATED Idle stack created ON OFF OFF
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LED_INIRQ In an interrupt N/C ON N/C
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LED_SIGNAL In a signal handler N/C ON N/C
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LED_ASSERTION An assertion failed N/C ON N/C
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LED_PANIC The system has crashed N/C N/C ON
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================== ========================= ====== ====== ======
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Without ``CONFIG_ARCH_LEDS``, the LEDs are available through the
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``userled`` upper half at ``/dev/userleds`` (bit 0 = LED1, bit 1 = LED2,
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bit 2 = LED3), or individually through the ``ULEDIOC_SETLED`` ioctl.
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Serial Console
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===============
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The EK-RA8M1's on-board debugger (a J-Link) provides a virtual COM port on
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SCI9:
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================== ============
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Signal R7FA8M1AHECBD
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================== ============
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TXD9 PA14
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RXD9 PA15
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================== ============
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SCI9 is the serial console in the default configurations, at 115200 8N1.
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Loading Code
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============
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This port produces a flat image (no TrustZone), so it is flashed with
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``rfp-cli`` (the Renesas Flash Programmer CLI), through the on-board
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J-Link, over SWD:
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.. code-block:: bash
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rfp-cli -device ra --tool jlink -if swd -p ./build/nuttx.hex
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*Note:* the image must be flashed as ELF, HEX or SREC, not as a raw
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binary: the option-setting words (OFS0/OFS1/OFS2, see
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``ra_option_setting.c``) sit in flash option memory well above the code
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flash region, and a raw ``objcopy`` binary would not carry them.
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*Note:* a board fresh from the factory, or last flashed with the Renesas
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some project, has the TrustZone boundary set to that project's
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partition, which might too small for this flat
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image and makes ``rfp-cli`` fail to erase/program with an address error.
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Set the whole flash and SRAM to secure once, before the first NuttX
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flash:
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.. code-block:: bash
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rfp-cli -d ra -t jlink -if swd -erase-chip
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This is a persistent, one-time device setting; it does not need to be
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repeated on later flashes of a NuttX image.
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Configurations
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==============
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nsh
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---
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Configures the NuttX Shell (nsh) with the serial console on SCI9, plus
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the ``ostest`` test suite.
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nsh-leds
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--------
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Same as ``nsh``, but without ``ostest``, and enables the ``userled``
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driver on ``/dev/userleds`` (``CONFIG_ARCH_LEDS`` is not set, so NuttX
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does not drive the LEDs itself; see `LEDs`_ above).
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113
Documentation/platforms/arm/ra8m1/index.rst
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113
Documentation/platforms/arm/ra8m1/index.rst
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=============
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Renesas RA8M1
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=============
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The RA8M1 is a Renesas RA family MCU built around an Arm Cortex-M85 core
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(Armv8.1-M, Helium/MVE, running at up to 480 MHz), with TrustZone for
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Armv8-M support in hardware. This NuttX port is a flat, no-TrustZone
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image: it always runs in the secure state and uses the secure memory and
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register aliases (see the flat/secure model note in the port's board
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documentation).
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Supported MCUs
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==============
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The following list includes MCUs from the RA8M1 series and indicates
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whether they are supported in NuttX. Only R7FA8M1AHECBD (BGA224, on the
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EK-RA8M1) has been tested; the others are selectable but untested.
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============= ======= ================
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MCU Support Note
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============= ======= ================
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R7FA8M1AFECAM No Selectable, untested
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R7FA8M1AFECBD No Selectable, untested
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R7FA8M1AFECFB No Selectable, untested
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R7FA8M1AFECFC No Selectable, untested
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R7FA8M1AFECFP No Selectable, untested
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R7FA8M1AHECAM No Selectable, untested
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R7FA8M1AHECBD Yes Tested on the EK-RA8M1
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R7FA8M1AHECFB No Selectable, untested
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R7FA8M1AHECFC No Selectable, untested
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R7FA8M1AHECFP No Selectable, untested
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============= ======= ================
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Peripheral Support
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==================
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The following list indicates peripherals supported in NuttX:
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========== ======= =====================================
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Peripheral Support Notes
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========== ======= =====================================
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FLASH No
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CLOCK Yes MOCO, HOCO, MOSC, PLL1, PLL2, SCICLK
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ICU Yes
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KINT No
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ELC No
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DTC No
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DMAC No
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GPT No
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AGT No
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RTC No
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WDT No
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IWDT No
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SCI Yes Just UART (SCI_B0-4, SCI_B9)
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IIC No
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SPI No
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SSIE No
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QSPI No
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SDHI No
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CAN No
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USBFS No
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ADC12 No
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DAC12 No
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ACMPLP No
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OPAMP No
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CRC No
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GPIO Yes
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========== ======= =====================================
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CLOCK
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-----
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The board's ``include/board.h`` defines ``BOARD_*`` macros that select the clock
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sources, PLL settings and dividers, and ``arch/arm/src/ra8m1/ra_clockconfig.h``
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derives every clock frequency from them and checks it against the limits in
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the RA8M1 User's Manual (chapter 8) at build time. See the board's own
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documentation for the specific clock tree it configures.
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The RA8M1 has two PLLs. PLL1 can feed the system clock or a peripheral
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dedicated clock (SCICLK); PLL2 can only feed a dedicated clock. SCICLK is
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enabled automatically whenever an SCI UART is enabled, since it is the
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clock of the SCI baud rate generator.
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SCI
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---
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The Serial Communications Interface, Type B (SCI_B) is configurable to
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support several serial communication modes: Asynchronous (UART), Clock
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synchronous, Simple SPI, Smart card interface, Simple IIC (master-only).
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NuttX driver support covers UART mode. RA8M1 has SCI_B0-4 and SCI_B9 (no
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SCI_B5-8); each channel's baud rate generator runs from SCICLK.
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GPIO
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----
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Pins can be configured/operated using ``ra_gpio_*`` functions.
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ICU
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---
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The Interrupt Controller Unit routes peripheral events to NVIC vectors:
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any event can be routed to any of its IELSR slots. NuttX assigns SCI_B
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events to fixed slots (four per channel) and calls ``ra_attach_icu()`` at
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start-up to route the enabled channels' events into them.
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Supported Boards
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=================
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.. toctree::
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:glob:
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:maxdepth: 1
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boards/*/*
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