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arm/nrf52,nrf53,nrf91: fix PWM driver bugs

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- SEQSTARTED0 and STOPPED events were not cleared before waiting for
  them, so the second start or stop returned immediately
- PWM_DECODER_MODE_* shifted 8 instead of shifting to bit 8
- PWM_PSEL_PIN_MASK and PWM_PSEL_PORT_MASK referenced TWI shift names
- PWM_PSEL_CONNECTED described the disconnected state

Assisted-by: Claude Code
Signed-off-by: raiden00pl <raiden00@railab.me>
This commit is contained in:
raiden00pl 2026-09-24 15:32:29 +02:00 • committed by Xiang Xiao
parent c8f699a4e3
commit e5e06d6bde
6 changed files with 24 additions and 15 deletions
Download patch file Download diff file Expand all files Collapse all files

11
arch/arm/src/nrf52/hardware/nrf52_pwm.h
View file

@ -140,8 +140,8 @@
# define PWM_DECODER_LOAD_INDIVIDUAL (2 << PWM_DECODER_LOAD_SHIFT)
# define PWM_DECODER_LOAD_WAVEFORM (3 << PWM_DECODER_LOAD_SHIFT)
#define PWM_DECODER_MODE_REFRESH (8 << 0) /* Bit 8: */
#define PWM_DECODER_MODE_NEXTSTEP (8 << 1) /* Bit 8: */
#define PWM_DECODER_MODE_REFRESH (0 << 8) /* Bit 8: Load using REFRESH */
#define PWM_DECODER_MODE_NEXTSTEP (1 << 8) /* Bit 8: Load using NEXTSTEP */
/* LOOP Register */
@ -162,10 +162,11 @@
/* PSEL[x] Register */
#define PWM_PSEL_PIN_SHIFT (0) /* Bits 0-4: OUT pin number */
#define PWM_PSEL_PIN_MASK (0x1f << PWM_PSELSDA_PIN_SHIFT)
#define PWM_PSEL_PIN_MASK (0x1f << PWM_PSEL_PIN_SHIFT)
#define PWM_PSEL_PORT_SHIFT (5) /* Bit 5: PUT port number */
#define PWM_PSEL_PORT_MASK (0x1 << PWM_PSELSDA_PORT_SHIFT)
#define PWM_PSEL_CONNECTED (1 << 31) /* Bit 31: Connection */
#define PWM_PSEL_PORT_MASK (0x1 << PWM_PSEL_PORT_SHIFT)
#define PWM_PSEL_CONNECTED (0 << 31) /* Bit 31: Connected */
#define PWM_PSEL_DISCONNECTED (1 << 31) /* Bit 31: Disconnected */
#define PWM_PSEL_RESET (0xffffffff)
/* Decoder data */

2
arch/arm/src/nrf52/nrf52_pwm.c
View file

@ -578,6 +578,7 @@ static int nrf52_pwm_start(struct pwm_lowerhalf_s *dev,
/* Start sequence 0 */
nrf52_pwm_putreg(priv, NRF52_PWM_EVENTS_SEQSTARTED0_OFFSET, 0);
nrf52_pwm_putreg(priv, NRF52_PWM_TASKS_SEQSTART0_OFFSET, 1);
/* Wait for sequence started */
@ -603,6 +604,7 @@ static int nrf52_pwm_stop(struct pwm_lowerhalf_s *dev)
/* Stop PWM */
nrf52_pwm_putreg(priv, NRF52_PWM_EVENTS_STOPPED_OFFSET, 0);
nrf52_pwm_putreg(priv, NRF52_PWM_TASKS_STOP_OFFSET, 1);
/* Wait for PWM stopped */

11
arch/arm/src/nrf53/hardware/nrf53_pwm.h
View file

@ -142,8 +142,8 @@
# define PWM_DECODER_LOAD_INDIVIDUAL (2 << PWM_DECODER_LOAD_SHIFT)
# define PWM_DECODER_LOAD_WAVEFORM (3 << PWM_DECODER_LOAD_SHIFT)
#define PWM_DECODER_MODE_REFRESH (8 << 0) /* Bit 8: */
#define PWM_DECODER_MODE_NEXTSTEP (8 << 1) /* Bit 8: */
#define PWM_DECODER_MODE_REFRESH (0 << 8) /* Bit 8: Load using REFRESH */
#define PWM_DECODER_MODE_NEXTSTEP (1 << 8) /* Bit 8: Load using NEXTSTEP */
/* LOOP Register */
@ -164,10 +164,11 @@
/* PSEL[x] Register */
#define PWM_PSEL_PIN_SHIFT (0) /* Bits 0-4: OUT pin number */
#define PWM_PSEL_PIN_MASK (0x1f << PWM_PSELSDA_PIN_SHIFT)
#define PWM_PSEL_PIN_MASK (0x1f << PWM_PSEL_PIN_SHIFT)
#define PWM_PSEL_PORT_SHIFT (5) /* Bit 5: PUT port number */
#define PWM_PSEL_PORT_MASK (0x1 << PWM_PSELSDA_PORT_SHIFT)
#define PWM_PSEL_CONNECTED (1 << 31) /* Bit 31: Connection */
#define PWM_PSEL_PORT_MASK (0x1 << PWM_PSEL_PORT_SHIFT)
#define PWM_PSEL_CONNECTED (0 << 31) /* Bit 31: Connected */
#define PWM_PSEL_DISCONNECTED (1 << 31) /* Bit 31: Disconnected */
#define PWM_PSEL_RESET (0xffffffff)
/* Decoder data */

2
arch/arm/src/nrf53/nrf53_pwm.c
View file

@ -556,6 +556,7 @@ static int nrf53_pwm_start(struct pwm_lowerhalf_s *dev,
/* Start sequence 0 */
nrf53_pwm_putreg(priv, NRF53_PWM_EVENTS_SEQSTARTED0_OFFSET, 0);
nrf53_pwm_putreg(priv, NRF53_PWM_TASKS_SEQSTART0_OFFSET, 1);
/* Wait for sequence started */
@ -581,6 +582,7 @@ static int nrf53_pwm_stop(struct pwm_lowerhalf_s *dev)
/* Stop PWM */
nrf53_pwm_putreg(priv, NRF53_PWM_EVENTS_STOPPED_OFFSET, 0);
nrf53_pwm_putreg(priv, NRF53_PWM_TASKS_STOP_OFFSET, 1);
/* Wait for PWM stopped */

11
arch/arm/src/nrf91/hardware/nrf91_pwm.h
View file

@ -142,8 +142,8 @@
# define PWM_DECODER_LOAD_INDIVIDUAL (2 << PWM_DECODER_LOAD_SHIFT)
# define PWM_DECODER_LOAD_WAVEFORM (3 << PWM_DECODER_LOAD_SHIFT)
#define PWM_DECODER_MODE_REFRESH (8 << 0) /* Bit 8: */
#define PWM_DECODER_MODE_NEXTSTEP (8 << 1) /* Bit 8: */
#define PWM_DECODER_MODE_REFRESH (0 << 8) /* Bit 8: Load using REFRESH */
#define PWM_DECODER_MODE_NEXTSTEP (1 << 8) /* Bit 8: Load using NEXTSTEP */
/* LOOP Register */
@ -164,10 +164,11 @@
/* PSEL[x] Register */
#define PWM_PSEL_PIN_SHIFT (0) /* Bits 0-4: OUT pin number */
#define PWM_PSEL_PIN_MASK (0x1f << PWM_PSELSDA_PIN_SHIFT)
#define PWM_PSEL_PIN_MASK (0x1f << PWM_PSEL_PIN_SHIFT)
#define PWM_PSEL_PORT_SHIFT (5) /* Bit 5: PUT port number */
#define PWM_PSEL_PORT_MASK (0x1 << PWM_PSELSDA_PORT_SHIFT)
#define PWM_PSEL_CONNECTED (1 << 31) /* Bit 31: Connection */
#define PWM_PSEL_PORT_MASK (0x1 << PWM_PSEL_PORT_SHIFT)
#define PWM_PSEL_CONNECTED (0 << 31) /* Bit 31: Connected */
#define PWM_PSEL_DISCONNECTED (1 << 31) /* Bit 31: Disconnected */
#define PWM_PSEL_RESET (0xffffffff)
/* Decoder data */

2
arch/arm/src/nrf91/nrf91_pwm.c
View file

@ -578,6 +578,7 @@ static int nrf91_pwm_start(struct pwm_lowerhalf_s *dev,
/* Start sequence 0 */
nrf91_pwm_putreg(priv, NRF91_PWM_EVENTS_SEQSTARTED0_OFFSET, 0);
nrf91_pwm_putreg(priv, NRF91_PWM_TASKS_SEQSTART0_OFFSET, 1);
/* Wait for sequence started */
@ -603,6 +604,7 @@ static int nrf91_pwm_stop(struct pwm_lowerhalf_s *dev)
/* Stop PWM */
nrf91_pwm_putreg(priv, NRF91_PWM_EVENTS_STOPPED_OFFSET, 0);
nrf91_pwm_putreg(priv, NRF91_PWM_TASKS_STOP_OFFSET, 1);
/* Wait for PWM stopped */