From dec6ec113889ee1f723596142b6befb83fdfc91d Mon Sep 17 00:00:00 2001 From: yf13 Date: Sat, 23 Dec 2023 10:23:49 +0800 Subject: [PATCH] Update mode.h to add CSR_TVEC --- arch/risc-v/include/mode.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/risc-v/include/mode.h b/arch/risc-v/include/mode.h index 53b7014bb25..8e112a2b4e5 100644 --- a/arch/risc-v/include/mode.h +++ b/arch/risc-v/include/mode.h @@ -42,6 +42,7 @@ # define CSR_IE sie /* Interrupt enable register */ # define CSR_CAUSE scause /* Interrupt cause register */ # define CSR_TVAL stval /* Trap value register */ +# define CSR_TVEC stvec /* Trap vector base addr register */ /* In status register */ @@ -76,6 +77,7 @@ # define CSR_IE mie /* Interrupt enable register */ # define CSR_CAUSE mcause /* Interrupt cause register */ # define CSR_TVAL mtval /* Trap value register */ +# define CSR_TVEC mtvec /* Trap vector base addr register */ /* In status register */