diff --git a/boards/risc-v/litex/arty_a7/README.txt b/boards/risc-v/litex/arty_a7/README.txt
index 03d5540390c..1e20876b71c 100644
--- a/boards/risc-v/litex/arty_a7/README.txt
+++ b/boards/risc-v/litex/arty_a7/README.txt
@@ -5,6 +5,9 @@
 2. Follow instruction on https://github.com/enjoy-digital/litex to build the vexriscv softcore fpga gateware
    and flash to arty_a7 board
 
+  $ cd litex-boards/litex_boards/targets
+  $ ./digilent_arty.py --with-sdcard --uart-baudrate 1000000 --cpu-type=vexriscv --cpu-variant=secure --build --load --flash
+
 3. Configure and build NuttX
 
   $ mkdir ./nuttx; cd ./nuttx