From d4e4b9c2e238794304a36f42cd07a25f3d30dbb2 Mon Sep 17 00:00:00 2001 From: patacongo Date: Tue, 11 Nov 2008 23:21:38 +0000 Subject: [PATCH] Fix typos (O instead of 0) git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1206 42af7a65-404d-4744-a932-0658087f49c3 --- arch/sh/src/sh1/sh1_703x.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/sh/src/sh1/sh1_703x.h b/arch/sh/src/sh1/sh1_703x.h index 1336397d06e..160afac966a 100644 --- a/arch/sh/src/sh1/sh1_703x.h +++ b/arch/sh/src/sh1/sh1_703x.h @@ -283,7 +283,7 @@ #define SH1_SCISMR_OE (0x10) /* Bit 4: 0:Even parity, 1:Odd parity */ #define SH1_SCISMR_PE (0x20) /* Bit 5: Parity enable */ #define SH1_SCISMR_CHR (0x40) /* Bit 6: 0:8-bit data, 1:7-bit data */ -#define SH1_SCISMR_CA (Ox80) /* Bit 7: 0:Asynchronous, 1:clocked synchronous */ +#define SH1_SCISMR_CA (0x80) /* Bit 7: 0:Asynchronous, 1:clocked synchronous */ #define SH1_SCISCR_CKEMASK (0x03) /* Bit 0-1: Internal clock source */ /* Asynchronous mode: */ @@ -301,7 +301,7 @@ #define SH1_SCISCR_RE (0x10) /* Bit 4: 1=Receiver enable */ #define SH1_SCISCR_TE (0x20) /* Bit 5: 1=Transmitter enable */ #define SH1_SCISCR_RIE (0x40) /* Bit 6: 1=Recieve-data-full interrupt enable */ -#define SH1_SCISCR_TIE (Ox80) /* Bit 7: 1=Transmit-data-empty interrupt enable */ +#define SH1_SCISCR_TIE (0x80) /* Bit 7: 1=Transmit-data-empty interrupt enable */ #define SH1_SCISCR_ALLINTS (0xcc) #define SH1_SCISSR_MPBT (0x01) /* Bit 0: Multi-processor Bit in Transmit data */