From d4097a27e28ee486ea2c71f8993b50e1bd17cdec Mon Sep 17 00:00:00 2001 From: "Daniel P. Carvalho" Date: Sun, 4 Oct 2026 01:08:08 -0300 Subject: [PATCH] arch/mips/pic32mx: record the running task on interrupt exit. pic32mx_decodeirq() saves the interrupted context into g_running_tasks[this_cpu()]->xcp.regs on entry, but nothing updates g_running_tasks[] after a context switch: every interrupt saves the context into the Idle task's TCB, and once a task exits (up_exit() sets the entry to NULL) no context is saved at all and the next context switch restores stale registers. Set g_running_tasks[this_cpu()] to this_task() before returning, as pic32mz_decodeirq() does. This is the same bug that crashed the PIC32MZ-W1 when the netinit thread exited. Assisted-by: Claude Code:claude-opus-5-5 Signed-off-by: Daniel P. Carvalho --- arch/mips/src/pic32mx/pic32mx_decodeirq.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/mips/src/pic32mx/pic32mx_decodeirq.c b/arch/mips/src/pic32mx/pic32mx_decodeirq.c index f2ff17c53b2..98eceebae99 100644 --- a/arch/mips/src/pic32mx/pic32mx_decodeirq.c +++ b/arch/mips/src/pic32mx/pic32mx_decodeirq.c @@ -36,6 +36,7 @@ #include #include #include +#include #include "mips_internal.h" #include "pic32mx_int.h" @@ -141,6 +142,12 @@ uint32_t *pic32mx_decodeirq(uint32_t *regs) regs = up_current_regs(); + /* Record the task that will run when the interrupt returns. Its state + * is saved to its TCB on the next interrupt entry (see above). + */ + + *running_task = this_task(); + #if defined(CONFIG_ARCH_FPU) || defined(CONFIG_ARCH_ADDRENV) /* Check for a context switch. If a context switch occurred, then * g_current_regs will have a different value than it did on entry. If an