From d3ff5476e004d08a4db227a5b13d9cc6cc77095c Mon Sep 17 00:00:00 2001 From: Jukka Laitinen Date: Tue, 30 Apr 2019 07:15:37 -0600 Subject: [PATCH] arch/arm/src/stm32h7/stm32h7x3xx_rcc.c: Set the stm32h7 default HSI predivider to 4. The I2C driver currently assumes HSI clock to be 16MHz. --- arch/arm/src/stm32h7/stm32h7x3xx_rcc.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/arch/arm/src/stm32h7/stm32h7x3xx_rcc.c b/arch/arm/src/stm32h7/stm32h7x3xx_rcc.c index 72ae5baa2ce..4c71fd31684 100644 --- a/arch/arm/src/stm32h7/stm32h7x3xx_rcc.c +++ b/arch/arm/src/stm32h7/stm32h7x3xx_rcc.c @@ -104,7 +104,13 @@ static inline void rcc_reset(void) regval = getreg32(STM32_RCC_CR); regval &= ~(RCC_CR_HSEON | RCC_CR_HSI48ON | RCC_CR_CSION | RCC_CR_PLL1ON | - RCC_CR_PLL2ON | RCC_CR_PLL3ON); + RCC_CR_PLL2ON | RCC_CR_PLL3ON | + RCC_CR_HSIDIV_MASK); + + /* Set HSI predivider to default (4, 16MHz) */ + + regval |= RCC_CR_HSIDIV_4; + putreg32(regval, STM32_RCC_CR); /* Reset PLLCFGR register to reset default */