From d164a2cf5b02abb5ab852bdeace91a418f965d68 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Tue, 27 Nov 2018 16:50:59 -0600 Subject: [PATCH] Squashed commit of the following: arch/arm/src/max326xx: Fixes for GPIO configuration problems and serial driver problems. I now get the NuttShell prompt (if I also band on ENTER to force all of the characters out). Progress, but not yet ready. configs/max32660-evsys: Support CONFIG_BOOT_RUNFROMISRAM=y. --- arch/arm/src/lpc54xx/lpc54_lowputc.c | 60 ++------- arch/arm/src/max326xx/common/max326_start.c | 4 + .../max326xx/max32660/max32660_clockconfig.c | 2 +- .../arm/src/max326xx/max32660/max32660_gpio.c | 4 +- .../arm/src/max326xx/max32660/max32660_gpio.h | 2 +- .../src/max326xx/max32660/max32660_lowputc.c | 12 +- configs/max32660-evsys/README.txt | 40 +++++- configs/max32660-evsys/scripts/Make.defs | 4 + configs/max32660-evsys/scripts/sram.ld | 115 ++++++++++++++++++ 9 files changed, 176 insertions(+), 67 deletions(-) create mode 100644 configs/max32660-evsys/scripts/sram.ld diff --git a/arch/arm/src/lpc54xx/lpc54_lowputc.c b/arch/arm/src/lpc54xx/lpc54_lowputc.c index 247fa8a031a..f6f41c96f11 100644 --- a/arch/arm/src/lpc54xx/lpc54_lowputc.c +++ b/arch/arm/src/lpc54xx/lpc54_lowputc.c @@ -75,11 +75,7 @@ # define CONSOLE_FCLK BOARD_FLEXCOMM0_FCLK # define CONSOLE_PARITY CONFIG_USART0_PARITY # define CONSOLE_BITS CONFIG_USART0_BITS -# ifdef CONFIG_USART0_2STOP -# define CONSOLE_STOPBITS2 true -# else -# define CONSOLE_STOPBITS2 false -# endif +# define CONSOLE_STOPBITS2 CONFIG_USART0_2STOP # ifdef CONFIG_USART0_IFLOWCONTROL # define CONSOLE_IFLOW true # else @@ -96,11 +92,7 @@ # define CONSOLE_FCLK BOARD_FLEXCOMM1_FCLK # define CONSOLE_PARITY CONFIG_USART1_PARITY # define CONSOLE_BITS CONFIG_USART1_BITS -# ifdef CONFIG_USART1_2STOP -# define CONSOLE_STOPBITS2 true -# else -# define CONSOLE_STOPBITS2 false -# endif +# define CONSOLE_STOPBITS2 CONFIG_USART1_2STOP # ifdef CONFIG_USART1_IFLOWCONTROL # define CONSOLE_IFLOW true # else @@ -117,11 +109,7 @@ # define CONSOLE_FCLK BOARD_FLEXCOMM2_FCLK # define CONSOLE_PARITY CONFIG_USART2_PARITY # define CONSOLE_BITS CONFIG_USART2_BITS -# ifdef CONFIG_USART2_2STOP -# define CONSOLE_STOPBITS2 true -# else -# define CONSOLE_STOPBITS2 false -# endif +# define CONSOLE_STOPBITS2 CONFIG_USART2_2STOP # ifdef CONFIG_USART2_IFLOWCONTROL # define CONSOLE_IFLOW true # else @@ -138,11 +126,7 @@ # define CONSOLE_FCLK BOARD_FLEXCOMM3_FCLK # define CONSOLE_PARITY CONFIG_USART3_PARITY # define CONSOLE_BITS CONFIG_USART3_BITS -# ifdef CONFIG_USART3_2STOP -# define CONSOLE_STOPBITS2 true -# else -# define CONSOLE_STOPBITS2 false -# endif +# define CONSOLE_STOPBITS2 CONFIG_USART3_2STOP # ifdef CONFIG_USART3_IFLOWCONTROL # define CONSOLE_IFLOW true # else @@ -159,11 +143,7 @@ # define CONSOLE_FCLK BOARD_FLEXCOMM4_FCLK # define CONSOLE_PARITY CONFIG_USART4_PARITY # define CONSOLE_BITS CONFIG_USART4_BITS -# ifdef CONFIG_USART4_2STOP -# define CONSOLE_STOPBITS2 true -# else -# define CONSOLE_STOPBITS2 false -# endif +# define CONSOLE_STOPBITS2 CONFIG_USART4_2STOP # ifdef CONFIG_USART4_IFLOWCONTROL # define CONSOLE_IFLOW true # else @@ -180,11 +160,7 @@ # define CONSOLE_FCLK BOARD_FLEXCOMM5_FCLK # define CONSOLE_PARITY CONFIG_USART5_PARITY # define CONSOLE_BITS CONFIG_USART5_BITS -# ifdef CONFIG_USART5_2STOP -# define CONSOLE_STOPBITS2 true -# else -# define CONSOLE_STOPBITS2 false -# endif +# define CONSOLE_STOPBITS2 CONFIG_USART5_2STOP # ifdef CONFIG_USART5_IFLOWCONTROL # define CONSOLE_IFLOW true # else @@ -201,11 +177,7 @@ # define CONSOLE_FCLK BOARD_FLEXCOMM6_FCLK # define CONSOLE_PARITY CONFIG_USART6_PARITY # define CONSOLE_BITS CONFIG_USART6_BITS -# ifdef CONFIG_USART6_2STOP -# define CONSOLE_STOPBITS2 true -# else -# define CONSOLE_STOPBITS2 false -# endif +# define CONSOLE_STOPBITS2 CONFIG_USART6_2STOP # ifdef CONFIG_USART6_IFLOWCONTROL # define CONSOLE_IFLOW true # else @@ -222,11 +194,7 @@ # define CONSOLE_FCLK BOARD_FLEXCOMM7_FCLK # define CONSOLE_PARITY CONFIG_USART7_PARITY # define CONSOLE_BITS CONFIG_USART7_BITS -# ifdef CONFIG_USART7_2STOP -# define CONSOLE_STOPBITS2 true -# else -# define CONSOLE_STOPBITS2 false -# endif +# define CONSOLE_STOPBITS2 CONFIG_USART7_2STOP # ifdef CONFIG_USART7_IFLOWCONTROL # define CONSOLE_IFLOW true # else @@ -243,11 +211,7 @@ # define CONSOLE_FCLK BOARD_FLEXCOMM8_FCLK # define CONSOLE_PARITY CONFIG_USART8_PARITY # define CONSOLE_BITS CONFIG_USART8_BITS -# ifdef CONFIG_USART8_2STOP -# define CONSOLE_STOPBITS2 true -# else -# define CONSOLE_STOPBITS2 false -# endif +# define CONSOLE_STOPBITS2 CONFIG_USART8_2STOP # ifdef CONFIG_USART8_IFLOWCONTROL # define CONSOLE_IFLOW true # else @@ -264,11 +228,7 @@ # define CONSOLE_FCLK BOARD_FLEXCOMM9_FCLK # define CONSOLE_PARITY CONFIG_USART9_PARITY # define CONSOLE_BITS CONFIG_USART9_BITS -# ifdef CONFIG_USART9_2STOP -# define CONSOLE_STOPBITS2 true -# else -# define CONSOLE_STOPBITS2 false -# endif +# define CONSOLE_STOPBITS2 CONFIG_USART9_2STOP # ifdef CONFIG_USART9_IFLOWCONTROL # define CONSOLE_IFLOW true # else diff --git a/arch/arm/src/max326xx/common/max326_start.c b/arch/arm/src/max326xx/common/max326_start.c index 84de7d94b5b..28d556d28ee 100644 --- a/arch/arm/src/max326xx/common/max326_start.c +++ b/arch/arm/src/max326xx/common/max326_start.c @@ -197,7 +197,9 @@ static inline void max326_fpuconfig(void) void __start(void) { +#ifdef CONFIG_BOOT_RUNFROMFLASH const uint32_t *src; +#endif uint32_t *dest; /* Make sure that interrupts are disabled */ @@ -232,6 +234,7 @@ void __start(void) showprogress('C'); +#ifdef CONFIG_BOOT_RUNFROMFLASH /* Move the initialized data section from his temporary holding spot in * FLASH into the correct place in SRAM. The correct place in SRAM is * give by _sdata and _edata. The temporary location is in FLASH at the @@ -244,6 +247,7 @@ void __start(void) } showprogress('D'); +#endif /* Initialize the FPU (if configured) */ diff --git a/arch/arm/src/max326xx/max32660/max32660_clockconfig.c b/arch/arm/src/max326xx/max32660/max32660_clockconfig.c index 0a3d1cc4788..3b00f2c2c7c 100644 --- a/arch/arm/src/max326xx/max32660/max32660_clockconfig.c +++ b/arch/arm/src/max326xx/max32660/max32660_clockconfig.c @@ -672,7 +672,7 @@ void max326_clockconfig(FAR const struct clock_setup_s *clksetup) max326_tmr0_disableclk(); #endif #ifndef CONFIG_MAX326XX_TMR32_1 - max326_tmr2_disableclk(); + max326_tmr1_disableclk(); #endif #ifndef CONFIG_MAX326XX_TMR32_0 max326_tmr2_disableclk(); diff --git a/arch/arm/src/max326xx/max32660/max32660_gpio.c b/arch/arm/src/max326xx/max32660/max32660_gpio.c index 34d1c0a366f..24e4a7ae1a3 100644 --- a/arch/arm/src/max326xx/max32660/max32660_gpio.c +++ b/arch/arm/src/max326xx/max32660/max32660_gpio.c @@ -369,11 +369,11 @@ int max326_gpio_config(max326_pinset_t pinset) break; case GPIO_ALT2: - max326_altfunc(pinmask, AF_FUNC1); + max326_altfunc(pinmask, AF_FUNC2); break; case GPIO_ALT3: - max326_altfunc(pinmask, AF_FUNC1); + max326_altfunc(pinmask, AF_FUNC3); break; case GPIO_INPUT: /* Already done */ diff --git a/arch/arm/src/max326xx/max32660/max32660_gpio.h b/arch/arm/src/max326xx/max32660/max32660_gpio.h index 6312aeb7f38..08ee36ca1ef 100644 --- a/arch/arm/src/max326xx/max32660/max32660_gpio.h +++ b/arch/arm/src/max326xx/max32660/max32660_gpio.h @@ -65,7 +65,7 @@ * FFFF .... .... .... */ -#define GPIO_FUNC_SHIFT (11) /* Bits 12-15: Pin Function */ +#define GPIO_FUNC_SHIFT (12) /* Bits 12-15: Pin Function */ #define GPIO_FUNC_MASK (15 << GPIO_FUNC_SHIFT) # define GPIO_INPUT (0 << GPIO_FUNC_SHIFT) /* 0000 GPIO input pin */ # define GPIO_OUTPUT (1 << GPIO_FUNC_SHIFT) /* 0001 GPIO output pin */ diff --git a/arch/arm/src/max326xx/max32660/max32660_lowputc.c b/arch/arm/src/max326xx/max32660/max32660_lowputc.c index 4e3e4c0b1c8..693504c8c57 100644 --- a/arch/arm/src/max326xx/max32660/max32660_lowputc.c +++ b/arch/arm/src/max326xx/max32660/max32660_lowputc.c @@ -66,11 +66,7 @@ # define CONSOLE_BAUD CONFIG_UART0_BAUD # define CONSOLE_PARITY CONFIG_UART0_PARITY # define CONSOLE_BITS CONFIG_UART0_BITS -# ifdef CONFIG_UART0_2STOP -# define CONSOLE_STOPBITS2 true -# else -# define CONSOLE_STOPBITS2 false -# endif +# define CONSOLE_STOPBITS2 CONFIG_UART0_2STOP # ifdef CONFIG_UART0_IFLOWCONTROL # define CONSOLE_IFLOW true # else @@ -86,11 +82,7 @@ # define CONSOLE_BAUD CONFIG_UART1_BAUD # define CONSOLE_PARITY CONFIG_UART1_PARITY # define CONSOLE_BITS CONFIG_UART1_BITS -# ifdef CONFIG_UART1_2STOP -# define CONSOLE_STOPBITS2 true -# else -# define CONSOLE_STOPBITS2 false -# endif +# define CONSOLE_STOPBITS2 CONFIG_UART1_2STOP # ifdef CONFIG_UART1_IFLOWCONTROL # define CONSOLE_IFLOW true # else diff --git a/configs/max32660-evsys/README.txt b/configs/max32660-evsys/README.txt index 6573d53f481..a00eef51ab4 100644 --- a/configs/max32660-evsys/README.txt +++ b/configs/max32660-evsys/README.txt @@ -40,6 +40,23 @@ Status pin configuration, ICC, and UART. Additional untested drivers are complete and ready for testing: DMA, GPIO interrupts, RTC, WDT. The following drivers are not implemented: I2C, SPI, I2S. + 2018-11-27: I received the MAX32660-EVSYS today and made a little debug + progress. Added a run-from-SRAM configuration to keep from locking + up the board on bad configurations. The rest of the bring-up will + use this SRAM configuration. + + Some successby the end of the day: + + ACFH + + NuttShell (NSH) NuttX-7.27 + nsh> + + Still lots to do though. There is TX interrupt problem so it doesn't + look this good in real life. Probably due to TX FIFO level interrupt + issues. I comes up with 'NuttShell' then stops. I hit enter and + " (NSH) NuttX" comes out etc. So it looks like Rx input is driving + the Tx output. Serial Console ============== @@ -118,7 +135,7 @@ Starting OpenOCD Loading Code: Code can be loaded into FLASH using the convenient ARM MBED drag'n'drop - interface. Or it can be loaded using GDB as follows: + interface. Or it can be loaded into FLASH (or SRAM) using GDB as follows: $ arm-none-eabi-gdb (gdb) target remote localhost:3333 @@ -128,14 +145,31 @@ Loading Code: This does not work so reliably for me, however. -Debugging: +Debugging from FLASH: $ arm-none-eabi-gdb (gdb) target remote localhost:3333 (gdb) mon reset - (gdb) mon reg pc 0x11c + (gdb) mon reg pc 0x11c # Set PC to __start entry point (gdb) file nuttx (gdb) b os_start (gdb) c Also not very reliable. + +Debugging from SRAM: + + Same except that the __start entry point is 0x2000011c, not 0x11c. + +Recovering from bad code in FLASH: + + In my initial debug effort, I had a lethal bug that I thought had bricked + the board. It appears that initialization logic put the MAX32660 in a bad + state so that every time that I reset the board, I would re-enter this + same bad state and I could not connect the CMSIS-DAP debugger. + + I was able to recover. I jumpered GND to RSTn the used the MBED MSC + interface to copy a known safe 'SysTick' demo program. The copy hung and + timed out with an error message. I yanked the jumper off RSTn and asked + to re-try copy. It continued to burn the safe code demo! I fixed it! + too much drama. diff --git a/configs/max32660-evsys/scripts/Make.defs b/configs/max32660-evsys/scripts/Make.defs index e95cc7510da..9ce9a1d1f2f 100644 --- a/configs/max32660-evsys/scripts/Make.defs +++ b/configs/max32660-evsys/scripts/Make.defs @@ -37,7 +37,11 @@ include ${TOPDIR}/.config include ${TOPDIR}/tools/Config.mk include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs +ifeq ($(CONFIG_BOOT_RUNFROMFLASH),y) LDSCRIPT = flash.ld +else +LDSCRIPT = sram.ld +endif ifeq ($(WINTOOL),y) # Windows-native toolchains diff --git a/configs/max32660-evsys/scripts/sram.ld b/configs/max32660-evsys/scripts/sram.ld new file mode 100644 index 00000000000..679ae6a68ca --- /dev/null +++ b/configs/max32660-evsys/scripts/sram.ld @@ -0,0 +1,115 @@ +/**************************************************************************** + * configs/max32660-evsys/scripts/sram.ld + * + * Copyright (C) 2018 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The MAX32660 has 256Kb of FLASH beginning at address 0x0000:0000 and + * 96Kb of SRAM beginning at 0x2000:0000 + */ + +MEMORY +{ + flash (rx) : ORIGIN = 0x00000000, LENGTH = 256K + sram (rwx) : ORIGIN = 0x20000000, LENGTH = 96K +} + +OUTPUT_ARCH(arm) +EXTERN(_vectors) +ENTRY(_stext) + +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > sram + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > sram + + .ARM.extab : { + *(.ARM.extab*) + } > sram + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > sram + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +}