diff --git a/COPYING b/COPYING index 4456df359eb..1500f276f81 100644 --- a/COPYING +++ b/COPYING @@ -34,7 +34,7 @@ and 2011. Copyright Line Continuation --------------------------- -Copy information which exceeds the usable line lengh may be broken and +Copy information which exceeds the usable line length may be broken and continued on the following line, such as: Copyright (C) 2007-2010, 2012, 2014-2015, 2017 Gregory Nutt. All diff --git a/ChangeLog b/ChangeLog index 81c60591f8e..0792780df4c 100644 --- a/ChangeLog +++ b/ChangeLog @@ -178,7 +178,7 @@ 0.2.8 2007-07-02 Gregory Nutt * tools/Makefile.mkconfig: Under Cygwin, executable has a different name - * tools/mkdeps.sh & arch/arm/src/Makefile: Corrected a problem makeing dependencies + * tools/mkdeps.sh & arch/arm/src/Makefile: Corrected a problem making dependencies * tools/zipme.sh: Force directory name to be nuttx-xx.yy.zz * fs/fs_opendir.c: Correct errors in semaphore usage that can cause deadlock. * lib/lib_getopt.c: Added getopt() support @@ -635,7 +635,7 @@ divisor, the system timer divisor, and the EMAC poll timer. * eZ80Acclaim!: Fixed GPIO pin configuration get serial output * eZ80Acclaim!: Correct stack overflow in ostest example configuration - * eZ80Acclaim!: Fixed restoration of interrupts state on interrupt level context swith. + * eZ80Acclaim!: Fixed restoration of interrupts state on interrupt level context switch. 0.4.3 2009-03-04 Gregory Nutt @@ -667,7 +667,7 @@ always timing out when the load was heavy and worse, for some reason, resetting the Tx function caused unexpected registers to be reset in the Rcv function was well. - * Z80: Patch incorported: "[2696648] Z80: interrupt flag stored in parity bit" + * Z80: Patch incorporated: "[2696648] Z80: interrupt flag stored in parity bit" (submitted by JPelletier). The is the same fix that was needed for the eZ80 and fixed in 0.4.2. * netutils: Added logic to support a simple wget() function @@ -1309,7 +1309,7 @@ before returning from the signal handler trampoline was missing. Under certain circumstances, this can cause stack corruption. This was discovered by David Hewson on an ARM9 platform, but since the code - has been leveraged, the bug has been propogated from ARM to Cortex-M3, + has been leveraged, the bug has been propagated from ARM to Cortex-M3, AVR32, M16C, SH1, ZNEO, eZ80, Z8, and Z80 -- almost every architecture. The correction has been incorporated for all architectures but only verified on a few. @@ -1343,7 +1343,7 @@ * arch/arm/src/lpc17xx/lpc17_vector.S, stm32/stm32_vector.S, lm3s/lm3s_vector.S, sam3u/sam3u_vector.S: Fixed a hard fault problem that can occur if certain types of interrupts are pending at the time another interrupt returns - (SYSTICK). This has not been verified on all plaforms, but is a critical + (SYSTICK). This has not been verified on all platforms, but is a critical fixed that is needed by all Cortex-M3 NuttX users. * configs/olimex-lpc1766stk/thttpd: Add a THTTPD configuration for the Olimex LPC2766-STK board. Verified successfully. @@ -1460,7 +1460,7 @@ * The NuttX repository has been converted to SVN and can now be found here http://svn.code.sf.net/p/nuttx/code/trunk/ * configs/mbed/hidkbd: Added USB host support for the mbed LPC1768 board; add - a USB host HID keyboard configuraion. + a USB host HID keyboard configuration. * drivers/usbhost/hid_parser.c: Leverages the LUFA HID parser written by Dean Camera. * examples/nsh: Correct an usage of getopt(): If you stop calling getopt() @@ -1595,7 +1595,7 @@ configs///appdir to apps/.config and to simply the application configuration logic. * examples/nsh and apps/nshlib: Move the core NuttShell (NSH) logic - out of the exemples directory and into the apps/ directory where + out of the examples directory and into the apps/ directory where it belongs. * apps/Makefile and configs/*/appconfig: Use '=' as the delimiter instead of '/' so that sub-directories in apps/ can be used. @@ -1605,7 +1605,7 @@ 6.1 2011-04-11 Gregory Nutt * arch/arm/include/lpc17xx/irq.h and arch/arm/src/lpc17xx/lpc17_gpio*.c: - Fix several bugs in the GPIO interrupt logic. Submited by + Fix several bugs in the GPIO interrupt logic. Submitted by Decio Renno. * Initialization for the CONFIG_APPS_DIR is now supported during the earlier, 'context' build phase. @@ -1863,7 +1863,7 @@ debug output to come from the console device while using another device for NSH. There are some issues on initial check-in: NuttX doesn't have termios and the console device has special properties that make using NSH awkward. Examples: - No CR-LF expansion, no character echoing, no command line editting. + No CR-LF expansion, no character echoing, no command line editing. * arch/arm/src/stm32/stm32_lowputc.c and stm32_serial.c. Correct several bugs involving serial port configuration. These bugs are only critical if you are trying to using multiple UARTs on STM32. @@ -1877,7 +1877,7 @@ buttons. * arch/arm/src/stm32/stm32_gpio.c: GPIO interrupt handling for pin numbers were being aliased: 5-9 together and 10-15 together. Extended - the logic to peform decoding of GPIO interrupts and unique dispatching + the logic to perform decoding of GPIO interrupts and unique dispatching for all 16 pins. * configs/stm3210e-eval/nxtext: Add a configuration for the apps/examples/nxtext example. This example focuses on placing text on the background while @@ -1952,7 +1952,7 @@ stm32_reset() in order to return the write requests to the USB mass storage driver; it is possible that a similar but could exist for other architectures. - * graphics/nxfonts/nxfonts_*.h: Add serveral more new fonts + * graphics/nxfonts/nxfonts_*.h: Add several more new fonts * arch/z80/src/eZ80/ez80_serial.c: Fix some errors in serial driver setup for UART1 (submitted by Paul Osmialowski). * drivers/input/tsc2007.c and include/nuttx/input/*: Add a generic NuttX @@ -2224,7 +2224,7 @@ * include/sys/types.h: wchar_t is a builtin type in C++ and its declaration can cause errors with certain C++ compilers. * sched/sig_timedwait.c: Fix signal handling when the returned info - is NULL. Before this change, it would derefence a NULL pointer + is NULL. Before this change, it would dereference a NULL pointer in this case. * graphics/nxfonts/nxfonts_sans17x22.h and nxfonts_sans20x26.h: Add some very small sans serif fonts. @@ -2494,7 +2494,7 @@ sequence number will be wrong. The end consequence of the bad sequence number was that the when the dropped packet was re-transmitted, it was was ignored because its sequence number looked wrong. Fix was, obviously, - to only increment the recevied sequence number if the TCP data was + to only increment the received sequence number if the TCP data was accepted. * configs/stm3240g-eval, configs/stm32f40discovery, and arch/*/src/Makefile: Add changes to support building with the Atollic "Lite" toolchain. @@ -2808,7 +2808,7 @@ * configs/stm32f4discovery/src/up_extmem.c and up_ssd1289.c: Add support to STM32F4Discovery for than an external, SSD1289-based LCD. * configs/stm32f4discovery/nxlines: Add an STM32F4Discovery configuration - to thest the SSD1289-based LCD. + to test the SSD1289-based LCD. * configs/stm3240g-eval/src: Add USB GPIO initialization logic needed in board-specific boot logic. * configs/stm32f4discovery/src: Add USB GPIO initialization logic needed @@ -3489,7 +3489,7 @@ * arch/arm/src/armv7-m/up_memcpy.S: An optimized memcpy() function for the ARMv7-M family contributed by Mike Smith. * lib/strings/lib_vikmemcpy.c: As an option, the larger but faster - implemementation of memcpy from Daniel Vik is now available (this is + implementation of memcpy from Daniel Vik is now available (this is from http://www.danielvik.com/2010/02/fast-memcpy-in-c.html). * lib/strings/lib_memset.c: CONFIG_MEMSET_OPTSPEED will select a version of memset() optimized for speed. By default, memset() is @@ -3583,7 +3583,7 @@ * configs/stm32f4discovery/nxlines: Configure to use mconf/Kconfig tool. * configs/stm32f4discovery/src/up_ug2864ambag01.c: Board-specific - initialization for UG-2864AMBAG01 OLED connecte to STM32F4Disovery. + initialization for UG-2864AMBAG01 OLED connected to STM32F4Disovery. * libxx/libxx_stdthrow.cxx: Exception stubs from Petteri Aimonen. * configs/stm32f4discovery/src/up_ug2864ambag01.c: Driver has been verified on the STM32F4Discovery platform. Some tuning of the @@ -3881,7 +3881,7 @@ * include/unistd.h, arch/arch/src/*: Implement a simple vfork(). On initial checkin, this API is available only for ARM platforms. * binfmt/binfmt_exec.c: exec() now sets the priority of the new task - to the same priority as the current task (instead of the arbirtrary + to the same priority as the current task (instead of the arbitrary value of 50). * libc/unisted/lib_execv.c and lib_execl.c: New, somewhat flawed, implementations of execv() and execl(). @@ -4122,7 +4122,7 @@ members of the group are closed when the last member of the group exits. * includes/nuttx/sched.h and Lots of files: Change name of _TCB to - struct tcb_s so that (1) it is consitent with other NuttX naming and + struct tcb_s so that (1) it is consistent with other NuttX naming and so that (2) the naming can handle some upcoming changes. * includes/nuttx/sched.h and sched/: There are three TCB structures: struct tcb_s is a generic common version, struct task_tcb_s is a @@ -4377,7 +4377,7 @@ (2013-03-18). * arch/arm/src/armv7-m/up_exception.S, sam3u/sam3u_vectors.S, and lpc17xx/lpc17_vectors.S: In exception handling with CONFIG_NUTTX_KERNEL, - need to explicity set and clear the privilege bit in the CONTROL + need to explicitly set and clear the privilege bit in the CONTROL register on return. I assumed this would be handled automatically by the EXC_RETURN. Silly me (2013-03-18). * arch/arm/src/lpc17_adc.c: Add a work-around for an ADC errata. From @@ -4394,7 +4394,7 @@ non-existence so when it you try to create a file in a non-existent directory, it would create a file with the name of the missing directory. Reported by Andrew Tridgell (2013-03-30). - * Numerous files: Changed the protoypes of up_create_stack() and + * Numerous files: Changed the prototypes of up_create_stack() and up_release_stack() so that is includes a task type. Normally you can get this type from the TCB parameter, but there are certain conditions when the task type is not valid in the TCB when these @@ -4482,7 +4482,7 @@ is now functional. Thre may be some issues with DMA from CPU SRAM which is apparently disabled in sleep mode; up_idle() always enters sleep mode (2013-03-31). - * arch/arm/src/stm32: Add architecure support for the STM32 F427/F437 + * arch/arm/src/stm32: Add architecture support for the STM32 F427/F437 chips. Contributed by Mike Smith (2013-4-01). * configs/zkit-arm-1769/src/up_can.c: Add support for both CAN1 and CAN2. Contributed by M.Kannan (2013-4-01). @@ -4830,7 +4830,7 @@ based on the STM32 F103C8T6 MCU (2013-5-28). * arch/arm/src/stm32/stm32_usbdev.c: Fix an error in NULL packet handling: If the NULL-packet needed flag ever gets set, then - it is not cleared and inifinite NULL packets result. This only + it is not cleared and infinite NULL packets result. This only effects the CDC/ACM class and was the cause of the failure of configs/stm32f3discovery/usbnsh configuration which works great after this change (2013-5-29). @@ -5228,7 +5228,7 @@ break in with a debugger to start the program in NOR FLASH (2013-7-29). * arch/arm/src/armv7-a/arm_cache.S: Separate the bigger cache - operations into separater files (2013-7-29). + operations into separator files (2013-7-29). * arch/arm/src/stm32/stm32_dac.c: Fixed numerous DAC driver errors and added support for DAC DMA (contributed by John Wharington, 2013-7-30). @@ -5373,7 +5373,7 @@ USB host-side connection monitoring threads in configs/*/src: The SAMA5 has three downstream ports; all of the other USB host implementations have only one. This will require significant changes - to the USB host interfaces starting with these chnages to monitor + to the USB host interfaces starting with these changes to monitor connections on a port-by-port basis. This effects a lot of files and more changes are coming for this issues. Changes are being blindly incorporated into other architrectures. I am being careful to avoid @@ -5406,13 +5406,13 @@ interface method (which I started to do but backed above) (2013-8-13). * arch/arm/src/sama5/sam_memories.c and .h: Extended logic so do conversions from physical to virtual addresses (2013-8-14). - * arch/arm/src/sama5/sam_ohci.c: Add D cache contols and conversion + * arch/arm/src/sama5/sam_ohci.c: Add D cache controls and conversion between physical and virtual address (2013-8-14). * arch/arm/src/stm32/stm32_spi.c: nbits() interface extended to control bit order as well as bit width (from Teemu Pirinen) (2013-8-16) * arch/arm/src/sama5/sam_ohci.c: More to be tested, but the SAMA5 - OHCI driver is now basically funtional (2013-8-16). + OHCI driver is now basically functional (2013-8-16). * include/nuttx/usb/ehci.h: EHCI header file (2013-8-17). * arch/arm/src/stm32/stm32_i2c.c: Correct an error that crept into the STM32 F1 I2C driver with some recent changes. From Yiran Liao @@ -5546,7 +5546,7 @@ for CAN1 and CAN2. Patch provided by Lorenz Meier (2013-9-13). * nuttx/include/nuttx/usb/cdcacm.h: Fix backward conditional compilation in the CDC/ACM driver with regard to remote - wakeup and self-powered capabilites. Provided by Lorenz Meier + wakeup and self-powered capabilities. Provided by Lorenz Meier (2013-9-13) * fs/romfs/fs_romfsutil.c: Fix for filenames > 15 characters. Provided by Lorenz Meier (2013-9-13). @@ -5682,7 +5682,7 @@ getc() function for operation with no file system (and, hence, no serial driver) (from Alan Carvalho de Assis, 2013-9-30). * configs/freedom-kl25z/minnsh: A new configuration that is - an experiement to see how small we can get the NuttX footprint. + an experiment to see how small we can get the NuttX footprint. From Alan Carvalho de Assis. (2013-9-30). * net/net_sendfile: The high performance sendfile logic is now functional. From Max Holtzberg (2013-9-30). @@ -7763,7 +7763,7 @@ (2014-7-22). * arch/arm/src/stm32/stm32_otgfsdev.c: STM32 OTGFS device: Various changes to try to reduce that amount of time in interrupts handles and - with interrupts disbled. Needs verification on other platforms. From + with interrupts disabled. Needs verification on other platforms. From Petteri Aimonen (2014-7-22). * arch/arm/src/sama5/sam_pck.c: Fix a recently introduced typo that was being masked by some bad conditional compilation (2015=4-7-22). @@ -9293,7 +9293,7 @@ And if DMA2D is supported: blit and blend. The method up_ltdcgetlayer provides access to a reference of a specific ltdc layer. From Marco Krahl (2014-12-19). - * arch/arm/src/stm32/stm32_ltdc.c: Implements ltdc frambuffer support + * arch/arm/src/stm32/stm32_ltdc.c: Implements ltdc framebuffer support for the generic nuttx framebuffer interface, (see nuttx/video/fb.h). This also implements the interface to perform hardware accelerated layer operation by the ltdc controller and dma2d controller later @@ -10197,7 +10197,7 @@ - blit (Copy content from source to destination layer) also works with selectable area. - blend (Blend two layer and copy the result to a destination layer - which canbe a third layer or one of the source layer) also works + which can be a third layer or one of the source layer) also works awith selectablerea. - fillarea (Fill a defined area of the whole layer with a specific color) @@ -11018,7 +11018,7 @@ README file for more info (2015-10-08). * stm32 F4: Fix some TIM12 pin mappings. From Max Kriegleder (2015-10-9). - * fs/tmpfs: TMPFS file system is code complete and bascially functional + * fs/tmpfs: TMPFS file system is code complete and basically functional although it has not been heavily tested (2015-10-9). * drivers/input/button_upper.c and include/nuttx/input/buttons.h: Add a driver to support application access to board buttons (2015-10-12). @@ -11086,7 +11086,7 @@ * arch/arm/src/samv7 and arch/arm/include/samv7: Add support for the SAME70 family of chips (2015-11-14). * configs/stm32f429i-disco: configs/stm32f429i-disco/src/stm32_nsh.c - file calculated partition boundries based on page block sizes but + file calculated partition boundaries based on page block sizes but mtd_partition() is expecting calculations based on erase block size. From Alan Carvalho de Assis (2015-11-16). * Move rivers/wireless/cc3000/security.c to crypto/aes.c; move @@ -11216,7 +11216,7 @@ to drivers/net. It is a driver a belongs in the OS. There are still some interface related issues, however (2015-12-07). * configs/: Update all configurations that use the Telnet daemon; those - configurations now need to separately enable the Telnet drvier + configurations now need to separately enable the Telnet driver (2015-12-07). * drivers/net/telnet.c: Now works like the loop device. A new interface called telnet_initialize() registers a telnet session "factory" @@ -11544,12 +11544,12 @@ * arch/ renaming: current_regs renamed to g_current_regs in all architectures. For ARM which is slowly developing SMP capability, g_current_regs is now an array of dimension 1 in most case but of higher - dimension of the architecuture supports multiple CPUs (2016-03-09). + dimension of the architecture supports multiple CPUs (2016-03-09). * MTD: Increase block size in mtd_geometry_s to 32-bits (2016-03-09). * include/nuttx/clock.h: Missing parenteses in MSEC2TICK macro can cause wrong calculations. From Stefan Kolb (2016-03-09). * Build system: Added a 'make olddefconfig' target that will refresh - a .config file without interaction. tools/refesh.sh now has a --silent + a .config file without interaction. tools/refresh.sh now has a --silent option so that it can be used in batch modes without human input (2016-03-09). * tools/testbuild.sh: .config files were not being updated because (a) @@ -11771,7 +11771,7 @@ * configs/*/src/tiva_timer.c: Tiva boards: Fix a naming collision, rename board-specific function from tiva_timer_initialize() to tiva_timer_configure() to remove conflict (2016-05-23). - * arch/arm/src/sam*: Ensure that the TWIHS (i2c) hw get's its clock + * arch/arm/src/sam*: Ensure that the TWIHS (i2c) hw gets its clock set when the sequence of sam_i2cbus_initialize(), sam_i2cbus_uninitialize(), then sam_i2cbus_initialize() or twi_reset() is called. I found this a while back in the stm32 family, so there @@ -12014,7 +12014,7 @@ available in time - force CS active after transfer: this forces the CS to stay active after a transfer, even if the chip runs out of data. - Btw.: this is a prerequisit to make the LASTXFER bit working at all. + Btw.: this is a prerequisite to make the LASTXFER bit working at all. - escape LASTXFER: this suppresses the LASTXFER bit at the end of the next transfer. The "escape"-Flag is reset automatically. From Frank Benkert (2016-06-14) @@ -12252,13 +12252,13 @@ arises due to freeing the bulk IN endpoint before the loop that frees the requests via cdcasm_freereq. That function checks the parameters and skips the freeing if either is NULL. Freeing the bulk - IN enpoint will cause the first param to be NULL, thereby bypassing + IN endpoint will cause the first param to be NULL, thereby bypassing the free operation. To fix, I moved the release of the bulk IN endpoint until after to loop (much as was the case for the OUT and read requests, which did not exhibit the problem). From ziggurat29 (2016-07-07). * arch/arm/src/stm32l4: Update usb dev/host controller drivers to - reflect new(ish) logging standards; augment device enpoint and fifo + reflect new(ish) logging standards; augment device endpoint and fifo allocation #defines to do more sanity checking, and be automatically adaptive to size changes. Update README.txt to reflect current status of the implementation. From ziggurat29 (2016-07-07). @@ -12358,7 +12358,7 @@ fifo buffers. Adds mkfifo2() and pipe2() which are just like mkfifo() and pipe(), but allow control of the size of the underlying, in-memory circular buffer . Move pipe() and mkpipe() to nuttx/libc, they are no - longer core OS interfaces. Capability currenty used only by PTY logic + longer core OS interfaces. Capability currently used only by PTY logic to support, configurable, smaller buffers for PTYs (2016-07-19). * include/nuttx/drivers: Move driver-related files from include/nuttx to include/nuttx/drivers. Move driver related prototypes out of @@ -12453,10 +12453,10 @@ version of copysignf() for floats is included. From David S. Alessio (2016-07-30). * I/O Expander: Remove hard-coded PCA9555 fields from ioexpander.h - definitons. Add support for an attach() method that may be used when + definitions. Add support for an attach() method that may be used when any subset of pin interrupts occur (2016-07-31). * PCA9555 Driver: Replace the signalling logic with a simple callback - using the new definitons of ioexpander.h. This repartitioning of + using the new definitions of ioexpander.h. This repartitioning of functionality is necessary because (1) the I/O expander driver is the lower-lower part of any driver that uses GPIOs (include the GPIO driver itself) and should not be interacting directly with the much @@ -12602,7 +12602,7 @@ Küng (2016-08-23). * tools/mkfsdata.pl was still generating the old-style apps/include inclusion paths (2016-08-23). - * drivers/sensors: Add drvier for the LIS3MDL 3 axis magnetometer. From + * drivers/sensors: Add driver for the LIS3MDL 3 axis magnetometer. From Alexander Entinger (2016-08-23). * drivers/sensors: Add driver for the MLX90393 3 axis magnetometer. From Alexander Entinger (2016-08-23). @@ -12694,7 +12694,7 @@ * STM32 F4 Discovery: Add support for XEN1210 3D-board. From Alan Carvalho de Assis (2016-09-17). * drivers/sensors: Adds support for the Sensixs XEN1210 3D-board. This - sensor is used on NANOSATC-BR2 a Brazillian CUBESAT project. From + sensor is used on NANOSATC-BR2 a Brazilian CUBESAT project. From Alan Carvalho de Assis (2016-09-16). * include/analog/dac.h: Make DAC structure packed. From Marc Rechté (2016-09-20). @@ -12881,7 +12881,7 @@ From Sebastien Lorquet (2016-10-25). * configs/stm32f103-minimum: Fix Timers 2 to 7 clock frequencies. From Alan Carvalho de Assis (2016-10-25). - * arch/arm/src/stm32: Initial implemention of the STM32 F37xx SDADC + * arch/arm/src/stm32: Initial implementation of the STM32 F37xx SDADC module. There are also changes to ADC, DAC modules. SDADC has only been tested in DMA mode and does not support external TIMER triggers. This is a work in progress. From Marc Rechté (2016-10-25). @@ -12958,7 +12958,7 @@ ARCH_HAVE options in the driver's Kconfig. We should probably remove the other checks in drivers/Kconfig and check if the drivers are enabled only in their Kconfig. From Paul A. Patience (2016-11-02). - * Move protoypes for the non-standard include/semaphore.h file to the + * Move prototypes for the non-standard include/semaphore.h file to the non-standard include/nuttx/semaphore.h with the other non-standard semaphore interfaces (2016-11-02). * include/semaphores.h: Provide macros for sem_setprotocol() and @@ -12999,7 +12999,7 @@ * arch/arm/src/armv7-r: Add new Kconfig entries for d/i-cache. Unlike in ARMv7-A/M, Kconfig entries for data and instruction caches are currently missing in ARMv7-R. This commit adds those missing - Kconfig entries. Actual implmenetation for those functions will be + Kconfig entries. Actual implementation for those functions will be added in the subsequent patches. From Heesub Shin (2016-11-06). * arch/arm/src/armv7-r: Add cache handling functions. This commit adds functions for enabling and disabling d/i-caches which were @@ -13168,7 +13168,7 @@ three APIs in the SMP configuration. The new internal interface is sched_cpu_pause(tcb). This function will pause a CPU if the task associated with 'tcb' is running on that CPU. This allows a different - CPU to modify that OS data stuctures associated with the CPU. When the + CPU to modify that OS data structures associated with the CPU. When the other CPU is resumed, those modifications can safely take place. The three fixes are to handle cases in the SMP configuration where one CPU does need to make modifications to TCB and data structures on a task @@ -13200,7 +13200,7 @@ * SMP: Add logic to avoid a deadlock condition when CPU1 is hung waiting for g_cpu_irqlock and CPU0 is waitin for g_cpu_paused (2016-11-22). * Misoc: Add timer driver. From Ramtin Amin (2016-11-22). - * Misoc: Add commits and warnings about missing caculation of the timer + * Misoc: Add commits and warnings about missing calculation of the timer reload value (2016-11-22). * SAM3/4: Name of method is now setcallback, not sethandler (2016-11-22). * sam4s-xplained-pro/nsh: Configuration uses old, improper timer interface. @@ -13229,7 +13229,7 @@ * ARMv7-A: Fix some SCU SMP logic (2016-11-26). * ARMv7-A/i.MX6: Modify handling of the SMP cache coherency configuration so that it is identical to the steps from the TRM. - Makes no differenct, however (2016-11-27). + Makes no different, however (2016-11-27). * The Smoothie project needs to compile C++ inside config/boardname/src/ to use with High Priority Interruption, then I modified the board configs Makefile to support it. It works fine for the first time @@ -13327,7 +13327,7 @@ (2016-12-06). * STM32F7: Allow the config to override the clock edge setting. From David Sidrane (2016-12-06). - * For Cortex-A9, should also set ACTLR.FW in SMP mode to enble TLB and + * For Cortex-A9, should also set ACTLR.FW in SMP mode to enable TLB and cache broadcasts. Does not fix SMP cache problem (2016-12-07). * sched notes: Add additional note to see if/when CPU is started in SMP mode (2016-12-07). @@ -13445,7 +13445,7 @@ example code. Fix errors APP CPU startup (2016-12-20). * fs/procfs: Fix procfs status for SMP case (2016-12-20). * Xtensa ESP32: Clock frequency is different if running from IRAM or is - booting from FLASH. This is a booltloader issue (2016-12-20). + booting from FLASH. This is a bootloader issue (2016-12-20). * Xtensa ESP32: Basic port is function in both single CPU and dual CPU SMP configurations. There is an NSH configuration for each CPU configuration (2016-12-21). @@ -13499,7 +13499,7 @@ critical section throughout the operation (and possible until the task is restore in the event of a context switch). Makes a big difference in stability (2016-12-28). - * SMP: Move sharable function to common file as irq_cpu_locked(). Use + * SMP: Move shareable function to common file as irq_cpu_locked(). Use irq_cpu_locked() in sched_unlock(). Use irq_cpu_locked() in sched_removereadytorun() and sched_setpriority(). Use irq_cpu_locked() in sched_mergepending() (2016-12-29). @@ -13509,7 +13509,7 @@ Assis (2017-01-03). * Alternative way to encode font spacing for Tom Thumb font (2017-01-04). * Graphics: Initial separation of font cache from graphics/nxterm. Now in - libnx/nxfronts where it can be shared with other grapics applications + libnx/nxfronts where it can be shared with other graphics applications (2017-01-05). * Font cache: Fix a reference counting issue: count not be initialized when font cache created. Fix initialization of a semaphore. Enforce @@ -13600,7 +13600,7 @@ procfs/ in all configurations (2017-01-23). * SMP: Fix timer related issues: Round robin and sporadic scheduling were only being performed for tasks running on the CPU that processes - the system timer interrupt. Similary, CPU load measurements were only + the system timer interrupt. Similarly, CPU load measurements were only be processed for running on the CPU that receives the sampling interrupt (2017-01-23). * STM32 F7: Added missing ARCH_HAVE_RESET for F7. From David Sidrane @@ -13678,7 +13678,7 @@ BOARD_FR_DIV was never used - that is a good thing because the value ws defined shifted and the code also shifted it. From David Sidrane (2017-02-07). - * Added MCG settings that are defiend on the K64 SoC. Added + * Added MCG settings that are defined on the K64 SoC. Added BOARD_MCG_C2_FCFTRIM and BOARD_MCG_C2_LOCRE0 to configure the MCG_C2 register cleanup of some comments. From David Sidrane (2017-02-07). * Better granualarity and errno checking of the board's MCG settings. @@ -13765,7 +13765,7 @@ for the purposes of rename (2017-02-12). * rename(): Correct more issues. (1) Move to the root directory in the pseudo file system, (2) Fix path naming calculation when the path is the - root directory of a mounted file system, and (3) dont't do the rename if + root directory of a mounted file system, and (3) don't do the rename if the source and destination of the rename are the same (2017-02-12). * Add basic fstat() support (2017-02-12). * Add fstat support to binfs (2017-02-12). @@ -13895,7 +13895,7 @@ the Kinetis PMC IP block. It is envisioned that in the long term as a chip is added. The author of the new chip definitions will either find the exact configuration in an existing chip define and add the new chip - to it Or add the PMC fature configuration #defines to the chip ifdef + to it Or add the PMC feature configuration #defines to the chip ifdef list in arch/arm/include/kinetis/kinetis_pmc.h In either case the author should mark it as "Verified to Document Number:" taken from the reference manual. @@ -14074,7 +14074,7 @@ (2017-03-05). * Kinetis: Eliminate warning when USE_EARLYSERIALINIT is not defined (2017-03-05). - * STM3210E-EVAL: Eliminte a warning. Return type of board_button_irq is + * STM3210E-EVAL: Eliminate a warning. Return type of board_button_irq is now type int (2017-03-05). * dk-tm4c129x: Remove warning for variable that is set but not used (2017-03-05). @@ -14156,7 +14156,7 @@ any other devices and should not involve illegal calls from applications into the OS (2017-03-09). * STM32, STM32 F7, STM32 L4: OTG host drivers: Do not do data toggle - if interrupt transfer is NAKed. Sugested by webbbn@gmail.com + if interrupt transfer is NAKed. Suggested by webbbn@gmail.com (2017-03-09). * apps/examples/usbterm is gone because it can be configured to perform an illegal call into the OS. Remove all traces of @@ -14287,7 +14287,7 @@ code). From David Cabecinhas (2017-03-16). * Remove redundant interrupt stack coloring and OABI code. From David Cabecinhas (2017-03-16). - * Fixed descritpions of NUC100/120. From no1wudi (2017-03-16). + * Fixed descriptions of NUC100/120. From no1wudi (2017-03-16). * XMC4500 Relax: Add basic board support infrastructure of Infineon XMC4500 Relax Lite v1 (2017-03-16). * Fix mksyscall host binary name. From Alan Carvalho de Assis @@ -14324,7 +14324,7 @@ Mateusz Szafoni (2017-03-18). * Nucleo-F334R8: Add COMP support. From Mateusz Szafoni (2017-03-19). * STM32F3: Add COMP support. From Mateusz Szafoni (2017-03-19). - * XMC4xxx/XMC4500 Relax: First, clean build of basic NSH configurtion + * XMC4xxx/XMC4500 Relax: First, clean build of basic NSH configuration (2017-03-20). * XMC4500-Relax: Add LED support (2017-03-20). * input/mxt: Prevent overriding i2c transfer return value. @@ -14363,11 +14363,11 @@ * STM32: Fix erase sector number for microcontrolers with more than 11 sectors. Erase a sector from the second bank cause the bit 4 of SNB being set but never unused, so trying to erase a sector from the first - bank was acually eraseing a sector from the second bank. From José + bank was actually eraseing a sector from the second bank. From José Roberto de Souza (2017-03-22). * STM32: Make up_progmem thread safe. Writing to a flash sector while starting the erase of other sector have a undefined behavior so lets - add a semaphore and syncronize access to Flash registers. But for + add a semaphore and synchronize access to Flash registers. But for the semaphore to work it needs to be initialized so each board needs call stm32_flash_initialize() on initialization, so to avoid runtime problems it is only using semaphore and making it thread safe if @@ -14484,7 +14484,7 @@ not being added to the list! while not usually a fatal error, this was caught by an assertion when pthread_mutex_unlock() was called: It tried to remove the mutex from the TCB list and it was not there - when, of course, it shoule be. The fix was to add + when, of course, it should be. The fix was to add pthread_mutex_trytake() which does sem_trywait() and if successful, does correctly add the mutext to the TCB list. This should eliminated the assertion (2017-03-29). @@ -15041,7 +15041,7 @@ * STM32F7 serial: Allow configuring Rx DMA buffer size. From Jussi Kivilinna (2017-05-04). * 6LoWPAN: Replace Rime address naming with more consistent - short/exended address terminology (2017-05-04). + short/extended address terminology (2017-05-04). * 6LoWPAN: Remove all ieee802.15.4 MAC knowledge from 6LoWPAN. Now relies on wires/ieee802154 for all MAC-related operations (2017-05-04). * 6LoWPAN: Local address length is fixed by the configuration. The @@ -15367,7 +15367,7 @@ * stm32f7: Add SPI DMA support. From Jussi Kivilinna (2017-05-31). * drivers/mtd/w25.c: Enable short delay after sector/chip erase. From Jussi Kivilinna (2017-05-31). - * pthread robust mutexes: Fix memmory trashing problem: the main task + * pthread robust mutexes: Fix memory trashing problem: the main task may also use mutexes; need to check thread type before accessing pthread-specific mutex data structures. Problem noted by Jussi Kivilinna (2017-05-31). @@ -15423,7 +15423,7 @@ * WIP: wireless/ieee802154: More work on association/beacon-enabled networks. From Anthony Merlino (2017-06-02). * We developed a huge Changeset over a year ago to make USB Composite - configuration dynamical and be able to instanciate the CDCACM + configuration dynamical and be able to instantiate the CDCACM multiple times inside this device. We use this feature to switch between one in normal and up to three CDCACMs in maintenance boot. The control path starts in boardctl.c where the configuration for the @@ -15483,7 +15483,7 @@ * configs/stm32f103-minumum SPI: SPIDEV_WIRELESS used when this has changed to SPIDEV_CONTACTLESS. From Nicolas Estibals (2017-06-08). * stm32f103-minimum: Add GPIO device driver example for - STM32F103-Minimum. This chang eadds the initialization needed by + STM32F103-Minimum. This change eadds the initialization needed by stm32f103-minimum board to support the NuttX GPIO Subsystem. From Alan Carvalho de Assis (2017-06-08). * STM32L4: Remove some C++ style comments (2017-06-08). @@ -15534,7 +15534,7 @@ calling waitwritecomplete(). From Sebastien Lorquet (2017-06-12). * MTD FLASH driver: Clone Sebastien Lorquet's m25px change to at25, is25xp, ramtron, and sst25xx (2017-06-12). - * STM32 HRTIM: GPIOs configuration + EEV and FAULT strucutres. From + * STM32 HRTIM: GPIOs configuration + EEV and FAULT structures. From Mateusz Szafoni (2017-06-12). * stm32/stm32l4 PWM: While attempting to output a 70 MHz square wave from the timer output of a STM32 clocked at 140 MHz (which works fine @@ -15556,7 +15556,7 @@ status register is '1'. Therefore wait for busy flag to clear in w25_readid() and w25_unprotect(). From Jussi Kivilinna (2017-06-13). - * freedom-k66f: Use SPI driver. Initalize SPI1 on connector J6. No + * freedom-k66f: Use SPI driver. Initialize SPI1 on connector J6. No real use, as of yet. From David Sidrane (2017-06-13). * pthreads: Move functions from sched/pthreads to libc/pthreads. These functions just coordinate other OS interface calls but are not @@ -15661,7 +15661,7 @@ The idea is that addressing changes are supposed to occur only while the network is down but won't take effect until the network is up again (2017-06-18). - * Swithches IEEE 802.15.4 based code to using byte arrays instead of + * Switches IEEE 802.15.4 based code to using byte arrays instead of uint16_t values for short address and PAN ID. From Anthony Merlino (2017-06-19). * Throw error when error happens in the tcp_listen function. From @@ -15924,7 +15924,7 @@ problems with Windows native build. From Jeff (2017-07-06). * IP forwarding design simplication; might save some memory. Also fix some compile issues introduce with last commit in MULTINIC - configration (2017-07-06). + configuration (2017-07-06). * IP Forwarding: Another IP forwarding design simplification: Remove an unnecessary field from state structure (2017-07-06). * ICMPv6: Fix an address size calculation that was bungled in a recent @@ -15934,7 +15934,7 @@ * Networking: Correct some issues that prevent TCP from working correctly when both IPv4 and IPv6 are enabled (2017-07-07). * Add definitions that will permit TUN-only networking (2017-07-07). - * Move TUN ioctl commnd to include/nuttx/net/ioctl.h so that it will + * Move TUN ioctl command to include/nuttx/net/ioctl.h so that it will always be unique. It a error in netdev_register: it was not handling device names properly when TUN is the only network device (2017-07-07). @@ -15998,7 +15998,7 @@ recommended value in datasheet. Splits up driver into multiple files to make it easier to navigate. Fixes issue with non-beacon enabled mode. From Anthony Merlino (2017-07-10). - * IP Forwaring. Fix some errors in ipforwar.h when + * IP Forwarding. Fix some errors in ipforwar.h when CONFIG_NET_STATISTICS is enabled, but CONFIG_NETDEV_MULTINIC is not. Add some forward references that are needed when CONFIG_NETDEV_MULTINIC is not enabled. ipfwd_dropstats needs to @@ -16231,7 +16231,7 @@ metadata input parameter type from struct ieee802154_data_ind_s to void*. This permits radios with different MAC metadata to interact with 6LoWPAN. Includes many changes to handle variable length radio - addresses. No longer just short and exteneded; any length.Remove + addresses. No longer just short and extended; any length.Remove explicit type struct ieee802154_frame_meta_s from derive interface methods. Replace with a opaque void * type so that other radio meta data structures may use the interfaces. Add a new radion interface @@ -16283,7 +16283,7 @@ From Masayuki Ishikawa (2017-08-02). * configs/lc823450-xgevk: LC823450-XGEVK board support. From Masayuki Ishikawa (2017-08-02). - * b-l475e-iot91a: Add apps/examples/nettest and eamples/udp to Spirit1 + * b-l475e-iot91a: Add apps/examples/nettest and examples/udp to Spirit1 configuration. Add telnet support. fix driver statistics configuration (2017-08-02). * Networking: Add support for some packet radio IOCTL commands @@ -16327,7 +16327,7 @@ (2017-08-04). * tools/mkdeps.c: Eliminate a warning. MAX_PATH may already be defined in included system files. From Jeff (2017-08-04). - * Spirit1 network drvier: Increase number of retries if there is no + * Spirit1 network driver: Increase number of retries if there is no acknowledgement; Add interrupt handling for the case where the max number of retries expires. Fix some badly implemented queue management code. With these changes the basic UDP and TCP tests @@ -16377,7 +16377,7 @@ Spirit ws busy. Fixed by not checking if Spirit is busy. The TX poll can be performed asynchronouly while spirit is busy; any outgoing data will queued until Spirit is ready. Fixed handling of a - timeout condition. Failure to transmition to the TX state would fail + timeout condition. Failure to transmission to the TX state would fail (timeout) if in a race condition Spirit already committed to the RX state. The driver needs to recover the state properly and avoid debug assertions in this event (2017-08-07). @@ -16476,7 +16476,7 @@ test the PROTECTED build mode (2017-08-17). * stm32f7:DMA correct comments and document stm32_dmacapable. Updated comment to proper reference manual for STM32F7 not STM32F4. Added - stm32_dmacapable input paramaters documentation. From David Sidrane + stm32_dmacapable input parameters documentation. From David Sidrane (2017-08-17). * STM32 F7: DMA add dcache alignment check in stm32_dmacapable. In the case dcache write-buffed mode is used (not write-through) buffer @@ -16486,7 +16486,7 @@ mend+1, the next next address are not on ARMV7M_DCACHE_LINESIZE boundaries. From David Sidrane (2017-08-17). * STM32 F7: SDMMC remove widebus limitation on DMA. There is no - documantation for the STM32F7 that limits DMA on 1 bit vrs 4 bit + documentation for the STM32F7 that limits DMA on 1 bit vrs 4 bit mode. From David Sidrane (2017-08-17). * dcache write-buffed mode is used (not write-through) buffer alignment is required for DMA transfers because a) arch_invalidate_dcache could @@ -16508,7 +16508,7 @@ * 6LoWPAN/PF_IEEE802154: Created radiodev.h and renamed various structures to provide a better separation between 6LoWPAN networking and PF_IEEE802154 address family (2017-08-20). - * STM32 DAC: fix some configuration logic. When STM32_NDAC is greather + * STM32 DAC: fix some configuration logic. When STM32_NDAC is greater than 1, then second channel is always DAC1OUT2. From Mateusz Szafoni (2017-08-20). * PF_IEEE802154 address family: IEEE 802.15.4 network device: Make @@ -16694,7 +16694,7 @@ location and the variables used are byte or/and halfword types, since there is no ECC management in this RAM on the STM32F7 Series, it is recommended to disable the read-modify-write of the DTCM-RAM in the - DTCM interface (inthe DTCMCR register) to increase the performance." + DTCM interface (in the DTCMCR register) to increase the performance." From Jussi Kivilinna (2017-09-01). * Networking: IGMP: Remove special support for interrupt level processing (there is none) and fix some timer cancellation logic. In @@ -16741,7 +16741,7 @@ so many years ago (2017-09-08). * STM32: Add logic for enabling wakeup pins. From Oleg Evseev (2017-09-08). - * Update/fix last commit: On some STM32's, the CSR regiser is 18 vs. 16 + * Update/fix last commit: On some STM32's, the CSR register is 18 vs. 16 bits wide. Need to use 32-bit register accesses (2017-09-08). * 6LoWPAN: I believe, based on RFC review, that with the last multicast change, the NuttX 6LoWPAN is now compliant with RFC 6282 (2017-09-08). @@ -16751,7 +16751,7 @@ 6LoWPAN utility to get the max frame length (not yet hooked in) (2017-09-10). * 6LoWPAN: Remove the option to disable fragmentation support. Two - reasons: (1) First fragementation is always required because IPv6 + reasons: (1) First fragmentation is always required because IPv6 requires an MTU of 1280 bytes. The is no application use case that can work without fragmentation support. And (2) it greatly reduces the complexity of the code (2017-09-10). @@ -16785,7 +16785,7 @@ * drivers/video/fb.c and include/nuttx/video.fb.h: Some improvements and fixes from early testing sith the sim/fb cnofiguration (2017-09-12). * sim/configs/fb: Add a configuration for non-graphical testing of the - frambuffer character driver using apps/example/fb (2017-09-12). + framebuffer character driver using apps/example/fb (2017-09-12). * Rename CONFIG_VIDEO_DEVICES to CONFIG_DRIVERS_VIDEO to conform better to the evolving configuration naming standard (2017-09-12). * Rename CONFIG_AUDIO_DEVICES to CONFIG_DRIVERS_AUDIO to conform better @@ -16893,7 +16893,7 @@ logic to stm32_boot.c. Add support to auto-mount the procfs file system (2017-09-19). * Networking: Add implementation of logic for SIOCGIFCONF and - SIOCGLIFCOF IOCTL commnds (2017-09-19). + SIOCGLIFCOF IOCTL commands (2017-09-19). * Networking: drivers/net/loopback.c: Eliminate a warning. net/netdev/netdev_ifconfig.c: Was not returning all of the address info (2017-09-19). @@ -16943,7 +16943,7 @@ * Fixes for problems found by Coverity in the nuttx repository: - net/socket/recvfrom.c: Check fromlen integrity before using it. - net/socket/net_sockets.c: Always check for valid psock before using. - - net/tcp/tcp_send_unbuffered.c: Avoid using psock beforing + - net/tcp/tcp_send_unbuffered.c: Avoid using psock before checking its integrity. - sched/timer/timer_create.c: Fix watchdog resource leak if cannot allocate a new timer. @@ -17089,7 +17089,7 @@ (2017-09-30). * drivers/wireless: CC1101 driver not permitted to set errno (2017-09-30). - * configs/z80sim and xtrs: Serial driver lower halfs ioctl methods + * configs/z80sim and xtrs: Serial driver lower halves ioctl methods should return a negated errno value, not set the errno variable (2017-10-30). * compiler.h, limits.h, types.h: Update SDCC/z80 files to include @@ -17577,7 +17577,7 @@ * stm32_adc.c: clear pending interrupts. From Mateusz Szafoni (2017-10-20). * drivers/bch: The character driver to block device access now supports - an IOCTL to get the geomtry of the underlying block device (2017-10-20). + an IOCTL to get the geometry of the underlying block device (2017-10-20). * fs/fat: Remove mkfatfs from the OS. This is a user-space application and belongs in apps, not in the OS (2017-10-20). * configs/nucleo-f334r8: add logic for zero latency high priority @@ -17599,7 +17599,7 @@ interrupt stack are enable. From Jussi Kivilinna (2017-10-23). * net/icmp: Correct some comments, typings, spacing problems from last big ICMP socket change (2017-10-23). - * configs/: All defconfig filess that include + * configs/: All defconfig files that include CONFIG_NET_ICMPv6_SOCKET=y need to select CONFIG_SYSTEM_PING6=y and deselect CONFIG_DISABLE_POLL (2017-10-24). * net/icmpv6: This commit adds support for semi-standard IPPROTO_ICMP6 @@ -17653,7 +17653,7 @@ files that have fs/ in their relative pathnames. The logic was detecting that fs was the name of the enty to report, but it was then declaring that fs was a file (because fs/block is of type file). This - was fixed by adding a check for matching lenghts. i.e., if strlen(fs) + was fixed by adding a check for matching lengths. i.e., if strlen(fs) != strlen(fs/block), then report fs as a directory instead of a file (2017-10-26). * fs/procfs: Missing some conditional logic for cases where mountpoint @@ -17896,7 +17896,7 @@ defconfig files (2017-11-13). * fs/procfs/fs_procfsprogrem: Add /proc/progmem. This is an alternative way to get the information that was previoulsy available in - apps/system/free. apps/system/free was removed beause it made illegal + apps/system/free. apps/system/free was removed because it made illegal calls into the OS violating the portable interface. This new procfs entry provides the same information with no such violation (2017-11-13). * Nucleo-F746ZG: Use the serial console over /dev/ttyACM0 by default. @@ -17921,7 +17921,7 @@ * configs/stm32f429i-disco: Add logic to auto-mount procfs. Enable procfs in all configurations that use NSH (2017-11-13). * configs/stm32f429-disco/fb: Enable support for the STMPE811 - touchscreen controller and also for the apps/exmaples/touchscreen test + touchscreen controller and also for the apps/examples/touchscreen test (2017-11-14). * Remove CONFIG_GRAN_SINGLE. It adds no technical benefit (other than some minor reduction in the number of interface arguments) but adds a @@ -18024,7 +18024,7 @@ * mm: Add a debug assertion to check for integer overflow in malloc (2017-11-21). * net/icmpv6: Fix an error in the poll logic. It was assume that the - input parmeter pvconn was valid. It was not. Instead, the poll logic + input parameter pvconn was valid. It was not. Instead, the poll logic must work like the sendto() and recvfrom() logic: It must keep a copy of the conn structure in the private data (2017-11-21). * net/icmpv6: Remove the 'list' field from struct icmpv6_conn_s. It @@ -18109,7 +18109,7 @@ stm32_gpio.h (2017-11-25). * XMC4 Serial: The Alternative Receive Interrupt was not being configured (2017-11-25). - * drivers/lcd: Make LCD driver configuration indepently selected from + * drivers/lcd: Make LCD driver configuration independently selected from NX graphics configuration. This makes things awkward and loses some error checking but is a necessary step in order to make LCD drivers usable when the NX graphics system is disabled (2017-11-25). @@ -18471,7 +18471,7 @@ for the simulation). From Gregory Nutt (2018-01-16). * SMP: Introduce spin_lock_wo_note() and spin_unlock_wo_note(). These APIs are used in sched_note.c to protect instrumentation data. The difference - between these APIs to exsiting spin_lock() and spin_unlock() is that they + between these APIs to existing spin_lock() and spin_unlock() is that they do not perform instrumentation to avoid recursive call when SCHED_INSTRUMENTATION_SPINLOCKS=y. From Masayuki Ishikawa (2018-01-17). * configs: Eliminates the BOARDIOC_TSCTEST_SETUP command. Each board now @@ -18541,7 +18541,7 @@ * drivers/mtd/at24xx.c: Correct page size for AT24C02 part. From Alexander Oryshchenko (2018-01-24). * arch/arm/src/stm32: Make STM32 usable with an external RTC. - * drivers/timers/ds3231.c: Correct some debug statments. From Alexander + * drivers/timers/ds3231.c: Correct some debug statements. From Alexander Oryshchenko (2018-01-24). * arch/arm/src/stm32/stm32_spi.c: Removed unnecessary (and incorrect) speed limitation From Alexander Oryshchenko (2018-01-24). @@ -18616,7 +18616,7 @@ their counterparts without the nx on front. These versions do not modify the errno value. Changed all calls within the OS to use these newer versions of the functions. From Gregory Nutt (2018-01-30). - * binfmt/, configs/, grahics/, libc/, mm/, net/, sched/: OS references to + * binfmt/, configs/, graphics/, libc/, mm/, net/, sched/: OS references to the errno variable should always use the set_errno(), get_errno() macros. From Gregory Nutt (2018-01-30). * arch/arm/src/stm32 and stm32f7: Architecture-specific code is not @@ -18934,7 +18934,7 @@ Astardzhiev (2018-03-14). * configs/stm32f4discover/posix_spawn: With recent changes, needs to enable boardctl() w/symbol table support. From Gregory Nutt (2018-03-16). - * fs/craomfs: Add CROMFS file system. CROMFS is a commpressed, in-memory + * fs/craomfs: Add CROMFS file system. CROMFS is a compressed, in-memory read-only file system based on LZF. From Gregory Nutt (2018-03-19). * sched/sched: Fix a deadlock in SMP mode. Two months ago, I introduced sched_tasklist_lock() and sched_tasklist_unlock() to protect tasklists in @@ -19201,7 +19201,7 @@ support to handle connected UDP sockets. The correct 'optimal blksize' to return is the MSS. The MTU is always too big. From Gregory Nutt (2018-04-27). - * arch/arm/src/imxrt: Add IOMUX implemention for GPIO5. From Jake + * arch/arm/src/imxrt: Add IOMUX implementation for GPIO5. From Jake (2018-04-27). * net/udp: Remove an unused variable warning. Add some comments. From Gregory Nutt (2018-04-27). @@ -19397,7 +19397,7 @@ support for PHY interrupts and PHY IOCTLs. * configs/imxrt1050-evk/netnsh/defconfig: Disable LED support because pins conflict with PHY. Enable device statistics. Enable NSH ifup and ifdown - commmands. Add an NSH configuration for testing Ethernet. From Gregory + commands. Add an NSH configuration for testing Ethernet. From Gregory Nutt (2018-05-25). * configs/xmc4500-relax: Add board support for SPI From Alan Carvalho de Assis (2018-05-26). @@ -19723,7 +19723,7 @@ libdsp: fix phase shift in SMO observer libdsp: add more logic to FOC config/sim/dsptest: add dsptest configuration - libdsp/lib_motor.c: remove unused comparation + libdsp/lib_motor.c: remove unused comparison libdsp/lib_observer.c: update some comments From Mateusz Szafoni (2018-07-07). * drivers/leds/pca9635pw.c and @@ -19925,7 +19925,7 @@ This update is required to be serialized to the instruction stream meaning that after this update completes, it takes effect immediately and no exceptions of lower priority than the new boosted priority can - pre-empt execution. Because of this erratum, the priority boosting + preempt execution. Because of this erratum, the priority boosting does not take place immediately, allowing the instruction after the MSR to be interrupted by an exception of lower priority than the new boosted priority. This effect is only limited to the next @@ -21028,7 +21028,7 @@ * drivers/mtd/s25fl1.c: During a MTDIOC_GEOMETRY ioctl call, the driver was incorrectly reporting the blocksize to be the same as the erasesize. The blocksize should be 256 (the page size). This patch fixes that, and now - the SmartFS configration is working. From Ken Pettit (2018-10-18). + the SmartFS configuration is working. From Ken Pettit (2018-10-18). * configs/bambino-200e/include/board.h: Correct calculation of SDMMC clock configuration. The LPC43 has no SDMMC source clock divider. Error noted by Dave Marples. From Gregory Nutt (2018-10-18). @@ -21533,8 +21533,8 @@ - include/nuttx/clock.h: Fix uptime wrong if DEBUG_FEATURES and SCHED_TICKLESS enabled - - iinclude/nuttx/arch.h: fix CONFIG_ARCH_INTERRUPTSTACK not defined warning - - iinclude/nuttx/audio/audio_i2s.h: Fix warning: struct i2s_dev_s declared + - include/nuttx/arch.h: fix CONFIG_ARCH_INTERRUPTSTACK not defined warning + - include/nuttx/audio/audio_i2s.h: Fix warning: struct i2s_dev_s declared inside parameter list From Xiang Xiao (2018-11-09). @@ -21910,7 +21910,7 @@ hard fault. From Matous Pokorny (2018-11-21). * arch/mips/src/pic32m[x|z]/pic32m[x|z]-ethernet.c: Fix a comparison in a debug assertion. Should be <= vs <. Noted by Anonymous in Bitbucket - Isue 134. From Gregory Nutt (2018-11-21). + Issue 134. From Gregory Nutt (2018-11-21). * sched/signal/sig_timedwait.c: Remove unnecessary disable of pre-emption. From Gregory Nutt (2018-11-23). * libs/libc/netdb: Support multiple IP addresses per hostname From Juha @@ -21931,7 +21931,7 @@ update to low-level ops - arch/src/arm/stm32: remove redundant stm32f33xxx_dma.c - arch/arm/src/stm32/stm32f40xxx_dma.c: add interfaces to interact with - highp priority DMA interupts + high priority DMA interrupts - arch/src/arm/stm32/stm32_hrtim: do not enable timers on startup if option from Kconfig selected and add interface to enable/disable timers - configs/nucleo-f334r8/highpri: update configuration due to changes in @@ -22200,7 +22200,7 @@ (2018-12-16). * Fix lc823450 related: - configs/lc823450-xgevk: Fix IOB params in rndis/defconfig. These - prameters work for HTTP audio streaming. + parameters work for HTTP audio streaming. - arch/arm/src/lc823450: Fix up_allocate_heap() in lc823450_allocateheap2.c. This change fixes heap size and also implements up_addregion(). From Masayuki Ishikawa (2018-12-18). @@ -22234,7 +22234,7 @@ is only true in the single CPU configuration. In multiple CPU configurations, there will be a separate IDLE task for each CPU with a different PID and an alternative check must be used. NOTE: The logic - fixed in somes places still lacks sufficient intelligence to find the + fixed in some places still lacks sufficient intelligence to find the right stack for the CPU IDLE thread and could still show the wrong stack. From Gregory Nutt (2018-12-18). * Change RNDIS mac: @@ -22485,7 +22485,7 @@ poll() method. From Ken Pettit (2019-01-08). * drivers/timers/mcp794xx.c: Rename the module to mcp794xx. From Ouss4 (2019-01-08). - * Revert "arch/: The protoype of mpu_log2regionfloor() changed; an + * Revert "arch/: The prototype of mpu_log2regionfloor() changed; an additional parameter was added. However, none of the calls to mpu_log2regionfloor() were updated to pass the new, additional parameter." Commit 8b63d0230936bd7d6bd94f4c76b9402946f69b21 was @@ -22697,7 +22697,7 @@ LPC17_SYSCON_PCLKSEL with only single divisor. From Pavel Pisa (2019-01-25). * arch/arm/src/tiva/cc13xx/cc13x2_v1_trim.c and cc13x2_cc26x2_v1_rom.c: - Review and modified for coding style. Now pass tools/nxstyle wihout + Review and modified for coding style. Now pass tools/nxstyle without complaint. From Gregory Nutt (2019-01-25). * arch/xxx/include/: Remove watchdog.h and arm-elf.h because they are empty. The arm-elf header file was never used; the empty watchdog.h @@ -22754,7 +22754,7 @@ libs/libc/machine and in order to avoid the conflict with the 3rd party libraries and clean up the file inclusion: (1) Remove redundant elf32.h, (2) Remove nuttx/binfmt/elf.h in libs/libc/machine, (2) Remove - nuttx/binfmt/elf.h in modlib, and (4) Rmove nuttx/module.h in modlib. + nuttx/binfmt/elf.h in modlib, and (4) Remove nuttx/module.h in modlib. From Xiang Xiao (2019-01-26). * Kconfig files, binfmt/libelf, libs/libc/machin, libs/libxx: Correct libcxx exception handling by introducing the generic @@ -22897,7 +22897,7 @@ remove mtd byte read/write requirement. From Xiang Xiao (2019-01-27). * arch/arm/src/am335x/am335x_serial.c: Eliminate an error 'TIOCSBRK undeclared. From Gregory Nutt (2019-01-27). - * Every file that uses serial IOCTLs (TIOC*) must explicity include + * Every file that uses serial IOCTLs (TIOC*) must explicitly include nuttx/fs/ioctl.h. This was included previously via sneak path in the now deleted arch/serial.h. From Gregory Nutt (2019-01-27). * arch/arm/src/lpc17xx/lpc176x_clockconfig.c: The code preserves @@ -23136,7 +23136,7 @@ extending the flag variable). From Johannes (2019-02-17). * tools/nxstyle.c: Beef up logic that detects multiple variable definitions per line. From Gregory Nutt (2019-02-17). - * libs/libc/stdio: This commits makes the nano-printf the defualt logic + * libs/libc/stdio: This commits makes the nano-printf the default logic for the printf family. The legacy printf is still available via CONFIG_LIBC_PRINT_LEGACY. This commit also modifies the nano-prinf configure: The PRINT_LEVEL is not long selectable. Instead, a not @@ -23180,7 +23180,7 @@ bus error. From David Sidrane (2019-02-19). * arch/arm/src/stm32h7 and stm32l4: Apply David Sidrane's fix for the STM32F7 to the STM32L4 and STM32H7. The same change might be - appropropriate to STMF0/LO and STM32, but the patch does not apply + appropriate to STMF0/LO and STM32, but the patch does not apply cleanly. It would have to be manually checked. From Gregory Nutt (2019-02-19). * libs/libc/stdio/Kconfig: CONFIG_LIBC_NUMBERED_ARGS now depends on @@ -23214,7 +23214,7 @@ because it is not C89 compatible. From Gregory Nutt (2019-02-21). * imxrt_adc: Error in offset From David Sidrane (2019-02-22). * drivers/net/tun.c: Re-order all TUN/TAP driver state data. Not only - was was with wasting memory due to alignement requirements, it was also + was was with wasting memory due to alignment requirements, it was also causing network packet buffers to be improperly aligned causing problems because the network requires 16-bit packet buffer alignment for uint16_t accesses. This alignment problem was discovered by Alan @@ -23309,7 +23309,7 @@ - arch/arm/src/stm32h7/chip/stm32h7x3xx_dmamux.h: add DMAMAP definitions for MDMA, DMA1, DMA2 and BDMA - arch/arm/src/stm32h7/chip/stm32h7x3xx_memorymap.h: fix AHB1 base - adresses and add some address blocks + addresses and add some address blocks - arch/arm/src/stm32h7/chip/stm32h7x3xx_rcc.h: fix some definitions to match other STM32 ports - arch/arm/src/stm32h7/stm32_allocateheap.c: use SRAM from D2 domain @@ -23334,7 +23334,7 @@ de Assis (2019-03-03). * arch/arm/src/imxrt and configs/imxrt1050-evk: Adds framebuffer support for thje i.MXRT 1050. Includdd DCD initialization for SDRAM to provide - space for the framebufer. External code I used/ported is from NXP and + space for the framebuffer. External code I used/ported is from NXP and is BSD 3-clause license. From Johannes (2019-03-04). * - libs/libc/pthread/pthread_spinlock.c: Resolve several TODO issues by accessing up_testset() via the boardctl() interface rather than @@ -23418,7 +23418,7 @@ change in USBDEV_TRACE_INITIALIDSET From Mateusz Szafoni (2019-03-10). * arch/arm/src/imxrt/imxrt_clockconfig.c: If SDRAM is activated it was - only running at 40MHz. This was becaus imxrt_clockconfig.c changed the + only running at 40MHz. This was because imxrt_clockconfig.c changed the SEMC clock divider after the DCD was configured. This commit corrects that. From Johannes (2019-03-10). * configs/omnibusf4/README.txt: Add README file for OmnibusFS target. @@ -23708,7 +23708,7 @@ * libs/libnx/nxmu/nx_filltrapezoid.c: Fix a coordinate system error. When no clipping rectangle is falls, it falls back to use the entire window as for the clip. However, that window must then then be in - window relative coordinates, not in absoute device coordinates. From + window relative coordinates, not in absolute device coordinates. From Gregory Nutt (2019-03-20). * configs/lpcxpresso-lpc54628: Add a configuration for apps/examples/pwlines. From Gregory Nutt (2019-03-20). @@ -23914,7 +23914,7 @@ (2019-04-08). * graphics/nxbe: Correct some experimental cursor drawing algorithms. From Gregory Nutt (2019-04-08). - * grahics/nxglib/nxglib.h: Move internal function prototypes from + * graphics/nxglib/nxglib.h: Move internal function prototypes from include/nuttx/nx/nxglib.h to graphics/nxglib/nxglib.h. From Gregory Nutt (2019-04-08). * Support for STM32L071X and a few improvements for STM32F0L0: @@ -24252,8 +24252,8 @@ * sched/signal/sig_default.c: The abnormal termination handler was just calling exit() conditionally when, for example, Ctrl-C is sent to a task. The abnormal termination handler must obey the rules of - cancellation points: If cancelation is disabled, then the abnormal - termination logic must wait for cancelation to be re-enabled; If + cancellation points: If cancellation is disabled, then the abnormal + termination logic must wait for cancellation to be re-enabled; If cancellation is deffered then the abnormal termination logic may have to wait for the victim task to enter or exit a cancellation point. From Gregory Nutt (2019-05-17). @@ -24685,7 +24685,7 @@ From Gregory Nutt (2019-06-23). * configs/spresense: Add I2CTOOL support and extend GPIO for future use; add delay support for cxd56xx chip; for development is useful to - register I2C busses when the I2CTOOL is built; Enable GPIO interface on + register I2C buses when the I2CTOOL is built; Enable GPIO interface on spresense board. From Alin Jerpelea (2019-06-24). * arch/arm/src/efm32/efm32_usbhost: Apply Adam Porter's STM32 fix to EFM32 which has the same IP. From Gregory Nutt (2019-06-24). @@ -25203,7 +25203,7 @@ From Masayuki Ishikawa (2019-07-30). * libs/libc/machine/arm/armv7-m: Fix build error for elf From Masayuki Ishikawa (2019-07-30). - * Documenation/, configs/: Fix typos and one HTML syntax error. Fix + * Documentation/, configs/: Fix typos and one HTML syntax error. Fix HTML syntax error in Documentation/NfsHowto.html: -> html tag. From Nathan Hartman (2019-07-30). * fs/dirent/fs_opendir.c: Fix typo and style. opendir() did set errno @@ -26016,7 +26016,7 @@ and common folders we are moving the BOARD_DIR path up one level. - tools: Add drivers/platform symlink. Link the boards///drivers dir to drivers/platform - - drivers: Add platform specifc drivers extension. There are + - drivers: Add platform specific drivers extension. There are platforms that use specific drivers and we should be able to include those drivers in the build. - board: cxd56xx: drivers: add AK09912 driver for SCU. This is a @@ -26152,7 +26152,7 @@ assembly language changes to numerous architectures. Better to get more creative. Rather than extend the maximum number of parameters across all architectures, I opted instead to marshal the seven - parameters into a structure and pass only a signle parameter: A + parameters into a structure and pass only a single parameter: A pointer to the structure containing the seven marshaled parameters. From Gregory Nutt (2019-08-23). * STM32H7: Memory Map DBGMCU is @ 0x5c001000 From David Sidrane @@ -26599,9 +26599,9 @@ From Xiang Xiao (2019-09-18). * stm32h7 SDMMC support IDMA, Interrupt driven, pullups and SDIO - stm32h7: Supports ARMV7M Stack check - - stm32h7: sdmmc bug fix writting address 0 + - stm32h7: sdmmc bug fix writing address 0 - stm32h7: sdmmc Clean up timming - - stm32f7: Kconfig typos, formating + - stm32f7: Kconfig typos, formatting - stm32f7: sdmmc use binary not - stm32f7: nxstyle formatting - stm32h7: SDMMC Kconfig add Block Setup, Preflight, Delayed Invalidate @@ -26702,7 +26702,7 @@ that the initial value of the LNA power is off by default. - boards: cxd56xx: Remove initial setting of PIN_AP_CLK. PIN_AP_CLK is used as a port selector of SDIO expander on the extension board, - and is set output low in initalizing. Therefore, this pin cannot be + and is set output low in initializing. Therefore, this pin cannot be used for other board. To avoid this restriction, remove this initial operation because this pin is pulled down by default on the extension board. From Alin Jerpelea (2019-09-26). @@ -26826,7 +26826,7 @@ other SMP architectures as well. From Gregory Nutt (2019-10-04). * sched/wdog/wd_start.c: Back out a kludge-workaround for an SDCC compiler problem fix back in Feb 2017. That workaround now appears to - conflict with newer GCC versions using unsupport warning options. + conflict with newer GCC versions using unsupported warning options. From Gregory Nutt (2019-10-04). * drivers/wireless/bluetooth/bt_uart_bcm4343x.c: BCM4343x HCIUART support. From Dave Marples (2019-10-04). @@ -26876,7 +26876,7 @@ (2019-10-08). * boards: spresense: add audio implementation - boards: arm: cxd56xx: add audio implementation. Add the board audio - control implemantation + control implementation - boards: arm: cxd56xx: update audio defconfig. Small updates to build the platforms specific audio driver - boards: arm: cxd56xx: drivers: add audio implementation. Add the @@ -26906,7 +26906,7 @@ math library is also needed, however, here are various ways to provide a math library so CONFIG_LIBM is not now set. boards/arm/stm32l4/nucleo-l476rg/scripts/Make.defs: Add required - definitiions if libcxx is enabled. + definitions if libcxx is enabled. From Matias N (2019-10-12). * Fix posix spawn - boards: lc823450-xgevk: Fix build error for posix_spawn @@ -27038,9 +27038,9 @@ used when CONFIG_HIDKBD_NODEBOUNCE is undefined. From Jeff Theusch (2019-10-23). * boards: cxd56xx: spresense: add Spresense Image Processor. Enable - support for accelerated format convertor, rotation and so on.using the + support for accelerated format converter, rotation and so on.using the CXD5602 image processing accelerator. - boards:cxd56xx:spresense: initalize GNSS and GEOFENCE at boot. Add + boards:cxd56xx:spresense: initialize GNSS and GEOFENCE at boot. Add the optional initialization of GNSS and GEOFENCE at bootif the drivers are enabled. From Alin Jerpelea (2019-10-23). @@ -27052,7 +27052,7 @@ IMXRT1060-EVK. From Fabio Balzano (2019-10-23). * boards/arm/imxrt/imxrt1060-evk: Added Littlevgl demo configuration into imxrt1060-evk board directory. From Fabio Balzano (2019-10-23). - * boards/arm/imxrt/imxrt1060-evk/README.txt: Fix typos and whitspace + * boards/arm/imxrt/imxrt1060-evk/README.txt: Fix typos and whitespace problems in README file. From Fabio Balzano (2019-10-23). * boards/arm/imxrt/imxrt1060-evk/README.txt: Added instructions to run the LVGL demo. From Gregory Nutt (2019-10-23). @@ -27204,7 +27204,7 @@ * NXP k66 Ethernet - Kinetis:Add TJA1100 Phy - Kinetis:enet.c formatted with nxstyle - - net:mii Cleanup TJA1100 Support. Formating and adding mask and + - net:mii Cleanup TJA1100 Support. Formatting and adding mask and shifts. - net:Kconfig Cleanup formatting. From David Sidrane (2019-10-30). @@ -27310,7 +27310,7 @@ prevent O_TRUNC. From Juha Niskanen (2019-11-05). * fs/smartfs/smartfs_smart.c: Honor O_APPEND on writes. Also document pwrite() bug/limitation. From Juha Niskanen (2019-11-05). - * sched/sched/sched_waitpid.c: Fix null pointer derefence on race + * sched/sched/sched_waitpid.c: Fix null pointer dereference on race without DEBUG_ASSERT. From David Alessio (2019-11-05). * boards/arm/stm32h7/nucleo-h743zi/src: Added gpio-device-driver for userspace apps. From Heiko Demlang (2019-11-05). @@ -27569,7 +27569,7 @@ * libs/libc/stdio/lib_getdelim.c: Add implementations of the POSIX functions getdelim() and getline(). From Gregory Nutt (2019-11-12). * libs/libc/stdio/lib_libfgets.c: Because of how the function is - defined, getline() canot be used on platforms that use CR-LF line + defined, getline() cannot be used on platforms that use CR-LF line terminations. From Gregory Nutt (2019-11-12). * include/sys/time.h, libs/libc/unistd, sched/timer: Implement alarm(), setitimer() and getitimer() APIs. From liuhaitao diff --git a/Documentation/NXGraphicsSubsystem.html b/Documentation/NXGraphicsSubsystem.html index 89c695da8ea..8ce2b5603ee 100644 --- a/Documentation/NXGraphicsSubsystem.html +++ b/Documentation/NXGraphicsSubsystem.html @@ -304,7 +304,7 @@ NX supports any graphics device either of two device interfaces:
  • - Any device with random accesss video memory using the NuttX framebuffer driver interface + Any device with random access video memory using the NuttX framebuffer driver interface (see include/nuttx/video/fb.h).
  • @@ -370,7 +370,7 @@

    NX is the tiny NuttX windowing system for raw windows (i.e., simple regions of graphics memory). - NX includes a small-footprint, multi-user implentation (NXMU as described below). + NX includes a small-footprint, multi-user implementation (NXMU as described below). NX can be used without NxWidgets and without NXTOOLKIT for raw window displays.

    @@ -642,7 +642,7 @@ void nxgl_rectunion(FAR struct nxgl_rect_s *dest,

Description: - Given two rectanges, src1 and src2, return the larger rectangle that + Given two rectangles, src1 and src2, return the larger rectangle that contains both, dest.

@@ -1023,7 +1023,7 @@ int nxmu_start(int display, int plane); In it is especially useful for setting up board operational and test configurations.

- When called with the cmd of BOARDIOC_NX_START, then the boardctl() will call nxmu_start indirectly on behalf of the appication. + When called with the cmd of BOARDIOC_NX_START, then the boardctl() will call nxmu_start indirectly on behalf of the application. In this case the arg parameter is ignored.

@@ -1872,7 +1872,7 @@ bool nx_ishidden(NXWINDOW hwnd); Input Parameters:

    hwnd -
    The handle returned by nx_openwindow() that indentifies the window to be queried. +
    The handle returned by nx_openwindow() that identifies the window to be queried.

@@ -2278,7 +2278,7 @@ int nx_mousein(NXHANDLE handle, nxgl_coord_t x, nxgl_coord_t y, uint8_t buttons) as well as mouse and keyboard inputs. The client sub-window callbacks are registered when the framed window is created with a call to nxtk_openwindow(); - Separate toolbar sub-window callbakcs are reigistered when the toolbar + Separate toolbar sub-window callbacks are reigistered when the toolbar is added using nxtk_opentoolbar(). (NOTES: (1) only the client sub-window receives keyboard input and, (2) border callbacks are not currently accessible by the user). @@ -2685,7 +2685,7 @@ bool nxtk_ishidden(NXTKWINDOW hfwnd); Input Parameters:

    hfwnd -
    The handle returned by nxtk_openwindow() that indentifies the window to be queried. +
    The handle returned by nxtk_openwindow() that identifies the window to be queried.

@@ -3600,7 +3600,7 @@ int nxcursor_setimage(NXHANDLE hnd, FAR const struct nx_cursorimage_s *image); Set the cursor image.

- The image is provided a a 2-bits-per-pixel image. The two bit incoding is as followings: + The image is provided a a 2-bits-per-pixel image. The two bit incoding is as following:

    00 - The transparent background.
    @@ -3768,7 +3768,7 @@ int nxcursor_setposition(NXHANDLE hnd, FAR const struct nxgl_point_s *pos);
    Enables overall support for graphics library and NX
    CONFIG_NX_RAMBACKED
    Enables RAM backed window support. - If this option is selected, then windows may be optionally created with a RAM frambuffer backing up the window content. + If this option is selected, then windows may be optionally created with a RAM framebuffer backing up the window content. Rending into the window will result in rending into the backup framebuffer, then updating the physical display from the framebuffer.

    The advantage of this option is that the application that manages window will no longer receive redraw() callbacks. @@ -4019,7 +4019,7 @@ int nxcursor_setposition(NXHANDLE hnd, FAR const struct nxgl_point_s *pos);

    Font Installation Steps, Below are general instructions for creating and installing a new font in the NX graphic system. - The first two steps only appy if you are using the BDF font converter program. + The first two steps only apply if you are using the BDF font converter program.

    1. diff --git a/Documentation/NuttShell.html b/Documentation/NuttShell.html index c1a10cb4c82..2f98ac7d12e 100644 --- a/Documentation/NuttShell.html +++ b/Documentation/NuttShell.html @@ -178,7 +178,7 @@
      - 2.17 Dump Buffered SYSLOG Ouput (dmesg) + 2.17 Dump Buffered SYSLOG Output (dmesg) @@ -1674,7 +1674,7 @@ dirname <path>
      -

      2.17 Dump Buffered SYSLOG Ouput (dmesg)

       +

      2.17 Dump Buffered SYSLOG Output (dmesg)
      diff --git a/Documentation/NuttX.html b/Documentation/NuttX.html index c211083f4a5..37925e9a6f6 100644 --- a/Documentation/NuttX.html +++ b/Documentation/NuttX.html @@ -554,7 +554,7 @@

      -

    2. ROMFS filesystem support (XIP capabable).
      3. +
    3. ROMFS filesystem support (XIP capable).

      4. @@ -2143,7 +2143,7 @@

      MoxaRT A port to the Moxa NP51x0 series of 2-port advanced RS-232/422/485 serial device servers was contributed by Anton D. Kachalov in NuttX-7.11. - This port includes a NuttShell (NSH) configuraion with support for the Faraday FTMAC100 Ethernet MAC Driver. + This port includes a NuttShell (NSH) configuration with support for the Faraday FTMAC100 Ethernet MAC Driver.

      @@ -2514,7 +2514,7 @@ STATUS: The basic, minimal port is code complete and introduced in NuttX-7.15, but had not yet been tested at that time due to the inavailability of hardware. This basic port was verified in the NuttX-7.16 release, however. - The port is still mininal and more device drivers are needed to make the port usable. + The port is still minimal and more device drivers are needed to make the port usable.

      Basic support of NuttX running in SMP mode on the i.MX6Q was also accomplished in NuttX-7.16. @@ -2560,7 +2560,7 @@

      TI/Hercules TMS570LS31xx. - Archicture support for the TMS570LS3137ZWT part was added in NuttX 7.25 by Ivan Ucherdzhiev. + Architecture support for the TMS570LS3137ZWT part was added in NuttX 7.25 by Ivan Ucherdzhiev. Ivan also added support for the TI Hercules TMS570LS31x USB Kit.

        @@ -2918,7 +2918,7 @@ nsh>

        TI/Stellaris LM3S6965. - This port uses the Stellaris LM3S6965 Ethernet Evalution Kit with a GNU arm-nuttx-elf toolchain* + This port uses the Stellaris LM3S6965 Ethernet Evaluation Kit with a GNU arm-nuttx-elf toolchain* under either Linux or Cygwin.

          @@ -2953,7 +2953,7 @@ nsh>

          TI/Stellaris LM3S8962. - This port uses the Stellaris EKC-LM3S8962 Ethernet+CAN Evalution Kit with a GNU arm-nuttx-elf toolchain* + This port uses the Stellaris EKC-LM3S8962 Ethernet+CAN Evaluation Kit with a GNU arm-nuttx-elf toolchain* under either Linux or Cygwin. Contributed by Larry Arnold.

          @@ -4674,7 +4674,7 @@ nsh> Other software that supports the OmnibusF4 family include Betaflight, iNAV, and many others. PX4 recently added support as well, also based on NuttX. No code from those resources is included in this port. - The OmnibusF4 specifcation mandates the InvenSense MPU6000 which is included in NuttX-7.29 along with a driver for the MAX7546 OSD. + The OmnibusF4 specification mandates the InvenSense MPU6000 which is included in NuttX-7.29 along with a driver for the MAX7546 OSD.

          @@ -6100,7 +6100,7 @@ Mem: 29232 5920 23312 23312

        • NuttX-7.29. XBAR and OCOTP support was added in NuttX-7.28 by David Sidrane. - LCD Framebuffer suport was added by Johannes. + LCD Framebuffer support was added by Johannes.

        • @@ -6417,7 +6417,7 @@ Mem: 29232 5920 23312 23312

          QEMU/Bifferboard i486. This port uses the QEMU i486 and the native - Linux, Cywgin, MinGW the GCC toolchain under Linux or Cygwin. + Linux, Cygwin, MinGW the GCC toolchain under Linux or Cygwin.

            @@ -7229,7 +7229,7 @@ avr, m68k, m68hc11, m68hc12, m9s12, blackfin, m32c, h8, and SuperH ports.

          • MinGW-GCC. - MinGW-GCC is used to compiler the C tools in the nuttx/tools directory that are neede by the build. + MinGW-GCC is used to compiler the C tools in the nuttx/tools directory that are needed by the build. MinGW-GCC can be downloaded from http://www.mingw.org/. If you are using GNUWin32, then it is recommended that you not install the optional MSYS components as there may be conflicts.
            • @@ -7304,7 +7304,7 @@ if [ -x "$WINELOADER" ]; then exec "$WINELOADER" "$appname" "$@"; fi

            MSYS, however, cannot be used with the native Windows NuttX build because it will invoke the MSYS bash shell instead of the CMD.exe shell. - Use GNUWin32 in the native Windows build envionment. + Use GNUWin32 in the native Windows build environment.

            diff --git a/Documentation/NuttXBinfmt.html b/Documentation/NuttXBinfmt.html index 6d963c1c8af..766b96a6a6b 100644 --- a/Documentation/NuttXBinfmt.html +++ b/Documentation/NuttXBinfmt.html @@ -484,7 +484,7 @@ struct symtab_s
          • Fixed size arrays. - There is no explicit provisional for dyanamically adding or removing entries from the symbol table (realloc might be used for that purpose if needed). + There is no explicit provisional for dynamically adding or removing entries from the symbol table (realloc might be used for that purpose if needed). The intention is to support only fixed size arrays completely defined at compilation or link time.
    diff --git a/Documentation/NuttXCCodingStandard.html b/Documentation/NuttXCCodingStandard.html index 53519774ad9..610f29d7b3c 100644 --- a/Documentation/NuttXCCodingStandard.html +++ b/Documentation/NuttXCCodingStandard.html @@ -506,7 +506,7 @@

    Indentation Comments should, typically, be placed before the code section to which they apply. - The comment identation should be the same as the follow identation rules as the following code (if applicable). + The comment indentation should be the same as the follow indentation rules as the following code (if applicable).

    @@ -803,7 +803,7 @@ void some_function(void)

  • Compound Statements. - Within this document, an opening left brace followed by a sequence of statments, and ending with a closing right brace is referred to as a compound statement. + Within this document, an opening left brace followed by a sequence of statements, and ending with a closing right brace is referred to as a compound statement.
  • Nested Compound Statements. @@ -984,7 +984,7 @@ int animals(int animal)

    Indentation Unit. - Indentation is in units of two spaces; Each indentation level is twos spaces further to the right than the preceding identation levels. + Indentation is in units of two spaces; Each indentation level is twos spaces further to the right than the preceding indentation levels. TAB characters may not be used for indentation.

    @@ -1791,7 +1791,7 @@ enum xyz_state_e
  • Prefix. - Each related macro value should begin with an upper-case prefix that identifies the value as part of a set of values (and also to mimimize the likelihood of naming collisions). + Each related macro value should begin with an upper-case prefix that identifies the value as part of a set of values (and also to minimize the likelihood of naming collisions).
  • Single space after #define. @@ -2077,7 +2077,7 @@ ptr = (FAR struct somestruct_s *)value;
  • First definition or statement in column 3. The first data definitions or statements in the function body are idented by two spaces. - Standards for statements are covered in the following paragaraph + Standards for statements are covered in the following paragraph
  • Local variables first. diff --git a/Documentation/NuttXDemandPaging.html b/Documentation/NuttXDemandPaging.html index 48fa7de2491..caac5251a03 100644 --- a/Documentation/NuttXDemandPaging.html +++ b/Documentation/NuttXDemandPaging.html @@ -307,7 +307,7 @@

    The page fill worker thread will maintain a static variable called struct tcb_s *g_pftcb. If no fill is in progress, g_pftcb will be NULL. - Otherwise, it will point to the TCB of the task which is receiving the fill that is in progess. + Otherwise, it will point to the TCB of the task which is receiving the fill that is in progress.

      NOTE: @@ -336,7 +336,7 @@
    • Call the architecture-specific function up_fillpage(). - Two versions of the up_fillpage function are supported -- a blocking and a non-blocking version based upon the configuratin setting CONFIG_PAGING_BLOCKINGFILL. + Two versions of the up_fillpage function are supported -- a blocking and a non-blocking version based upon the configuration setting CONFIG_PAGING_BLOCKINGFILL.
      • If CONFIG_PAGING_BLOCKINGFILL is defined, then up_fillpage is blocking call. @@ -472,7 +472,7 @@ Chip specific logic will map the virtual and physical address spaces into three general regions:
        1. - A .text region containing "locked-in-memory" code that is always avaialable and will never cause a page fault. + A .text region containing "locked-in-memory" code that is always available and will never cause a page fault. This locked memory is loaded at boot time and remains resident for all time. This memory regions must include:
            diff --git a/Documentation/NuttxPortingGuide.html b/Documentation/NuttxPortingGuide.html index a5622976b95..c9e2d0c76d8 100644 --- a/Documentation/NuttxPortingGuide.html +++ b/Documentation/NuttxPortingGuide.html @@ -737,8 +737,8 @@ This port does not support interrupts or a real timer (and hence no round robin scheduler) Otherwise, it is complete. -

            NOTE: In principle, this user mode port should run in any POSIX environement. - This target will probably not run "out-of-the-box" in unverified POSIX environments due to the many host environemnt dependencies. +

            NOTE: In principle, this user mode port should run in any POSIX environment. + This target will probably not run "out-of-the-box" in unverified POSIX environments due to the many host environment dependencies.

          • arch/arm: @@ -2573,7 +2573,7 @@ config ARCH_SIM bool "Simulation" select ARCH_HAVE_TICKLESS ---help--- - Linux/Cywgin user-mode simulation. + Linux/Cygwin user-mode simulation.

          When the simulation platform is selected, ARCH_HAVE_TICKLESS is automatically selected, informing the configuration system that Tickless OS options can be selected. @@ -4055,7 +4055,7 @@ void nxsched_timer_expiration(void);

        2. Cancellation Points: - Many of the application OS interfaces are cancellation points, i.e., when the task is operating in defferred cancellation state, it cannot be deleted or cancelled until it calls an application OS interface that is a cancellation point. + Many of the application OS interfaces are cancellation points, i.e., when the task is operating in deferred cancellation state, it cannot be deleted or cancelled until it calls an application OS interface that is a cancellation point.

          The POSIX specification is very specific about this, specific both in identifying which application OS interfaces are cancellation points and specific in the fact that it is prohibited for any OS operation other than those listed in the specification to generate cancellation points. @@ -6716,7 +6716,7 @@ int syslog_initialize(void);

          1. Low-Level Serial Output. - If you are using a SYSLOG console channel (CONFIG_SYSLOG_CONSOLE) and if the underlying architecture supports the low-level up_putc() interface(CONFIG_ARCH_LOWPUTC), then the SYLOG logic will direct the output to up_putc() which is capable of generating the serial output within the context of an interrupt handler. + If you are using a SYSLOG console channel (CONFIG_SYSLOG_CONSOLE) and if the underlying architecture supports the low-level up_putc() interface(CONFIG_ARCH_LOWPUTC), then the SYSLOG logic will direct the output to up_putc() which is capable of generating the serial output within the context of an interrupt handler.

            There are a few issues in doing this however: @@ -6752,7 +6752,7 @@ int syslog_initialize(void);

          2. - Later, when the next normal syslog output is generated, it will first empty the content of the interrupt buffer to the SYSLOG device in the proper context. It will then be followed by the normal syslog output. In this case, the interrupt level SYSLOG output will interrupt the normal output stream and the interrupt level SYSLOG output will be inserted into the correct position in the SYSLOG output when the next normal SYLOG output is generated. + Later, when the next normal syslog output is generated, it will first empty the content of the interrupt buffer to the SYSLOG device in the proper context. It will then be followed by the normal syslog output. In this case, the interrupt level SYSLOG output will interrupt the normal output stream and the interrupt level SYSLOG output will be inserted into the correct position in the SYSLOG output when the next normal SYSLOG output is generated.

      diff --git a/Documentation/NuttxUserGuide.html b/Documentation/NuttxUserGuide.html index bb2f97da3b6..f0f861bdd99 100644 --- a/Documentation/NuttxUserGuide.html +++ b/Documentation/NuttxUserGuide.html @@ -615,8 +615,8 @@ VxWorks provides the following similar interface:

      Description: The task_setcancelstate() function atomically -sets both the calling task's cancelability state to the indicated -state and returns the previous cancelability state at the location +sets both the calling task's cancellability state to the indicated +state and returns the previous cancellability state at the location referenced by oldstate. Legal values for state are TASK_CANCEL_ENABLE and TASK_CANCEL_DISABLE.

      @@ -625,7 +625,7 @@ Any pending thread cancellation may occur at the time that the cancellation state is set to TASK_CANCEL_ENABLE.

      -The cancelability state and type of any newly created tasks are TASK_CANCEL_ENABLE and TASK_CANCEL_DEFERRED respectively. +The cancellability state and type of any newly created tasks are TASK_CANCEL_ENABLE and TASK_CANCEL_DEFERRED respectively.

      Input Parameters:

      @@ -664,11 +664,11 @@ No thread could be found corresponding to that specified by the given thread ID.

      Description: -The task_setcanceltype() function atomically both sets the calling task's cancelability type to the indicated type and returns the previous cancelability type at the location referenced by oldtype. +The task_setcanceltype() function atomically both sets the calling task's cancellability type to the indicated type and returns the previous cancellability type at the location referenced by oldtype. Legal values for type are TASK_CANCEL_DEFERRED and TASK_CANCEL_ASYNCHRONOUS.

      -The cancelability state and type of any newly created tasks are TASK_CANCEL_ENABLE and TASK_CANCEL_DEFERRED respectively. +The cancellability state and type of any newly created tasks are TASK_CANCEL_ENABLE and TASK_CANCEL_DEFERRED respectively.

      Input Parameters: @@ -712,7 +712,7 @@ No thread could be found corresponding to that specified by the given thread ID.

      The task_testcancel() function creates a Cancellation Point in the calling task. -The task_testcancel() function has no effect if cancelability is disabled. +The task_testcancel() function has no effect if cancellability is disabled.

      Input Parameters: None @@ -902,7 +902,7 @@ int exec(FAR const char *filename, FAR char * const *argv,

      POSIX Compatibility: - This is a non-standard inteface unique to NuttX. + This is a non-standard interface unique to NuttX. Motivation for inclusion of this non-standard interface in certain build modes is discussed above.

      @@ -1005,7 +1005,7 @@ int execl(FAR const char *path, ...);

      Description: execl() is functionally equivalent to execv(), differing only in the form of its input parameters. - See the decription of execv() for additional information. + See the description of execv() for additional information.

      Input Parameters: @@ -1019,7 +1019,7 @@ int execl(FAR const char *path, ...);

      • ...: - A list of the string arguments to be recevied by the program. + A list of the string arguments to be received by the program. Zero indicates the end of the list.
    @@ -2254,7 +2254,7 @@ priority of the calling task is returned.

    CONFIG_SCHED_CHILD_STATUS If this option is selected, then the exit status of the child task will be retained after the child task exits. - This option should be selected if you require knowledge of a child process' exit status. + This option should be selected if you require knowledge of a child process's exit status. Without this setting, wait(), waitpid() or waitid() may fail. For example, if you do:

    @@ -2752,7 +2752,7 @@ on this thread of execution. Assumptions/Limitations:

    POSIX Compatibility: Comparable to the ISO C interface of the same name. - Limitiations in the current implementation: + Limitations in the current implementation:

    1. Only a single atexit function can be registered unless CONFIG_SCHED_ATEXIT_MAX defines a larger number.
      2. @@ -3014,7 +3014,7 @@ interface of the same name. This is because the interrupt handler does not have the option of waiting for the message queue to become non-full.
    2. - It doesn't allocate new memory (because you cannot allocate memory from an interrup handler). + It doesn't allocate new memory (because you cannot allocate memory from an interrupt handler). Instead, there are are pool of pre-allocated message structures that may be used just for sending messages from interrupt handlers. The number of such pre-allocated messages is a configuration parameter.
      3. @@ -5260,8 +5260,8 @@ Differences from the POSIX implementation include: The sigset() function will modify signal dispositions. The signo argument specifies the signal. The disp argument specifies the signal's disposition, which may be SIG_DFL, SIG_IGN, or the address of a signal handler. - If disp is the address of a signal handler, the system will add signo to the calling process' signal mask before executing the signal handler; when the signal handler returns, the system will restore the calling process' signal mask to its state prior to the delivery of the signal. - signo will be removed from the calling process' signal mask. + If disp is the address of a signal handler, the system will add signo to the calling process's signal mask before executing the signal handler; when the signal handler returns, the system will restore the calling process's signal mask to its state prior to the delivery of the signal. + signo will be removed from the calling process's signal mask.

      NOTE: The value SIG_HOLD for disp is not currently supported. @@ -5341,7 +5341,7 @@ interface of the same name.

      -Description: The sighold() function will add signo to the calling process' signal mask +Description: The sighold() function will add signo to the calling process's signal mask

      Input Parameters: @@ -5365,7 +5365,7 @@ interface of the same name.

      -Description: The sighold() function will remove signo from the calling process' signal mask +Description: The sighold() function will remove signo from the calling process's signal mask

      Input Parameters: @@ -5474,8 +5474,8 @@ is required in the present implementation (even if the signal is ignored).

      -Description: The sigpause()) function will remove signo) from the calling process' signal mask and suspend the calling process until a signal is received. -The sigpause()) function will restore the process' signal mask to its original state before returning. +Description: The sigpause()) function will remove signo) from the calling process's signal mask and suspend the calling process until a signal is received. +The sigpause()) function will restore the process's signal mask to its original state before returning.

      Input Parameters:

        @@ -6329,14 +6329,14 @@ interface of the same name. Description:

        The pthread_cancel() function will request that thread be canceled. -The target thread's cancelability state, enabled, or disabled, determines when the cancellation takes effect: When the cancellation is acted on, thread will be terminated. -When cancelability is disabled, all cancellations are held pending in the target thread until the thread re-enables cancelability.

        +The target thread's cancellability state, enabled, or disabled, determines when the cancellation takes effect: When the cancellation is acted on, thread will be terminated. +When cancellability is disabled, all cancellations are held pending in the target thread until the thread re-enables cancellability.

        -

        The target thread's cancelability state determines how the cancellation is acted on: +

        The target thread's cancellability state determines how the cancellation is acted on: Either asychronrously or deferred. Asynchronous cancellations we be acted upon immediately (when enabled), interrupting the thread with its processing in an abritray state.

        -

        When cancelability is deferred, all cancellations are held pending in the target thread until the thread changes the cancelability type or a Cancellation Point function such as pthread_testcancel() is entered.

        +

        When cancellability is deferred, all cancellations are held pending in the target thread until the thread changes the cancellability type or a Cancellation Point function such as pthread_testcancel() is entered.

        Input Parameters: @@ -6376,8 +6376,8 @@ These destructors are not currently supported.

        The pthread_setcancelstate() function atomically -sets both the calling thread's cancelability state to the indicated -state and returns the previous cancelability state at the location +sets both the calling thread's cancellability state to the indicated +state and returns the previous cancellability state at the location referenced by oldstate. Legal values for state are PTHREAD_CANCEL_ENABLE and PTHREAD_CANCEL_DISABLE.

        @@ -6421,11 +6421,11 @@ interface of the same name.

        Description: -The pthread_setcanceltype() function atomically both sets the calling thread's cancelability type to the indicated type and returns the previous cancelability type at the location referenced by oldtype. +The pthread_setcanceltype() function atomically both sets the calling thread's cancellability type to the indicated type and returns the previous cancellability type at the location referenced by oldtype. Legal values for type are PTHREAD_CANCEL_DEFERRED and PTHREAD_CANCEL_ASYNCHRONOUS.

        -The cancelability state and type of any newly created threads are PTHREAD_CANCEL_ENABLE and PTHREAD_CANCEL_DEFERRED respectively. +The cancellability state and type of any newly created threads are PTHREAD_CANCEL_ENABLE and PTHREAD_CANCEL_DEFERRED respectively.

        Input Parameters: @@ -6464,7 +6464,7 @@ returned to indicate the error.

        The pthread_testcancel() function creates a Cancellation Point in the calling thread. -The pthread_testcancel() function has no effect if cancelability is disabled. +The pthread_testcancel() function has no effect if cancellability is disabled.

        Input Parameters: None @@ -9771,7 +9771,7 @@ ssize_t recvfrom(int sockfd, void *buf, size_t len, int flags, Returned Value: On success, returns the number of characters sent. If no data is available to be received and the peer has performed an orderly shutdown, recv() will return 0. - Othwerwise, on errors, -1 is returned, and errno is set appropriately: + Otherwise, on errors, -1 is returned, and errno is set appropriately:

        • EAGAIN. diff --git a/Kconfig b/Kconfig index cc6a50509dc..7d178c66b24 100644 --- a/Kconfig +++ b/Kconfig @@ -64,7 +64,7 @@ config WINDOWS_NATIVE depends on EXPERIMENTAL ---help--- Build natively in a CMD.exe environment with Windows style paths - (like C:\cgywin\home) + (like C:\cygwin\home) The Windows native build is complete and available, but not often used or verified. As a consequence, it cannot be assured to be @@ -81,7 +81,7 @@ config WINDOWS_CYGWIN config WINDOWS_UBUNTU bool "Ubuntu under Windows 10" ---help--- - Build natively in an Ubuntu shell under Windoes 10 environment with + Build natively in an Ubuntu shell under Windows 10 environment with POSIX style paths (like /mnt/c/Program Files) config WINDOWS_MSYS @@ -89,7 +89,7 @@ config WINDOWS_MSYS select TOOLCHAIN_WINDOWS ---help--- Build natively in a Cygwin environment with POSIX style paths (like - /cygdrive/c/cgywin/home) + /cygdrive/c/cygwin/home) config WINDOWS_OTHER bool "Windows POSIX-like environment" diff --git a/README.txt b/README.txt index 4d870961b5f..d3b0dfe5b8d 100644 --- a/README.txt +++ b/README.txt @@ -232,7 +232,7 @@ Using MSYS 4. mklink /j programfiles86 "C:/Program\ Files\ \(x86\)" They then show up as /programfiles and /programfiles86 with the MSYS2 - sandbox. Thos paths can then be used with the PATH variable. I had + sandbox. Those paths can then be used with the PATH variable. I had to do something similar for the path to the GNU Tools "ARM Embedded Toolchain" which also has spaces in the path name. diff --git a/ReleaseNotes b/ReleaseNotes index e82d6c216aa..efba449ea87 100644 --- a/ReleaseNotes +++ b/ReleaseNotes @@ -2410,7 +2410,7 @@ Bugfixes, order roughly on decreasing criticality include: * NXFFS: Corrected critical bugs in initialization, some full FLASH handling, and errors in certain cases where the FLASH is repacked. - * ARM EABI: Fix stack aligment required for passing floating point values. + * ARM EABI: Fix stack alignment required for passing floating point values. * Build system: Fix build issues when g++ is used as the compiler. * NX Graphics: Bitmap error handling, correct RGB color conversion macros, Error when the background window is released. @@ -2531,7 +2531,7 @@ New features in this release include: formatting (Contributed by Mikhail Bychek) * Build. New targets apps_clean and apps_distclean to simplify working - with application diretories. + with application directories. Bugfixes include: @@ -2812,7 +2812,7 @@ New features and extended functionality: support for STMicro STMPE811 I/O Expander/touchscreen device. * STM32. Add support for the STM32 IWDG and WWDG watchodog timers. DMA - now supports cicular buffer mode; serial driver now uses circular + now supports circular buffer mode; serial driver now uses circular DMA to improve Rx performance (Contributed by Mike Smith). * STM3240G-EVAL Board. Add support for the LCD and for the STMPE811 @@ -3491,8 +3491,8 @@ Additional new features and extended functionality: available only for ARM7/9, ARMv7-M (Cortext-M3/4), and MIPS32 (PIC32MX) platforms. - exec() now sets the priority of the new task to the same priority as - the parent task (instead of the arbirtrary value of 50). - - New, partially complient implementations of execv() and execl(). + the parent task (instead of the arbitrary value of 50). + - New, partially compliant implementations of execv() and execl(). These are only partially compliant because they do not overlay any existing "process space" but rather create the new task and exit(). - Add a complete implementation of posix_spawn(). This standard @@ -3633,7 +3633,7 @@ Additional new features and extended functionality: * Build System: - Add an options to better manage toolchain prefixes. - - Redesigned how the context targer works in the apps/ directory. + - Redesigned how the context target works in the apps/ directory. The old design caused lots of problems when changing configurations because there is no easy way to get the system to rebuild the context. This change should solve most the problems and eliminate @@ -3914,9 +3914,9 @@ Additional new features and extended functionality: * Memory Management: - Extended to support multiple heaps. This is used as part of - the kernel build in order to support separater user- and + the kernel build in order to support separator user- and kernel-mode heaps. - - The stand-alone memory manger test had to be removed. It + - The stand-alone memory manager test had to be removed. It was too entangled and made extension of the memory manager nearly impossible. This is a loss. @@ -4093,7 +4093,7 @@ Additional new features and extended functionality: - Open1788: Basic support for the WaveShare Open1788 board is complete with working OS test, NSH, and graphics configurations. - Open1788: Integrated the LPC178x LCD driver with the WaveShare display. - Touchscreen support is included, howerver, there appears to be an + Touchscreen support is included, however, there appears to be an issue with the Open1788 touchscreen interrupt signal. - Open1788: Now supports SDRAM (used to provide the LCD framebuffer). - Open 1788: Reversed sense of the IDLE LCD. It is now off when the @@ -4117,7 +4117,7 @@ Additional new features and extended functionality: * STM32: - Added support for kernel mode build. - - Added architecure support for the STM32 F427/F437 chips. Contributed + - Added architecture support for the STM32 F427/F437 chips. Contributed by Mike Smith * STM32 Boards: @@ -4153,7 +4153,7 @@ Additional new features and extended functionality: * Tools: - kconfig2html is a new tool which will replace the hand-generated - documentation of the NuttX configruation variables with auto- + documentation of the NuttX configuration variables with auto- generated documentation. Efforts In Progress. The following are features that are partially @@ -5078,7 +5078,7 @@ Additional new features and extended functionality: * Kinetis KL Boards - - A new configuration called minnsh was added is an experiement to + - A new configuration called minnsh was added is an experiment to see how small we can get the NuttX footprint and still support NSH. From Alan Carvalho de Assis.. @@ -5126,7 +5126,7 @@ completed soon. Bugfixes (see the ChangeLog for details). Some of these are very important: - * Initialzation and Scheduling: + * Initialization and Scheduling: - IDLE thread initialization logic should not call group_setupidlefiles() if there are no file descriptors (and, hence, no file system). @@ -5394,7 +5394,7 @@ Additional new features and extended functionality: * NXP LPC31xx Boards: - - Board-specific USB host support for the Emedded Artists EA3131 board. + - Board-specific USB host support for the Embedded Artists EA3131 board. (Missing PCA9532 controls). - Add support for the Olimex LPC-H3131 board. Including USB host support (which does not depend on the PCA8532 interface). @@ -5644,7 +5644,7 @@ Additional new features and extended functionality: - Pattern matching logic extended to handle set of characters and ranges of character values. From Ken Pettit. - - sleep() and usleep() moved intot the C library. These are not + - sleep() and usleep() moved into the C library. These are not longer core OS interfaces; they are simple wrappers for the nanosleep(). - Add an implementation of gets_s(). @@ -6471,7 +6471,7 @@ Additional new features and extended functionality: * Applications: - prun: An NSH built-in application that can be used to run - Pascal P-Code programs either programatically or from the NSH + Pascal P-Code programs either programmatically or from the NSH command line. - netpkt: A "raw" socket test from Lazlo Sitzer. - hex2bin: A library and built-in task to convert from @@ -6497,7 +6497,7 @@ Bugfixes. Only the most critical bugfixes are listed here (see the ChangeLog fo * Networking: - - Modify TCP timout handling to provent situations where connections + - Modify TCP timeout handling to provent situations where connections may not be freed. From Max Holtzberg. - Improved TCP fallback allocation logic from Max Holtzberg. Also, fallback mechanism is disabled when SO_LINGER is to prevent @@ -6781,7 +6781,7 @@ Additional new features and extended functionality: * Applications: - - sysem/mdio: New PHY tool from Daniel Lazlo Sizter. + - system/mdio: New PHY tool from Daniel Lazlo Sizter. - NSH: Networking logic modified to handler the case of SLIP transport. From Max Neklyudov. - NSH: Add a configuration to use a USB keyboard for the stdin @@ -9946,7 +9946,7 @@ Additional new features and extended functionality: files. - VFS: The VFS was extended to support standard file operations on block drivers (open, close, read, write, etc.). The open() interface - accomplishes this by creating a temporary characer driver to mediate + accomplishes this by creating a temporary character driver to mediate the character oriented accesses to the block driver. - HOSTFS: Added a HOSTFS file system for use with the simulator. The HOSTFS file system mounts in the simulated Nuttx context by provides @@ -10066,7 +10066,7 @@ Additional new features and extended functionality: - bsearch(): Added the bsearch() function from NetBSD. - freopen(): Added support for freopen(). - - strftime(): Added day-of-week support (when avaialable). + - strftime(): Added day-of-week support (when available). * Tools: @@ -10173,7 +10173,7 @@ detailed bugfix information): * STMicro STM32 Boards: - - STM32F429i-Disco: Calculated partition boundries based on page + - STM32F429i-Disco: Calculated partition boundaries based on page block sizes but mtd_partition() is expecting calculations based on erase block size. From Alan Carvalho de Assis. @@ -10584,7 +10584,7 @@ Additional new features and extended functionality: * Tools: - - tools/refesh.sh now has a --silent option so that it can be used in + - tools/refresh.sh now has a --silent option so that it can be used in batch modes without human input. * Build System: @@ -10609,7 +10609,7 @@ Additional new features and extended functionality: - apps/examples/chat: Chat example contributed by Vladimir Komendantskiy. - - apps/sysem/ubloxmodem: Example to control the power + - apps/system/ubloxmodem: Example to control the power state of the modem in nsh. From Vladimir Komendantskiy. - apps/examples/leds: An example to demonstrate use of LED driver. - apps/examples/smp: Add a test to verify SMP configurations. @@ -11013,7 +11013,7 @@ detailed bugfix information): * Atmel SAMV7 Drivers: - SAMV7 TWIHS (as well as SAM3/4 and SAMA5: Ensure that the TWIHS - (i2c) hw get's its clock set when the sequence of + (i2c) hw gets its clock set when the sequence of sam_i2cbus_initialize(), sam_i2cbus_uninitialize(), then sam_i2cbus_initialize() or twi_reset() is called. I found this a while back in the stm32 family, so there may be more arch-es with @@ -11127,7 +11127,7 @@ Additional new features and extended functionality: fifo buffers. Adds mkfifo2() and pipe2() which are just like mkfifo() and pipe(), but allow control of the size of the underlying, in-memory circular buffer. Move pipe() and mkpipe() to the C library, they are - no longer core OS interfaces. Capability currenty used only by PTY + no longer core OS interfaces. Capability currently used only by PTY logic to support, configurable, smaller buffers for PTYs. * SYSLOG/Debug Output: @@ -11175,7 +11175,7 @@ Additional new features and extended functionality: * Simulation Platform: - - Added the simulated QSPI (N25Q) flash to the simulation and extened + - Added the simulated QSPI (N25Q) flash to the simulation and extended flash simulation capabilities to run with MTD drivers based on config options (currently m25p, sst26 and w25). From Ken Pettit. @@ -11206,7 +11206,7 @@ Additional new features and extended functionality: available in time - force CS active after transfer: this forces the CS to stay active after a transfer, even if the chip runs out of data. - Btw.: this is a prerequisit to make the LASTXFER bit working + Btw.: this is a prerequisite to make the LASTXFER bit working at all. - escape LASTXFER: this suppresses the LASTXFER bit at the end of the next transfer. The "escape"-Flag is reset automatically. @@ -11321,12 +11321,12 @@ Additional new features and extended functionality: Mateusz Szafoni. - Nucleo-144: Added USB OTG device to Nucleo-144. From David Sidrane. - Nucleo-144: Added bbsram test to Nucleo-144. From David Sidrane. - - STM32F4 Disovery: Add CAN support for STM32F4 Discovery. From + - STM32F4 Discovery: Add CAN support for STM32F4 Discovery. From Matthias Renner. - - STM32F4 Disovery: added a canard configuration files. From + - STM32F4 Discovery: added a canard configuration files. From Matthias Renner. - STM32F4 Discovery: Add FPU support for ostest for the STM32F4 - Disovery platform. From David Alessio. + Discovery platform. From David Alessio. - STM32L476 Discovery: Update stm32l476 disco to include init code for smartfs and nxffs for cases where those fs are included in build. From ziggurat29. @@ -11351,7 +11351,7 @@ Additional new features and extended functionality: - printf(): If there are no streams, let printf() fall back to use syslog() for output. - Move pipe() and mkpipe() to nuttx/libc, they are no - longer core OS interfaces. Capability currenty used only by PTY logi + longer core OS interfaces. Capability currently used only by PTY logi to support, configurable, smaller buffers for PTYs. - Move driver-related files from include/nuttx to include/nuttx/drivers. Move driver related prototypes out of include/nuttx/fs/fs.h and into @@ -11373,7 +11373,7 @@ Additional new features and extended functionality: - tools/tesbuild.sh will now build NxWM configurations. - * Appplication Build/Configuration System: + * Application Build/Configuration System: - Change to the way that apps/ Kconfig files are generated in order to better support reuse of the apps/ directory in NuttX @@ -11491,7 +11491,7 @@ detailed bugfix information): This arises due to freeing the bulk IN endpoint before the loop that frees the requests via cdcasm_freereq. That function checks the parameters and skips the freeing if either is NULL. Freeing - the bulk IN enpoint will cause the first param to be NULL, thereby + the bulk IN endpoint will cause the first param to be NULL, thereby bypassing the free operation. To fix, I moved the release of the bulk IN endpoint until after to loop (much as was the case for the OUT and read requests, which did not exhibit the problem). From @@ -11653,7 +11653,7 @@ detailed bugfix information): From Konstantin Berezenko. - STM32 F1-F4: Move backup domain reset to earlier in the initialization sequence (stm32_rcc.c() in order to avoid disabling - LSE during RTC initialiation. From Alan Carvalho de Assis. + LSE during RTC initialization. From Alan Carvalho de Assis. - STM32 F1-F4: When configuring a GPIO via stm32_configgpio() the function will first set the mode to output and then set the initial state of the gpio later on. If you have an application with an @@ -11825,19 +11825,19 @@ Additional new features and extended functionality: - Add driver for the Bosch BMG160 3 axis gyroscope. From Alexander Entinger. - Add support for the Sensixs XEN1210 3D-board. This sensor is used - on NANOSATC-BR2 a Brazillian CUBESAT project. From Alan Carvalho + on NANOSATC-BR2 a Brazilian CUBESAT project. From Alan Carvalho de Assis. - Add a new ioctl command (set MAXPOS) for Tiva QEI. From Young. * Other Common Device Drivers: - I/O Expander: Remove hard-coded PCA9555 fields from ioexpander.h - definitons. Add support for an attach() method that may be used + definitions. Add support for an attach() method that may be used when any subset of pin interrupts occur. - I/O Expander Interface: Encode and extend I/O expander options to include interrupt configuration. - PCA9555 Driver: Replace the signalling logic with a simple callback - using the new definitons of ioexpander.h. This repartitioning of + using the new definitions of ioexpander.h. This repartitioning of functionality is necessary because (1) the I/O expander driver is the lower-lower part of any driver that uses GPIOs (include the GPIO driver itself) and should not be interacting directly with the much @@ -11975,7 +11975,7 @@ Additional new features and extended functionality: * Platforms: apps/system: - Port tee command from NetBSD. - - Add a generic system command. Current implentation cannot use + - Add a generic system command. Current implementation cannot use /bin/sh and spawns the custom NSH system command directly. * Platforms: apps/platform: @@ -12479,7 +12479,7 @@ Additional new features and extended functionality: * STMicro STM32 Drivers: - - STM32 F3: Implemention of the STM32 F37xx SDADC module. There are + - STM32 F3: Implementation of the STM32 F37xx SDADC module. There are also changes to ADC, DAC modules. SDADC has only been tested in DMA mode and does not support external TIMER triggers. This is a work in progress. From Marc Rechté. @@ -12715,7 +12715,7 @@ detailed bugfix information): with three APIs in the SMP configuration. The new internal interface is sched_cpu_pause(tcb). This function will pause a CPU if the task associated with 'tcb' is running on that CPU. This allows a different - CPU to modify that OS data stuctures associated with the CPU. When + CPU to modify that OS data structures associated with the CPU. When the other CPU is resumed, those modifications can safely take place. The three fixes are to handle cases in the SMP configuration where one CPU does need to make modifications to TCB and data structures on a @@ -12801,7 +12801,7 @@ detailed bugfix information): - ARMv7-R: Add new Kconfig entries for D/I-cache. Unlike in ARMv7-A/M, Kconfig entries for data and instruction caches are currently missing in ARMv7-R. This change adds those missing Kconfig entries. Actual - implmenetation for those functions will be added in the subsequent + implementation for those functions will be added in the subsequent patches. From Heesub Shin. - ARMv7-R: Add cache handling functions. This change adds functions for enabling and disabling d/i-caches which were missing for ARMv7-R. @@ -13050,7 +13050,7 @@ detailed bugfix information): * apps/netutils: - - FTPD: Fixed bug that didn't free ftpd ressources on exit. From Pascal + - FTPD: Fixed bug that didn't free ftpd resources on exit. From Pascal Speck. - NTP client: Fix missing left parenthesis. From Pierre-Noel Bouteville. - cJSON: Import patch to fix:cJSON_PrintUnformatted() behaves unexpected @@ -13077,7 +13077,7 @@ detailed bugfix information): encoder by a direct call into the board, cheating in a local header to declare the normally unavailable function prototype. From Sebastien Lorquet. - - apps/examples/archbuttons: Removed becaue it violates OS interface + - apps/examples/archbuttons: Removed because it violates OS interface principles. - examples/adc, pwm, can: Remove all usage of BOARDIOC_ADCTEST_SETUP, BIOARDIOC_PWMSETUP. Remove BOARDIOC_CAN_INITIALIZE. CAN @@ -13296,7 +13296,7 @@ Additional new features and extended functionality: - NSH: Add support for the 'ln' command. - NSH ls command: if node is a symobolic link, use readlink() to get - and the display the target of the symblic link. + and the display the target of the symbolic link. - NSH: Add readlink command. * Applications: apps/examples: @@ -13351,7 +13351,7 @@ detailed bugfix information): tasks running on other CPUs. - SMP: Fix timer related issues: Round robin and sporadic scheduling were only being performed for tasks running on the CPU - that processes the system timer interrupt. Similary, CPU load + that processes the system timer interrupt. Similarly, CPU load measurements were only be processed for running on the CPU that receives the sampling interrupt. - sched_note: Fix spinlock instrumentation. From Masayuki Ishikawa. @@ -13643,7 +13643,7 @@ Additional new features and extended functionality: Recently, Anthony Merlino has taken on this effort and has made some significant progress. Using the Microchip MRF24J40 module with the Mikroe Clicker2-STM32 board along with a PC-based IEEE 802.15.4 - sniffer, Anthonly has verified correct transmittion and receipt of + sniffer, Anthonly has verified correct transmission and receipt of basic frames. - Microchip MRF24J40: As mentioned above, this IEEE 802.15.4 radio driver is now basically functional. @@ -14299,7 +14299,7 @@ detailed bugfix information): * STMicro STM32 Drivers: - STM32, STM32 F7, STM32 L4: OTG host drivers: Do not do data toggle - if interrupt transfer is NAKed. Sugested by webbbn@gmail.com. + if interrupt transfer is NAKed. Suggested by webbbn@gmail.com. - Save elapsed time before handling I2C in stm32_i2c_sem_waitstop(). This change follows the same logic as in previous fix to stm32_i2c_sem_waitdone(). It is possible that a context switch @@ -14320,11 +14320,11 @@ detailed bugfix information): - STM32: Fix erase sector number for microcontrolers with more than 11 sectors. Erase a sector from the second bank cause the bit 4 of SNB being set but never unused, so trying to erase a sector from the first - bank was acually eraseing a sector from the second bank. From José + bank was actually eraseing a sector from the second bank. From José Roberto de Souza. - STM32: Make up_progmem thread safe. Writing to a flash sector while starting the erase of other sector have a undefined behavior so lets - add a semaphore and syncronize access to Flash registers. But for + add a semaphore and synchronize access to Flash registers. But for the semaphore to work it needs to be initialized so each board needs call stm32_flash_initialize() on initialization, so to avoid runtime problems it is only using semaphore and making it thread safe if @@ -14505,7 +14505,7 @@ detailed bugfix information): - examples/random: Avoid stack overflows. From Juha Niskanen. - examples/nettest: Fix an error in pre-processor expression. - examples/mtdpart: Prevent part array overflow. mtdpart examples - create partions and allocate from 1 index not a 0 index to part[] + create partitions and allocate from 1 index not a 0 index to part[] array. This cause buffer overflow for part array. This change fixes this problem. From EunBong Song. - examples/can: Fix can example app to print data when @@ -14587,7 +14587,7 @@ Additional new features and extended functionality: - Sockets: Support listening sockets in the getsockname() function. From Roland Takacs. - - IP Forwading: At the IP level, network may be configured to forward + - IP Forwarding: At the IP level, network may be configured to forward IP packets that are not destined for the target through a different network device, decrementing the packet TTL. - IP forwarding: Add optional support to forward broadcast and @@ -14658,7 +14658,7 @@ Additional new features and extended functionality: the representation of radio MAC meta-data, (2) changes to handle variable-length radio addresses, (3) removal of all explicit IEEE 802.15.4 types, references, and interfaces, (4) a new radio driver - interface to return 'capabilities' of the drvier. + interface to return 'capabilities' of the driver. - ICMPv6: Update so that ICMPv6 can be used with 6LoWPAN. - IPv6 Neighbor: Update table format to support IEEE 802.15.4 MAC addresses. @@ -14749,7 +14749,7 @@ Additional new features and extended functionality: Read access to FLASH. From David Sidrane. - configs/teensy-3.x: Removed call to khci_usbattach. The call is not need by the driver if CONFIG_USBDEV_BUSPOWERED=y. On a USB powered device if we are running we are attached. From David Sidrane. - - freedom-k66f: Use SPI driver. Initalize SPI1 on connector J6. No + - freedom-k66f: Use SPI driver. Initialize SPI1 on connector J6. No real use, as of yet. From David Sidrane. * NXP Freescale LPC43xx: @@ -14860,7 +14860,7 @@ Additional new features and extended functionality: mend+1, the next next address are not on ARMV7M_DCACHE_LINESIZE boundaries. From David Sidrane. - STM32 F7 SDMMC: SDMMC remove widebus limitation on DMA. There is no - documantation for the STM32F7 that limits DMA on 1 bit vrs 4 bit + documentation for the STM32F7 that limits DMA on 1 bit vrs 4 bit mode. From David Sidrane. - STM32 F7 SDMMC: SDMMC add dcache alignment check in dma{recv|send}setup. In the case where CONFIG_SDIO_PREFLIGHT is not @@ -14980,7 +14980,7 @@ Additional new features and extended functionality: started from the NSH command line after the network is configured. - NSH Library: Misc changes needed for PktRadio support. - NSH Library: Extend ifconfig command so that it can set variable - length packet radio addresss. + length packet radio address. - NSH Library: Update addroute and delroute command. The would support either IPv4 or IPv6, but not both. Allow expression of the netmask in IPv4 CIDR or IPv6 slash notation. This really reduces the pain of using the commands, @@ -15007,7 +15007,7 @@ Additional new features and extended functionality: Separate out network initialization so that it may be used by both a target server and a target client. Fix client/server naming confusion; Add command line option to select the server address on the - target. Add support for both enpoints on target boards vs. one on a + target. Add support for both endpoints on target boards vs. one on a target and one on the host PC. - examples/nettest: The send buffer size is now a configuration option. - examples/nettest: Loopback option should be available in Kconfig for @@ -15015,7 +15015,7 @@ Additional new features and extended functionality: - examples/keypadtest: REMOVED and warehoused in the Obsoleted repository. This was just a bad clone of apps/examples/hidkbd for a keypad driver that was removed years ago. It also uses illegal - function calls into the OS. So it has no purpse: It is redundant, it + function calls into the OS. So it has no purpose: It is redundant, it uses illegal interfaces, and is a test for non-existent code. - examples/ipforward: Add an IP forwarding example using only TUN devices. Test extended to test forwarding of ICMPv6 multicast messages. @@ -15060,7 +15060,7 @@ Additional new features and extended functionality: * System Utilities (apps/system) - - apps/system/composite: Update to apps/system/composite assocated with + - apps/system/composite: Update to apps/system/composite associated with big changes to the composite device logic. From Frank Benkert. - apps/system/composite: Remove CDC/ACM and MSC configuration logic. This belongs in the OS composite initialization. Add and argument so @@ -15073,7 +15073,7 @@ Additional new features and extended functionality: calls to support multiple composite device configurations dynamically. - apps/system/composite: Remove references to USBMSC. There still dependencies on CDC/ACM in the serial USB trace output. - - apps/system/telnet: Add Telnet Chat deamon and client from + - apps/system/telnet: Add Telnet Chat daemon and client from libtelent. * Platform-Specific Support (apps/platform) @@ -15138,7 +15138,7 @@ detailed bugfix information): - TCP Listen: Throw error when error happens in the tcp_listen function. From Roland Takacs. - - Nework Device Management: Do not search net device when all-zeros + - Network Device Management: Do not search net device when all-zeros address is used. From Roland Takacs. - Network Device Management: Fix a error in netdev_register(); it was not handling device names properly when TUN is the only network device. @@ -15385,7 +15385,7 @@ detailed bugfix information): and the variables used are byte or/and halfword types, since there is no ECC management in this RAM on the STM32F7 Series, it is recommended to disable the read-modify-write of the DTCM-RAM in the DTCM interface - (inthe DTCMCR register) to increase the performance." From Jussi + (in the DTCMCR register) to increase the performance." From Jussi Kivilinna. * STMicro STM32 Drivers: @@ -15396,7 +15396,7 @@ detailed bugfix information): caused old samples being fetched from cache. From Jussi Kivilinna. - STM32, STM32L4, STM32F7 ADC: Fix channel 18 sample time. From Juha Niskanen. - - STM32 DAC: Fix some configuration logic. When STM32_NDAC is greather + - STM32 DAC: Fix some configuration logic. When STM32_NDAC is greater than 1, then second channel is always DAC1OUT2. From Mateusz Szafoni. - STM32 DAC: Fix compilation when DMA disabled for channel. From Mateusz Szafoni. @@ -15677,7 +15677,7 @@ Additional new features and extended functionality: capability of FTL which will let you use an MTD interface directly as a block device. From Jussi Kivilinna. - BCH: The character driver to block device access now supports an - IOCTL to get the geomtry of the underlying block device. + IOCTL to get the geometry of the underlying block device. - mkfatfs: Remove mkfatfs from the OS. This is a user-space application and belongs in apps, not in the OS. - procfs: Implements procfs /proc/fs/blocks and /proc/fs/usage files, @@ -15685,7 +15685,7 @@ Additional new features and extended functionality: file, replacing the NSH mount command when there are no arguments. - procfs: Add /proc/meminfo. This is an alternative way to get the information that was previoulsy available in apps/system/free. - apps/system/free was removed beause it made illegal calls into the + apps/system/free was removed because it made illegal calls into the OS violating the portable interface. This new procfs entry provides the same information with no such violation. it also provides information about the kernel heap (formerly /proc/kmm), about the @@ -15706,13 +15706,13 @@ Additional new features and extended functionality: * Graphics/Display Drivers: - - Framebufer character driver: Add framebuffer character device driver. + - Framebuffer character driver: Add framebuffer character device driver. - LCD Framebuffer: Add support for a generic front-end that will convert any LCD driver into a framebuffer driver. - - Framebufer character driver: Include support for LCD drivers that + - Framebuffer character driver: Include support for LCD drivers that use a simulated framebuffer and must receive explicit notification when there is an update to a region in the framebuffer. - - LCD: Make LCD driver configuration indepently selected from NX + - LCD: Make LCD driver configuration independently selected from NX graphics configuration. This makes things awkward and loses some error checking but is a necessary step in order to make LCD drivers usable when the NX graphics system is disabled. @@ -15720,7 +15720,7 @@ Additional new features and extended functionality: * Networking/Network Drivers: - Networking: Add implementation of logic for SIOCGIFCONF and - SIOCGLIFCOF IOCTL commnds. + SIOCGLIFCOF IOCTL commands. - Network IOCTLs: Add support for the SIOCGIFBRDADDR ioctl() command. - Routing Tables: Permit IPv4 and IPv6 routing tables to be of different sizes. @@ -15849,7 +15849,7 @@ Additional new features and extended functionality: * Simulation - Simulation: Add a configuration for non-graphical testing of the - frambuffer character driver using apps/example/fb. + framebuffer character driver using apps/example/fb. - Simulation: Add a configuration for testing the UserFS using apps/examples/userfs. @@ -15985,7 +15985,7 @@ Additional new features and extended functionality: Alan Carvalho de Assis. - STM32F103-Minimum: Add board support for MAX7219 LED Matrix controller. From Alan Carvalho de Assis. - - STM32F103-Minimum: Add USB MSC device initialzation to + - STM32F103-Minimum: Add USB MSC device initialization to stm32f103-minimum. From Alan Carvalho de Assis. - STM32F103-Minimum: Add framebuffer driver initialization for stm32f103-minimum board. From Alan Carvalho de Assis. @@ -16276,7 +16276,7 @@ detailed bugfix information): case, only three files that have fs/ in their relative pathnames. The logic was detecting that fs was the name of the enty to report, but it was then declaring that fs was a file (because fs/block is of - type file). This was fixed by adding a check for matching lenghts. + type file). This was fixed by adding a check for matching lengths. i.e., if strlen(fs) != strlen(fs/block), then report fs as a directory instead of a file. - procfs: Fix uptime being clse to maximum 32-bit value in certain @@ -16343,10 +16343,10 @@ detailed bugfix information): after it was nullifed. Fixed in tcp_lost_connectino() by adding a NULL pointer change before the access. This was reported by Dmitriy Linikov in Bitbucket Issue 72. - - UDP Broadcat: Fix some issues with regard to UDP broadcast + - UDP Broadcast: Fix some issues with regard to UDP broadcast handling. This is Bitbucket Issue #77. - ICMP: Fix an error in the poll logic. It was assumed that the - input parmeter pvconn was valid. It was not. Instead, the poll + input parameter pvconn was valid. It was not. Instead, the poll logic must work like the sendto() and recvfrom() logic: It must keep a copy of the conn structure in the private data. - ICMPv6: Fixes several errors preventing icmpv6_radvertise.c from @@ -16361,7 +16361,7 @@ detailed bugfix information): - ICMPV6: icmpv6_input() needs to set d_len to 0 after consuming echo reply, otherwise, garbage will get sent out. From Anthony Merlino. - ICMPV6: Fix an error in the poll logic. It was assumed that the - input parmeter pvconn was valid. It was not. Instead, the poll + input parameter pvconn was valid. It was not. Instead, the poll logic must work like the sendto() and recvfrom() logic: It must keep a copy of the conn structure in the private data. - IGMPv2 Send: Fix incoming IGMP checksum calculation. From Louis @@ -16598,7 +16598,7 @@ detailed bugfix information): * ZiLOG Z80 - - configs/z80sim and xtrs: Serial driver lower halfs ioctl methods + - configs/z80sim and xtrs: Serial driver lower halves ioctl methods should return a negated errno value, not set the errno variable. - z80 Make.defs: Fixes dependency generation with newest SDCC compiler. @@ -16608,7 +16608,7 @@ detailed bugfix information): * Build System - - configs/: All defconfig filess that include + - configs/: All defconfig files that include CONFIG_NET_ICMPv6_SOCKET=y need to select CONFIG_SYSTEM_PING6=y and deselect CONFIG_DISABLE_POLL. - configs/: All NX configuration... Because of recent changes to @@ -16650,7 +16650,7 @@ detailed bugfix information): - apps/nshlib/: Avoid truncating the strcmp result in the parser into a unsigned char variable. nshlib/nsh_netcmds.c: Check for valid hostip before using it. From Bruno Herrera. - - apps/nshlib/: Fix resouce leak in 'dd' commenad when 'if=' or + - apps/nshlib/: Fix resource leak in 'dd' commenad when 'if=' or 'of=' params are repeated in the command line. For example: dd if=/dev/null if=/dev/zero of=/dev/null or dd if=/dev/zero of=/dev/zero of=/dev/null. From Bruno Herrera. @@ -16738,7 +16738,7 @@ Additional new features and extended functionality: Masayuki Ishikawa. - SMP: Introduce spin_lock_wo_note() and spin_unlock_wo_note(). These APIs are used in sched_note.c to protect instrumentation data. The - difference between these APIs to exsiting spin_lock() and + difference between these APIs to existing spin_lock() and spin_unlock() is that they do not perform instrumentation to avoid recursive call when SCHED_INSTRUMENTATION_SPINLOCKS=y. From Masayuki Ishikawa. @@ -17185,7 +17185,7 @@ detailed bugfix information): equivalent to their counterparts without the nx on front. These versions do not modify the errno value. Changed all calls within the OS to use these newer versions of the functions. - - errno: binfmt/, configs/, grahics/, libc/, mm/, net/, sched/: OS + - errno: binfmt/, configs/, graphics/, libc/, mm/, net/, sched/: OS references to the errno variable should always use the set_errno(), get_errno() macros. - drivers/, fs/ and libc/: OS references to the errno variable should @@ -17467,7 +17467,7 @@ Additional new features and extended functionality: * File Systems/Block and MTD Drivers - - fs/cromfs: Added CROMFS file system. CROMFS is a commpressed, in- + - fs/cromfs: Added CROMFS file system. CROMFS is a compressed, in- memory, read-only file system based on LZF. - fs/vfs: Added support for checking if a descriptor is a socket in fstat(). From Pelle Windestam. @@ -17985,7 +17985,7 @@ detailed bugfix information): * Networking/Network Drivers: - - net/tcp: Fixed problem with send() retrun value when using + - net/tcp: Fixed problem with send() return value when using nonblocking I/O over buffered tcp socket From Dmitriy Linikov. - net/sixlowpan: Fix a nasty, byte-ordering/endian-ness problem. The root cause has been found and corrected. And a half dozen @@ -19040,7 +19040,7 @@ Additional new features and extended functionality: characters. From mst. - apps/system/i2c: Adapt to rename I2C_M_RESTART->i2C_M_START. I2C_M_NOSTOP should be in flags of first message in every - write-read and write-write mesage sequence. From Gregory Nutt. + write-read and write-write message sequence. From Gregory Nutt. - apps/system/i2c: Allow registers besides 0x00 in the dev command. From Jakob Haufe. - apps/system/nsh: Add logic to automatically register an @@ -19360,7 +19360,7 @@ detailed bugfix information): not take effect immediately. This update is required to be serialized to the instruction stream meaning that after this update completes, it takes effect immediately and no exceptions of lower - priority than the new boosted priority can pre-empt execution. + priority than the new boosted priority can preempt execution. Because of this erratum, the priority boosting does not take place immediately, allowing the instruction after the MSR to be interrupted by an exception of lower priority than the new boosted @@ -19727,7 +19727,7 @@ Additional new features and extended functionality: - WDOG Timer: Improve accuracy of wd_gettime() in tickless mode From ligd. - Work Queues: Add a generic notification facility that runs on a work - queue. The notication facility can notify a group of subscribers to + queue. The notification facility can notify a group of subscribers to an event via callbacks. This API is for use within the OS only. From Gregory Nutt. @@ -20289,7 +20289,7 @@ detailed bugfix information): - S25FL1: During a MTDIOC_GEOMETRY ioctl call, the driver was incorrectly reporting the blocksize to be the same as the erasesize. The blocksize should be 256 (the page size). This patch fixes that, - and now the SmartFS configration is working. From Ken Pettit. + and now the SmartFS configuration is working. From Ken Pettit. - SYSLOG: nx_syslog's return value should include the timestamp length From Xiang Xiao. - SYSLOG: syslog_putc() calls sc_force in idle task even if interrupt @@ -21205,7 +21205,7 @@ Additional new features and extended functionality: 18. Support for '?' reverse search mode. 19. Support for 'J'oin next line with current line command. 20. Printing of current row,col in status line of display. - 21. Command repeat '.' support for commands that modifiy text. + 21. Command repeat '.' support for commands that modify text. 22. Support in replace / insert mode for arrow keys, PGUP / PGDN, HOME, and END. Using these will cause the command repeat buffer to reset such that only the last text addition after a cursor movement is saved. @@ -21722,7 +21722,7 @@ detailed bugfix information): and 'i'nsert. Fixed. 5. The 'vi_shrinkpos' position didn't take the end of file pointer into account when calculating 'curpos', 'prevpos' variables causing - wierdness when deleting things near the end of the file. Fixed. + weirdness when deleting things near the end of the file. Fixed. 6. The 'yy'ank command was improperly deleting the text from the document instead of simply yanking to the paste buffer. Fixed. 7. The 'dd'elete line function was not copying the deleted line to the @@ -21861,7 +21861,7 @@ Additional new features and extended functionality: - Protected Build: Add add a new field (us_heapend) to struct userspace_s that labels the end of the heap. From Xiang Xiao. - * Binary Loader/Kernal Modules/Shared Libraries + * Binary Loader/Kernel Modules/Shared Libraries - Shared Libraries: Implement dlerror() using strerror(). From Xiang Xiao. @@ -21917,7 +21917,7 @@ Additional new features and extended functionality: additional 'flag' parameter. This argument is current used only to select a RAM backed, per-window framebuffer. From Gregory Nutt. - Per-Window Framebuffers: Windows may now be optionally created - with a RAM frambuffer backing up the window content. Rending into + with a RAM framebuffer backing up the window content. Rending into the window will result in rending into the backup framebuffer, then updating the physical display from the framebuffer. The advantage of this option is that the application that manages window will no @@ -22038,7 +22038,7 @@ Additional new features and extended functionality: - i.MXRT OCOTP: Added OCOTP Support. From David Sidrane. - i.MXRT LCD: Adds framebuffer support for the i.MXRT 1050. Includes DCD initialization for SDRAM to provide space for the - framebufer. External code I used/ported is from NXP and is BSD + framebuffer. External code I used/ported is from NXP and is BSD 3-clause license. From Johannes. * NXP i.MX RT Boards: @@ -22378,7 +22378,7 @@ detailed bugfix information): order to avoid the conflict with the 3rd party libraries and clean up the file inclusion: (1) Remove redundant elf32.h, (2) Remove nuttx/binfmt/elf.h in libs/libc/machine, (2) Remove - nuttx/binfmt/elf.h in modlib, and (4) Rmove nuttx/module.h in + nuttx/binfmt/elf.h in modlib, and (4) Remove nuttx/module.h in modlib. From Xiang Xiao. - ELF Executables: If there is an address environment (CONFIG_ARCH_ADDRENV), binfmt/elf doesn't need to free ctor/dtor @@ -22440,7 +22440,7 @@ detailed bugfix information): Resolves the issue that bind() could not be called before send() From anchao. - TUN/TAP Driver: Re-order all TUN/TAP driver state data. Not only - was was with wasting memory due to alignement requirements, it was + was was with wasting memory due to alignment requirements, it was also causing network packet buffers to be improperly aligned causing problems because the network requires 16-bit packet buffer alignment for uint16_t accesses. This alignment problem was @@ -22475,7 +22475,7 @@ detailed bugfix information): - Graphics: Fix a coordinate system error in nx_filltrapezoid(). When no clipping rectangle is falls, it falls back to use the entire window as for the clip. However, that window must then then - be in window relative coordinates, not in absoute device + be in window relative coordinates, not in absolute device coordinates. From Gregory Nutt. * Common Board Logic: @@ -22522,7 +22522,7 @@ detailed bugfix information): - arch/ Common: Align semi-hosting call style with other syscalls in architecture-specific syscall.h. From Xiang Xiao. - arch/ Common: Every file that uses serial IOCTLs (TIOC*) must - explicity include nuttx/fs/ioctl.h. This was included previously + explicitly include nuttx/fs/ioctl.h. This was included previously via sneak path in the now deleted arch/serial.h. From Gregory Nutt. - arch/ Interfaces: Rename sched_process_cpuload to nxsched_process_cpuload. All internal sched_ functions should be @@ -22627,7 +22627,7 @@ detailed bugfix information): * NXP i.MXRT: - i.MXRT Clock Configuration: If SDRAM is activated it was only - running at 40MHz. This was becaus imxrt_clockconfig.c changed the + running at 40MHz. This was because imxrt_clockconfig.c changed the SEMC clock divider after the DCD was configured. This commit corrects that. From Johannes. @@ -22697,7 +22697,7 @@ detailed bugfix information): configurations. From Mateusz Szafoni. - STM32F7 Interrupts: Add the missing macro STM32_IRQ_NIRQS used by arch/arm/src/stm32f7/stm32_irq.c. From Kejun ZHOU. - - STM32H7 DMA: Fix AHB1 base adresses memory map. From Mateusz + - STM32H7 DMA: Fix AHB1 base addresses memory map. From Mateusz Szafoni. - STM32H7 SysTick: H7 appears to ignore the SysTick CLKSOURCE bit and use the CPU clock in all cases. From Mateusz Szafoni. @@ -23260,8 +23260,8 @@ detailed bugfix information): - Signals: The abnormal termination signal handler was just calling exit() conditionally when, for example, Ctrl-C is sent to a task. The abnormal termination handler must obey the rules of cancellation - points: If cancelation is disabled, then the abnormal termination - logic must wait for cancelation to be re-enabled; If cancellation + points: If cancellation is disabled, then the abnormal termination + logic must wait for cancellation to be re-enabled; If cancellation is deferred then the abnormal termination logic may have to wait for the victim task to enter or exit a cancellation point. From Gregory Nutt. @@ -23744,7 +23744,7 @@ Additional new features and extended functionality: Jerpelea. - Add I2CTOOL support and extend GPIO for future use. Add delay support for CXD56xx chip. For development is useful to register - I2C busses when the I2CTOOL is built. Enable GPIO interface on + I2C buses when the I2CTOOL is built. Enable GPIO interface on the Spresense board. From Alin Jerpelea. - Add use o the CXD56_I2C_DRIVER to register the /dev/i2c character devices. Enable battery gauge and battery charger support. From @@ -24055,7 +24055,7 @@ Additional new features and extended functionality: determines a preferred window width based primarily on the font size. From Gregory Nutt. - apps/graphics/tmw4nx: Add a CClock class that implements the - Twm4Nx digital clock based on the CSLcd simulated SLCD segements. + Twm4Nx digital clock based on the CSLcd simulated SLCD segments. From Gregory Nutt. - apps/graphics/twm4nx/README.txt: Add an overview of how to create Twm4Nx applications. From Gregory Nutt. @@ -24440,7 +24440,7 @@ detailed bugfix information): - apps/nshlib: Fix all places where cle() and readline() are used. readline() returns EOF on a failure. cle() returns a negated errno - value. Checking only for EOF causes failues to be missed (and + value. Checking only for EOF causes failures to be missed (and infinite loops ensuing). From Valmantas Paliksa. - nshlib/nsh_parse.c: Fix a warning about an uninitialized variable from the ZDS-II compiler. From Gregory Nutt. @@ -25628,7 +25628,7 @@ information): index, i.e. the AT24CS0x, FLASH chips with a UUID that appears as a 2nd I2C slave at (address+8), report their serial number at Reg[80]-Reg[8F] and will NAK a read of Reg[0]. (2) Modify get/set - to prevent write of reg index if not specifed From David Alessio. + to prevent write of reg index if not specified From David Alessio. * Network Utilities: apps/netutils: @@ -25987,7 +25987,7 @@ Additional new features and extended functionality: table for dlopen/insmod. From Xiang Xiao. - getdelim() and getline(): Add implementations of the POSIX functions getdelim() and getline(). Because of how the function is - defined, getline() canot be used on platforms that use CR-LF lin + defined, getline() cannot be used on platforms that use CR-LF lin terminations. From Gregory Nutt. - alarm(), setitimer(), and getitimer(): Implement alarm(), setitimer() and getitimer() APIs. From liuhaitao. diff --git a/TODO b/TODO index 8284eb4fa46..3754c046620 100644 --- a/TODO +++ b/TODO @@ -27,7 +27,7 @@ nuttx/: (12) File system/Generic drivers (fs/, drivers/) (10) Graphics Subsystem (graphics/) (1) Build system / Toolchains - (3) Linux/Cywgin simulation (arch/sim) + (3) Linux/Cygwin simulation (arch/sim) (5) ARM (arch/arm/) apps/ and other Add-Ons: @@ -473,7 +473,7 @@ o Task/Scheduler (sched/) 2. Then when either the ELF program task or the created task in the same address environment exits, it would decrement the reference count. When the last task exits, the reference - count would go to zero and the address environement could be + count would go to zero and the address environment could be destroyed. This is complex work and would take some effort and probably @@ -571,7 +571,7 @@ o SMP The returned CPU number is then used for various things, typically as an array index. However, if pre-emption is not disabled,then it is possible that a context switch - could occur and that logic could run on anothe CPU with + could occur and that logic could run on another CPU with possible fatal consequences. We need to evaluate all use of this_cpu() and assure that @@ -579,7 +579,7 @@ o SMP to execute on the same CPU. Status: Open - Prioity: Medium. This is a logical problem but I have nevers seen + Prioity: Medium. This is a logical problem but I have never seen an bugs caused by this. But I believe that failures are possible. @@ -640,7 +640,7 @@ o SMP That is really not as much work as it sounds. It is something that could be done in 2-3 days of work if you know what you are doing. Getting the proper test setup and - verifying the cahnge would be the more difficult task. + verifying the change would be the more difficult task. Status: Open Priority: Unknown. Might be high, but first we would need to confirm @@ -791,7 +791,7 @@ o Signals (sched/signal, arch/) Priority: Low. Even if there are only 31 usable signals, that is still a lot. Title: NO QUEUING of SIGNAL ACTIONS - Description: In the architecture specific implemenation of struct xcptcontext, + Description: In the architecture specific implementation of struct xcptcontext, there are fields used by signal handling logic to pass the state information needed to dispatch signal actions to the appropriate handler. @@ -807,7 +807,7 @@ o Signals (sched/signal, arch/) very low. Title: QUEUED SIGNAL ACTIONS ARE INAPPROPRIATELY DEFERRED - Descirption: The implement of nxsig_deliver() does the followin in a loop: + Description: The implement of nxsig_deliver() does the following in a loop: - It takes the next next queued signal action from a list - Calls the architecture-specific up_sigdeliver() to perform the signal action (through some sleight of hand in @@ -819,7 +819,7 @@ o Signals (sched/signal, arch/) uninterrupted thread instead of returning to nxsig_deliver(). The loop in nxsig_deliver() then will have the opportunity to - run until when that normal, uniterrupted thread is suspended. + run until when that normal, uninterrupted thread is suspended. Then the loop will continue with the next queued signal action. @@ -2471,7 +2471,7 @@ o Graphics Subsystem (graphics/) incomplete. In fact, many recent changes explicitly assume a single color plane: Planar colors are specified by a array of components; some recent logic uses only component [0], - ignoring the possible existence of other color componet frames. + ignoring the possible existence of other color component frames. Completely removing planar color support is one reasonable options; it is not likely that NuttX will encounter planar @@ -2528,7 +2528,7 @@ o Other drivers (drivers/) Priority: Low, provided that the application can handle these characters in the data stream. -o Linux/Cywgin simulation (arch/sim) +o Linux/Cygwin simulation (arch/sim) ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ Title: SIMULATOR HAS NO INTERRUPTS (NON-PREMPTIBLE) @@ -2709,7 +2709,7 @@ o ARM (arch/arm/) Title: USE COMMON VECTOR LOGIC IN ALL ARM ARCHITECTURES. Description: Originally, each ARMv7-M MCU architecture had its own private implementation for interrupt vectors and interrupt - handling logic. This was superceded by common interrupt + handling logic. This was superseded by common interrupt vector logic but these private implementations were never removed from older MCU architectures. This is turning into a maintenance issue because any improvements to the common @@ -2784,7 +2784,7 @@ o Other Applications & Tests (apps/examples/) Title: EXAMPLES/PIPE ON CYGWIN Description: The redirection test (part of examples/pipe) terminates - incorrectly on the Cywgin-based simulation platform (but works + incorrectly on the Cygwin-based simulation platform (but works fine on the Linux-based simulation platform). Status: Open Priority: Low diff --git a/arch/Kconfig b/arch/Kconfig index a37637faa1a..c88fd5a7966 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -77,7 +77,7 @@ config ARCH_SIM select ONESHOT select SERIAL_CONSOLE ---help--- - Linux/Cywgin user-mode simulation. + Linux/Cygwin user-mode simulation. config ARCH_X86 bool "x86" @@ -462,7 +462,7 @@ config ARCH_KERNEL_STACKSIZE int "Kernel stack size" default 1568 ---help--- - The common size of each process' kernel stack + The common size of each process's kernel stack endif # ARCH_KERNEL_STACK diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index cac87dca2e2..671a6c083f5 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -830,7 +830,7 @@ config ARM_LWL_CONSOLE for openocd as the debugger is available in tools/ocdconsole.py. Currently only available for STM32 architectures, but easily - added to other ARM architectures be addd up_low_console.c to the + added to other ARM architectures be add up_low_console.c to the architecture Make.defs file. if ARCH_CORTEXM0 diff --git a/arch/arm/include/cxd56xx/audio.h b/arch/arm/include/cxd56xx/audio.h index edcd8244e1c..0e88aaf401c 100644 --- a/arch/arm/include/cxd56xx/audio.h +++ b/arch/arm/include/cxd56xx/audio.h @@ -742,7 +742,7 @@ CXD56_AUDIO_ECODE cxd56_audio_free_dmahandle(FAR cxd56_audio_dma_t handle); /* Set internal data path * - * sig: Internal singal type + * sig: Internal signal type * sel: Internal selector type * * CXD56_AUDIO_ECODE return code diff --git a/arch/arm/include/cxd56xx/geofence.h b/arch/arm/include/cxd56xx/geofence.h index 82c21c2b95e..6d784834984 100644 --- a/arch/arm/include/cxd56xx/geofence.h +++ b/arch/arm/include/cxd56xx/geofence.h @@ -212,7 +212,7 @@ struct cxd56_geofence_trans_s uint8_t status; }; -/* Geofence output data structer. */ +/* Geofence output data structure. */ struct cxd56_geofence_status_s { @@ -220,7 +220,7 @@ struct cxd56_geofence_status_s uint8_t update; - /* The detail data od updated region ID */ + /* The detail data of updated region ID */ struct cxd56_geofence_trans_s status[CXD56_GEOFENCE_REGION_CAPACITY]; }; diff --git a/arch/arm/include/cxd56xx/gnss.h b/arch/arm/include/cxd56xx/gnss.h index 2bd57b0a74b..1669a77782c 100644 --- a/arch/arm/include/cxd56xx/gnss.h +++ b/arch/arm/include/cxd56xx/gnss.h @@ -374,7 +374,7 @@ extern "C" #define CXD56_GNSS_IOCTL_AGPS_SET_FRAMETIME 32 -/* Set tau_GPS(τGPS: Differnece of system time between GPS and Glonass +/* Set tau_GPS(τGPS: Difference of system time between GPS and Glonass * system). * * param[in] arg @@ -792,7 +792,7 @@ struct cxd56_gnss_test_result_s float doppler; /* Doppler [Hz] */ }; -/* signal setting for reading data asychronously +/* signal setting for reading data asynchronously * The field 'enable' of struct #cxd56_gnss_signal_setting_s to be given as a * parameter must be specified as 1 when setting and 0 when unsetting. * Field 'gnsssig' specifies the value of 'Signal types from GNSS', @@ -810,7 +810,7 @@ struct cxd56_gnss_signal_setting_s FAR void *data; /* user data */ }; -/* Information for use after being signaled to read data asychronously */ +/* Information for use after being signaled to read data asynchronously */ struct cxd56_gnss_signal_info_s { diff --git a/arch/arm/include/cxd56xx/pm.h b/arch/arm/include/cxd56xx/pm.h index 5f0ba2c0272..7c67ac97633 100644 --- a/arch/arm/include/cxd56xx/pm.h +++ b/arch/arm/include/cxd56xx/pm.h @@ -311,7 +311,7 @@ uint32_t up_pm_get_bootmask(void); * Enable the boot cause of the specified bit. * * Parameter: - * mask - OR of Boot mask definied as PM_BOOT_XXX + * mask - OR of Boot mask defined as PM_BOOT_XXX * * Return: * Updated boot mask @@ -327,7 +327,7 @@ uint32_t up_pm_set_bootmask(uint32_t mask); * Disable the boot cause of the specified bit. * * Parameter: - * mask - OR of Boot mask definied as PM_BOOT_XXX + * mask - OR of Boot mask defined as PM_BOOT_XXX * * Return: * Updated boot mask diff --git a/arch/arm/include/cxd56xx/scu.h b/arch/arm/include/cxd56xx/scu.h index b3d37d87276..540cfd3dc78 100644 --- a/arch/arm/include/cxd56xx/scu.h +++ b/arch/arm/include/cxd56xx/scu.h @@ -392,7 +392,7 @@ struct scufifo_wm_s { int signo; /*< Signal number (0 - 31, except system reserved) */ - /* Pointer to memomry to be timestamp stored */ + /* Pointer to memory to be timestamp stored */ FAR struct scutimestamp_s *ts; diff --git a/arch/arm/include/imx6/chip.h b/arch/arm/include/imx6/chip.h index 1c595c99a04..2120f211433 100644 --- a/arch/arm/include/imx6/chip.h +++ b/arch/arm/include/imx6/chip.h @@ -61,7 +61,7 @@ # undef IMX_HAVE_DDR32 /* 32-bit DDR3 */ # define IMX_HAVE_DDR32x2 1 /* Two channel 32-bit DDR3 */ # define IMX_HAVE_SATAII 1 /* Integrated SATA-II */ -# undef IMX_HAVE_EPD /* No interated EPD controller */ +# undef IMX_HAVE_EPD /* No integrated EPD controller */ #elif defined(CONFIG_ARCH_CHIP_IMX6_6DUAL) # define IMX_OCRAM_SIZE (256*1024) /* Size of the On-Chip RAM (OCRAM) */ # define IMX_L2CACHE_SIZE (1024*1024) /* 1MB L2 Cache */ @@ -73,7 +73,7 @@ # undef IMX_HAVE_DDR32 /* 32-bit DDR3 */ # define IMX_HAVE_DDR32x2 1 /* Two channel 32-bit DDR3 */ # define IMX_HAVE_SATAII 1 /* Integrated SATA-II */ -# undef IMX_HAVE_EPD /* No interated EPD controller */ +# undef IMX_HAVE_EPD /* No integrated EPD controller */ #elif defined(CONFIG_ARCH_CHIP_IMX6_6DUALLITE) # define IMX_OCRAM_SIZE (256*1024) /* Size of the On-Chip RAM (OCRAM) */ # define IMX_L2CACHE_SIZE (512*1024) /* 512KB L2 Cache */ @@ -85,7 +85,7 @@ # undef IMX_HAVE_DDR32 /* No 32-bit DDR3 */ # define IMX_HAVE_DDR32x2 1 /* Two channel 32-bit DDR3 */ # undef IMX_HAVE_SATAII /* No integrated SATA-II */ -# define IMX_HAVE_EPD 1 /* Interated EPD controller */ +# define IMX_HAVE_EPD 1 /* Integrated EPD controller */ #elif defined(CONFIG_ARCH_CHIP_IMX6_6SOLO) # define IMX_OCRAM_SIZE (256*1024) /* Size of the On-Chip RAM (OCRAM) */ # define IMX_L2CACHE_SIZE (512*1024) /* 512KB L2 Cache */ @@ -97,7 +97,7 @@ # define IMX_HAVE_DDR32 1 /* 32-bit DDR3 */ # undef IMX_HAVE_DDR32x2 /* No two channel 32-bit DDR3 */ # undef IMX_HAVE_SATAII /* No integrated SATA-II */ -# define IMX_HAVE_EPD 1 /* Interated EPD controller */ +# define IMX_HAVE_EPD 1 /* Integrated EPD controller */ #elif defined(CONFIG_ARCH_CHIP_IMX6_6SOLOLITE) # define IMX_OCRAM_SIZE (256*1024) /* Size of the On-Chip RAM (OCRAM) */ # define IMX_L2CACHE_SIZE (256*1024) /* 256KB L2 Cache */ @@ -109,7 +109,7 @@ # define IMX_HAVE_DDR32 1 /* 32-bit DDR3 */ # undef IMX_HAVE_DDR32x2 /* No two channel 32-bit DDR3 */ # undef IMX_HAVE_SATAII /* No integrated SATA-II */ -# define IMX_HAVE_EPD 1 /* Interated EPD controller */ +# define IMX_HAVE_EPD 1 /* Integrated EPD controller */ #else # error Unspecified i.MX6 chip #endif diff --git a/arch/arm/include/kl/irq.h b/arch/arm/include/kl/irq.h index 004b188ba02..5be3bf97dc5 100644 --- a/arch/arm/include/kl/irq.h +++ b/arch/arm/include/kl/irq.h @@ -116,7 +116,7 @@ /* Note that the total number of IRQ numbers supported is equal to the number of * valid interrupt vectors. This is wasteful in that certain tables are sized by - * this value. There are only 94 valid interrupts so, potentially the numver of + * this value. There are only 94 valid interrupts so, potentially the number of * IRQs to could be reduced to 94. However, equating IRQ numbers with vector numbers * also simplifies operations on NVIC registers and (at least in my state of mind * now) seems to justify the waste. @@ -161,7 +161,7 @@ /* Note that the total number of IRQ numbers supported is equal to the number of * valid interrupt vectors. This is wasteful in that certain tables are sized by - * this value. There are only 94 valid interrupts so, potentially the numver of + * this value. There are only 94 valid interrupts so, potentially the number of * IRQs to could be reduced to 94. However, equating IRQ numbers with vector numbers * also simplifies operations on NVIC registers and (at least in my state of mind * now) seems to justify the waste. diff --git a/arch/arm/include/max326xx/chip.h b/arch/arm/include/max326xx/chip.h index 09036769a5f..eb25ae9c98a 100644 --- a/arch/arm/include/max326xx/chip.h +++ b/arch/arm/include/max326xx/chip.h @@ -76,9 +76,9 @@ /* Peripherals */ -# define MAX326_NWDOG 0 /* No Watchog Timers */ -# define MAX326_NWWDOG 2 /* Two Windowed Watchog Timers */ -# define MAX326_NRWDOG 1 /* One Recovery Watchog Timer */ +# define MAX326_NWDOG 0 /* No Watchdog Timers */ +# define MAX326_NWWDOG 2 /* Two Windowed Watchdog Timers */ +# define MAX326_NRWDOG 1 /* One Recovery Watchdog Timer */ # define MAX326_NWAKEUP 1 /* One Wakeup Timer */ # define MAX326_NRTC 1 /* One RTC */ # define MAX326_NCRC 1 /* One CRC16/32 */ @@ -115,9 +115,9 @@ /* Peripherals */ -# define MAX326_NWDOG 0 /* No Watchog Timers */ -# define MAX326_NWWDOG 2 /* Two Windowed Watchog Timers */ -# define MAX326_NRWDOG 0 /* No Recovery Watchog Timer */ +# define MAX326_NWDOG 0 /* No Watchdog Timers */ +# define MAX326_NWWDOG 2 /* Two Windowed Watchdog Timers */ +# define MAX326_NRWDOG 0 /* No Recovery Watchdog Timer */ # define MAX326_NWAKEUP 1 /* One Wakeup Timer */ # define MAX326_NRTC 1 /* One RTC */ # define MAX326_NCRC 1 /* One CRC16/32 */ @@ -164,9 +164,9 @@ /* Peripherals */ -# define MAX326_NWDOG 1 /* One Watchog Timer */ -# define MAX326_NWWDOG 0 /* No Windowed Watchog Timers */ -# define MAX326_NRWDOG 0 /* No Recovery Watchog Timer */ +# define MAX326_NWDOG 1 /* One Watchdog Timer */ +# define MAX326_NWWDOG 0 /* No Windowed Watchdog Timers */ +# define MAX326_NRWDOG 0 /* No Recovery Watchdog Timer */ # define MAX326_NWAKEUP 0 /* No Wakeup Timer */ # define MAX326_NRTC 1 /* One RTC */ # define MAX326_NCRC 0 /* No CRC16/32 */ diff --git a/arch/arm/include/stm32f0l0g0/stm32l0_irq.h b/arch/arm/include/stm32f0l0g0/stm32l0_irq.h index 236d10d3342..bd467c52b8e 100644 --- a/arch/arm/include/stm32f0l0g0/stm32l0_irq.h +++ b/arch/arm/include/stm32f0l0g0/stm32l0_irq.h @@ -96,7 +96,7 @@ #define STM32_IRQ_USART2 (STM32_IRQ_EXTINT + 28) /* 28: USART2 global interrupt */ #define STM32_IRQ_LPUART1 (STM32_IRQ_EXTINT + 29) /* 29: LPUART1 global interrupt */ #define STM32_IRQ_AES (STM32_IRQ_EXTINT + 29) /* 29: AES global interrupt */ -#define STM32_IRQ_RNG (STM32_IRQ_EXTINT + 29) /* 29: RNG gloabl interrupt */ +#define STM32_IRQ_RNG (STM32_IRQ_EXTINT + 29) /* 29: RNG global interrupt */ #define STM32_IRQ_LCD (STM32_IRQ_EXTINT + 30) /* 30: LCD global interrupt */ #define STM32_IRQ_USB (STM32_IRQ_EXTINT + 31) /* 31: USB global interrupt */ diff --git a/arch/arm/src/a1x/a1x_boot.c b/arch/arm/src/a1x/a1x_boot.c index 95135b54652..53a1c0f27a5 100644 --- a/arch/arm/src/a1x/a1x_boot.c +++ b/arch/arm/src/a1x/a1x_boot.c @@ -240,7 +240,7 @@ static void a1x_copyvectorblock(void) uint32_t *dest; /* If we are using re-mapped vectors in an area that has been marked - * read only, then temparily mark the mapping write-able (non-buffered). + * read only, then temporarily mark the mapping write-able (non-buffered). */ #ifdef CONFIG_PAGING diff --git a/arch/arm/src/a1x/a1x_serial.c b/arch/arm/src/a1x/a1x_serial.c index 79101a7dc6b..0a040f2773d 100644 --- a/arch/arm/src/a1x/a1x_serial.c +++ b/arch/arm/src/a1x/a1x_serial.c @@ -1430,7 +1430,7 @@ static bool up_txempty(struct uart_dev_s *dev) } /**************************************************************************** - * Public Funtions + * Public Functions ****************************************************************************/ #ifdef USE_EARLYSERIALINIT diff --git a/arch/arm/src/a1x/hardware/a10_memorymap.h b/arch/arm/src/a1x/hardware/a10_memorymap.h index eee9cbca165..3d9ac452fff 100644 --- a/arch/arm/src/a1x/hardware/a10_memorymap.h +++ b/arch/arm/src/a1x/hardware/a10_memorymap.h @@ -296,7 +296,7 @@ /* A1X Virtual (mapped) Memory Map * * board_memorymap.h contains special mappings that are needed when a ROM - * memory map is used. It is included in this odd location becaue it depends + * memory map is used. It is included in this odd location because it depends * on some the virtual address definitions provided above. */ diff --git a/arch/arm/src/a1x/hardware/a1x_intc.h b/arch/arm/src/a1x/hardware/a1x_intc.h index 0c3cd0eb3d7..258368bb974 100644 --- a/arch/arm/src/a1x/hardware/a1x_intc.h +++ b/arch/arm/src/a1x/hardware/a1x_intc.h @@ -164,7 +164,7 @@ #define INTC_NMICTRL_SRCTYPE_SHIFT (0) /* Bits 0-1: External NMI Interrupt Source Type */ #define INTC_NMICTRL_SRCTYPE_MASK (3 << INTC_NMICTRL_SRCTYPE_SHIFT) # define INTC_NMICTRL_SRCTYPE_LOW (0 << INTC_NMICTRL_SRCTYPE_SHIFT) /* Low level sensitive */ -# define INTC_NMICTRL_SRCTYPE_NEDGE (1 << INTC_NMICTRL_SRCTYPE_SHIFT) /* Negative edge trigged */ +# define INTC_NMICTRL_SRCTYPE_NEDGE (1 << INTC_NMICTRL_SRCTYPE_SHIFT) /* Negative edge triggered */ /* Interrupt IRQ Pending 0-2 Status */ diff --git a/arch/arm/src/am335x/am335x_can.c b/arch/arm/src/am335x/am335x_can.c index 3a69e8b6b1f..2af7c9e41c8 100644 --- a/arch/arm/src/am335x/am335x_can.c +++ b/arch/arm/src/am335x/am335x_can.c @@ -592,7 +592,7 @@ static int can_remoterequest(FAR struct can_dev_s *dev, uint16_t id) * * Byte 0: Bits 0-7: Bits 3-10 of the 11-bit CAN identifier * Byte 1: Bits 5-7: Bits 0-2 of the 11-bit CAN identifier - * Bit 4: Remote Tranmission Request (RTR) + * Bit 4: Remote Transmission Request (RTR) * Bits 0-3: Data Length Code (DLC) * Bytes 2-10: CAN data * diff --git a/arch/arm/src/arm/up_cache.S b/arch/arm/src/arm/up_cache.S index d16f79625da..7fd79572d52 100644 --- a/arch/arm/src/arm/up_cache.S +++ b/arch/arm/src/arm/up_cache.S @@ -6,7 +6,7 @@ * * Several of these cache operations come from Atmel sample code with * modifications for better integration with NuttX. The Atmel sample code - * has a BSD compatibile license that requires this copyright notice: + * has a BSD compatible license that requires this copyright notice: * * Copyright (c) 2008, Atmel Corporation * diff --git a/arch/arm/src/arm/up_head.S b/arch/arm/src/arm/up_head.S index 07ecca87f0c..1e4362b776f 100644 --- a/arch/arm/src/arm/up_head.S +++ b/arch/arm/src/arm/up_head.S @@ -588,7 +588,7 @@ __start: strcc fp, [r0],#4 bcc .Lbssinit - /* If the .data section is in a separate, unitialized address space, + /* If the .data section is in a separate, uninitialized address space, * then we will also need to copy the initial values of of the .data * section from the .text region into that .data region. This would * be the case if we are executing from FLASH and the .data section diff --git a/arch/arm/src/arm/up_saveusercontext.S b/arch/arm/src/arm/up_saveusercontext.S index a3a0325d41b..1f0e2e1ea9e 100644 --- a/arch/arm/src/arm/up_saveusercontext.S +++ b/arch/arm/src/arm/up_saveusercontext.S @@ -83,7 +83,7 @@ up_saveusercontext: /* Make sure that the return value will be non-zero (the * value of the other volatile registers don't matter -- * r1-r3, ip). This function is called through the - * noraml C calling conventions and the values of these + * normal C calling conventions and the values of these * registers cannot be assumed at the point of setjmp * return. */ diff --git a/arch/arm/src/arm/vfork.S b/arch/arm/src/arm/vfork.S index fdc468cbf09..d8117f0a287 100644 --- a/arch/arm/src/arm/vfork.S +++ b/arch/arm/src/arm/vfork.S @@ -77,7 +77,7 @@ * - Allocation of the child task's TCB. * - Initialization of file descriptors and streams * - Configuration of environment variables - * - Setup the intput parameters for the task. + * - Setup the input parameters for the task. * - Initialization of the TCB (including call to up_initial_state() * 4) up_vfork() provides any additional operating context. up_vfork must: * - Allocate and initialize the stack diff --git a/arch/arm/src/armv6-m/up_svcall.c b/arch/arm/src/armv6-m/up_svcall.c index 300d1234485..da17b221d4b 100644 --- a/arch/arm/src/armv6-m/up_svcall.c +++ b/arch/arm/src/armv6-m/up_svcall.c @@ -178,7 +178,7 @@ int up_svcall(int irq, FAR void *context, FAR void *arg) * R0 = SYS_save_context * R1 = saveregs * - * In this case, we simply need to copy the current regsters to the + * In this case, we simply need to copy the current registers to the * save register space references in the saved R1 and return. */ diff --git a/arch/arm/src/armv6-m/up_unblocktask.c b/arch/arm/src/armv6-m/up_unblocktask.c index 5991a9b4601..15efb85c4dd 100644 --- a/arch/arm/src/armv6-m/up_unblocktask.c +++ b/arch/arm/src/armv6-m/up_unblocktask.c @@ -63,7 +63,7 @@ * Input Parameters: * tcb: Refers to the tcb to be unblocked. This tcb is in one of the * waiting tasks lists. It must be moved to the ready-to-run list and, - * if it is the highest priority ready to run taks, executed. + * if it is the highest priority ready to run task, executed. * ****************************************************************************/ diff --git a/arch/arm/src/armv6-m/vfork.S b/arch/arm/src/armv6-m/vfork.S index 70551703198..3614ee30e5e 100644 --- a/arch/arm/src/armv6-m/vfork.S +++ b/arch/arm/src/armv6-m/vfork.S @@ -78,7 +78,7 @@ * - Allocation of the child task's TCB. * - Initialization of file descriptors and streams * - Configuration of environment variables - * - Setup the intput parameters for the task. + * - Setup the input parameters for the task. * - Initialization of the TCB (including call to up_initial_state() * 4) up_vfork() provides any additional operating context. up_vfork must: * - Allocate and initialize the stack diff --git a/arch/arm/src/armv7-a/arm_addrenv.c b/arch/arm/src/armv7-a/arm_addrenv.c index a40abd6571b..ea6fc02dae5 100644 --- a/arch/arm/src/armv7-a/arm_addrenv.c +++ b/arch/arm/src/armv7-a/arm_addrenv.c @@ -284,7 +284,7 @@ int up_addrenv_create(size_t textsize, size_t datasize, size_t heapsize, } /* Allocate .bss/.data space pages. NOTE that a configurable offset is - * added to the allocted size. This is matched by the offset that is + * added to the allocated size. This is matched by the offset that is * used when reporting the virtual data address in up_addrenv_vdata(). */ diff --git a/arch/arm/src/armv7-a/arm_cpupause.c b/arch/arm/src/armv7-a/arm_cpupause.c index 8a1499c2976..bf7450062f1 100644 --- a/arch/arm/src/armv7-a/arm_cpupause.c +++ b/arch/arm/src/armv7-a/arm_cpupause.c @@ -151,7 +151,7 @@ int up_cpu_paused(int cpu) spin_unlock(&g_cpu_paused[cpu]); /* Wait for the spinlock to be released. The requesting CPU will release - * the spinlcok when the CPU is resumed. + * the spinlock when the CPU is resumed. */ spin_lock(&g_cpu_wait[cpu]); diff --git a/arch/arm/src/armv7-a/arm_cpustart.c b/arch/arm/src/armv7-a/arm_cpustart.c index 3226153f5c1..e868fd84dcb 100644 --- a/arch/arm/src/armv7-a/arm_cpustart.c +++ b/arch/arm/src/armv7-a/arm_cpustart.c @@ -143,7 +143,7 @@ int arm_start_handler(int irq, FAR void *context, FAR void *arg) * * Each CPU is provided the entry point to is IDLE task when started. A * TCB for each CPU's IDLE task has been initialized and placed in the - * CPU's g_assignedtasks[cpu] list. Not stack has been alloced or + * CPU's g_assignedtasks[cpu] list. Not stack has been allocated or * initialized. * * The OS initialization logic calls this function repeatedly until each diff --git a/arch/arm/src/armv7-a/arm_l2cc_pl310.c b/arch/arm/src/armv7-a/arm_l2cc_pl310.c index 9d455e40d27..5d96474683c 100644 --- a/arch/arm/src/armv7-a/arm_l2cc_pl310.c +++ b/arch/arm/src/armv7-a/arm_l2cc_pl310.c @@ -179,7 +179,7 @@ /* Bit 26: Non-Secure Lockdown Enable * - * Default: 0=Lockdown registers cannot be modified using non-secure acceses + * Default: 0=Lockdown registers cannot be modified using non-secure accesses */ #define L2CC_ACR_NSLEN_CONFIG (0) /* 0=Secure access only */ diff --git a/arch/arm/src/armv7-a/arm_vfork.S b/arch/arm/src/armv7-a/arm_vfork.S index 70a037683eb..82278991eac 100644 --- a/arch/arm/src/armv7-a/arm_vfork.S +++ b/arch/arm/src/armv7-a/arm_vfork.S @@ -79,7 +79,7 @@ * - Allocation of the child task's TCB. * - Initialization of file descriptors and streams * - Configuration of environment variables - * - Setup the intput parameters for the task. + * - Setup the input parameters for the task. * - Initialization of the TCB (including call to up_initial_state() * 4) up_vfork() provides any additional operating context. up_vfork must: * - Allocate and initialize the stack diff --git a/arch/arm/src/armv7-a/cp15_cacheops.h b/arch/arm/src/armv7-a/cp15_cacheops.h index 40a89452a2c..a87abddf833 100644 --- a/arch/arm/src/armv7-a/cp15_cacheops.h +++ b/arch/arm/src/armv7-a/cp15_cacheops.h @@ -158,7 +158,7 @@ #define CACHE_VA_MASK (0xfffffffe0) /* Bits 5-31: Virtual address */ /************************************************************************************ - * Assemby Macros + * Assembly Macros ************************************************************************************/ /* cp15_cache Cache Operations * @@ -277,7 +277,7 @@ * Name: cp15_invalidate_icache_inner_sharable * * Description: - * Invalidate I cache predictor array inner sharable + * Invalidate I cache predictor array inner shareable * * Input Parameters: * None @@ -296,7 +296,7 @@ * Name: cp15_invalidate_btb_inner_sharable * * Description: - * Invalidate entire branch predictor array inner sharable + * Invalidate entire branch predictor array inner shareable * * Input Parameters: * None @@ -632,7 +632,7 @@ static inline void cp15_disable_icache(void) * Name: cp15_invalidate_icache_inner_sharable * * Description: - * Invalidate I cache predictor array inner sharable + * Invalidate I cache predictor array inner shareable * * Input Parameters: * None @@ -658,7 +658,7 @@ static inline void cp15_invalidate_icache_inner_sharable(void) * Name: cp15_invalidate_btb_inner_sharable * * Description: - * Invalidate entire branch predictor array inner sharable + * Invalidate entire branch predictor array inner shareable * * Input Parameters: * None diff --git a/arch/arm/src/armv7-a/mmu.h b/arch/arm/src/armv7-a/mmu.h index f93ed5dba23..332b50b5ed7 100644 --- a/arch/arm/src/armv7-a/mmu.h +++ b/arch/arm/src/armv7-a/mmu.h @@ -889,7 +889,7 @@ struct section_mapping_s #endif /************************************************************************************ - * Assemby Macros + * Assembly Macros ************************************************************************************/ #ifdef __ASSEMBLY__ diff --git a/arch/arm/src/armv7-a/mpcore.h b/arch/arm/src/armv7-a/mpcore.h index a1fb72368e3..2c1875ad14f 100644 --- a/arch/arm/src/armv7-a/mpcore.h +++ b/arch/arm/src/armv7-a/mpcore.h @@ -61,9 +61,9 @@ #define MPCORE_SCU_OFFSET 0x0000 /* 0x0000-0x00fc SCU registers */ #ifdef CONFIG_ARCH_CORTEXA7 -#define MPCORE_ICC_OFFSET 0x2000 /* 0x0000-0x00FC Interrupt conroller interface */ +#define MPCORE_ICC_OFFSET 0x2000 /* 0x0000-0x00FC Interrupt controller interface */ #else -#define MPCORE_ICC_OFFSET 0x0100 /* 0x0000-0x00FC Interrupt conroller interface */ +#define MPCORE_ICC_OFFSET 0x0100 /* 0x0000-0x00FC Interrupt controller interface */ #endif #define MPCORE_GTM_OFFSET 0x0200 /* 0x0200-0x02ff Global timer */ /* 0x0300-0x05ff Reserved */ diff --git a/arch/arm/src/armv7-a/sctlr.h b/arch/arm/src/armv7-a/sctlr.h index c77407b3945..922c71361f3 100644 --- a/arch/arm/src/armv7-a/sctlr.h +++ b/arch/arm/src/armv7-a/sctlr.h @@ -261,7 +261,7 @@ /* TODO: To be provided */ /************************************************************************************ - * Assemby Macros + * Assembly Macros ************************************************************************************/ #ifdef __ASSEMBLY__ diff --git a/arch/arm/src/armv7-m/Kconfig b/arch/arm/src/armv7-m/Kconfig index 60f19c435a7..7dcd5c82c1e 100644 --- a/arch/arm/src/armv7-m/Kconfig +++ b/arch/arm/src/armv7-m/Kconfig @@ -78,7 +78,7 @@ config ARMV7M_BASEPRI_WAR This update is required to be serialized to the instruction stream meaning that after this update completes, it takes effect immediately and no exceptions of lower priority than the new boosted - priority can pre-empt execution. Because of this erratum, the + priority can preempt execution. Because of this erratum, the priority boosting does not take place immediately, allowing the instruction after the MSR to be interrupted by an exception of lower priority than the new boosted priority. This effect is only diff --git a/arch/arm/src/armv7-m/etm.h b/arch/arm/src/armv7-m/etm.h index eef1ba85d04..3f476de20e5 100644 --- a/arch/arm/src/armv7-m/etm.h +++ b/arch/arm/src/armv7-m/etm.h @@ -276,7 +276,7 @@ #define _ETM_ETMCCR_TRACESS_MASK 0x4000000UL /* Bit mask for ETM_TRACESS */ #define _ETM_ETMCCR_TRACESS_DEFAULT 0x00000001UL /* Mode DEFAULT for ETM_ETMCCR */ #define ETM_ETMCCR_TRACESS_DEFAULT (_ETM_ETMCCR_TRACESS_DEFAULT << 26) /* Shifted mode DEFAULT for ETM_ETMCCR */ -#define ETM_ETMCCR_MMACCESS (0x1UL << 27) /* Coprocessor and Memeory Access */ +#define ETM_ETMCCR_MMACCESS (0x1UL << 27) /* Coprocessor and Memory Access */ #define _ETM_ETMCCR_MMACCESS_SHIFT 27 /* Shift value for ETM_MMACCESS */ #define _ETM_ETMCCR_MMACCESS_MASK 0x8000000UL /* Bit mask for ETM_MMACCESS */ #define _ETM_ETMCCR_MMACCESS_DEFAULT 0x00000001UL /* Mode DEFAULT for ETM_ETMCCR */ diff --git a/arch/arm/src/armv7-m/gnu/up_setjmp.S b/arch/arm/src/armv7-m/gnu/up_setjmp.S index 0f6b6f7cab8..aca52a588f9 100644 --- a/arch/arm/src/armv7-m/gnu/up_setjmp.S +++ b/arch/arm/src/armv7-m/gnu/up_setjmp.S @@ -120,7 +120,7 @@ setjmp: * control back to the point where setjmp() was called and to restore ("rewind") * the stack to its state at the time of the setjmp() call. When control is * passed back to where setjmp() had been called, setjmp() will return with - * 'val', the second paramater passed to longjmp(). + * 'val', the second parameter passed to longjmp(). * * C Function Prototype: * void longjmp(jmp_buf env, int val); diff --git a/arch/arm/src/armv7-m/gnu/vfork.S b/arch/arm/src/armv7-m/gnu/vfork.S index 462fa4cae20..e5c7524e8a5 100644 --- a/arch/arm/src/armv7-m/gnu/vfork.S +++ b/arch/arm/src/armv7-m/gnu/vfork.S @@ -79,7 +79,7 @@ * - Allocation of the child task's TCB. * - Initialization of file descriptors and streams * - Configuration of environment variables - * - Setup the intput parameters for the task. + * - Setup the input parameters for the task. * - Initialization of the TCB (including call to up_initial_state() * 4) up_vfork() provides any additional operating context. up_vfork must: * - Allocate and initialize the stack diff --git a/arch/arm/src/armv7-m/iar/vfork.S b/arch/arm/src/armv7-m/iar/vfork.S index fc5d87fa3b7..f542f2c6530 100644 --- a/arch/arm/src/armv7-m/iar/vfork.S +++ b/arch/arm/src/armv7-m/iar/vfork.S @@ -80,7 +80,7 @@ * - Allocation of the child task's TCB. * - Initialization of file descriptors and streams * - Configuration of environment variables - * - Setup the intput parameters for the task. + * - Setup the input parameters for the task. * - Initialization of the TCB (including call to up_initial_state() * 4) up_vfork() provides any additional operating context. up_vfork must: * - Allocate and initialize the stack diff --git a/arch/arm/src/armv7-m/mpu.h b/arch/arm/src/armv7-m/mpu.h index 9e817b28248..00696551881 100644 --- a/arch/arm/src/armv7-m/mpu.h +++ b/arch/arm/src/armv7-m/mpu.h @@ -127,7 +127,7 @@ # define MPU_RASR_B (1 << 16) /* Bit 16: Bufferable */ # define MPU_RASR_C (1 << 17) /* Bit 17: Cacheable */ # define MPU_RASR_S (1 << 18) /* Bit 18: Shareable */ -# define MPU_RASR_TEX_SHIFT (19) /* Bits 19-21: TEX Address Permisson */ +# define MPU_RASR_TEX_SHIFT (19) /* Bits 19-21: TEX Address Permission */ # define MPU_RASR_TEX_MASK (7 << MPU_RASR_TEX_SHIFT) # define MPU_RASR_TEX_SO (0 << MPU_RASR_TEX_SHIFT) /* Strongly Ordered */ # define MPU_RASR_TEX_NOR (1 << MPU_RASR_TEX_SHIFT) /* Normal */ diff --git a/arch/arm/src/armv7-m/nvic.h b/arch/arm/src/armv7-m/nvic.h index ced0a4ff7fe..6836e4bdebf 100644 --- a/arch/arm/src/armv7-m/nvic.h +++ b/arch/arm/src/armv7-m/nvic.h @@ -195,7 +195,7 @@ #define NVIC_CPUID_BASE_OFFSET 0x0d00 /* CPUID base register */ #define NVIC_INTCTRL_OFFSET 0x0d04 /* Interrupt control state register */ #define NVIC_VECTAB_OFFSET 0x0d08 /* Vector table offset register */ -#define NVIC_AIRCR_OFFSET 0x0d0c /* Application interrupt/reset contol registr */ +#define NVIC_AIRCR_OFFSET 0x0d0c /* Application interrupt/reset control registr */ #define NVIC_SYSCON_OFFSET 0x0d10 /* System control register */ #define NVIC_CFGCON_OFFSET 0x0d14 /* Configuration control register */ #define NVIC_SYSH_PRIORITY_OFFSET(n) (0x0d14 + 4*((n) >> 2)) @@ -518,7 +518,7 @@ #define NVIC_CFGCON_UNALIGNTRP (1 << 3) /* Bit 3: Enables unaligned access traps */ #define NVIC_CFGCON_DIV0TRP (1 << 4) /* Bit 4: Enables fault on divide-by-zero */ #define NVIC_CFGCON_BFHFNMIGN (1 << 8) /* Bit 8: Disables data bus faults */ -#define NVIC_CFGCON_STKALIGN (1 << 9) /* Bit 9: Indicates stack alignment on exeption */ +#define NVIC_CFGCON_STKALIGN (1 << 9) /* Bit 9: Indicates stack alignment on exception */ /* Cortex-M7: */ #define NVIC_CFGCON_DC (1 << 16) /* Bit 16: Data cache enable */ #define NVIC_CFGCON_IC (1 << 17) /* Bit 17: Instruction cache enable */ diff --git a/arch/arm/src/armv7-m/up_svcall.c b/arch/arm/src/armv7-m/up_svcall.c index 0f7eddc00fa..0c1430b49df 100644 --- a/arch/arm/src/armv7-m/up_svcall.c +++ b/arch/arm/src/armv7-m/up_svcall.c @@ -172,7 +172,7 @@ int up_svcall(int irq, FAR void *context, FAR void *arg) * R0 = SYS_save_context * R1 = saveregs * - * In this case, we simply need to copy the current regsters to the + * In this case, we simply need to copy the current registers to the * save register space references in the saved R1 and return. */ diff --git a/arch/arm/src/armv7-m/up_unblocktask.c b/arch/arm/src/armv7-m/up_unblocktask.c index 35a6f8522f0..78d804b29ab 100644 --- a/arch/arm/src/armv7-m/up_unblocktask.c +++ b/arch/arm/src/armv7-m/up_unblocktask.c @@ -64,7 +64,7 @@ * tcb: Refers to the tcb to be unblocked. This tcb is * in one of the waiting tasks lists. It must be moved to * the ready-to-run list and, if it is the highest priority - * ready to run taks, executed. + * ready to run task, executed. * ****************************************************************************/ diff --git a/arch/arm/src/armv7-r/Kconfig b/arch/arm/src/armv7-r/Kconfig index 97f4a7bf286..15a6ab4f84d 100644 --- a/arch/arm/src/armv7-r/Kconfig +++ b/arch/arm/src/armv7-r/Kconfig @@ -30,7 +30,7 @@ config ARMV7R_HAVE_L2CC bool default n ---help--- - Selected by the configuration tool if the architecutre supports any + Selected by the configuration tool if the architecture supports any kind of L2 cache. config ARMV7R_HAVE_L2CC_PL310 diff --git a/arch/arm/src/armv7-r/arm_l2cc_pl310.c b/arch/arm/src/armv7-r/arm_l2cc_pl310.c index 18c3d224a2c..ea4e8eae407 100644 --- a/arch/arm/src/armv7-r/arm_l2cc_pl310.c +++ b/arch/arm/src/armv7-r/arm_l2cc_pl310.c @@ -179,7 +179,7 @@ /* Bit 26: Non-Secure Lockdown Enable * - * Default: 0=Lockdown registers cannot be modified using non-secure acceses + * Default: 0=Lockdown registers cannot be modified using non-secure accesses */ #define L2CC_ACR_NSLEN_CONFIG (0) /* 0=Secure access only */ diff --git a/arch/arm/src/armv7-r/arm_vfork.S b/arch/arm/src/armv7-r/arm_vfork.S index d9299ee7776..93f312038af 100644 --- a/arch/arm/src/armv7-r/arm_vfork.S +++ b/arch/arm/src/armv7-r/arm_vfork.S @@ -79,7 +79,7 @@ * - Allocation of the child task's TCB. * - Initialization of file descriptors and streams * - Configuration of environment variables - * - Setup the intput parameters for the task. + * - Setup the input parameters for the task. * - Initialization of the TCB (including call to up_initial_state() * 4) up_vfork() provides any additional operating context. up_vfork must: * - Allocate and initialize the stack diff --git a/arch/arm/src/armv7-r/cp15_cacheops.h b/arch/arm/src/armv7-r/cp15_cacheops.h index c7e239db03c..1713e2e38f3 100644 --- a/arch/arm/src/armv7-r/cp15_cacheops.h +++ b/arch/arm/src/armv7-r/cp15_cacheops.h @@ -166,7 +166,7 @@ #define CACHE_VA_MASK (0xfffffffe0) /* Bits 5-31: Virtual address */ /************************************************************************************ - * Assemby Macros + * Assembly Macros ************************************************************************************/ /* cp15_cache Cache Operations * @@ -285,7 +285,7 @@ * Name: cp15_invalidate_icache_inner_sharable * * Description: - * Invalidate I cache predictor array inner sharable + * Invalidate I cache predictor array inner shareable * * Input Parameters: * None @@ -304,7 +304,7 @@ * Name: cp15_invalidate_btb_inner_sharable * * Description: - * Invalidate entire branch predictor array inner sharable + * Invalidate entire branch predictor array inner shareable * * Input Parameters: * None @@ -640,7 +640,7 @@ static inline void cp15_disable_icache(void) * Name: cp15_invalidate_icache_inner_sharable * * Description: - * Invalidate I cache predictor array inner sharable + * Invalidate I cache predictor array inner shareable * * Input Parameters: * None @@ -666,7 +666,7 @@ static inline void cp15_invalidate_icache_inner_sharable(void) * Name: cp15_invalidate_btb_inner_sharable * * Description: - * Invalidate entire branch predictor array inner sharable + * Invalidate entire branch predictor array inner shareable * * Input Parameters: * None diff --git a/arch/arm/src/armv7-r/mpcore.h b/arch/arm/src/armv7-r/mpcore.h index 9dc6daf65cc..219677438be 100644 --- a/arch/arm/src/armv7-r/mpcore.h +++ b/arch/arm/src/armv7-r/mpcore.h @@ -60,7 +60,7 @@ /* Peripheral Base Offsets **************************************************/ #define MPCORE_SCU_OFFSET 0x0000 /* 0x0000-0x00fc SCU registers */ -#define MPCORE_ICC_OFFSET 0x2000 /* 0x0000-0x00FC Interrupt conroller interface */ +#define MPCORE_ICC_OFFSET 0x2000 /* 0x0000-0x00FC Interrupt controller interface */ #define MPCORE_GTM_OFFSET 0x0200 /* 0x0200-0x02ff Global timer */ /* 0x0300-0x05ff Reserved */ #define MPCORE_PTM_OFFSET 0x0600 /* 0x0600-0x06ff Private timers and watchdogs */ diff --git a/arch/arm/src/armv7-r/mpu.h b/arch/arm/src/armv7-r/mpu.h index 5d8c6c4158a..6181115dab5 100644 --- a/arch/arm/src/armv7-r/mpu.h +++ b/arch/arm/src/armv7-r/mpu.h @@ -216,7 +216,7 @@ static inline unsigned int mpu_get_mpuir(void) * Name: mpu_set_drbar * * Description: - * Wrtie to the DRBAR register + * Write to the DRBAR register * ****************************************************************************/ @@ -235,7 +235,7 @@ static inline void mpu_set_drbar(unsigned int drbar) * Name: mpu_set_drsr * * Description: - * Wrtie to the DRSR register + * Write to the DRSR register * ****************************************************************************/ @@ -254,7 +254,7 @@ static inline void mpu_set_drsr(unsigned int drsr) * Name: mpu_set_dracr * * Description: - * Wrtie to the DRACR register + * Write to the DRACR register * ****************************************************************************/ @@ -273,7 +273,7 @@ static inline void mpu_set_dracr(unsigned int dracr) * Name: mpu_set_irbar * * Description: - * Wrtie to the IRBAR register + * Write to the IRBAR register * ****************************************************************************/ @@ -294,7 +294,7 @@ static inline void mpu_set_irbar(unsigned int irbar) * Name: mpu_set_irsr * * Description: - * Wrtie to the IRSR register + * Write to the IRSR register * ****************************************************************************/ @@ -315,7 +315,7 @@ static inline void mpu_set_irsr(unsigned int irsr) * Name: mpu_set_iracr * * Description: - * Wrtie to the IRCR register + * Write to the IRCR register * ****************************************************************************/ @@ -336,7 +336,7 @@ static inline void mpu_set_iracr(unsigned int iracr) * Name: mpu_set_rgnr * * Description: - * Wrtie to the IRCR register + * Write to the IRCR register * ****************************************************************************/ diff --git a/arch/arm/src/armv7-r/sctlr.h b/arch/arm/src/armv7-r/sctlr.h index e68397fd6d2..aa3b97952b5 100644 --- a/arch/arm/src/armv7-r/sctlr.h +++ b/arch/arm/src/armv7-r/sctlr.h @@ -376,7 +376,7 @@ /* Implementation defined */ /************************************************************************************ - * Assemby Macros + * Assembly Macros ************************************************************************************/ #ifdef __ASSEMBLY__ @@ -463,7 +463,7 @@ static inline void cp15_wrsctlr(unsigned int sctlr) ); } -/* Read/write the implementation defined Auxiliary Control Regster (ACTLR) */ +/* Read/write the implementation defined Auxiliary Control Register (ACTLR) */ static inline unsigned int cp15_rdactlr(void) { diff --git a/arch/arm/src/c5471/c5471_ethernet.c b/arch/arm/src/c5471/c5471_ethernet.c index 0f045e736e0..5244762bde7 100644 --- a/arch/arm/src/c5471/c5471_ethernet.c +++ b/arch/arm/src/c5471/c5471_ethernet.c @@ -727,7 +727,7 @@ static int c5471_mdread (int adr, int reg) * internal registers allowing host configuration and status access. These * internal registers are accessible by clocking serial data in/out of the * MDIO pin of the LU3X31T-T64 chip. For c547X, the MDC and the MDIO pins - * are connected to the C547x GPIO15 and GPIO14 pins respectivley. Host + * are connected to the C547x GPIO15 and GPIO14 pins respectively. Host * software twiddles the GPIO pins appropriately to get data serially into * and out of the chip. This is typically a one time operation at boot and * normal operation of the transeiver involves EIM/Transeiver interaction at @@ -1599,7 +1599,7 @@ static void c5471_interrupt_work(FAR void *arg) if ((EIM_STATUS_CPU_RX & priv->c_eimstatus) != 0) { /* An outgoing packet has been processed by the EIM and the interrupt - * associated with EIM's CPU RX que has been asserted. It is the EIM's + * associated with EIM's CPU RX queue has been asserted. It is the EIM's * CPU RX queue that we put packets on to send them *out*. TWe use this * terminology to stay consistent with the Orion documentation. */ diff --git a/arch/arm/src/c5471/c5471_lowputc.S b/arch/arm/src/c5471/c5471_lowputc.S index daad835b40d..88932c5bcd8 100644 --- a/arch/arm/src/c5471/c5471_lowputc.S +++ b/arch/arm/src/c5471/c5471_lowputc.S @@ -106,8 +106,8 @@ up_lowputc: str r0, [r2, #UART_THR_OFFS] - /* Wait for the tranmsit holding regiser (THR) to be - * emptied. This is detemined when bit 6 of the LSR + /* Wait for the tranmsit holding register (THR) to be + * emptied. This is determined when bit 6 of the LSR * is set. */ diff --git a/arch/arm/src/c5471/c5471_serial.c b/arch/arm/src/c5471/c5471_serial.c index f9fced93423..4ad0a741a09 100644 --- a/arch/arm/src/c5471/c5471_serial.c +++ b/arch/arm/src/c5471/c5471_serial.c @@ -528,7 +528,7 @@ static void up_detach(struct uart_dev_s *dev) * when an interrupt received on the 'irq' It should call * uart_transmitchars or uart_receivechar to perform the * appropriate data transfers. The interrupt handling logic\ - * must be able to map the 'irq' number into the approprite + * must be able to map the 'irq' number into the appropriate * uart_dev_s structure in order to call these functions. * ****************************************************************************/ @@ -789,7 +789,7 @@ static bool up_txempty(struct uart_dev_s *dev) } /**************************************************************************** - * Public Funtions + * Public Functions ****************************************************************************/ #ifdef USE_EARLYSERIALINIT diff --git a/arch/arm/src/c5471/c5471_watchdog.c b/arch/arm/src/c5471/c5471_watchdog.c index 806851ca6b7..5541954fddd 100644 --- a/arch/arm/src/c5471/c5471_watchdog.c +++ b/arch/arm/src/c5471/c5471_watchdog.c @@ -254,7 +254,7 @@ static int wdt_interrupt(int irq, void *context, FAR void *arg) static ssize_t wdt_read(struct file *filep, char *buffer, size_t buflen) { - /* We are going to return "NNNNNNNN NNNNNNNN." The followig logic will + /* We are going to return "NNNNNNNN NNNNNNNN." The following logic will * not work if the user provides a buffer smaller than 18 bytes. */ diff --git a/arch/arm/src/c5471/chip.h b/arch/arm/src/c5471/chip.h index 17860089f15..83bb8f340b9 100644 --- a/arch/arm/src/c5471/chip.h +++ b/arch/arm/src/c5471/chip.h @@ -53,7 +53,7 @@ #define EIM_CPU_TXBA 0xffff0008 /* CPU TX descriptors base address */ #define EIM_CPU_RXBA 0xffff000c /* CPU RX descriptors base address */ #define EIM_BUFSIZE 0xffff0010 /* Packet buffer size register */ -#define EIM_CPU_FILTER 0xffff0014 /* CPU filtering contol registers */ +#define EIM_CPU_FILTER 0xffff0014 /* CPU filtering control registers */ #define EIM_CPU_DAHI 0xffff0018 /* CPU destination address (HI) */ #define EIM_CPU_DALO 0xffff001c /* CPU destination address (LO) */ #define EIM_MFVHI 0xffff0020 /* Multicast filter valid (HI) */ diff --git a/arch/arm/src/cxd56xx/Kconfig b/arch/arm/src/cxd56xx/Kconfig index 87de661057f..84a58ede598 100644 --- a/arch/arm/src/cxd56xx/Kconfig +++ b/arch/arm/src/cxd56xx/Kconfig @@ -92,7 +92,7 @@ config CXD56_FARAPI_VERSION_CHECK default y ---help--- Enable the Far API version compatibility check. If the version - mismatch is deteced during system bootup, the target system shows + mismatch is detected during system bootup, the target system shows the message to update the loader and gnssfw firmwares. if CXD56_FARAPI_VERSION_CHECK @@ -1026,7 +1026,7 @@ config CXD56_SFC_VERIFY_WRITE bool "Enable write with verify" default n ---help--- - Enalbe SPI flash write function with verify. + Enable SPI flash write function with verify. endif # CXD56_SFC diff --git a/arch/arm/src/cxd56xx/cxd56_adc.c b/arch/arm/src/cxd56xx/cxd56_adc.c index 418a2a19378..a627a6b3c5d 100644 --- a/arch/arm/src/cxd56xx/cxd56_adc.c +++ b/arch/arm/src/cxd56xx/cxd56_adc.c @@ -143,7 +143,7 @@ typedef enum adc_ch struct cxd56adc_dev_s { - adc_ch_t ch; /* adc cnannel number */ + adc_ch_t ch; /* adc channel number */ FAR struct seq_s *seq; /* sequencer */ uint8_t freq; /* coefficient of adc sampling frequency */ uint16_t fsize; /* SCU FIFO size */ diff --git a/arch/arm/src/cxd56xx/cxd56_cisif.c b/arch/arm/src/cxd56xx/cxd56_cisif.c index dc6bd954592..c5bdbbc253b 100644 --- a/arch/arm/src/cxd56xx/cxd56_cisif.c +++ b/arch/arm/src/cxd56xx/cxd56_cisif.c @@ -91,7 +91,7 @@ #define YUV_SIZE(v, h) (v * h * 2) -/* Check Buffer address alignement */ +/* Check Buffer address alignment */ #define CISIF_BUFADDR_ALIGNMENT (32) #define ILLEGAL_BUFADDR_ALIGNMENT(addr) (((addr) == NULL) || \ diff --git a/arch/arm/src/cxd56xx/cxd56_config.h b/arch/arm/src/cxd56xx/cxd56_config.h index c95017e80cb..f7ec6c1a967 100644 --- a/arch/arm/src/cxd56xx/cxd56_config.h +++ b/arch/arm/src/cxd56xx/cxd56_config.h @@ -56,7 +56,7 @@ # define HAVE_UART 1 #endif -/* Make sure all features are disabled for diabled U[S]ARTs. This simplifies +/* Make sure all features are disabled for disabled U[S]ARTs. This simplifies * checking later. */ diff --git a/arch/arm/src/cxd56xx/cxd56_cpustart.c b/arch/arm/src/cxd56xx/cxd56_cpustart.c index ed27019e1b4..ff4022298a8 100644 --- a/arch/arm/src/cxd56xx/cxd56_cpustart.c +++ b/arch/arm/src/cxd56xx/cxd56_cpustart.c @@ -155,7 +155,7 @@ static void appdsp_boot(void) * * Each CPU is provided the entry point to is IDLE task when started. A * TCB for each CPU's IDLE task has been initialized and placed in the - * CPU's g_assignedtasks[cpu] list. Not stack has been alloced or + * CPU's g_assignedtasks[cpu] list. Not stack has been allocated or * initialized. * * The OS initialization logic calls this function repeatedly until each @@ -236,7 +236,7 @@ int up_cpu_start(int cpu) putreg32(0, CXD56_CPU_P2_INT); - /* Setup SW_INT fot this APP_DSP0 */ + /* Setup SW_INT for this APP_DSP0 */ irq_attach(CXD56_IRQ_SW_INT, arm_pause_handler, NULL); up_enable_irq(CXD56_IRQ_SW_INT); diff --git a/arch/arm/src/cxd56xx/cxd56_irq.c b/arch/arm/src/cxd56xx/cxd56_irq.c index 0905a7514bf..af0ec180198 100644 --- a/arch/arm/src/cxd56xx/cxd56_irq.c +++ b/arch/arm/src/cxd56xx/cxd56_irq.c @@ -448,7 +448,7 @@ void up_disable_irq(int irq) return; } - /* If a defferent cpu requested, send an irq request */ + /* If a different cpu requested, send an irq request */ if (cpu != (int8_t)up_cpu_index()) { diff --git a/arch/arm/src/cxd56xx/cxd56_pmic.c b/arch/arm/src/cxd56xx/cxd56_pmic.c index 68e7bcaa07b..c2350f057d9 100644 --- a/arch/arm/src/cxd56xx/cxd56_pmic.c +++ b/arch/arm/src/cxd56xx/cxd56_pmic.c @@ -281,7 +281,7 @@ static int pmic_int_handler(int irq, void *context, void *arg) * * Description: * Get Raw Interrupt Status register. And furthermore, if status is set, - * then clear the interrupt. Register's decription is below: + * then clear the interrupt. Register's description is below: * * 7 6 5 4 3 2 1 0 * +---------------+-----+-----+-----+-----+ @@ -306,7 +306,7 @@ int cxd56_pmic_get_interrupt_status(uint8_t *status) * Name: cxd56_pmic_set_gpo_reg * * Description: - * Set GPO register. Register's decription is below: + * Set GPO register. Register's description is below: * * 7 6 5 4 3 2 1 0 * +---+---+---+---+---+---+---+---+ @@ -489,7 +489,7 @@ bool cxd56_pmic_get_gpo(uint8_t chset) * Name: cxd56_pmic_set_loadswitch_reg * * Description: - * Set LoadSwitch register. Register's decription is below: + * Set LoadSwitch register. Register's description is below: * * 7 6 5 4 3 2 1 0 * +---+---+---+---+---+---+---+---+ @@ -585,7 +585,7 @@ bool cxd56_pmic_get_loadswitch(uint8_t chset) * Name: cxd56_pmic_set_ddc_ldo_reg * * Description: - * Set DDC/LDO register. Register's decription is below: + * Set DDC/LDO register. Register's description is below: * * 7 6 5 4 3 2 1 0 * +----+----+----+----+----+----+----+----+ diff --git a/arch/arm/src/cxd56xx/cxd56_pmic.h b/arch/arm/src/cxd56xx/cxd56_pmic.h index fa624bbd322..2e85dc47120 100644 --- a/arch/arm/src/cxd56xx/cxd56_pmic.h +++ b/arch/arm/src/cxd56xx/cxd56_pmic.h @@ -213,7 +213,7 @@ extern "C" * * Description: * Get Raw Interrupt Status register. And furthermore, if status is set, - * then clear the interrupt. Register's decription is below: + * then clear the interrupt. Register's description is below: * * 7 6 5 4 3 2 1 0 * +---------------+-----+-----+-----+-----+ @@ -235,7 +235,7 @@ int cxd56_pmic_get_interrupt_status(FAR uint8_t *status); * Name: cxd56_pmic_set_gpo_reg * * Description: - * Set GPO register. Register's decription is below: + * Set GPO register. Register's description is below: * * 7 6 5 4 3 2 1 0 * +---+---+---+---+---+---+---+---+ @@ -313,7 +313,7 @@ bool cxd56_pmic_get_gpo(uint8_t chset); * Name: cxd56_pmic_set_loadswitch_reg * * Description: - * Set LoadSwitch register. Register's decription is below: + * Set LoadSwitch register. Register's description is below: * * 7 6 5 4 3 2 1 0 * +---+---+---+---+---+---+---+---+ @@ -371,7 +371,7 @@ bool cxd56_pmic_get_loadswitch(uint8_t chset); * Name: cxd56_pmic_set_ddc_ldo_reg * * Description: - * Set DDC/LDO register. Register's decription is below: + * Set DDC/LDO register. Register's description is below: * * 7 6 5 4 3 2 1 0 * +----+----+----+----+----+----+----+----+ diff --git a/arch/arm/src/cxd56xx/cxd56_powermgr.c b/arch/arm/src/cxd56xx/cxd56_powermgr.c index 5e6f8198f06..5ab9cf16c27 100644 --- a/arch/arm/src/cxd56xx/cxd56_powermgr.c +++ b/arch/arm/src/cxd56xx/cxd56_powermgr.c @@ -217,7 +217,7 @@ static int cxd56_pmsendmsg(int mid, uint32_t data) iccmsg_t msg; msg.cpuid = 0; - msg.msgid = 0; /* Power manger message does not used this field. */ + msg.msgid = 0; /* Power manager message does not used this field. */ msg.protodata = mid; msg.data = data; return cxd56_iccsend(CXD56_PROTO_PM, &msg, 0); @@ -869,7 +869,7 @@ uint32_t up_pm_get_bootmask(void) * Enable the boot cause of the specified bit. * * Parameter: - * mask - OR of Boot mask definied as PM_BOOT_XXX + * mask - OR of Boot mask defined as PM_BOOT_XXX * * Return: * Updated boot mask @@ -908,7 +908,7 @@ uint32_t up_pm_set_bootmask(uint32_t mask) * Disable the boot cause of the specified bit. * * Parameter: - * mask - OR of Boot mask definied as PM_BOOT_XXX + * mask - OR of Boot mask defined as PM_BOOT_XXX * * Return: * Updated boot mask diff --git a/arch/arm/src/cxd56xx/cxd56_pwm.c b/arch/arm/src/cxd56xx/cxd56_pwm.c index d5cbb86b98e..0b0ba0d9535 100644 --- a/arch/arm/src/cxd56xx/cxd56_pwm.c +++ b/arch/arm/src/cxd56xx/cxd56_pwm.c @@ -258,7 +258,7 @@ static int convert_freq2period(uint32_t freq, ub16_t duty, uint32_t *param) return -1; } - /* calcurate period and offperiod */ + /* calculate period and offperiod */ period = (pwmfreq * 10 / freq - 5) / 10; if (period > 0xffff) diff --git a/arch/arm/src/cxd56xx/cxd56_rtc.h b/arch/arm/src/cxd56xx/cxd56_rtc.h index 222c122e450..5e7165f56fa 100644 --- a/arch/arm/src/cxd56xx/cxd56_rtc.h +++ b/arch/arm/src/cxd56xx/cxd56_rtc.h @@ -64,7 +64,7 @@ enum alm_id_e RTC_ALARM2, /* RTC ALARM 2 (relative) */ }; -/* Structure used to pass parmaters to set an alarm */ +/* Structure used to pass parameters to set an alarm */ struct alm_setalarm_s { diff --git a/arch/arm/src/cxd56xx/cxd56_sdhci.c b/arch/arm/src/cxd56xx/cxd56_sdhci.c index e01516db7e0..4b4e6253303 100644 --- a/arch/arm/src/cxd56xx/cxd56_sdhci.c +++ b/arch/arm/src/cxd56xx/cxd56_sdhci.c @@ -573,7 +573,7 @@ static void cxd56_takesem(struct cxd56_sdiodev_s *priv) * Name: cxd56_configwaitints * * Description: - * Enable/disable SDIO interrupts needed to suport the wait function + * Enable/disable SDIO interrupts needed to support the wait function * * Input Parameters: * priv - A reference to the SDIO device state structure @@ -1955,7 +1955,7 @@ static int cxd56_sdio_sendcmd(FAR struct sdio_dev_s *dev, uint32_t cmd, * Name: cxd56_blocksetup * * Description: - * Some hardward needs to be informed of the selected blocksize. + * Some hardware needs to be informed of the selected blocksize. * * Input Parameters: * dev - An instance of the SDIO device interface @@ -4516,7 +4516,7 @@ FAR struct sdio_dev_s *cxd56_sdhci_initialize(int slotno) struct cxd56_sdiodev_s *priv = &g_sdhcdev; DEBUGASSERT(slotno == 0); - /* Initalize the pins */ + /* Initialize the pins */ board_sdcard_pin_initialize(); diff --git a/arch/arm/src/cxd56xx/cxd56_sdhci.h b/arch/arm/src/cxd56xx/cxd56_sdhci.h index 6295bdc0a86..e0a4874eb2f 100644 --- a/arch/arm/src/cxd56xx/cxd56_sdhci.h +++ b/arch/arm/src/cxd56xx/cxd56_sdhci.h @@ -82,7 +82,7 @@ extern "C" #define CXD56_SDHCI_FEVT_OFFSET (0x0050) /* Force Event Register */ #define CXD56_SDHCI_ADMAES_OFFSET (0x0054) /* ADMA Error Status Register */ #define CXD56_SDHCI_ADSADDR_OFFSET (0x0058) /* ADMA System Address Register */ -#define CXD56_SDHCI_VENDSPEC_OFFSET (0x0110) /* Vender Specific Control */ +#define CXD56_SDHCI_VENDSPEC_OFFSET (0x0110) /* Vendor Specific Control */ #define CXD56_SDHCI_OTHERIOLL_OFFSET (0x021C) /* IO Pin Control */ #define CXD56_SDHCI_USERDEF1CTL_OFFSET (0x0270) /* User Define1 Control Register */ #define CXD56_SDHCI_USERDEF2CTL_OFFSET (0x0274) /* User Define2 Control Register */ diff --git a/arch/arm/src/cxd56xx/cxd56_serial.c b/arch/arm/src/cxd56xx/cxd56_serial.c index d6d29600d83..06453a9c044 100644 --- a/arch/arm/src/cxd56xx/cxd56_serial.c +++ b/arch/arm/src/cxd56xx/cxd56_serial.c @@ -880,7 +880,7 @@ static bool up_txempty(FAR struct uart_dev_s *dev) } /**************************************************************************** - * Public Funtions + * Public Functions ****************************************************************************/ /**************************************************************************** diff --git a/arch/arm/src/cxd56xx/cxd56_spi.c b/arch/arm/src/cxd56xx/cxd56_spi.c index 7b57443ff17..73b89a0dd5f 100644 --- a/arch/arm/src/cxd56xx/cxd56_spi.c +++ b/arch/arm/src/cxd56xx/cxd56_spi.c @@ -82,7 +82,7 @@ * Private Types ****************************************************************************/ -/* This structure descibes the state of the SPI driver */ +/* This structure describes the state of the SPI driver */ struct cxd56_spidev_s { @@ -399,12 +399,12 @@ static inline void spi_putreg(FAR struct cxd56_spidev_s *priv, uint8_t offset, * Name: spi_lock * * Description: - * On SPI busses where there are multiple devices, it will be necessary to - * lock SPI to have exclusive access to the busses for a sequence of + * On SPI buses where there are multiple devices, it will be necessary to + * lock SPI to have exclusive access to the buses for a sequence of * transfers. The bus should be locked before the chip is selected. After * locking the SPI bus, the caller should then also call the setfrequency, * setbits, and setmode methods to make sure that the SPI is properly - * configured for the device. If the SPI buss is being shared, then it + * configured for the device. If the SPI bus is being shared, then it * may have been left in an incompatible state. * * Input Parameters: diff --git a/arch/arm/src/cxd56xx/cxd56_start.c b/arch/arm/src/cxd56xx/cxd56_start.c index 2024ade6647..ba5712adf0a 100644 --- a/arch/arm/src/cxd56xx/cxd56_start.c +++ b/arch/arm/src/cxd56xx/cxd56_start.c @@ -49,7 +49,7 @@ * chip is disabled at reset. The boot ROM determines the boot mode based on * the OTP BOOT_SRC value or reset state pins. For flash-based parts, * the part boots from internal flash by default. - * Otherwse, the boot ROM copies the image to internal SRAM at location + * Otherwise, the boot ROM copies the image to internal SRAM at location * 0x1000:0000, sets the ARM's shadow pointer to 0x1000:0000, * and jumps to that location. * diff --git a/arch/arm/src/cxd56xx/cxd56_uart.c b/arch/arm/src/cxd56xx/cxd56_uart.c index 116e473a0b2..6ad71d781be 100644 --- a/arch/arm/src/cxd56xx/cxd56_uart.c +++ b/arch/arm/src/cxd56xx/cxd56_uart.c @@ -172,7 +172,7 @@ static uint32_t g_cr; * Configure the UART pin * * Input Parameter: - * ch - channel numer + * ch - channel number * on - true: enable pin, false: disable pin * ****************************************************************************/ diff --git a/arch/arm/src/cxd56xx/cxd56_usbdev.c b/arch/arm/src/cxd56xx/cxd56_usbdev.c index f2101df721c..9c096df51ba 100644 --- a/arch/arm/src/cxd56xx/cxd56_usbdev.c +++ b/arch/arm/src/cxd56xx/cxd56_usbdev.c @@ -3031,7 +3031,7 @@ static int cxd56_vbusninterrupt(int irq, FAR void *context, FAR void *arg) up_disable_irq(CXD56_IRQ_USB_INT); up_disable_irq(CXD56_IRQ_USB_SYS); - /* Notify dettach signal */ + /* Notify detach signal */ priv->power = 0; cxd56_notify_signal(USBDEV_STATE_DETACH, priv->power); diff --git a/arch/arm/src/cxd56xx/cxd56_wdt.c b/arch/arm/src/cxd56xx/cxd56_wdt.c index 6d53ded2c19..8cc3b6bd69c 100644 --- a/arch/arm/src/cxd56xx/cxd56_wdt.c +++ b/arch/arm/src/cxd56xx/cxd56_wdt.c @@ -106,7 +106,7 @@ static void cxd56_putreg(uint32_t regval, uintptr_t regaddr); # define cxd56_putreg(regval, regaddr) putreg32(regval, regaddr) #endif -/* Interrupt hanlding *******************************************************/ +/* Interrupt handling *******************************************************/ #ifdef CONFIG_CXD56_WDT_INTERRUPT static int cxd56_wdtinterrupt(int irq, FAR void *context, FAR void *arg); @@ -175,7 +175,7 @@ static uint32_t cxd56_getreg(uintptr_t regaddr) uint32_t regval = getreg32(regaddr); - /* Is this the same value that we read from the same registe last time? Are + /* Is this the same value that we read from the same register last time? Are * we polling the register? If so, suppress some of the output. */ @@ -400,7 +400,7 @@ static int cxd56_getstatus(FAR struct watchdog_lowerhalf_s *lower, status->timeout = priv->timeout; - /* Get the time remaining until the watchdog expires (in miliseconds) */ + /* Get the time remaining until the watchdog expires (in milliseconds) */ remain = (uint64_t)cxd56_getreg(CXD56_WDT_WDOGVALUE); status->timeleft = (uint32_t)(remain * 1000 / cxd56_get_cpu_baseclk()); @@ -448,7 +448,7 @@ static int cxd56_settimeout(FAR struct watchdog_lowerhalf_s *lower, return -EINVAL; } - /* Calculate the reload value to achiee this (appoximate) timeout. */ + /* Calculate the reload value to achiee this (approximate) timeout. */ freq = cxd56_get_cpu_baseclk(); @@ -481,7 +481,7 @@ static int cxd56_settimeout(FAR struct watchdog_lowerhalf_s *lower, priv->reload = reload; - wdinfo("reload=%u timout: %d->%d\n", reload, timeout, priv->timeout); + wdinfo("reload=%u timeout: %d->%d\n", reload, timeout, priv->timeout); /* Set the WDT register according to calculated value */ diff --git a/arch/arm/src/cxd56xx/hardware/cxd56_emmc.h b/arch/arm/src/cxd56xx/hardware/cxd56_emmc.h index 5a8ea1f9af1..2aa4724ffa8 100644 --- a/arch/arm/src/cxd56xx/hardware/cxd56_emmc.h +++ b/arch/arm/src/cxd56xx/hardware/cxd56_emmc.h @@ -287,7 +287,7 @@ /* 4bit: Reserved. * 3-2bit: Reserved for application specific command - * 1-0bit: Reserved for manifacturer testmode + * 1-0bit: Reserved for manufacturer testmode */ #define R1STATUS_ALL_ERR \ diff --git a/arch/arm/src/cxd56xx/hardware/cxd56_spi.h b/arch/arm/src/cxd56xx/hardware/cxd56_spi.h index eff67b34469..00104ef10b3 100644 --- a/arch/arm/src/cxd56xx/hardware/cxd56_spi.h +++ b/arch/arm/src/cxd56xx/hardware/cxd56_spi.h @@ -187,7 +187,7 @@ #define SPI_INT_ROR (1 << 0) /* Bit 0: RX FIFO overrun */ #define SPI_INT_RT (1 << 1) /* Bit 1: RX FIFO timeout */ #define SPI_INT_RX (1 << 2) /* Bit 2: RX FIFO at least half full */ -#define SPI_INT_TX (1 << 3 ) /* Bit 3: TX FIFO at least half empy */ +#define SPI_INT_TX (1 << 3 ) /* Bit 3: TX FIFO at least half empty */ /* Bits 4-31: Reserved */ /* DMA Control Register */ diff --git a/arch/arm/src/cxd56xx/hardware/cxd56_timer.h b/arch/arm/src/cxd56xx/hardware/cxd56_timer.h index bab7569b96c..542a6e0a556 100644 --- a/arch/arm/src/cxd56xx/hardware/cxd56_timer.h +++ b/arch/arm/src/cxd56xx/hardware/cxd56_timer.h @@ -59,7 +59,7 @@ #define CXD56_TIMER_INTCLR (0x000C) /* Clear Interrupt register [WO] */ #define CXD56_TIMER_RIS (0x0010) /* Raw Interrupt Status register [RO] */ #define CXD56_TIMER_MIS (0x0014) /* Interrupt Status register [RO] */ -#define CXD56_TIMER_BGLOAD (0x0018) /* Backround Load register [RO] */ +#define CXD56_TIMER_BGLOAD (0x0018) /* Background Load register [RO] */ #define CXD56_TIMER_ITCR (0x0F00) /* Integration Test Control register */ #define CXD56_TIMER_ITOP (0x0F04) /* Integration Test Output register [WO] */ #define CXD56_TIMER_PERIPHID0 (0x0FE0) /* Peripheral ID0 register [RO] */ diff --git a/arch/arm/src/dm320/dm320_framebuffer.c b/arch/arm/src/dm320/dm320_framebuffer.c index 94b69e65d3b..cd7b273f0f8 100644 --- a/arch/arm/src/dm320/dm320_framebuffer.c +++ b/arch/arm/src/dm320/dm320_framebuffer.c @@ -514,7 +514,7 @@ static int dm320_putcmap(FAR struct fb_vtable_s *vtable, FAR const struct fb_cma #endif #ifdef CONFIG_FB_HWCURSOR static int dm320_getcursor(FAR struct fb_vtable_s *vtable, FAR struct fb_cursorattrib_s *attrib); -static int dm320_setcursor(FAR struct fb_vtable_s *vtable, FAR struct fb_setcursor_s *setttings); +static int dm320_setcursor(FAR struct fb_vtable_s *vtable, FAR struct fb_setcursor_s *settings); #endif /**************************************************************************** @@ -941,7 +941,7 @@ static void dm320_hwinitialize(void) * Bits 113: Vertical line height: {1,2,4,6,8,10,12,14} CONFIG_DM320_CURSORLINEHEIGHT * 4:6: Horizontal line width: {1,4,8,16,20,24,28} CONFIG_DM320_CURSORLINEWIDTH * 7: 0=ROM lookup table, 1=RAM lookup table 0 - * 8:15: Rectangular cursor color pallette address CONFIG_DM320_CURSORCLUT + * 8:15: Rectangular cursor color palette address CONFIG_DM320_CURSORCLUT */ putreg16(DM320_RECTCURSOR_SETUP, DM320_OSD_RECTCUR); diff --git a/arch/arm/src/dm320/dm320_irq.c b/arch/arm/src/dm320/dm320_irq.c index e7bfff04bbc..6564fef0704 100644 --- a/arch/arm/src/dm320/dm320_irq.c +++ b/arch/arm/src/dm320/dm320_irq.c @@ -216,7 +216,7 @@ void up_enable_irq(int irq) void up_ack_irq(int irq) { - /* Acknowlege the interrupt by setting the corresponding bit in the + /* Acknowledge the interrupt by setting the corresponding bit in the * IRQ status register. */ diff --git a/arch/arm/src/dm320/dm320_lowputc.S b/arch/arm/src/dm320/dm320_lowputc.S index 9e23e410aae..5e1f03f5d04 100644 --- a/arch/arm/src/dm320/dm320_lowputc.S +++ b/arch/arm/src/dm320/dm320_lowputc.S @@ -108,8 +108,8 @@ up_lowputc: strh r0, [r2, #UART_DTRR] - /* Wait for the tranmsit regiser to be emptied. This is - * detemined when TX register empty bit of the SR is zero. + /* Wait for the tranmsit register to be emptied. This is + * determined when TX register empty bit of the SR is zero. */ 2: ldrh r1, [r2, #UART_SR] diff --git a/arch/arm/src/dm320/dm320_memorymap.h b/arch/arm/src/dm320/dm320_memorymap.h index 881e911b1da..d6819e74dce 100644 --- a/arch/arm/src/dm320/dm320_memorymap.h +++ b/arch/arm/src/dm320/dm320_memorymap.h @@ -53,7 +53,7 @@ /* DM320 Physical Memory Map, where: * - * CW = cachable with write buffering + * CW = cacheable with write buffering * -W = Write buffering only * -- = Neither * @@ -73,7 +73,7 @@ * so that physical memory regions is in the board-specific files. */ -/* Section/Region Name Phys Address Size TLB Enty CW */ +/* Section/Region Name Phys Address Size TLB Entry CW */ #define DM320_PERIPHERALS_PSECTION 0x00000000 /* 1Mb 1 section -- */ #define DM320_IRAM_PADDR 0x00000000 /* 16Kb 1 large page CW */ #define DM320_PERIPHERALS_PADDR 0x00030000 /* 4Kb 1 small pages -- */ diff --git a/arch/arm/src/dm320/dm320_serial.c b/arch/arm/src/dm320/dm320_serial.c index c0aef179c83..15752ff6d5d 100644 --- a/arch/arm/src/dm320/dm320_serial.c +++ b/arch/arm/src/dm320/dm320_serial.c @@ -465,7 +465,7 @@ static void up_detach(struct uart_dev_s *dev) * when an interrupt received on the 'irq' It should call * uart_transmitchars or uart_receivechar to perform the * appropriate data transfers. The interrupt handling logic\ - * must be able to map the 'irq' number into the approprite + * must be able to map the 'irq' number into the appropriate * uart_dev_s structure in order to call these functions. * ****************************************************************************/ @@ -703,7 +703,7 @@ static bool up_txempty(struct uart_dev_s *dev) } /**************************************************************************** - * Public Funtions + * Public Functions ****************************************************************************/ #ifdef USE_EARLYSERIALINIT diff --git a/arch/arm/src/dm320/dm320_usbdev.c b/arch/arm/src/dm320/dm320_usbdev.c index 55c5b422b5b..8b66cec724f 100644 --- a/arch/arm/src/dm320/dm320_usbdev.c +++ b/arch/arm/src/dm320/dm320_usbdev.c @@ -433,7 +433,7 @@ static uint8_t dm320_getreg8(uint32_t addr) uint8_t val = getreg8(addr); - /* Is this the same value that we read from the same registe last time? Are + /* Is this the same value that we read from the same register last time? Are * we polling the register? If so, suppress some of the output. */ @@ -496,7 +496,7 @@ static uint32_t dm320_getreg16(uint32_t addr) uint16_t val = getreg16(addr); - /* Is this the same value that we read from the same registe last time? Are + /* Is this the same value that we read from the same register last time? Are * we polling the register? If so, suppress some of the output. */ @@ -559,7 +559,7 @@ static uint32_t dm320_getreg32(uint32_t addr) uint32_t val = getreg32(addr); - /* Is this the same value that we read from the same registe last time? Are + /* Is this the same value that we read from the same register last time? Are * we polling the register? If so, suppress some of the output. */ diff --git a/arch/arm/src/efm32/efm32_adc.c b/arch/arm/src/efm32/efm32_adc.c index 25a9005b6f8..4227389ee75 100644 --- a/arch/arm/src/efm32/efm32_adc.c +++ b/arch/arm/src/efm32/efm32_adc.c @@ -779,7 +779,7 @@ static void adc_startconv(struct efm32_dev_s *priv, bool enable) regval = adc_getreg(priv, EFM32_ADC_CR2_OFFSET); if (enable) { - /* Start conversion of regular channles */ + /* Start conversion of regular channels */ regval |= ADC_CR2_SWSTART; } diff --git a/arch/arm/src/efm32/efm32_gpio.h b/arch/arm/src/efm32/efm32_gpio.h index 7dc6624975e..51635c3ebea 100644 --- a/arch/arm/src/efm32/efm32_gpio.h +++ b/arch/arm/src/efm32/efm32_gpio.h @@ -68,7 +68,7 @@ #define GPIO_MODE_SHIFT (12) /* Bits 12-15: Port mode */ #define GPIO_MODE_MASK (15 << GPIO_MODE_SHIFT) -#define GPIO_MODE_DOUT_SHIFT (11) /* Bit 11: Input mode modifer */ +#define GPIO_MODE_DOUT_SHIFT (11) /* Bit 11: Input mode modifier */ #define GPIO_MODE_DOUT_MASK (1 << GPIO_MODE_DOUT_SHIFT) # define GPIO_MODE_DOUT GPIO_MODE_DOUT_MASK diff --git a/arch/arm/src/efm32/efm32_i2c.c b/arch/arm/src/efm32/efm32_i2c.c index 7504aa0e365..146936be68b 100644 --- a/arch/arm/src/efm32/efm32_i2c.c +++ b/arch/arm/src/efm32/efm32_i2c.c @@ -1325,7 +1325,7 @@ static int efm32_i2c_init(FAR struct efm32_i2c_priv_s *priv) modifyreg32(EFM32_CMU_HFPERCLKEN0, 0, priv->config->clk_bit); - /* Eeset all resgister */ + /* Eeset all register */ efm32_i2c_hwreset(priv); diff --git a/arch/arm/src/efm32/efm32_rtc_burtc.c b/arch/arm/src/efm32/efm32_rtc_burtc.c index 9ce34673e41..28d8f42d8a1 100644 --- a/arch/arm/src/efm32/efm32_rtc_burtc.c +++ b/arch/arm/src/efm32/efm32_rtc_burtc.c @@ -107,23 +107,23 @@ #elif (BOARD_BURTC_PRESC == BURTC_CTRL_PRESC_DIV64) # define BURTC_CLK_DIV 128 #else -# error "BOARD_BURTC_PRESC is setted with unknown value" +# error "BOARD_BURTC_PRESC is set with unknown value" #endif #if (BOARD_BURTC_CLKSRC == BURTC_CTRL_CLKSEL_LFRCO) # if (CONFIG_RTC_FREQUENCY*BURTC_CLK_DIV != BOARD_LFRCO_FREQUENCY) -# error "CONFIG_RTC_FREQUENCY is not well be setted" +# error "CONFIG_RTC_FREQUENCY is not well be set" # endif #elif (BOARD_BURTC_CLKSRC == BURTC_CTRL_CLKSEL_LFXO) # if (CONFIG_RTC_FREQUENCY*BURTC_CLK_DIV != BOARD_LFXO_FREQUENCY) -# error "CONFIG_RTC_FREQUENCY is not well be setted" +# error "CONFIG_RTC_FREQUENCY is not well be set" # endif #elif (BOARD_BURTC_CLKSRC == BURTC_CTRL_CLKSEL_ULFRCO) # if (CONFIG_RTC_FREQUENCY*BURTC_CLK_DIV != BOARD_ULFRCO_FREQUENCY) -# error "CONFIG_RTC_FREQUENCY is not well be setted" +# error "CONFIG_RTC_FREQUENCY is not well be set" # endif #else -# error "BOARD_BURTC_CLKSRC badly setted !" +# error "BOARD_BURTC_CLKSRC badly set !" #endif #define __CNT_TOP (((uint64_t)(_BURTC_CNT_MASK))+1) @@ -266,7 +266,7 @@ static void efm32_rtc_burtc_init(void) putreg32(BURTC_FREEZE_REGFREEZE_FREEZE, EFM32_BURTC_FREEZE); - /* Restore all not setted BURTC registers to default value */ + /* Restore all not set BURTC registers to default value */ // putreg32(_BURTC_LPMODE_RESETVALUE, EFM32_BURTC_LPMODE); // putreg32(_BURTC_LFXOFDET_RESETVALUE, EFM32_BURTC_LFXOFDET); diff --git a/arch/arm/src/efm32/efm32_spi.c b/arch/arm/src/efm32/efm32_spi.c index c41f507c52f..e9925297c98 100644 --- a/arch/arm/src/efm32/efm32_spi.c +++ b/arch/arm/src/efm32/efm32_spi.c @@ -802,7 +802,7 @@ static uint32_t spi_setfrequency(struct spi_dev_s *dev, uint32_t frequency) if (frequency == priv->frequency) { - /* No... just return the actual frequency from the last calcualtion */ + /* No... just return the actual frequency from the last calculation */ actual = priv->actual; } diff --git a/arch/arm/src/efm32/efm32_timer.c b/arch/arm/src/efm32/efm32_timer.c index 86121c2d75b..63f75444947 100644 --- a/arch/arm/src/efm32/efm32_timer.c +++ b/arch/arm/src/efm32/efm32_timer.c @@ -194,11 +194,11 @@ void efm32_timer_reset(uintptr_t base) * * Input Parameters: * base - A base address of timer - * clk_freq - Clock soure of timer. - * freq - Wanted freqency. + * clk_freq - Clock source of timer. + * freq - Wanted frequency. * * Returned Value: - * prescaler setted, -1 in case of error. + * prescaler set, -1 in case of error. * ****************************************************************************/ diff --git a/arch/arm/src/efm32/efm32_usbdev.c b/arch/arm/src/efm32/efm32_usbdev.c index 5f8c9dce021..639759e9445 100644 --- a/arch/arm/src/efm32/efm32_usbdev.c +++ b/arch/arm/src/efm32/efm32_usbdev.c @@ -254,7 +254,7 @@ #define EP0 (0) -/* The set of all enpoints available to the class implementation (1-3) */ +/* The set of all endpoints available to the class implementation (1-3) */ #define EFM32_EP_AVAILABLE (0x0e) /* All available endpoints */ @@ -809,7 +809,7 @@ static uint32_t efm32_getreg(uint32_t addr) uint32_t val = getreg32(addr); - /* Is this the same value that we read from the same registe last time? Are + /* Is this the same value that we read from the same register last time? Are * we polling the register? If so, suppress some of the output. */ @@ -1398,7 +1398,7 @@ static void efm32_rxfifo_read(FAR struct efm32_ep_s *privep, int i; /* Get the address of the RxFIFO. Note: there is only one RxFIFO so - * we might as well use the addess associated with EP0. + * we might as well use the address associated with EP0. */ regaddr = EFM32_USB_FIFO_BASE(EP0); @@ -2525,7 +2525,7 @@ static inline void efm32_ep0out_setup(struct efm32_usbdev_s *priv) efm32_ep0_stall(priv); } - /* Reset state/data associated with thie SETUP request */ + /* Reset state/data associated with the SETUP request */ priv->ep0datlen = 0; } @@ -2659,7 +2659,7 @@ static inline void efm32_epout_interrupt(FAR struct efm32_usbdev_s *priv) doepint = efm32_getreg(EFM32_USB_DOEPINT(epno)); doepint &= efm32_getreg(EFM32_USB_DOEPMSK); - /* Transfer completed interrupt. This interrupt is trigged when + /* Transfer completed interrupt. This interrupt is triggered when * efm32_rxinterrupt() removes the last packet data from the RxFIFO. * In this case, core internally sets the NAK bit for this endpoint to * prevent it from receiving any more packets. @@ -2806,7 +2806,7 @@ static inline void efm32_epin_txfifoempty(FAR struct efm32_usbdev_s *priv, int e FAR struct efm32_ep_s *privep = &priv->epin[epno]; /* Continue processing the write request queue. This may mean sending - * more data from the exisiting request or terminating the current requests + * more data from the existing request or terminating the current requests * and (perhaps) starting the IN transfer from the next write request. */ @@ -4017,7 +4017,7 @@ static void efm32_ep0_configure(FAR struct efm32_usbdev_s *priv) * Name: efm32_epout_disable * * Description: - * Diable an OUT endpoint will no longer be used + * Disable an OUT endpoint will no longer be used * ****************************************************************************/ @@ -4064,7 +4064,7 @@ static void efm32_epout_disable(FAR struct efm32_ep_s *privep) efm32_putreg(USB_DOEPINT_EPDISBLD, EFM32_USB_DOEPINT(privep->epphy)); - /* Then disble the Global OUT NAK mode to continue receiving data + /* Then disable the Global OUT NAK mode to continue receiving data * from other non-disabled OUT endpoints. */ diff --git a/arch/arm/src/efm32/efm32_usbhost.c b/arch/arm/src/efm32/efm32_usbhost.c index a31b724f1b4..b09ecca4cb5 100644 --- a/arch/arm/src/efm32/efm32_usbhost.c +++ b/arch/arm/src/efm32/efm32_usbhost.c @@ -5014,7 +5014,7 @@ static void efm32_vbusdrive(FAR struct efm32_usbhost_s *priv, bool state) * Description: * Initialize/re-initialize hardware for host mode operation. At present, * this function is called only from efm32_hw_initialize(). But if OTG mode - * were supported, this function would also be called to swtich between + * were supported, this function would also be called to switch between * host and device modes on a connector ID change interrupt. * * Input Parameters: diff --git a/arch/arm/src/efm32/hardware/efm32_acmp.h b/arch/arm/src/efm32/hardware/efm32_acmp.h index 177ac49f556..2494ac4e063 100644 --- a/arch/arm/src/efm32/hardware/efm32_acmp.h +++ b/arch/arm/src/efm32/hardware/efm32_acmp.h @@ -69,7 +69,7 @@ #include "hardware/efm32_memorymap.h" #if !defined(CONFIG_EFM32_EFM32GG) -# warning This is the EFM32GG header file; Review/modification needed for this archtecture +# warning This is the EFM32GG header file; Review/modification needed for this architecture #endif /******************************************************************************************************************************* diff --git a/arch/arm/src/efm32/hardware/efm32_adc.h b/arch/arm/src/efm32/hardware/efm32_adc.h index 2d12977102d..025b095e1c7 100644 --- a/arch/arm/src/efm32/hardware/efm32_adc.h +++ b/arch/arm/src/efm32/hardware/efm32_adc.h @@ -69,7 +69,7 @@ #include "hardware/efm32_memorymap.h" #if !defined(CONFIG_EFM32_EFM32GG) -# warning This is the EFM32GG header file; Review/modification needed for this archtecture +# warning This is the EFM32GG header file; Review/modification needed for this architecture #endif /******************************************************************************************************************************* diff --git a/arch/arm/src/efm32/hardware/efm32_aes.h b/arch/arm/src/efm32/hardware/efm32_aes.h index dd7f580436d..185bf3dd83c 100644 --- a/arch/arm/src/efm32/hardware/efm32_aes.h +++ b/arch/arm/src/efm32/hardware/efm32_aes.h @@ -69,7 +69,7 @@ #include "hardware/efm32_memorymap.h" #if !defined(CONFIG_EFM32_EFM32GG) -# warning This is the EFM32GG header file; Review/modification needed for this archtecture +# warning This is the EFM32GG header file; Review/modification needed for this architecture #endif /******************************************************************************************************************************* diff --git a/arch/arm/src/efm32/hardware/efm32_burtc.h b/arch/arm/src/efm32/hardware/efm32_burtc.h index 817f2b74ba9..1cac9c353f1 100644 --- a/arch/arm/src/efm32/hardware/efm32_burtc.h +++ b/arch/arm/src/efm32/hardware/efm32_burtc.h @@ -69,7 +69,7 @@ #include "hardware/efm32_memorymap.h" #if !defined(CONFIG_EFM32_EFM32GG) -# warning This is the EFM32GG header file; Review/modification needed for this archtecture +# warning This is the EFM32GG header file; Review/modification needed for this architecture #endif /******************************************************************************************************************************* @@ -88,7 +88,7 @@ #define EFM32_BURTC_LFXOFDET_OFFSET 0x0014 /* LFXO */ #define EFM32_BURTC_STATUS_OFFSET 0x0018 /* Backup domain status */ #define EFM32_BURTC_CMD_OFFSET 0x001c /* Command Register */ -#define EFM32_BURTC_POWERDOWN_OFFSET 0x0020 /* Retention RAM power-down resgister */ +#define EFM32_BURTC_POWERDOWN_OFFSET 0x0020 /* Retention RAM power-down register */ #define EFM32_BURTC_LOCK_OFFSET 0x0024 /* Configuration Lock Register */ #define EFM32_BURTC_IF_OFFSET 0x0028 /* Interrupt Flag Register */ #define EFM32_BURTC_IFS_OFFSET 0x002c /* Interrupt Flag Set Register */ diff --git a/arch/arm/src/efm32/hardware/efm32_calibrate.h b/arch/arm/src/efm32/hardware/efm32_calibrate.h index f5c21edf6ef..e3e85a876ff 100644 --- a/arch/arm/src/efm32/hardware/efm32_calibrate.h +++ b/arch/arm/src/efm32/hardware/efm32_calibrate.h @@ -69,7 +69,7 @@ #include "hardware/efm32_memorymap.h" #if !defined(CONFIG_EFM32_EFM32GG) -# warning This is the EFM32GG header file; Review/modification needed for this archtecture +# warning This is the EFM32GG header file; Review/modification needed for this architecture #endif /******************************************************************************************************************************* diff --git a/arch/arm/src/efm32/hardware/efm32_cmu.h b/arch/arm/src/efm32/hardware/efm32_cmu.h index 67780485be2..b3f5b801ce4 100644 --- a/arch/arm/src/efm32/hardware/efm32_cmu.h +++ b/arch/arm/src/efm32/hardware/efm32_cmu.h @@ -69,7 +69,7 @@ #include "hardware/efm32_memorymap.h" #if !defined(CONFIG_EFM32_EFM32GG) && !defined(CONFIG_EFM32_EFM32G) -# warning This is the EFM32GG/G header file; Review/modification needed for this archtecture +# warning This is the EFM32GG/G header file; Review/modification needed for this architecture #endif /******************************************************************************************************************************* diff --git a/arch/arm/src/efm32/hardware/efm32_dac.h b/arch/arm/src/efm32/hardware/efm32_dac.h index 8e8d3e46b8d..12993eb4022 100644 --- a/arch/arm/src/efm32/hardware/efm32_dac.h +++ b/arch/arm/src/efm32/hardware/efm32_dac.h @@ -69,7 +69,7 @@ #include "hardware/efm32_memorymap.h" #if !defined(CONFIG_EFM32_EFM32GG) -# warning This is the EFM32GG header file; Review/modification needed for this archtecture +# warning This is the EFM32GG header file; Review/modification needed for this architecture #endif /******************************************************************************************************************************* diff --git a/arch/arm/src/efm32/hardware/efm32_devinfo.h b/arch/arm/src/efm32/hardware/efm32_devinfo.h index 455a4d7a2cb..45d02554810 100644 --- a/arch/arm/src/efm32/hardware/efm32_devinfo.h +++ b/arch/arm/src/efm32/hardware/efm32_devinfo.h @@ -69,7 +69,7 @@ #include "hardware/efm32_memorymap.h" #if !defined(CONFIG_EFM32_EFM32GG) -# warning This is the EFM32GG header file; Review/modification needed for this archtecture +# warning This is the EFM32GG header file; Review/modification needed for this architecture #endif /******************************************************************************************************************************* diff --git a/arch/arm/src/efm32/hardware/efm32_dma.h b/arch/arm/src/efm32/hardware/efm32_dma.h index 3ede28072c3..c034834d463 100644 --- a/arch/arm/src/efm32/hardware/efm32_dma.h +++ b/arch/arm/src/efm32/hardware/efm32_dma.h @@ -69,7 +69,7 @@ #include "hardware/efm32_memorymap.h" #if !defined(CONFIG_EFM32_EFM32GG) && !defined(CONFIG_EFM32_EFM32G) -# warning This is the EFM32GG/G header file; Review/modification needed for this archtecture +# warning This is the EFM32GG/G header file; Review/modification needed for this architecture #endif /******************************************************************************************************************************* diff --git a/arch/arm/src/efm32/hardware/efm32_emu.h b/arch/arm/src/efm32/hardware/efm32_emu.h index 9b8c68d1c1f..52424117266 100644 --- a/arch/arm/src/efm32/hardware/efm32_emu.h +++ b/arch/arm/src/efm32/hardware/efm32_emu.h @@ -69,7 +69,7 @@ #include "hardware/efm32_memorymap.h" #if !defined(CONFIG_EFM32_EFM32GG) -# warning This is the EFM32GG header file; Review/modification needed for this archtecture +# warning This is the EFM32GG header file; Review/modification needed for this architecture #endif /******************************************************************************************************************************* diff --git a/arch/arm/src/efm32/hardware/efm32_gpio.h b/arch/arm/src/efm32/hardware/efm32_gpio.h index 6f4f9f3b35a..c5055a0eb6d 100644 --- a/arch/arm/src/efm32/hardware/efm32_gpio.h +++ b/arch/arm/src/efm32/hardware/efm32_gpio.h @@ -69,7 +69,7 @@ #include "hardware/efm32_memorymap.h" #if !defined(CONFIG_EFM32_EFM32GG) && !defined(CONFIG_EFM32_EFM32G) -# warning This is the EFM32GG/G header file; Review/modification needed for this archtecture +# warning This is the EFM32GG/G header file; Review/modification needed for this architecture #endif /******************************************************************************************************************************* diff --git a/arch/arm/src/efm32/hardware/efm32_i2c.h b/arch/arm/src/efm32/hardware/efm32_i2c.h index c0a5af072ce..30a0ebbec1c 100644 --- a/arch/arm/src/efm32/hardware/efm32_i2c.h +++ b/arch/arm/src/efm32/hardware/efm32_i2c.h @@ -69,7 +69,7 @@ #include "hardware/efm32_memorymap.h" #if !defined(CONFIG_EFM32_EFM32GG) -# warning This is the EFM32GG header file; Review/modification needed for this archtecture +# warning This is the EFM32GG header file; Review/modification needed for this architecture #endif /******************************************************************************************************************************* diff --git a/arch/arm/src/efm32/hardware/efm32_lcd.h b/arch/arm/src/efm32/hardware/efm32_lcd.h index 62615a35e29..487f3ace18b 100644 --- a/arch/arm/src/efm32/hardware/efm32_lcd.h +++ b/arch/arm/src/efm32/hardware/efm32_lcd.h @@ -69,7 +69,7 @@ #include "hardware/efm32_memorymap.h" #if !defined(CONFIG_EFM32_EFM32GG) -# warning This is the EFM32GG header file; Review/modification needed for this archtecture +# warning This is the EFM32GG header file; Review/modification needed for this architecture #endif /******************************************************************************************************************************* diff --git a/arch/arm/src/efm32/hardware/efm32_lesense.h b/arch/arm/src/efm32/hardware/efm32_lesense.h index 84d48702c16..870e15543a1 100644 --- a/arch/arm/src/efm32/hardware/efm32_lesense.h +++ b/arch/arm/src/efm32/hardware/efm32_lesense.h @@ -69,7 +69,7 @@ #include "hardware/efm32_memorymap.h" #if !defined(CONFIG_EFM32_EFM32GG) -# warning This is the EFM32GG header file; Review/modification needed for this archtecture +# warning This is the EFM32GG header file; Review/modification needed for this architecture #endif /******************************************************************************************************************************* @@ -99,7 +99,7 @@ #define EFM32_LESENSE_IEN_OFFSET 0x004c /* Interrupt Enable Register */ #define EFM32_LESENSE_SYNCBUSY_OFFSET 0x0050 /* Synchronization Busy Register */ #define EFM32_LESENSE_ROUTE_OFFSET 0x0054 /* I/O Routing Register */ -#define EFM32_LESENSE_POWERDOWN_OFFSET 0x0058 /* LESENSE RAM power-down resgister */ +#define EFM32_LESENSE_POWERDOWN_OFFSET 0x0058 /* LESENSE RAM power-down register */ #define EFM32_LESENSE_ST_OFFSET(n) (0x0200 + ((n) << 3)) #define EFM32_LESENSE_ST0_OFFSET 0x0200 /* State 0 transition configuration offset */ diff --git a/arch/arm/src/efm32/hardware/efm32_letimer.h b/arch/arm/src/efm32/hardware/efm32_letimer.h index 5d2fa051e9f..3b1805a9a37 100644 --- a/arch/arm/src/efm32/hardware/efm32_letimer.h +++ b/arch/arm/src/efm32/hardware/efm32_letimer.h @@ -69,7 +69,7 @@ #include "hardware/efm32_memorymap.h" #if !defined(CONFIG_EFM32_EFM32GG) -# warning This is the EFM32GG header file; Review/modification needed for this archtecture +# warning This is the EFM32GG header file; Review/modification needed for this architecture #endif /******************************************************************************************************************************* diff --git a/arch/arm/src/efm32/hardware/efm32_leuart.h b/arch/arm/src/efm32/hardware/efm32_leuart.h index fbf0de77222..bacf08310a3 100644 --- a/arch/arm/src/efm32/hardware/efm32_leuart.h +++ b/arch/arm/src/efm32/hardware/efm32_leuart.h @@ -69,7 +69,7 @@ #include "hardware/efm32_memorymap.h" #if !defined(CONFIG_EFM32_EFM32GG) && !defined(CONFIG_EFM32_EFM32G) -# warning This is the EFM32GG/G header file; Review/modification needed for this archtecture +# warning This is the EFM32GG/G header file; Review/modification needed for this architecture #endif /******************************************************************************************************************************* diff --git a/arch/arm/src/efm32/hardware/efm32_pcnt.h b/arch/arm/src/efm32/hardware/efm32_pcnt.h index 5abe23f1378..63d6ab18c89 100644 --- a/arch/arm/src/efm32/hardware/efm32_pcnt.h +++ b/arch/arm/src/efm32/hardware/efm32_pcnt.h @@ -69,7 +69,7 @@ #include "hardware/efm32_memorymap.h" #if !defined(CONFIG_EFM32_EFM32GG) -# warning This is the EFM32GG header file; Review/modification needed for this archtecture +# warning This is the EFM32GG header file; Review/modification needed for this architecture #endif /******************************************************************************************************************************* diff --git a/arch/arm/src/efm32/hardware/efm32_prs.h b/arch/arm/src/efm32/hardware/efm32_prs.h index 8c83310f760..a082b3ccfa0 100644 --- a/arch/arm/src/efm32/hardware/efm32_prs.h +++ b/arch/arm/src/efm32/hardware/efm32_prs.h @@ -69,7 +69,7 @@ #include "hardware/efm32_memorymap.h" #if !defined(CONFIG_EFM32_EFM32GG) -# warning This is the EFM32GG header file; Review/modification needed for this archtecture +# warning This is the EFM32GG header file; Review/modification needed for this architecture #endif /******************************************************************************************************************************* diff --git a/arch/arm/src/efm32/hardware/efm32_rmu.h b/arch/arm/src/efm32/hardware/efm32_rmu.h index 2e34fb59575..46f725440f8 100644 --- a/arch/arm/src/efm32/hardware/efm32_rmu.h +++ b/arch/arm/src/efm32/hardware/efm32_rmu.h @@ -69,7 +69,7 @@ #include "hardware/efm32_memorymap.h" #if !defined(CONFIG_EFM32_EFM32GG) -# warning This is the EFM32GG header file; Review/modification needed for this archtecture +# warning This is the EFM32GG header file; Review/modification needed for this architecture #endif /******************************************************************************************************************************* diff --git a/arch/arm/src/efm32/hardware/efm32_romtable.h b/arch/arm/src/efm32/hardware/efm32_romtable.h index 467675c4a80..4a7eb2a2618 100644 --- a/arch/arm/src/efm32/hardware/efm32_romtable.h +++ b/arch/arm/src/efm32/hardware/efm32_romtable.h @@ -69,7 +69,7 @@ #include "hardware/efm32_memorymap.h" #if !defined(CONFIG_EFM32_EFM32GG) -# warning This is the EFM32GG header file; Review/modification needed for this archtecture +# warning This is the EFM32GG header file; Review/modification needed for this architecture #endif /******************************************************************************************************************************* @@ -82,8 +82,8 @@ #define _ROMTABLE_PID0_FAMILYLSB_MASK 0x000000C0UL /* Least Significant Bits [1:0] of CHIP FAMILY, mask */ #define _ROMTABLE_PID0_FAMILYLSB_SHIFT 6 /* Least Significant Bits [1:0] of CHIP FAMILY, shift */ -#define _ROMTABLE_PID0_REVMAJOR_MASK 0x0000003FUL /* CHIP MAJOR Revison, mask */ -#define _ROMTABLE_PID0_REVMAJOR_SHIFT 0 /* CHIP MAJOR Revison, shift */ +#define _ROMTABLE_PID0_REVMAJOR_MASK 0x0000003FUL /* CHIP MAJOR Revision, mask */ +#define _ROMTABLE_PID0_REVMAJOR_SHIFT 0 /* CHIP MAJOR Revision, shift */ #define _ROMTABLE_PID1_FAMILYMSB_MASK 0x0000000FUL /* Most Significant Bits [5:2] of CHIP FAMILY, mask */ #define _ROMTABLE_PID1_FAMILYMSB_SHIFT 0 /* Most Significant Bits [5:2] of CHIP FAMILY, shift */ diff --git a/arch/arm/src/efm32/hardware/efm32_rtc.h b/arch/arm/src/efm32/hardware/efm32_rtc.h index 0231a6b59dc..f8fc6216030 100644 --- a/arch/arm/src/efm32/hardware/efm32_rtc.h +++ b/arch/arm/src/efm32/hardware/efm32_rtc.h @@ -69,7 +69,7 @@ #include "hardware/efm32_memorymap.h" #if !defined(CONFIG_EFM32_EFM32GG) -# warning This is the EFM32GG header file; Review/modification needed for this archtecture +# warning This is the EFM32GG header file; Review/modification needed for this architecture #endif /******************************************************************************************************************************* diff --git a/arch/arm/src/efm32/hardware/efm32_timer.h b/arch/arm/src/efm32/hardware/efm32_timer.h index 55d23e014a1..19ba72bd08a 100644 --- a/arch/arm/src/efm32/hardware/efm32_timer.h +++ b/arch/arm/src/efm32/hardware/efm32_timer.h @@ -395,7 +395,7 @@ #define _TIMER_CTRL_ATI_MASK 0x10000000UL /* Bit mask for TIMER_ATI */ #define _TIMER_CTRL_ATI_DEFAULT 0x00000000UL /* Mode DEFAULT for TIMER_CTRL */ #define TIMER_CTRL_ATI_DEFAULT (_TIMER_CTRL_ATI_DEFAULT << 28) /* Shifted mode DEFAULT for TIMER_CTRL */ -#define TIMER_CTRL_RSSCOIST (0x1UL << 29) /* Reload-Start Sets Compare Ouptut initial State */ +#define TIMER_CTRL_RSSCOIST (0x1UL << 29) /* Reload-Start Sets Compare Output initial State */ #define _TIMER_CTRL_RSSCOIST_SHIFT 29 /* Shift value for TIMER_RSSCOIST */ #define _TIMER_CTRL_RSSCOIST_MASK 0x20000000UL /* Bit mask for TIMER_RSSCOIST */ #define _TIMER_CTRL_RSSCOIST_DEFAULT 0x00000000UL /* Mode DEFAULT for TIMER_CTRL */ diff --git a/arch/arm/src/efm32/hardware/efm32_usart.h b/arch/arm/src/efm32/hardware/efm32_usart.h index 613664eaf80..d744fc6d57d 100644 --- a/arch/arm/src/efm32/hardware/efm32_usart.h +++ b/arch/arm/src/efm32/hardware/efm32_usart.h @@ -69,7 +69,7 @@ #include "hardware/efm32_memorymap.h" #if !defined(CONFIG_EFM32_EFM32GG) && !defined(CONFIG_EFM32_EFM32G) -# warning This is the EFM32GG/G header file; Review/modification needed for this archtecture +# warning This is the EFM32GG/G header file; Review/modification needed for this architecture #endif /******************************************************************************************************************************* diff --git a/arch/arm/src/efm32/hardware/efm32_usb.h b/arch/arm/src/efm32/hardware/efm32_usb.h index 51213550c0c..2aeccb4893b 100644 --- a/arch/arm/src/efm32/hardware/efm32_usb.h +++ b/arch/arm/src/efm32/hardware/efm32_usb.h @@ -69,7 +69,7 @@ #include "hardware/efm32_memorymap.h" #if !defined(CONFIG_EFM32_EFM32GG) -# warning This is the EFM32GG header file; Review/modification needed for this archtecture +# warning This is the EFM32GG header file; Review/modification needed for this architecture #endif /******************************************************************************************************************************* diff --git a/arch/arm/src/efm32/hardware/efm32_vcmp.h b/arch/arm/src/efm32/hardware/efm32_vcmp.h index 8439fffb726..e0b207079df 100644 --- a/arch/arm/src/efm32/hardware/efm32_vcmp.h +++ b/arch/arm/src/efm32/hardware/efm32_vcmp.h @@ -69,7 +69,7 @@ #include "hardware/efm32_memorymap.h" #if !defined(CONFIG_EFM32_EFM32GG) -# warning This is the EFM32GG header file; Review/modification needed for this archtecture +# warning This is the EFM32GG header file; Review/modification needed for this architecture #endif /******************************************************************************************************************************* diff --git a/arch/arm/src/efm32/hardware/efm32_wdog.h b/arch/arm/src/efm32/hardware/efm32_wdog.h index c01c8c93841..2c268b8178a 100644 --- a/arch/arm/src/efm32/hardware/efm32_wdog.h +++ b/arch/arm/src/efm32/hardware/efm32_wdog.h @@ -69,7 +69,7 @@ #include "hardware/efm32_memorymap.h" #if !defined(CONFIG_EFM32_EFM32GG) -# warning This is the EFM32GG header file; Review/modification needed for this archtecture +# warning This is the EFM32GG header file; Review/modification needed for this architecture #endif /******************************************************************************************************************************* diff --git a/arch/arm/src/imx1/imx_boot.c b/arch/arm/src/imx1/imx_boot.c index d4d44d75a8d..4ee0f36b24f 100644 --- a/arch/arm/src/imx1/imx_boot.c +++ b/arch/arm/src/imx1/imx_boot.c @@ -209,7 +209,7 @@ void arm_boot(void) up_copyvectorblock(); - /* Perform board-specific initialiation */ + /* Perform board-specific initialization */ imx_board_initialize(); diff --git a/arch/arm/src/imx1/imx_gpio.c b/arch/arm/src/imx1/imx_gpio.c index 6789f202ebf..60514e038aa 100644 --- a/arch/arm/src/imx1/imx_gpio.c +++ b/arch/arm/src/imx1/imx_gpio.c @@ -44,7 +44,7 @@ #include "imx_gpio.h" /**************************************************************************** - * Public Funtions + * Public Functions ****************************************************************************/ /**************************************************************************** diff --git a/arch/arm/src/imx1/imx_irq.c b/arch/arm/src/imx1/imx_irq.c index 038a60ad647..d1297bdcf22 100644 --- a/arch/arm/src/imx1/imx_irq.c +++ b/arch/arm/src/imx1/imx_irq.c @@ -72,7 +72,7 @@ volatile uint32_t *g_current_regs[1]; ****************************************************************************/ /**************************************************************************** - * Public Funtions + * Public Functions ****************************************************************************/ /**************************************************************************** diff --git a/arch/arm/src/imx1/imx_lowputc.S b/arch/arm/src/imx1/imx_lowputc.S index 4ed54701a03..2bb9c6c4a26 100644 --- a/arch/arm/src/imx1/imx_lowputc.S +++ b/arch/arm/src/imx1/imx_lowputc.S @@ -115,7 +115,7 @@ up_lowputc: moveq r0, #'\r' beq 1b - /* Wait for the tranmsit regiser to be emptied. When the bit is + /* Wait for the tranmsit register to be emptied. When the bit is * non-zero, the TX Buffer FIFO is empty. */ diff --git a/arch/arm/src/imx1/imx_serial.c b/arch/arm/src/imx1/imx_serial.c index 98f04d8536a..84a97024225 100644 --- a/arch/arm/src/imx1/imx_serial.c +++ b/arch/arm/src/imx1/imx_serial.c @@ -660,7 +660,7 @@ static int up_setup(struct uart_dev_s *dev) up_serialout(priv, UART_UBIR, den - 1); up_serialout(priv, UART_UBMR, num - 1); - /* Fixup the divisor, the value in the UFCR regiser is + /* Fixup the divisor, the value in the UFCR register is * * 000 = Divide input clock by 6 * 001 = Divide input clock by 5 @@ -815,7 +815,7 @@ static void up_detach(struct uart_dev_s *dev) * when an interrupt received on the 'irq' It should call * uart_transmitchars or uart_receivechar to perform the * appropriate data transfers. The interrupt handling logic\ - * must be able to map the 'irq' number into the approprite + * must be able to map the 'irq' number into the appropriate * uart_dev_s structure in order to call these functions. * ****************************************************************************/ @@ -1057,7 +1057,7 @@ static bool up_txempty(struct uart_dev_s *dev) } /**************************************************************************** - * Public Funtions + * Public Functions ****************************************************************************/ #ifdef USE_EARLYSERIALINIT diff --git a/arch/arm/src/imx1/imx_spi.c b/arch/arm/src/imx1/imx_spi.c index 2dd37f591fa..8c486050e94 100644 --- a/arch/arm/src/imx1/imx_spi.c +++ b/arch/arm/src/imx1/imx_spi.c @@ -211,7 +211,7 @@ static const struct spi_ops_s g_spiops = #endif }; -/* This supports is up to two SPI busses/ports */ +/* This supports is up to two SPI buses/ports */ static struct imx_spidev_s g_spidev[] = { @@ -326,7 +326,7 @@ static void spi_txuint8(struct imx_spidev_s *priv) * Description: * Discard input, save a uint8_t, or or save a uint16_t from Tx FIFO in the * user rxvbuffer and update the rxbuffer pointer appropriately. The - * selected function dependes on (1) if there is a desination rxbuffer + * selected function dependes on (1) if there is a destination rxbuffer * provided, and (2) if the number of bits per word is <=8 or >8. * * Input Parameters: @@ -603,7 +603,7 @@ static int spi_transfer(struct imx_spidev_s *priv, const void *txbuffer, * * Returned Value: * On success, a reference to the private data structgure for this IRQ. - * NULL on failrue. + * NULL on failure. * ****************************************************************************/ @@ -683,12 +683,12 @@ static int spi_interrupt(int irq, void *context, FAR void *arg, FAR void *arg) * Name: spi_lock * * Description: - * On SPI busses where there are multiple devices, it will be necessary to - * lock SPI to have exclusive access to the busses for a sequence of + * On SPI buses where there are multiple devices, it will be necessary to + * lock SPI to have exclusive access to the buses for a sequence of * transfers. The bus should be locked before the chip is selected. After * locking the SPI bus, the caller should then also call the setfrequency, * setbits, and setmode methods to make sure that the SPI is properly - * configured for the device. If the SPI buss is being shared, then it + * configured for the device. If the SPI bus is being shared, then it * may have been left in an incompatible state. * * Input Parameters: diff --git a/arch/arm/src/imx1/imx_system.h b/arch/arm/src/imx1/imx_system.h index 82733dca78a..3eefaf22cc4 100644 --- a/arch/arm/src/imx1/imx_system.h +++ b/arch/arm/src/imx1/imx_system.h @@ -69,7 +69,7 @@ #define PLL_MPCTL1_OFFSET 0x0008 /* MCU PLL & System Clock Control Register 1 */ #define PLL_SPCTL0_OFFSET 0x000c /* System PLL Control Register 0 */ #define PLL_SPCTL1_OFFSET 0x0010 /* System PLL Control Register 1 */ -#define PLL_PCDR_OFFSET 0x0020 /* Peripherial Clock Divider Register */ +#define PLL_PCDR_OFFSET 0x0020 /* Peripheral Clock Divider Register */ /* PLL Register Addresses ***********************************************************/ @@ -145,7 +145,7 @@ #define SC_RSR_OFFSET 0x0000 /* Reset Source Register */ #define SC_SIDR_OFFSET 0x0004 /* Silicon ID Register */ #define SC_FMCR_OFFSET 0x0008 /* Function Muxing Control Register */ -#define SC_GPCR_OFFSET 0x000c /* Global Peripheral Control Regiser */ +#define SC_GPCR_OFFSET 0x000c /* Global Peripheral Control Register */ /* SC Register Addresses ************************************************************/ diff --git a/arch/arm/src/imx1/imx_timer.h b/arch/arm/src/imx1/imx_timer.h index 92b0a4d032e..6728e87c722 100644 --- a/arch/arm/src/imx1/imx_timer.h +++ b/arch/arm/src/imx1/imx_timer.h @@ -50,7 +50,7 @@ #define TIMER_TPRER_OFFSET 0x0004 /* Timer prescaler register */ #define TIMER_TCMP_OFFSET 0x0008 /* Timer compare register */ #define TIMER_TCR_OFFSET 0x000c /* Timer capture register */ -#define TIMER_TCN_OFFSET 0x0010 /* Timer counter regiser */ +#define TIMER_TCN_OFFSET 0x0010 /* Timer counter register */ #define TIMER_TSTAT_OFFSET 0x0014 /* Timer status register */ /* Timer Register Addresses *********************************************************/ diff --git a/arch/arm/src/imx6/hardware/imx_ccm.h b/arch/arm/src/imx6/hardware/imx_ccm.h index 9f51d617f55..7c5036eaad8 100644 --- a/arch/arm/src/imx6/hardware/imx_ccm.h +++ b/arch/arm/src/imx6/hardware/imx_ccm.h @@ -83,7 +83,7 @@ #define IMX_CCM_CCGR4_OFFSET 0x0078 /* CCM Clock Gating Register 4 */ #define IMX_CCM_CCGR5_OFFSET 0x007c /* CCM Clock Gating Register 5 */ #define IMX_CCM_CCGR6_OFFSET 0x0080 /* CCM Clock Gating Register 6 */ -#define IMX_CCM_CMEOR_OFFSET 0x0088 /* CCM Module Enable Overide Register */ +#define IMX_CCM_CMEOR_OFFSET 0x0088 /* CCM Module Enable Override Register */ /* CCM Register Addresses ***********************************************************/ @@ -1019,17 +1019,17 @@ #define CCM_CCGR6_CG15_MASK (3 << CCM_CCGR6_CG15_SHIFT) # define CCM_CCGR6_CG15(n) ((uint32_t)(n) << CCM_CCGR6_CG15_SHIFT) -/* CCM Module Enable Overide Register */ +/* CCM Module Enable Override Register */ -#define CCM_CMEOR_MOD_EN_OV_VDOA (1 << 4) /* Bit 4: Overide clock enable signal from vdoa */ -#define CCM_CMEOR_MOD_EN_OV_GPT (1 << 5) /* Bit 5: Overide clock enable signal from GPT */ -#define CCM_CMEOR_MOD_EN_OV_EPIT (1 << 6) /* Bit 6: Overide clock enable signal from EPIT */ -#define CCM_CMEOR_MOD_EN_USDHC (1 << 7) /* Bit 7: Overide clock enable signal from USDHC */ -#define CCM_CMEOR_MOD_EN_OV_DAP (1 << 8) /* Bit 8: Overide clock enable signal from DAP */ -#define CCM_CMEOR_MOD_EN_OV_VPU (1 << 9) /* Bit 9: Overide clock enable signal from VPU */ -#define CCM_CMEOR_MOD_EN_OV_GPU2D (1 << 10) /* Bit 10: Overide clock enable signal from GPU2D */ -#define CCM_CMEOR_MOD_EN_OV_GPU3D (1 << 11) /* Bit 11: Overide clock enable signal from GPU3D */ -#define CCM_CMEOR_MOD_EN_OV_CAN2_CPI (1 << 28) /* Bit 28: Overide clock enable signal from CAN2 */ -#define CCM_CMEOR_MOD_EN_OV_CAN1_CPI (1 << 30) /* Bit 30: Overide clock enable signal from CAN1 */ +#define CCM_CMEOR_MOD_EN_OV_VDOA (1 << 4) /* Bit 4: Override clock enable signal from vdoa */ +#define CCM_CMEOR_MOD_EN_OV_GPT (1 << 5) /* Bit 5: Override clock enable signal from GPT */ +#define CCM_CMEOR_MOD_EN_OV_EPIT (1 << 6) /* Bit 6: Override clock enable signal from EPIT */ +#define CCM_CMEOR_MOD_EN_USDHC (1 << 7) /* Bit 7: Override clock enable signal from USDHC */ +#define CCM_CMEOR_MOD_EN_OV_DAP (1 << 8) /* Bit 8: Override clock enable signal from DAP */ +#define CCM_CMEOR_MOD_EN_OV_VPU (1 << 9) /* Bit 9: Override clock enable signal from VPU */ +#define CCM_CMEOR_MOD_EN_OV_GPU2D (1 << 10) /* Bit 10: Override clock enable signal from GPU2D */ +#define CCM_CMEOR_MOD_EN_OV_GPU3D (1 << 11) /* Bit 11: Override clock enable signal from GPU3D */ +#define CCM_CMEOR_MOD_EN_OV_CAN2_CPI (1 << 28) /* Bit 28: Override clock enable signal from CAN2 */ +#define CCM_CMEOR_MOD_EN_OV_CAN1_CPI (1 << 30) /* Bit 30: Override clock enable signal from CAN1 */ #endif /* __ARCH_ARM_SRC_IMX6_HARDWARE_IMX_CCM_H */ diff --git a/arch/arm/src/imx6/hardware/imx_memorymap.h b/arch/arm/src/imx6/hardware/imx_memorymap.h index c8f7363228d..1926e2dae10 100644 --- a/arch/arm/src/imx6/hardware/imx_memorymap.h +++ b/arch/arm/src/imx6/hardware/imx_memorymap.h @@ -89,7 +89,7 @@ * - i.MX6 AIPS-2 Virtual Base Addresses * - i.MX6 DAP AIPS-2 Virtual Base Addresses * - i.MX6 SATA Virtual Base Addresses - * - NuttX vitual base address + * - NuttX virtual base address * MMU Page Table Location * Page table start addresses * Base address of the interrupt vector table @@ -539,7 +539,7 @@ /* i.MX6 Virtual (mapped) Memory Map * * board_memorymap.h contains special mappings that are needed when a ROM - * memory map is used. It is included in this odd location becaue it depends + * memory map is used. It is included in this odd location because it depends * on some the virtual address definitions provided above. */ @@ -780,7 +780,7 @@ * are a few conditions that affect this: * * If CONFIG_ARCH_ROMPGTABLE, then the page table resides in ROM and we will - * not use any page table in RAM, and in that case the user must sepcify the + * not use any page table in RAM, and in that case the user must specify the * address of the page table explicitly by defining PGTABLE_BASE_VADDR and * PGTABLE_BASE_PADDR in the board.h file. */ diff --git a/arch/arm/src/imx6/hardware/imx_pinmux.h b/arch/arm/src/imx6/hardware/imx_pinmux.h index 741648db757..d0cc9cc2545 100644 --- a/arch/arm/src/imx6/hardware/imx_pinmux.h +++ b/arch/arm/src/imx6/hardware/imx_pinmux.h @@ -955,7 +955,7 @@ #define GPIO_WDOG2_3 (GPIO_PERIPH | GPIO_ALT4 | GPIO_PADMUX(IMX_PADMUX_SD1_DATA3_INDEX)) #define GPIO_WDOG2_RESET_DEB (GPIO_PERIPH | GPIO_ALT6 | GPIO_PADMUX(IMX_PADMUX_SD1_DATA3_INDEX)) -/* Crystal Osciallator */ +/* Crystal Oscillator */ #define GPIO_XTALOSC_OSC32K_32K_OUT_1 (GPIO_PERIPH | GPIO_ALT0 | GPIO_PADMUX(IMX_PADMUX_ENET_RX_DATA0_INDEX)) #define GPIO_XTALOSC_OSC32K_32K_OUT_2 (GPIO_PERIPH | GPIO_ALT0 | GPIO_PADMUX(IMX_PADMUX_KEY_ROW3_INDEX)) diff --git a/arch/arm/src/imx6/imx_boot.c b/arch/arm/src/imx6/imx_boot.c index c5c937148ce..f4239736239 100644 --- a/arch/arm/src/imx6/imx_boot.c +++ b/arch/arm/src/imx6/imx_boot.c @@ -366,7 +366,7 @@ static inline void imx_wdtdisable(void) * a. Stack Setup for ARM supervisor mode * b. Main Oscillator Detection: The bootloader attempts to use an * external crystal. If this is not successful, then the 12 MHz - * Fast RC internal oscillator is used as the main osciallator. + * Fast RC internal oscillator is used as the main oscillator. * c. Main Clock Selection: The Master Clock source is switched from * to the main oscillator without prescaler. PCK and MCK are now * the Main Clock. @@ -467,7 +467,7 @@ void arm_boot(void) PROGRESS('J'); #endif - /* Perform board-specific memroy initialization, This must include + /* Perform board-specific memory initialization, This must include * initialization of board-specific memory resources (e.g., SDRAM) * * NOTE: We must use caution prior to this point to make sure that @@ -519,7 +519,7 @@ void arm_boot(void) #endif /* Now we can enable all other CPUs. The enabled CPUs will start execution - * at __cpuN_start and, after very low-level CPU initialzation has been + * at __cpuN_start and, after very low-level CPU initialization has been * performed, will branch to arm_cpu_boot() (see arch/arm/src/armv7-a/smp.h) */ diff --git a/arch/arm/src/imx6/imx_boot.h b/arch/arm/src/imx6/imx_boot.h index 7f98d347acd..712197b0027 100644 --- a/arch/arm/src/imx6/imx_boot.h +++ b/arch/arm/src/imx6/imx_boot.h @@ -92,7 +92,7 @@ void imx_cpu_disable(void); * * Description: * Called from CPU0 to enable all other CPUs. The enabled CPUs will start - * execution at __cpuN_start and, after very low-level CPU initialzation + * execution at __cpuN_start and, after very low-level CPU initialization * has been performed, will branch to arm_cpu_boot() * (see arch/arm/src/armv7-a/smp.h) * diff --git a/arch/arm/src/imx6/imx_cpuboot.c b/arch/arm/src/imx6/imx_cpuboot.c index 42e5d4a4e16..396c18b2699 100644 --- a/arch/arm/src/imx6/imx_cpuboot.c +++ b/arch/arm/src/imx6/imx_cpuboot.c @@ -202,7 +202,7 @@ void imx_cpu_disable(void) * * Description: * Called from CPU0 to enable all other CPUs. The enabled CPUs will start - * execution at __cpuN_start and, after very low-level CPU initialzation + * execution at __cpuN_start and, after very low-level CPU initialization * has been performed, will branch to arm_cpu_boot() * (see arch/arm/src/armv7-a/smp.h) * diff --git a/arch/arm/src/imx6/imx_ecspi.c b/arch/arm/src/imx6/imx_ecspi.c index 6fac7d1f952..17cf2bcfc67 100644 --- a/arch/arm/src/imx6/imx_ecspi.c +++ b/arch/arm/src/imx6/imx_ecspi.c @@ -279,7 +279,7 @@ static const struct spi_ops_s g_spiops = #endif }; -/* This supports is up to five SPI busses/ports */ +/* This supports is up to five SPI buses/ports */ static struct imx_spidev_s g_spidev[] = { @@ -451,7 +451,7 @@ static void spi_txuint8(struct imx_spidev_s *priv) * Description: * Discard input, save a uint8_t, or or save a uint16_t from Tx FIFO in the * user rxvbuffer and update the rxbuffer pointer appropriately. The - * selected function dependes on (1) if there is a desination rxbuffer + * selected function dependes on (1) if there is a destination rxbuffer * provided, and (2) if the number of bits per word is <=8 or >8. * * Input Parameters: @@ -768,12 +768,12 @@ static int spi_interrupt(int irq, void *context, FAR void *arg) * Name: spi_lock * * Description: - * On SPI busses where there are multiple devices, it will be necessary to - * lock SPI to have exclusive access to the busses for a sequence of + * On SPI buses where there are multiple devices, it will be necessary to + * lock SPI to have exclusive access to the buses for a sequence of * transfers. The bus should be locked before the chip is selected. After * locking the SPI bus, the caller should then also call the setfrequency, * setbits, and setmode methods to make sure that the SPI is properly - * configured for the device. If the SPI buss is being shared, then it + * configured for the device. If the SPI bus is being shared, then it * may have been left in an incompatible state. * * Input Parameters: diff --git a/arch/arm/src/imx6/imx_gpio.c b/arch/arm/src/imx6/imx_gpio.c index ddf747545b9..22aef032ed0 100644 --- a/arch/arm/src/imx6/imx_gpio.c +++ b/arch/arm/src/imx6/imx_gpio.c @@ -509,7 +509,7 @@ static inline int imx_gpio_configperiph(gpio_pinset_t pinset) } /**************************************************************************** - * Public Funtions + * Public Functions ****************************************************************************/ /**************************************************************************** @@ -525,7 +525,7 @@ int imx_config_gpio(gpio_pinset_t pinset) irqstate_t flags; int ret; - /* Configure the pin as an input initially to avoid any spurios outputs */ + /* Configure the pin as an input initially to avoid any spurious outputs */ flags = enter_critical_section(); diff --git a/arch/arm/src/imx6/imx_gpio.h b/arch/arm/src/imx6/imx_gpio.h index 088a6c2dc47..320eb1f1c0e 100644 --- a/arch/arm/src/imx6/imx_gpio.h +++ b/arch/arm/src/imx6/imx_gpio.h @@ -69,7 +69,7 @@ # define GPIO_OUTPUT (1 << GPIO_MODE_SHIFT) /* GPIO output */ # define GPIO_PERIPH (2 << GPIO_MODE_SHIFT) /* Peripheral */ -/* Initial Ouptut Value: +/* Initial Output Value: * * GPIO OUTPUT 01V. .... .... .... .... .... .... .... */ diff --git a/arch/arm/src/imx6/imx_lowputc.c b/arch/arm/src/imx6/imx_lowputc.c index 9c879a7fcc5..1740e3b464e 100644 --- a/arch/arm/src/imx6/imx_lowputc.c +++ b/arch/arm/src/imx6/imx_lowputc.c @@ -521,7 +521,7 @@ int imx_uart_configure(uint32_t base, FAR const struct uart_config_s *config) putreg32(den - 1, base + UART_UBIR_OFFSET); putreg32(num - 1, base + UART_UBMR_OFFSET); - /* Fixup the divisor, the value in the UFCR regiser is + /* Fixup the divisor, the value in the UFCR register is * * 000 = Divide input clock by 6 * 001 = Divide input clock by 5 @@ -601,7 +601,7 @@ void imx_lowputc(int ch) putreg32((uint32_t)'\r', IMX_CONSOLE_VBASE + UART_TXD_OFFSET); - /* Wait for the tranmsit regiser to be emptied. When the TXFE bit is non-zero, + /* Wait for the tranmsit register to be emptied. When the TXFE bit is non-zero, * the TX Buffer FIFO is empty. */ @@ -612,7 +612,7 @@ void imx_lowputc(int ch) putreg32((uint32_t)ch, IMX_CONSOLE_VBASE + UART_TXD_OFFSET); - /* Wait for the tranmsit regiser to be emptied. When the TXFE bit is non-zero, + /* Wait for the tranmsit register to be emptied. When the TXFE bit is non-zero, * the TX Buffer FIFO is empty. */ diff --git a/arch/arm/src/imx6/imx_serial.c b/arch/arm/src/imx6/imx_serial.c index d8ee7d22adc..b09b5bbb928 100644 --- a/arch/arm/src/imx6/imx_serial.c +++ b/arch/arm/src/imx6/imx_serial.c @@ -188,7 +188,7 @@ # define UART5_ASSIGNED 1 #endif -/* UART, if avaialble, should have been assigned to ttyS0-4. */ +/* UART, if available, should have been assigned to ttyS0-4. */ #if defined(CONFIG_IMX6_UART5) && !defined(UART5_ASSIGNED) # errnor UART5 was not assigned to a TTY. @@ -880,7 +880,7 @@ static bool imx_txempty(struct uart_dev_s *dev) } /**************************************************************************** - * Public Funtions + * Public Functions ****************************************************************************/ /**************************************************************************** @@ -896,7 +896,7 @@ static bool imx_txempty(struct uart_dev_s *dev) void imx_earlyserialinit(void) { /* NOTE: This function assumes that low level hardware configuration - * -- including all clocking and pin configuration -- was perfomed by the + * -- including all clocking and pin configuration -- was performed by the * function imx_lowsetup() earlier in the boot sequence. */ diff --git a/arch/arm/src/imxrt/Kconfig b/arch/arm/src/imxrt/Kconfig index 8ac33bb9def..ae87e2f0714 100644 --- a/arch/arm/src/imxrt/Kconfig +++ b/arch/arm/src/imxrt/Kconfig @@ -1363,10 +1363,10 @@ config IMXRT_LCD_VRAMBASE Default: SDRAM config IMXRT_LCD_REFRESH_FREQ - int "LCD refesh rate (Hz)" + int "LCD refresh rate (Hz)" default 60 ---help--- - LCD refesh rate (Hz) + LCD refresh rate (Hz) config IMXRT_LCD_BACKLIGHT bool "Enable backlight" diff --git a/arch/arm/src/imxrt/hardware/imxrt_dcdc.h b/arch/arm/src/imxrt/hardware/imxrt_dcdc.h index 1c3d4820c88..cfb73307949 100644 --- a/arch/arm/src/imxrt/hardware/imxrt_dcdc.h +++ b/arch/arm/src/imxrt/hardware/imxrt_dcdc.h @@ -141,7 +141,7 @@ #define DCDC_REG3_TARGET_LP_MASK (0x7 << DCDC_REG3_TARGET_LP_SHIFT) # define DCDC_REG3_TARGET_LP_(n) ((uint32_t)(n) << DCDC_REG3_TARGET_LP_SHIFT) /* Bit 11-23: Reserved */ -#define DCDC_REG3_MINPWR_DC_HALFCLK (1 << 24) /* Bit 24: Set DCDC clock to half freqeuncy for continuous mode */ +#define DCDC_REG3_MINPWR_DC_HALFCLK (1 << 24) /* Bit 24: Set DCDC clock to half frequency for continuous mode */ /* Bit 25-26: Reserved */ #define DCDC_REG3_MISC_DELAY_TIMING (1 << 27) /* Bit 27: Adjust delay to reduce ground noise */ #define DCDC_REG3_MISC_DISABLE_FET_LOGIC (1 << 28) /* Bit 28: Datasheet: reserved? */ diff --git a/arch/arm/src/imxrt/hardware/imxrt_enet.h b/arch/arm/src/imxrt/hardware/imxrt_enet.h index d22d36245a0..c89c6f94ff4 100644 --- a/arch/arm/src/imxrt/hardware/imxrt_enet.h +++ b/arch/arm/src/imxrt/hardware/imxrt_enet.h @@ -475,7 +475,7 @@ /* Legacy/Common TX Buffer Descriptor Bit Definitions. * * The descriptors are represented by structures Unfortunately, when the - * structures are overlayed on the data, the bytes are reversed because + * structures are overlaid on the data, the bytes are reversed because * the underlying hardware writes the data in big-endian byte order. */ diff --git a/arch/arm/src/imxrt/hardware/imxrt_usdhc.h b/arch/arm/src/imxrt/hardware/imxrt_usdhc.h index c3df2d81683..86b22a4cd9c 100644 --- a/arch/arm/src/imxrt/hardware/imxrt_usdhc.h +++ b/arch/arm/src/imxrt/hardware/imxrt_usdhc.h @@ -391,7 +391,7 @@ /* Mixer Control Register */ #define USDHC_MC_DEFAULTVAL (0x80000000) /* Bit 31 is always set */ -#define USDHC_MC_DMAEN (1 << 0) /* Bit 0: DMA Enble */ +#define USDHC_MC_DMAEN (1 << 0) /* Bit 0: DMA Enable */ #define USDHC_MC_BCEN (1 << 1) /* Bit 1: Block Count Enable */ #define USDHC_MC_AC12EN (1 << 2) /* Bit 2: Auto CMD12 Enable */ #define USDHC_MC_DDR_EN (1 << 3) /* Bit 3: DDR mode enable */ diff --git a/arch/arm/src/imxrt/hardware/rt102x/imxrt102x_ccm.h b/arch/arm/src/imxrt/hardware/rt102x/imxrt102x_ccm.h index 73e20e86af7..b8150a1463a 100644 --- a/arch/arm/src/imxrt/hardware/rt102x/imxrt102x_ccm.h +++ b/arch/arm/src/imxrt/hardware/rt102x/imxrt102x_ccm.h @@ -86,7 +86,7 @@ #define IMXRT_CCM_CCGR5_OFFSET 0x007c /* CCM Clock Gating Register 5 */ #define IMXRT_CCM_CCGR6_OFFSET 0x0080 /* CCM Clock Gating Register 6 */ /* 0x0084 Reserved */ -#define IMXRT_CCM_CMEOR_OFFSET 0x0088 /* CCM Module Enable Overide Register */ +#define IMXRT_CCM_CMEOR_OFFSET 0x0088 /* CCM Module Enable Override Register */ /* Analog */ @@ -520,7 +520,7 @@ #define CCM_CGPR_PMIC_DELAY_SCALER (1 << 0) /* Bit 0: Defines clock division of clock for stby_count */ /* Bits 1-3: Reserved */ -#define CCM_CGPR_EFUSE_PROG_SUPPLY_GATE (1 << 4) /* Bit 4: allow fuse programing */ +#define CCM_CGPR_EFUSE_PROG_SUPPLY_GATE (1 << 4) /* Bit 4: allow fuse programming */ /* Bits 5-13: Reserved */ #define CCM_CGPR_SYS_MEM_DS_CTRL_SHIFT (14) /* Bits 14-15: System memory DS control */ #define CCM_CGPR_SYS_MEM_DS_CTRL_MASK (0x7 << CCM_CGPR_SYS_MEM_DS_CTRL_SHIFT) @@ -712,13 +712,13 @@ /* Module Enable Override Register */ /* Bits 0-4: Reserved */ -#define CCM_CMEOR_MOD_EN_OV_GPT (1 << 5) /* Bit 5: Overide clock enable signal from GPT */ -#define CCM_CMEOR_MOD_EN_OV_PIT (1 << 6) /* Bit 6: Overide clock enable signal from PIT */ -#define CCM_CMEOR_MOD_EN_OV_USDHC (1 << 7) /* Bit 7: Overide clock enable signal from USDHC */ -#define CCM_CMEOR_MOD_EN_OV_TRNG (1 << 9) /* Bit 9: Overide clock enable signal from TRNG */ +#define CCM_CMEOR_MOD_EN_OV_GPT (1 << 5) /* Bit 5: Override clock enable signal from GPT */ +#define CCM_CMEOR_MOD_EN_OV_PIT (1 << 6) /* Bit 6: Override clock enable signal from PIT */ +#define CCM_CMEOR_MOD_EN_OV_USDHC (1 << 7) /* Bit 7: Override clock enable signal from USDHC */ +#define CCM_CMEOR_MOD_EN_OV_TRNG (1 << 9) /* Bit 9: Override clock enable signal from TRNG */ /* Bits 10-27: Reserved */ -#define CCM_CMEOR_MOD_EN_OV_CAN2_CPI (1 << 28) /* Bit 28: Overide clock enable signal from CAN2 */ -#define CCM_CMEOR_MOD_EN_OV_CAN1_CPI (1 << 30) /* Bit 30: Overide clock enable signal from CAN1 */ +#define CCM_CMEOR_MOD_EN_OV_CAN2_CPI (1 << 28) /* Bit 28: Override clock enable signal from CAN2 */ +#define CCM_CMEOR_MOD_EN_OV_CAN1_CPI (1 << 30) /* Bit 30: Override clock enable signal from CAN1 */ /* Bit 31: Reserved */ /* Analog System PLL (2) Control Register ***********************************/ diff --git a/arch/arm/src/imxrt/hardware/rt105x/imxrt105x_ccm.h b/arch/arm/src/imxrt/hardware/rt105x/imxrt105x_ccm.h index bc0c8fc1a57..b905f04b4fd 100644 --- a/arch/arm/src/imxrt/hardware/rt105x/imxrt105x_ccm.h +++ b/arch/arm/src/imxrt/hardware/rt105x/imxrt105x_ccm.h @@ -85,7 +85,7 @@ #define IMXRT_CCM_CCGR5_OFFSET 0x007c /* CCM Clock Gating Register 5 */ #define IMXRT_CCM_CCGR6_OFFSET 0x0080 /* CCM Clock Gating Register 6 */ /* 0x0084 Reserved */ -#define IMXRT_CCM_CMEOR_OFFSET 0x0088 /* CCM Module Enable Overide Register */ +#define IMXRT_CCM_CMEOR_OFFSET 0x0088 /* CCM Module Enable Override Register */ /* Analog */ @@ -581,7 +581,7 @@ #define CCM_CGPR_PMIC_DELAY_SCALER (1 << 0) /* Bit 0: Defines clock division of clock for stby_count */ /* Bits 1-3: Reserved */ -#define CCM_CGPR_EFUSE_PROG_SUPPLY_GATE (1 << 4) /* Bit 4: allow fuse programing */ +#define CCM_CGPR_EFUSE_PROG_SUPPLY_GATE (1 << 4) /* Bit 4: allow fuse programming */ /* Bits 5-13: Reserved */ #define CCM_CGPR_SYS_MEM_DS_CTRL_SHIFT (14) /* Bits 14-15: System memory DS control */ #define CCM_CGPR_SYS_MEM_DS_CTRL_MASK (0x7 << CCM_CGPR_SYS_MEM_DS_CTRL_SHIFT) @@ -767,13 +767,13 @@ /* Module Enable Override Register */ /* Bits 0-4: Reserved */ -#define CCM_CMEOR_MOD_EN_OV_GPT (1 << 5) /* Bit 5: Overide clock enable signal from GPT */ -#define CCM_CMEOR_MOD_EN_OV_PIT (1 << 6) /* Bit 6: Overide clock enable signal from PIT */ -#define CCM_CMEOR_MOD_EN_OV_USDHC (1 << 7) /* Bit 7: Overide clock enable signal from USDHC */ -#define CCM_CMEOR_MOD_EN_OV_TRNG (1 << 9) /* Bit 9: Overide clock enable signal from TRNG */ +#define CCM_CMEOR_MOD_EN_OV_GPT (1 << 5) /* Bit 5: Override clock enable signal from GPT */ +#define CCM_CMEOR_MOD_EN_OV_PIT (1 << 6) /* Bit 6: Override clock enable signal from PIT */ +#define CCM_CMEOR_MOD_EN_OV_USDHC (1 << 7) /* Bit 7: Override clock enable signal from USDHC */ +#define CCM_CMEOR_MOD_EN_OV_TRNG (1 << 9) /* Bit 9: Override clock enable signal from TRNG */ /* Bits 10-27: Reserved */ -#define CCM_CMEOR_MOD_EN_OV_CAN2_CPI (1 << 28) /* Bit 28: Overide clock enable signal from CAN2 */ -#define CCM_CMEOR_MOD_EN_OV_CAN1_CPI (1 << 30) /* Bit 30: Overide clock enable signal from CAN1 */ +#define CCM_CMEOR_MOD_EN_OV_CAN2_CPI (1 << 28) /* Bit 28: Override clock enable signal from CAN2 */ +#define CCM_CMEOR_MOD_EN_OV_CAN1_CPI (1 << 30) /* Bit 30: Override clock enable signal from CAN1 */ /* Bit 31: Reserved */ /* Analog ARM PLL control Register */ diff --git a/arch/arm/src/imxrt/hardware/rt106x/imxrt106x_ccm.h b/arch/arm/src/imxrt/hardware/rt106x/imxrt106x_ccm.h index f15e660b878..187ce93c6e9 100644 --- a/arch/arm/src/imxrt/hardware/rt106x/imxrt106x_ccm.h +++ b/arch/arm/src/imxrt/hardware/rt106x/imxrt106x_ccm.h @@ -85,7 +85,7 @@ #define IMXRT_CCM_CCGR5_OFFSET 0x007c /* CCM Clock Gating Register 5 */ #define IMXRT_CCM_CCGR6_OFFSET 0x0080 /* CCM Clock Gating Register 6 */ /* 0x0084 Reserved */ -#define IMXRT_CCM_CMEOR_OFFSET 0x0088 /* CCM Module Enable Overide Register */ +#define IMXRT_CCM_CMEOR_OFFSET 0x0088 /* CCM Module Enable Override Register */ /* Analog */ @@ -581,7 +581,7 @@ #define CCM_CGPR_PMIC_DELAY_SCALER (1 << 0) /* Bit 0: Defines clock division of clock for stby_count */ /* Bits 1-3: Reserved */ -#define CCM_CGPR_EFUSE_PROG_SUPPLY_GATE (1 << 4) /* Bit 4: allow fuse programing */ +#define CCM_CGPR_EFUSE_PROG_SUPPLY_GATE (1 << 4) /* Bit 4: allow fuse programming */ /* Bits 5-13: Reserved */ #define CCM_CGPR_SYS_MEM_DS_CTRL_SHIFT (14) /* Bits 14-15: System memory DS control */ #define CCM_CGPR_SYS_MEM_DS_CTRL_MASK (0x7 << CCM_CGPR_SYS_MEM_DS_CTRL_SHIFT) @@ -767,13 +767,13 @@ /* Module Enable Override Register */ /* Bits 0-4: Reserved */ -#define CCM_CMEOR_MOD_EN_OV_GPT (1 << 5) /* Bit 5: Overide clock enable signal from GPT */ -#define CCM_CMEOR_MOD_EN_OV_PIT (1 << 6) /* Bit 6: Overide clock enable signal from PIT */ -#define CCM_CMEOR_MOD_EN_OV_USDHC (1 << 7) /* Bit 7: Overide clock enable signal from USDHC */ -#define CCM_CMEOR_MOD_EN_OV_TRNG (1 << 9) /* Bit 9: Overide clock enable signal from TRNG */ +#define CCM_CMEOR_MOD_EN_OV_GPT (1 << 5) /* Bit 5: Override clock enable signal from GPT */ +#define CCM_CMEOR_MOD_EN_OV_PIT (1 << 6) /* Bit 6: Override clock enable signal from PIT */ +#define CCM_CMEOR_MOD_EN_OV_USDHC (1 << 7) /* Bit 7: Override clock enable signal from USDHC */ +#define CCM_CMEOR_MOD_EN_OV_TRNG (1 << 9) /* Bit 9: Override clock enable signal from TRNG */ /* Bits 10-27: Reserved */ -#define CCM_CMEOR_MOD_EN_OV_CAN2_CPI (1 << 28) /* Bit 28: Overide clock enable signal from CAN2 */ -#define CCM_CMEOR_MOD_EN_OV_CAN1_CPI (1 << 30) /* Bit 30: Overide clock enable signal from CAN1 */ +#define CCM_CMEOR_MOD_EN_OV_CAN2_CPI (1 << 28) /* Bit 28: Override clock enable signal from CAN2 */ +#define CCM_CMEOR_MOD_EN_OV_CAN1_CPI (1 << 30) /* Bit 30: Override clock enable signal from CAN1 */ /* Bit 31: Reserved */ /* Analog ARM PLL control Register */ diff --git a/arch/arm/src/imxrt/imxrt_ehci.c b/arch/arm/src/imxrt/imxrt_ehci.c index ec7c593d5aa..aff564e3737 100644 --- a/arch/arm/src/imxrt/imxrt_ehci.c +++ b/arch/arm/src/imxrt/imxrt_ehci.c @@ -331,7 +331,7 @@ enum usbhost_trace1codes_e EHCI_TRACE1_QTDSTATUS_FAILED, /* EHCI ERROR: imxrt_qtd_statusphase failed */ EHCI_TRACE1_TRANSFER_FAILED, /* EHCI ERROR: Transfer failed */ EHCI_TRACE1_QHFOREACH_FAILED, /* EHCI ERROR: imxrt_qh_foreach failed: */ - EHCI_TRACE1_SYSERR_INTR, /* EHCI: Host System Error Interrup */ + EHCI_TRACE1_SYSERR_INTR, /* EHCI: Host System Error Interrupt */ EHCI_TRACE1_USBERR_INTR, /* EHCI: USB Error Interrupt (USBERRINT) Interrupt */ EHCI_TRACE1_EPALLOC_FAILED, /* EHCI ERROR: Failed to allocate EP info structure */ EHCI_TRACE1_BADXFRTYPE, /* EHCI ERROR: Support for transfer type not implemented */ @@ -1621,7 +1621,7 @@ static int imxrt_ioc_wait(struct imxrt_epinfo_s *epinfo) * Name: imxrt_qh_enqueue * * Description: - * Add a new, ready-to-go QH w/attached qTDs to the asynchonous queue. + * Add a new, ready-to-go QH w/attached qTDs to the asynchronous queue. * * Assumptions: The caller holds the EHCI exclsem * @@ -2287,7 +2287,7 @@ static int imxrt_async_setup(struct imxrt_rhport_s *rhport, physaddr = imxrt_physramaddr((uintptr_t)qtd); *flink = imxrt_swap32(physaddr); - /* In an IN data qTD was also enqueued, then linke the data qTD's + /* In an IN data qTD was also enqueued, then linked the data qTD's * alternate pointer to this STATUS phase qTD in order to handle short * transfers. */ diff --git a/arch/arm/src/imxrt/imxrt_enc.c b/arch/arm/src/imxrt/imxrt_enc.c index 0cc5abd1940..7d2f9db9dc0 100644 --- a/arch/arm/src/imxrt/imxrt_enc.c +++ b/arch/arm/src/imxrt/imxrt_enc.c @@ -986,13 +986,13 @@ static int imxrt_ioctl(FAR struct qe_lowerhalf_s *lower, int cmd, struct imxrt_enc_lowerhalf_s *priv = (struct imxrt_enc_lowerhalf_s *)lower; switch (cmd) { - /* QEIOC_POSDIFF: returns the contens of the Position Difference register */ + /* QEIOC_POSDIFF: returns the content of the Position Difference register */ case QEIOC_POSDIFF: *((uint16_t *)arg) = imxrt_enc_getreg16(priv, IMXRT_ENC_POSD_OFFSET); break; - /* QEIOC_REVOLUTION: returns the contens of the Position Difference register */ + /* QEIOC_REVOLUTION: returns the content of the Position Difference register */ case QEIOC_REVOLUTION: *((uint16_t *)arg) = imxrt_enc_getreg16(priv, IMXRT_ENC_REV_OFFSET); @@ -1086,4 +1086,4 @@ int imxrt_qeinitialize(FAR const char *devpath, int enc) return ret; } -#endif /* CONFIG_IMXRT_ENC */ \ No newline at end of file +#endif /* CONFIG_IMXRT_ENC */ diff --git a/arch/arm/src/imxrt/imxrt_enet.c b/arch/arm/src/imxrt/imxrt_enet.c index 729639636c0..3c5a1cdc8bd 100644 --- a/arch/arm/src/imxrt/imxrt_enet.c +++ b/arch/arm/src/imxrt/imxrt_enet.c @@ -388,7 +388,7 @@ static void imxrt_reset(struct imxrt_driver_s *priv); * * Description: * The descriptors are represented by structures Unfortunately, when the - * structures are overlayed on the data, the bytes are reversed because + * structures are overlaid on the data, the bytes are reversed because * the underlying hardware writes the data in big-endian byte order. * * Input Parameters: diff --git a/arch/arm/src/imxrt/imxrt_gpio.h b/arch/arm/src/imxrt/imxrt_gpio.h index d54c09d0126..09265c4b196 100644 --- a/arch/arm/src/imxrt/imxrt_gpio.h +++ b/arch/arm/src/imxrt/imxrt_gpio.h @@ -78,7 +78,7 @@ # define GPIO_PERIPH (2 << GPIO_MODE_SHIFT) /* Peripheral */ # define GPIO_INTERRUPT (3 << GPIO_MODE_SHIFT) /* Interrupt input */ -/* Initial Ouptut Value: +/* Initial Output Value: * * GPIO OUTPUT 01V. .... .... .... .... .... .... .... */ diff --git a/arch/arm/src/imxrt/imxrt_lcd.c b/arch/arm/src/imxrt/imxrt_lcd.c index 215053a0d0f..52788c67695 100644 --- a/arch/arm/src/imxrt/imxrt_lcd.c +++ b/arch/arm/src/imxrt/imxrt_lcd.c @@ -694,7 +694,7 @@ void up_fbuninitialize(int display) * Description: * This is a non-standard LCD interface just for the IMXRT. Clearing * the display in the normal way by writing a sequences of runs that - * covers the entire display can be slow. Here the dispaly is cleared by + * covers the entire display can be slow. Here the display is cleared by * simply setting all VRAM memory to the specified color. * ****************************************************************************/ diff --git a/arch/arm/src/imxrt/imxrt_lowputc.c b/arch/arm/src/imxrt/imxrt_lowputc.c index f49310b56ea..d3be6c1348b 100644 --- a/arch/arm/src/imxrt/imxrt_lowputc.c +++ b/arch/arm/src/imxrt/imxrt_lowputc.c @@ -500,7 +500,7 @@ int imxrt_lpuart_configure(uint32_t base, else if (config->users485) { /* Both TX and RX side can't control RTS, so this gives - * the RX side precidence. This should have been filtered + * the RX side precedence. This should have been filtered * in layers above anyway, but it's just a precaution. */ diff --git a/arch/arm/src/imxrt/imxrt_lpi2c.c b/arch/arm/src/imxrt/imxrt_lpi2c.c index 404119efdfa..140a090e7e5 100644 --- a/arch/arm/src/imxrt/imxrt_lpi2c.c +++ b/arch/arm/src/imxrt/imxrt_lpi2c.c @@ -1268,7 +1268,7 @@ static int imxrt_lpi2c_isr_process(struct imxrt_lpi2c_priv_s *priv) imxrt_lpi2c_traceevent(priv, I2CEVENT_RCVBYTE, priv->dcnt); /* No interrupts or contex switches should occur in the following - * seuence. Otherwise, additional bytes may be sent by the device. + * sequence. Otherwise, additional bytes may be sent by the device. */ #ifdef CONFIG_I2C_POLLED diff --git a/arch/arm/src/imxrt/imxrt_lpspi.c b/arch/arm/src/imxrt/imxrt_lpspi.c index 6cfa9af17dd..d196d272796 100644 --- a/arch/arm/src/imxrt/imxrt_lpspi.c +++ b/arch/arm/src/imxrt/imxrt_lpspi.c @@ -844,12 +844,12 @@ static inline void imxrt_lpspi_master_set_delays( * Name: imxrt_lpspi_lock * * Description: - * On SPI busses where there are multiple devices, it will be necessary to - * lock SPI to have exclusive access to the busses for a sequence of + * On SPI buses where there are multiple devices, it will be necessary to + * lock SPI to have exclusive access to the buses for a sequence of * transfers. The bus should be locked before the chip is selected. After * locking the SPI bus, the caller should then also call the setfrequency, * setbits, and setmode methods to make sure that the SPI is properly - * configured for the device. If the SPI buss is being shared, then it + * configured for the device. If the SPI bus is being shared, then it * may have been left in an incompatible state. * * Input Parameters: diff --git a/arch/arm/src/imxrt/imxrt_usdhc.c b/arch/arm/src/imxrt/imxrt_usdhc.c index e98548b885e..b70392992e5 100644 --- a/arch/arm/src/imxrt/imxrt_usdhc.c +++ b/arch/arm/src/imxrt/imxrt_usdhc.c @@ -523,7 +523,7 @@ static void imxrt_takesem(struct imxrt_dev_s *priv) * Name: imxrt_configwaitints * * Description: - * Enable/disable SDIO interrupts needed to suport the wait function + * Enable/disable SDIO interrupts needed to support the wait function * * Input Parameters: * priv - A reference to the SDIO device state structure diff --git a/arch/arm/src/kinetis/hardware/kinetis_enet.h b/arch/arm/src/kinetis/hardware/kinetis_enet.h index af8609bab41..a791b502c5e 100644 --- a/arch/arm/src/kinetis/hardware/kinetis_enet.h +++ b/arch/arm/src/kinetis/hardware/kinetis_enet.h @@ -453,7 +453,7 @@ /* Legacy/Common TX Buffer Descriptor Bit Definitions. * * The descriptors are represented by structures Unfortunately, when the - * structures are overlayed on the data, the bytes are reversed because + * structures are overlaid on the data, the bytes are reversed because * the underlying hardware writes the data in big-endian byte order. */ diff --git a/arch/arm/src/kinetis/hardware/kinetis_slcd.h b/arch/arm/src/kinetis/hardware/kinetis_slcd.h index 77a85856906..3866d7d3fbb 100644 --- a/arch/arm/src/kinetis/hardware/kinetis_slcd.h +++ b/arch/arm/src/kinetis/hardware/kinetis_slcd.h @@ -108,7 +108,7 @@ #define LCD_GCR_DUTYSHIFT (0) /* Bits 0-2: LCD duty select */ #define LCD_GCR_DUTY_MASK (7 << LCD_GCR_DUTYSHIFT) -# define LCD_GCR_DUTY_BP(n) (((n)-1) << LCD_GCR_DUTYSHIFT) /* Use n BP (1/n duty cyle) */ +# define LCD_GCR_DUTY_BP(n) (((n)-1) << LCD_GCR_DUTYSHIFT) /* Use n BP (1/n duty cycle) */ #define LCD_GCR_LCLK_SHIFT (3) /* Bits 3-5: LCD clock prescaler */ #define LCD_GCR_LCLK_MASK (7 << LCD_GCR_LCLK_SHIFT) #define LCD_GCR_SOURCE (1 << 6) /* Bit 6: LCD clock source select */ diff --git a/arch/arm/src/kinetis/hardware/kinetis_usbhs.h b/arch/arm/src/kinetis/hardware/kinetis_usbhs.h index 78750b56337..4af1c3afa70 100644 --- a/arch/arm/src/kinetis/hardware/kinetis_usbhs.h +++ b/arch/arm/src/kinetis/hardware/kinetis_usbhs.h @@ -636,7 +636,7 @@ /* Endpoint Initialization Register */ /* Bits 20-31: Reserved */ -#define USBHS_EPPRIME_PETB_SHIFT (16) /* Bits 16-19: Prime Endpoint Tansmit Buffer */ +#define USBHS_EPPRIME_PETB_SHIFT (16) /* Bits 16-19: Prime Endpoint Transmit Buffer */ #define USBHS_EPPRIME_PETB_MASK (0xf << USBHS_EPPRIME_PETB_SHIFT) /* Bits 4-15: Reserved */ #define USBHS_EPPRIME_PERB_SHIFT (0) /* Bits 0-3: Prime Endpoint Receive Buffer */ @@ -760,7 +760,7 @@ #define USBPHY_CTRLn_HOST_FORCE_LS_SE0 (1 << 28) /* Bit 28: Forces next FS packet tohave a EOP with low-speed timing */ #define USBPHY_CTRLn_OTG_ID_VALUE (1 << 27) /* Bit 27: Indicates the results of USB_ID pin */ /* Bit 25-26: Reserved */ -#define USBPHY_CTRLn_FSDLL_RST_EN (1 << 24) /* Bit 24: Reset ofthe FSDLL lock detection logic at the end of each TX packet */ +#define USBPHY_CTRLn_FSDLL_RST_EN (1 << 24) /* Bit 24: Reset of the FSDLL lock detection logic at the end of each TX packet */ /* Bit 21-23: Reserved */ #define USBPHY_CTRLn_ENAUTOCLR_PHY_PWD (1 << 20) /* Bit 20: Auto-clear the PWD register bits in USBPHY_PWD if wakeup event while suspended */ #define USBPHY_CTRLn_ENAUTOCLR_CLKGATE (1 << 19) /* Bit 19: Auto-clear the CLKGATE bit if wakeup event while suspended */ diff --git a/arch/arm/src/kinetis/kinetis.h b/arch/arm/src/kinetis/kinetis.h index 20dcaf120f6..adb9b129a85 100644 --- a/arch/arm/src/kinetis/kinetis.h +++ b/arch/arm/src/kinetis/kinetis.h @@ -118,7 +118,7 @@ #define _PIN_OUTPUT_SLOW (3 << _PIN_OPTIONS_SHIFT) /* xx11 Output with slow slew rate */ #define _PIN_OUTPUT_OD_MASK (5 << _PIN_OPTIONS_SHIFT) /* x1x1 Mask to test for open drain */ #define _PIN_OUTPUT_OPENDRAIN (5 << _PIN_OPTIONS_SHIFT) /* x1x1 Output with open drain enabled */ -#define _PIN_OUTPUT_DRIVE_MASK (9 << _PIN_OPTIONS_SHIFT) /* 1xx1 Mask to test for high drive strengh */ +#define _PIN_OUTPUT_DRIVE_MASK (9 << _PIN_OPTIONS_SHIFT) /* 1xx1 Mask to test for high drive strength */ #define _PIN_OUTPUT_LOWDRIVE (1 << _PIN_OPTIONS_SHIFT) /* 0xx1 Output with low drive strength */ #define _PIN_OUTPUT_HIGHDRIVE (9 << _PIN_OPTIONS_SHIFT) /* 1xx1 Output with high drive strength */ diff --git a/arch/arm/src/kinetis/kinetis_alarm.h b/arch/arm/src/kinetis/kinetis_alarm.h index b0ca09dc8e5..b1ec7d8f517 100644 --- a/arch/arm/src/kinetis/kinetis_alarm.h +++ b/arch/arm/src/kinetis/kinetis_alarm.h @@ -74,7 +74,7 @@ enum alm_id_e RTC_ALARM_LAST }; -/* Structure used to pass parmaters to set an alarm */ +/* Structure used to pass parameters to set an alarm */ struct alm_setalarm_s { diff --git a/arch/arm/src/kinetis/kinetis_enet.c b/arch/arm/src/kinetis/kinetis_enet.c index 56eb8d97adf..79511fef639 100644 --- a/arch/arm/src/kinetis/kinetis_enet.c +++ b/arch/arm/src/kinetis/kinetis_enet.c @@ -350,7 +350,7 @@ static void kinetis_reset(struct kinetis_driver_s *priv); * * Description: * The descriptors are represented by structures Unfortunately, when the - * structures are overlayed on the data, the bytes are reversed because + * structures are overlaid on the data, the bytes are reversed because * the underlying hardware writes the data in big-endian byte order. * * Input Parameters: @@ -1803,7 +1803,7 @@ static inline int kinetis_initphy(struct kinetis_driver_s *priv) } else { - /* TODO: Autonegotitation has right now failed. Maybe the Eth cable is + /* TODO: Autonegotiation has right now failed. Maybe the Eth cable is * not connected. PHY chip have mechanisms to configure link OK. * We should leave autconf on, and find a way to re-configure the * MCU whenever the link is ready. diff --git a/arch/arm/src/kinetis/kinetis_irq.c b/arch/arm/src/kinetis/kinetis_irq.c index 85bfca16aea..62978e9424c 100644 --- a/arch/arm/src/kinetis/kinetis_irq.c +++ b/arch/arm/src/kinetis/kinetis_irq.c @@ -164,7 +164,7 @@ static void kinetis_dumpnvic(const char *msg, int irq) * kinetis_dbgmonitor, kinetis_pendsv, kinetis_reserved * * Description: - * Handlers for various execptions. None are handled and all are fatal + * Handlers for various exceptions. None are handled and all are fatal * error conditions. The only advantage these provided over the default * unexpected interrupt handler is that they provide a diagnostic output. * diff --git a/arch/arm/src/kinetis/kinetis_mpuinit.c b/arch/arm/src/kinetis/kinetis_mpuinit.c index caf44dd3399..bfcdeabbc9e 100644 --- a/arch/arm/src/kinetis/kinetis_mpuinit.c +++ b/arch/arm/src/kinetis/kinetis_mpuinit.c @@ -127,7 +127,7 @@ void kinetis_mpu_uheap(uintptr_t start, size_t size) * Name: kinetis_mpudisable * * Description: - * Configure the MPU to permit All buss masters access to all resources. + * Configure the MPU to permit All bus masters access to all resources. * ****************************************************************************/ diff --git a/arch/arm/src/kinetis/kinetis_mpuinit.h b/arch/arm/src/kinetis/kinetis_mpuinit.h index 91abf8e122d..bc1333f9617 100644 --- a/arch/arm/src/kinetis/kinetis_mpuinit.h +++ b/arch/arm/src/kinetis/kinetis_mpuinit.h @@ -65,7 +65,7 @@ void kinetis_mpuinitialize(void); * Name: kinetis_mpudisable * * Description: - * Configure the MPU to permit All buss masters access to all resources. + * Configure the MPU to permit All bus masters access to all resources. * ****************************************************************************/ diff --git a/arch/arm/src/kinetis/kinetis_pin.c b/arch/arm/src/kinetis/kinetis_pin.c index 9c76453dd4d..7b23b354dd1 100644 --- a/arch/arm/src/kinetis/kinetis_pin.c +++ b/arch/arm/src/kinetis/kinetis_pin.c @@ -61,7 +61,7 @@ * * Description: * Configure a PIN based on bit-encoded description of the pin. NOTE that - * DMA/interrupts are disabled at the initial PIN configuratin. + * DMA/interrupts are disabled at the initial PIN configuration. * ****************************************************************************/ diff --git a/arch/arm/src/kinetis/kinetis_sdhc.c b/arch/arm/src/kinetis/kinetis_sdhc.c index 8656f6d4908..81be3038d42 100644 --- a/arch/arm/src/kinetis/kinetis_sdhc.c +++ b/arch/arm/src/kinetis/kinetis_sdhc.c @@ -436,7 +436,7 @@ static void kinetis_takesem(struct kinetis_dev_s *priv) * Name: kinetis_configwaitints * * Description: - * Enable/disable SDIO interrupts needed to suport the wait function + * Enable/disable SDIO interrupts needed to support the wait function * * Input Parameters: * priv - A reference to the SDIO device state structure diff --git a/arch/arm/src/kinetis/kinetis_serial.c b/arch/arm/src/kinetis/kinetis_serial.c index 94f825b66a8..4d21d8fd6ce 100644 --- a/arch/arm/src/kinetis/kinetis_serial.c +++ b/arch/arm/src/kinetis/kinetis_serial.c @@ -1162,7 +1162,7 @@ static int up_interrupt(int irq, void *context, FAR void *arg) * interrupt received on the 'irq' It should call uart_transmitchars or * uart_receivechar to perform the appropriate data transfers. The * interrupt handling logic must be able to map the 'irq' number into the - * approprite uart_dev_s structure in order to call these functions. + * appropriate uart_dev_s structure in order to call these functions. * ****************************************************************************/ diff --git a/arch/arm/src/kinetis/kinetis_spi.c b/arch/arm/src/kinetis/kinetis_spi.c index 9ec568f5526..07229ec8f9c 100644 --- a/arch/arm/src/kinetis/kinetis_spi.c +++ b/arch/arm/src/kinetis/kinetis_spi.c @@ -570,12 +570,12 @@ void inline spi_run(FAR struct kinetis_spidev_s *priv, bool enable) * Name: spi_lock * * Description: - * On SPI busses where there are multiple devices, it will be necessary to - * lock SPI to have exclusive access to the busses for a sequence of + * On SPI buses where there are multiple devices, it will be necessary to + * lock SPI to have exclusive access to the buses for a sequence of * transfers. The bus should be locked before the chip is selected. After * locking the SPI bus, the caller should then also call the setfrequency, * setbits, and setmode methods to make sure that the SPI is properly - * configured for the device. If the SPI buss is being shared, then it + * configured for the device. If the SPI bus is being shared, then it * may have been left in an incompatible state. * * Input Parameters: diff --git a/arch/arm/src/kinetis/kinetis_usbdev.c b/arch/arm/src/kinetis/kinetis_usbdev.c index c9381631fb3..85e3eb73bf1 100644 --- a/arch/arm/src/kinetis/kinetis_usbdev.c +++ b/arch/arm/src/kinetis/kinetis_usbdev.c @@ -1871,7 +1871,7 @@ static void khci_eptransfer(struct khci_usbdev_s *priv, uint8_t epno, * This function is called (1) after successful completion of an EP0 Setup * command, or (2) after receipt of the OUT complete event (for simple * transfers). It simply sets up the single BDT to accept the next - * SETUP commend. + * SETUP command. * ****************************************************************************/ @@ -2472,7 +2472,7 @@ resume_packet_processing: * could stall the endpoint and perhaps speed things up a bit???. */ - /* Set up the BDT to accept the next setup commend. */ + /* Set up the BDT to accept the next setup command. */ khci_ep0nextsetup(priv); priv->ctrlstate = CTRLSTATE_WAITSETUP; @@ -2827,7 +2827,7 @@ static int khci_interrupt(int irq, void *context, FAR void *arg) /* Disable and deactivate HNP */ #warning Missing Logic #endif - /* Acknowlege the reset interrupt */ + /* Acknowledge the reset interrupt */ khci_putreg(USB_INT_USBRST, KINETIS_USB0_ISTAT); goto interrupt_exit; diff --git a/arch/arm/src/kl/kl_gpio.c b/arch/arm/src/kl/kl_gpio.c index 27c983d79b9..bb063365f44 100644 --- a/arch/arm/src/kl/kl_gpio.c +++ b/arch/arm/src/kl/kl_gpio.c @@ -71,7 +71,7 @@ * * Description: * Configure a PIN based on bit-encoded description of the pin. NOTE that - * DMA/interrupts are disabled at the initial PIN configuratin. + * DMA/interrupts are disabled at the initial PIN configuration. * ****************************************************************************/ diff --git a/arch/arm/src/kl/kl_gpio.h b/arch/arm/src/kl/kl_gpio.h index 8d6a273684c..cabead57548 100644 --- a/arch/arm/src/kl/kl_gpio.h +++ b/arch/arm/src/kl/kl_gpio.h @@ -108,7 +108,7 @@ #define _PIN_OUTPUT_SLOW (3 << _PIN_OPTIONS_SHIFT) /* xx11 Output with slow slew rate */ #define _PIN_OUTPUT_OD_MASK (5 << _PIN_OPTIONS_SHIFT) /* x1x1 Mask to test for open drain */ #define _PIN_OUTPUT_OPENDRAIN (5 << _PIN_OPTIONS_SHIFT) /* x1x1 Output with open drain enabled */ -#define _PIN_OUTPUT_DRIVE_MASK (9 << _PIN_OPTIONS_SHIFT) /* 1xx1 Mask to test for high drive strengh */ +#define _PIN_OUTPUT_DRIVE_MASK (9 << _PIN_OPTIONS_SHIFT) /* 1xx1 Mask to test for high drive strength */ #define _PIN_OUTPUT_LOWDRIVE (1 << _PIN_OPTIONS_SHIFT) /* 0xx1 Output with low drive strength */ #define _PIN_OUTPUT_HIGHDRIVE (9 << _PIN_OPTIONS_SHIFT) /* 1xx1 Output with high drive strength */ @@ -328,7 +328,7 @@ extern "C" * * Description: * Configure a PIN based on bit-encoded description of the pin. NOTE that - * DMA/interrupts are disabled at the initial PIN configuratin. + * DMA/interrupts are disabled at the initial PIN configuration. * ****************************************************************************/ diff --git a/arch/arm/src/kl/kl_irq.c b/arch/arm/src/kl/kl_irq.c index c27f41a9252..6a45c18b020 100644 --- a/arch/arm/src/kl/kl_irq.c +++ b/arch/arm/src/kl/kl_irq.c @@ -131,7 +131,7 @@ static void kl_dumpnvic(const char *msg, int irq) * kl_dbgmonitor, kl_pendsv, kl_reserved * * Description: - * Handlers for various execptions. None are handled and all are fatal + * Handlers for various exceptions. None are handled and all are fatal * error conditions. The only advantage these provided over the default * unexpected interrupt handler is that they provide a diagnostic output. * diff --git a/arch/arm/src/kl/kl_spi.c b/arch/arm/src/kl/kl_spi.c index 59c712e2bc4..bb9608fc67f 100644 --- a/arch/arm/src/kl/kl_spi.c +++ b/arch/arm/src/kl/kl_spi.c @@ -216,12 +216,12 @@ static inline void spi_putreg(FAR struct kl_spidev_s *priv, uint8_t offset, * Name: spi_lock * * Description: - * On SPI busses where there are multiple devices, it will be necessary to - * lock SPI to have exclusive access to the busses for a sequence of + * On SPI buses where there are multiple devices, it will be necessary to + * lock SPI to have exclusive access to the buses for a sequence of * transfers. The bus should be locked before the chip is selected. After * locking the SPI bus, the caller should then also call the setfrequency, * setbits, and setmode methods to make sure that the SPI is properly - * configured for the device. If the SPI buss is being shared, then it + * configured for the device. If the SPI bus is being shared, then it * may have been left in an incompatible state. * * Input Parameters: @@ -517,7 +517,7 @@ static void spi_exchange(FAR struct spi_dev_s *dev, FAR const void *txbuffer, spi_putreg(priv, KL_SPI_D_OFFSET, data); - /* Wait for the read data to be available in the data regiter */ + /* Wait for the read data to be available in the data register */ while ((spi_getreg(priv, KL_SPI_S_OFFSET) & SPI_S_SPRF) == 0); diff --git a/arch/arm/src/lc823450/Kconfig b/arch/arm/src/lc823450/Kconfig index 2c355b1f37f..c63c05c049b 100644 --- a/arch/arm/src/lc823450/Kconfig +++ b/arch/arm/src/lc823450/Kconfig @@ -219,7 +219,7 @@ config HRT_TIMER default n config DVFS - bool "Dynamic Voltage and Frequencey Scaling" + bool "Dynamic Voltage and Frequency Scaling" default n endmenu diff --git a/arch/arm/src/lc823450/lc823450_cpustart.c b/arch/arm/src/lc823450/lc823450_cpustart.c index 4414f456e02..06d35d96664 100644 --- a/arch/arm/src/lc823450/lc823450_cpustart.c +++ b/arch/arm/src/lc823450/lc823450_cpustart.c @@ -157,7 +157,7 @@ static void cpu1_boot(void) * * Each CPU is provided the entry point to is IDLE task when started. A * TCB for each CPU's IDLE task has been initialized and placed in the - * CPU's g_assignedtasks[cpu] list. Not stack has been alloced or + * CPU's g_assignedtasks[cpu] list. Not stack has been allocated or * initialized. * * The OS initialization logic calls this function repeatedly until each diff --git a/arch/arm/src/lc823450/lc823450_dvfs2.c b/arch/arm/src/lc823450/lc823450_dvfs2.c index 591a665250d..b6e3688f274 100644 --- a/arch/arm/src/lc823450/lc823450_dvfs2.c +++ b/arch/arm/src/lc823450/lc823450_dvfs2.c @@ -518,7 +518,7 @@ void lc823450_dvfs_tick_callback(void) lc823450_dvfs_do_auto(idle); } - /* Update freqency statistics */ + /* Update frequency statistics */ g_dvfs_freq_stat[_dvfs_cur_idx]++; } diff --git a/arch/arm/src/lc823450/lc823450_i2c.c b/arch/arm/src/lc823450/lc823450_i2c.c index 2d14b91e6d7..aa138f87fc1 100644 --- a/arch/arm/src/lc823450/lc823450_i2c.c +++ b/arch/arm/src/lc823450/lc823450_i2c.c @@ -743,7 +743,7 @@ static int lc823450_i2c_poll(FAR struct lc823450_i2c_priv_s *priv) } else { - /* We need restart from START conditon. If transfer direction is different + /* We need restart from START condition. If transfer direction is different * between current message and next message, restart is necessary. */ diff --git a/arch/arm/src/lc823450/lc823450_irq.c b/arch/arm/src/lc823450/lc823450_irq.c index 78a43a28caf..fb7bfa769bf 100644 --- a/arch/arm/src/lc823450/lc823450_irq.c +++ b/arch/arm/src/lc823450/lc823450_irq.c @@ -190,7 +190,7 @@ static void lc823450_dumpnvic(const char *msg, int irq) * lc823450_dbgmonitor, lc823450_pendsv, lc823450_reserved * * Description: - * Handlers for various execptions. None are handled and all are fatal + * Handlers for various exceptions. None are handled and all are fatal * error conditions. The only advantage these provided over the default * unexpected interrupt handler is that they provide a diagnostic output. * @@ -232,7 +232,7 @@ static int lc823450_pendsv(int irq, FAR void *context, FAR void *arg) static int lc823450_dbgmonitor(int irq, FAR void *context, FAR void *arg) { enter_critical_section(); - irqinfo("PANIC!!! Debug Monitor receieved\n"); + irqinfo("PANIC!!! Debug Monitor received\n"); PANIC(); return 0; } @@ -343,7 +343,7 @@ static int lc823450_extint_isr(int irq, FAR void *context, FAR void *arg) * Name: lc823425_extint_initialize * * Description: - * Initialize external interrup. + * Initialize external interrupt. * ***********************************************************************/ diff --git a/arch/arm/src/lc823450/lc823450_mmcl.c b/arch/arm/src/lc823450/lc823450_mmcl.c index 72579bf461b..ac143922f47 100644 --- a/arch/arm/src/lc823450/lc823450_mmcl.c +++ b/arch/arm/src/lc823450/lc823450_mmcl.c @@ -134,7 +134,7 @@ static int mmcl_close(FAR struct inode *inode) /**************************************************************************** * Name: mmcl_read * - * Description: Read the specified numer of sectors + * Description: Read the specified number of sectors * ****************************************************************************/ diff --git a/arch/arm/src/lc823450/lc823450_mtd.c b/arch/arm/src/lc823450/lc823450_mtd.c index 4e26b64e876..2cd1af950c6 100644 --- a/arch/arm/src/lc823450/lc823450_mtd.c +++ b/arch/arm/src/lc823450/lc823450_mtd.c @@ -90,7 +90,7 @@ struct lc823450_mtd_dev_s /* Other implementation specific data may follow here */ - sem_t sem; /* Assures mutually exclusive accesss to the slot */ + sem_t sem; /* Assures mutually exclusive access to the slot */ uint32_t nblocks; /* Number of blocks */ uint32_t blocksize; /* Size of one read/write blocks */ uint32_t channel; /* 0: eMMC, 1: SDC */ diff --git a/arch/arm/src/lc823450/lc823450_serial.c b/arch/arm/src/lc823450/lc823450_serial.c index 950e4ae93e0..7ca44f77cbc 100644 --- a/arch/arm/src/lc823450/lc823450_serial.c +++ b/arch/arm/src/lc823450/lc823450_serial.c @@ -661,7 +661,7 @@ static void up_detach(struct uart_dev_s *dev) * when an interrupt received on the 'irq' It should call * uart_transmitchars or uart_receivechar to perform the * appropriate data transfers. The interrupt handling logic\ - * must be able to map the 'irq' number into the approprite + * must be able to map the 'irq' number into the appropriate * uart_dev_s structure in order to call these functions. * ****************************************************************************/ @@ -864,7 +864,7 @@ static int up_receive(struct uart_dev_s *dev, uint32_t *status) rxd = up_serialin(priv, UART_USRF); *status = rxd; - /* The lower 8bits of the Rx data is the actual recevied byte */ + /* The lower 8bits of the Rx data is the actual received byte */ return rxd & 0xff; } diff --git a/arch/arm/src/lc823450/lc823450_usbdev.c b/arch/arm/src/lc823450/lc823450_usbdev.c index 772f0aa27c5..efdde1b26d3 100644 --- a/arch/arm/src/lc823450/lc823450_usbdev.c +++ b/arch/arm/src/lc823450/lc823450_usbdev.c @@ -689,7 +689,7 @@ static int lc823450_epsubmit(struct usbdev_ep_s *ep, struct usbdev_req_s *req) } else if (privep->in) { - /* Send packet requst from function driver */ + /* Send packet request from function driver */ flags = spin_lock_irqsave(); @@ -1555,7 +1555,7 @@ int usbdev_register(struct usbdevclass_driver_s *driver) g_usbdev.bufoffset = 0x180; - /* Device mode enbale */ + /* Device mode enable */ modifyreg32(USB_MODE, 0, USB_MODE_DEV_EN); diff --git a/arch/arm/src/lc823450/lc823450_wdt.c b/arch/arm/src/lc823450/lc823450_wdt.c index 05d813ee424..d1da80932c7 100644 --- a/arch/arm/src/lc823450/lc823450_wdt.c +++ b/arch/arm/src/lc823450/lc823450_wdt.c @@ -112,7 +112,7 @@ struct lc823450_wdt_lowerhalf_s /* Register operations ******************************************************/ -/* Interrupt hanlding *******************************************************/ +/* Interrupt handling *******************************************************/ #ifdef CONFIG_LC823450_WDT_INTERRUPT static int lc823450_wdt_interrupt(int irq, FAR void *context, FAR void *arg); diff --git a/arch/arm/src/lpc17xx_40xx/Kconfig b/arch/arm/src/lpc17xx_40xx/Kconfig index c6de37320b2..7d5201e1e01 100644 --- a/arch/arm/src/lpc17xx_40xx/Kconfig +++ b/arch/arm/src/lpc17xx_40xx/Kconfig @@ -839,10 +839,10 @@ config LPC17_40_LCD_VRAMBASE (LPC17_40_EXTDRAM_CS0 + 0x00010000) config LPC17_40_LCD_REFRESH_FREQ - int "LCD refesh rate (Hz)" + int "LCD refresh rate (Hz)" default 50 ---help--- - LCD refesh rate (Hz) + LCD refresh rate (Hz) config LPC17_40_LCD_BACKLIGHT bool "Enable backlight" diff --git a/arch/arm/src/lpc17xx_40xx/hardware/lpc17_40_adc.h b/arch/arm/src/lpc17xx_40xx/hardware/lpc17_40_adc.h index 7b46983dadd..4b2edc09d7c 100644 --- a/arch/arm/src/lpc17xx_40xx/hardware/lpc17_40_adc.h +++ b/arch/arm/src/lpc17xx_40xx/hardware/lpc17_40_adc.h @@ -125,7 +125,7 @@ /* A/D Interrupt Enable Register */ #define ADC_INTEN_CHAN(n) (1 << (n)) -#define ADC_INTEN_CHAN0 (1 << 0) /* Bit 0: Enable ADC chan 0 complete intterrupt */ +#define ADC_INTEN_CHAN0 (1 << 0) /* Bit 0: Enable ADC chan 0 complete interrupt */ #define ADC_INTEN_CHAN1 (1 << 1) /* Bit 1: Enable ADC chan 1 complete interrupt */ #define ADC_INTEN_CHAN2 (1 << 2) /* Bit 2: Enable ADC chan 2 complete interrupt */ #define ADC_INTEN_CHAN3 (1 << 3) /* Bit 3: Enable ADC chan 3 complete interrupt */ diff --git a/arch/arm/src/lpc17xx_40xx/hardware/lpc17_40_can.h b/arch/arm/src/lpc17xx_40xx/hardware/lpc17_40_can.h index 0195e1ac204..7dbec69e387 100644 --- a/arch/arm/src/lpc17xx_40xx/hardware/lpc17_40_can.h +++ b/arch/arm/src/lpc17xx_40xx/hardware/lpc17_40_can.h @@ -366,7 +366,7 @@ #define CAN_BTR_SJW_MASK (3 << CAN_BTR_SJW_SHIFT) #define CAN_BTR_TSEG1_SHIFT (16) /* Bits 16-19: Sync to sample delay */ #define CAN_BTR_TSEG1_MASK (15 << CAN_BTR_TSEG1_SHIFT) -#define CAN_BTR_TSEG2_SHIFT (20) /* Bits 20-22: smaple to next delay */ +#define CAN_BTR_TSEG2_SHIFT (20) /* Bits 20-22: sample to next delay */ #define CAN_BTR_TSEG2_MASK (7 << CAN_BTR_TSEG2_SHIFT) #define CAN_BTR_SAM (1 << 23) /* Bit 23: Sampling */ /* Bits 24-31: Reserved */ diff --git a/arch/arm/src/lpc17xx_40xx/hardware/lpc17_40_ethernet.h b/arch/arm/src/lpc17xx_40xx/hardware/lpc17_40_ethernet.h index ce77c66603b..12221573f12 100644 --- a/arch/arm/src/lpc17xx_40xx/hardware/lpc17_40_ethernet.h +++ b/arch/arm/src/lpc17xx_40xx/hardware/lpc17_40_ethernet.h @@ -544,7 +544,7 @@ #define TXSTAT_INFO_COLCNT_SHIFT (21) /* Bits 21-24: Number of collisions */ #define TXSTAT_INFO_COLCNT_MASK (15 << TXSTAT_INFO_COLCNT_SHIFT) -#define TXSTAT_INFO_DEFER (1 << 25) /* Bit 25: Packet deffered */ +#define TXSTAT_INFO_DEFER (1 << 25) /* Bit 25: Packet deferred */ #define TXSTAT_INFO_EXCESSDEFER (1 << 26) /* Bit 26: Excessive packet defferals */ #define TXSTAT_INFO_EXCESSCOL (1 << 27) /* Bit 27: Excessive packet collisions */ #define TXSTAT_INFO_LATECOL (1 << 28) /* Bit 28: Out of window collision */ diff --git a/arch/arm/src/lpc17xx_40xx/hardware/lpc17_40_gpdma.h b/arch/arm/src/lpc17xx_40xx/hardware/lpc17_40_gpdma.h index 43ab92d7e9c..4a6b9e26838 100644 --- a/arch/arm/src/lpc17xx_40xx/hardware/lpc17_40_gpdma.h +++ b/arch/arm/src/lpc17xx_40xx/hardware/lpc17_40_gpdma.h @@ -490,7 +490,7 @@ # define DMACH_CONTROL_DWIDTH_32BIT (2 << DMACH_CONTROL_DWIDTH_SHIFT) /* Word (32-bit) */ #define DMACH_CONTROL_SI (1 << 26) /* Bit 26: Source increment */ #define DMACH_CONTROL_DI (1 << 27) /* Bit 27: Destination increment */ -#define DMACH_CONTROL_PROT1 (1 << 28) /* Bit 28: User/priviledged mode */ +#define DMACH_CONTROL_PROT1 (1 << 28) /* Bit 28: User/privileged mode */ #define DMACH_CONTROL_PROT2 (1 << 29) /* Bit 29: Bufferable */ #define DMACH_CONTROL_PROT3 (1 << 30) /* Bit 30: Cacheable */ #define DMACH_CONTROL_I (1 << 31) /* Bit 31: Terminal count interrupt enable */ diff --git a/arch/arm/src/lpc17xx_40xx/hardware/lpc17_40_lcd.h b/arch/arm/src/lpc17xx_40xx/hardware/lpc17_40_lcd.h index 5dba18b2597..be44e562596 100644 --- a/arch/arm/src/lpc17xx_40xx/hardware/lpc17_40_lcd.h +++ b/arch/arm/src/lpc17xx_40xx/hardware/lpc17_40_lcd.h @@ -173,7 +173,7 @@ #define LCD_UPBASE_LCDLPBASE_SHIFT (3) /* Bits 3-31: LCD lower panel base address */ #define LCD_UPBASE_LCDLPBASE_MASK (0x1FFFFFFF << LCD_UPBASE_LCDUPBASE_SHIFT) -/* LCD_CTRL - Controle Register */ +/* LCD_CTRL - Control Register */ #define LCD_CTRL_LCDEN (1 << 0) /* Bit 0: LCD enable control bit */ #define LCD_CTRL_LCDBPP_SHIFT (1) /* Bits 1-3: LCD bits per pixel */ @@ -210,7 +210,7 @@ /* LCD_INTRAW - Raw Interrupt Status Register */ /* Bits 0: Reserved */ -#define LCD_INTRAW_FUFRIS (1 << 1) /* Bit 1: FIFO Undeflow raw interrupt status */ +#define LCD_INTRAW_FUFRIS (1 << 1) /* Bit 1: FIFO Underflow raw interrupt status */ #define LCD_INTRAW_LNBURIS (1 << 2) /* Bit 2: LCD Next address base update intterupt */ #define LCD_INTRAW_VCOMPRIS (1 << 3) /* Bit 3: Vertical compare interrupt status */ #define LCD_INTRAW_BERRAW (1 << 4) /* Bit 4: AHB Master bus error interrupt status */ @@ -219,7 +219,7 @@ /* LCD_INTSTAT - Masked Interrupt Status Register */ /* Bits 0: Reserved */ -#define LCD_INTSTAT_FUFMIS (1 << 1) /* Bit 1: FIFO Undeflow raw interrupt status */ +#define LCD_INTSTAT_FUFMIS (1 << 1) /* Bit 1: FIFO Underflow raw interrupt status */ #define LCD_INTSTAT_LNBUMIS (1 << 2) /* Bit 2: LCD Next address base update intterupt */ #define LCD_INTSTAT_VCOMPMIS (1 << 3) /* Bit 3: Vertical compare interrupt status */ #define LCD_INTSTAT_BERMIS (1 << 4) /* Bit 4: AHB Master bus error interrupt status */ @@ -228,7 +228,7 @@ /* LCD_INTCLR - Interrupt Clear Register */ /* Bits 0: Reserved */ -#define LCD_INTCLR_FUFIC (1 << 1) /* Bit 1: FIFO Undeflow raw interrupt clear */ +#define LCD_INTCLR_FUFIC (1 << 1) /* Bit 1: FIFO Underflow raw interrupt clear */ #define LCD_INTCLR_LNBUIC (1 << 2) /* Bit 2: LCD Next address base update intterupt */ #define LCD_INTCLR_VCOMPIC (1 << 3) /* Bit 3: Vertical compare interrupt clear */ #define LCD_INTCLR_BERIC (1 << 4) /* Bit 4: AHB Master bus error interrupt clear */ diff --git a/arch/arm/src/lpc17xx_40xx/hardware/lpc17_40_mcpwm.h b/arch/arm/src/lpc17xx_40xx/hardware/lpc17_40_mcpwm.h index 2d6646d1491..5e734bddff1 100644 --- a/arch/arm/src/lpc17xx_40xx/hardware/lpc17_40_mcpwm.h +++ b/arch/arm/src/lpc17xx_40xx/hardware/lpc17_40_mcpwm.h @@ -137,7 +137,7 @@ */ /* PWM Control read address (CON), PWM Control set address (CONSET), and PWM Control - * clear address (CONCLR) common regiser bit definitions. + * clear address (CONCLR) common register bit definitions. */ #define MCPWM_CON_RUN0 (1 << 0) /* Bit 0: Stops/starts timer channel 0 */ @@ -163,7 +163,7 @@ #define MCPWM_CON_DCMODE (1 << 31) /* Bit 31: 3-phase DC mode select */ /* Capture Control read address (CAPCON), Capture Control set address (CAPCONSET), - * and Event Control clear address (CAPCONCLR) common register bit defintions + * and Event Control clear address (CAPCONCLR) common register bit definitions */ #define MCPWM_CAPCON_CAP0MCI0RE (1 << 0) /* Bit 0: Enable chan0 rising edge capture MCI0 */ diff --git a/arch/arm/src/lpc17xx_40xx/hardware/lpc17_40_sdcard.h b/arch/arm/src/lpc17xx_40xx/hardware/lpc17_40_sdcard.h index 18824e07a12..64582178318 100644 --- a/arch/arm/src/lpc17xx_40xx/hardware/lpc17_40_sdcard.h +++ b/arch/arm/src/lpc17xx_40xx/hardware/lpc17_40_sdcard.h @@ -135,7 +135,7 @@ /* MCI Command Response Register - RESPCOMMAND - 0x400c 0010 */ -#define SDCARD_RESPCMD_SHIFT (0) /* Bits 0-5: Resopnse Command index */ +#define SDCARD_RESPCMD_SHIFT (0) /* Bits 0-5: Response Command index */ #define SDCARD_RESPCMD_MASK (0x3f << SDCARD_RESPCMD_SHIFT) /* Bits 6-31: Reserved */ diff --git a/arch/arm/src/lpc17xx_40xx/hardware/lpc17_40_ssp.h b/arch/arm/src/lpc17xx_40xx/hardware/lpc17_40_ssp.h index 21e74239fa8..05b0278af51 100644 --- a/arch/arm/src/lpc17xx_40xx/hardware/lpc17_40_ssp.h +++ b/arch/arm/src/lpc17xx_40xx/hardware/lpc17_40_ssp.h @@ -162,7 +162,7 @@ #define SSP_INT_ROR (1 << 0) /* Bit 0: RX FIFO overrun */ #define SSP_INT_RT (1 << 1) /* Bit 1: RX FIFO timeout */ #define SSP_INT_RX (1 << 2) /* Bit 2: RX FIFO at least half full (not ICR) */ -#define SSP_INT_TX (1 << 3 ) /* Bit 3: TX FIFO at least half empy (not ICR) */ +#define SSP_INT_TX (1 << 3 ) /* Bit 3: TX FIFO at least half empty (not ICR) */ /* Bits 4-31: Reserved */ /* DMA Control Register */ diff --git a/arch/arm/src/lpc17xx_40xx/lpc17_40_can.c b/arch/arm/src/lpc17xx_40xx/lpc17_40_can.c index e7888ac4985..b3aa0a751a3 100644 --- a/arch/arm/src/lpc17xx_40xx/lpc17_40_can.c +++ b/arch/arm/src/lpc17xx_40xx/lpc17_40_can.c @@ -605,7 +605,7 @@ static void lpc17can_rxint(FAR struct can_dev_s *dev, bool enable) caninfo("CAN%d enable: %d\n", priv->port, enable); - /* The EIR register is also modifed from the interrupt handler, so we have + /* The EIR register is also modified from the interrupt handler, so we have * to protect this code section. */ @@ -720,7 +720,7 @@ static int lpc17can_remoterequest(FAR struct can_dev_s *dev, uint16_t id) * * Byte 0: Bits 0-7: Bits 3-10 of the 11-bit CAN identifier * Byte 1: Bits 5-7: Bits 0-2 of the 11-bit CAN identifier - * Bit 4: Remote Tranmission Request (RTR) + * Bit 4: Remote Transmission Request (RTR) * Bits 0-3: Data Length Code (DLC) * Bytes 2-10: CAN data * @@ -750,7 +750,7 @@ static int lpc17can_send(FAR struct can_dev_s *dev, FAR struct can_msg_s *msg) } /* Set the FF bit in the TFI register if this message should be sent with - * the extended frame format (and 29-bit extened ID). + * the extended frame format (and 29-bit extended ID). */ #ifdef CONFIG_CAN_EXTID diff --git a/arch/arm/src/lpc17xx_40xx/lpc17_40_ethernet.c b/arch/arm/src/lpc17xx_40xx/lpc17_40_ethernet.c index 21ff20ee610..8ffc7e6bf45 100644 --- a/arch/arm/src/lpc17xx_40xx/lpc17_40_ethernet.c +++ b/arch/arm/src/lpc17xx_40xx/lpc17_40_ethernet.c @@ -2478,7 +2478,7 @@ static inline int lpc17_40_phyreset(uint8_t phyaddr) * None * * Assumptions: - * The adverisement regiser has already been configured. + * The adverisement register has already been configured. * ****************************************************************************/ diff --git a/arch/arm/src/lpc17xx_40xx/lpc17_40_gpioint.c b/arch/arm/src/lpc17xx_40xx/lpc17_40_gpioint.c index 0b51bd990c7..2025f7e2a3b 100644 --- a/arch/arm/src/lpc17xx_40xx/lpc17_40_gpioint.c +++ b/arch/arm/src/lpc17xx_40xx/lpc17_40_gpioint.c @@ -237,7 +237,7 @@ static int lpc17_40_irq2pin(int irq) * LPC18x: 16 interrupts p0.0-p0.15 * * See arch/arm/include/lpc17xx_40xx/irq.h: - * LPC17_40_VALID_SHIFT0L 0 - Bit 0 is thre first bit in the group of + * LPC17_40_VALID_SHIFT0L 0 - Bit 0 is the first bit in the group of * 12/16 interrupts * LPC17_40_VALID_FIRST0L irq - IRQ number associated with p0.0 * LPC17_40_VALID_NIRQS0L 12/16 - Number of interrupt bits in the group diff --git a/arch/arm/src/lpc17xx_40xx/lpc17_40_i2c.c b/arch/arm/src/lpc17xx_40xx/lpc17_40_i2c.c index c59fda0cb95..f6e43d3c311 100644 --- a/arch/arm/src/lpc17xx_40xx/lpc17_40_i2c.c +++ b/arch/arm/src/lpc17xx_40xx/lpc17_40_i2c.c @@ -179,7 +179,7 @@ static void lpc17_40_i2c_setfrequency(struct lpc17_40_i2cdev_s *priv, { if (frequency > 100000) { - /* Asymetric per 400Khz I2C spec */ + /* Asymmetric per 400Khz I2C spec */ putreg32(LPC17_40_CCLK / (83 + 47) * 47 / frequency, priv->base + LPC17_40_I2C_SCLH_OFFSET); diff --git a/arch/arm/src/lpc17xx_40xx/lpc17_40_irq.c b/arch/arm/src/lpc17xx_40xx/lpc17_40_irq.c index 3dc9da38e73..db9734bc130 100644 --- a/arch/arm/src/lpc17xx_40xx/lpc17_40_irq.c +++ b/arch/arm/src/lpc17xx_40xx/lpc17_40_irq.c @@ -143,7 +143,7 @@ static void lpc17_40_dumpnvic(const char *msg, int irq) * lpc17_40_dbgmonitor, lpc17_40_pendsv, lpc17_40_reserved * * Description: - * Handlers for various execptions. None are handled and all are fatal + * Handlers for various exceptions. None are handled and all are fatal * error conditions. The only advantage these provided over the default * unexpected interrupt handler is that they provide a diagnostic output. * diff --git a/arch/arm/src/lpc17xx_40xx/lpc17_40_lcd.c b/arch/arm/src/lpc17xx_40xx/lpc17_40_lcd.c index 9abf635c18a..593df01b6d4 100644 --- a/arch/arm/src/lpc17xx_40xx/lpc17_40_lcd.c +++ b/arch/arm/src/lpc17xx_40xx/lpc17_40_lcd.c @@ -286,7 +286,7 @@ static int lpc17_40_getcmap(FAR struct fb_vtable_s *vtable, cmap->transp[i] = 0; #endif - /* Handle the case where the len ends on an odd boudary */ + /* Handle the case where the len ends on an odd boundary */ if ((i + 1) < last) { @@ -352,7 +352,7 @@ static int lpc17_40_putcmap(FAR struct fb_vtable_s *vtable, (uint32_t)cmap->green[i] << LCD_PAL_G0_SHIFT | (uint32_t)cmap->blue[i] << LCD_PAL_B0_SHIFT); - /* Handle the case where the len ends on an odd boudary */ + /* Handle the case where the len ends on an odd boundary */ if ((i + 1) >= last) { diff --git a/arch/arm/src/lpc17xx_40xx/lpc17_40_lcd.h b/arch/arm/src/lpc17xx_40xx/lpc17_40_lcd.h index 9fb70859943..cd2b9d79363 100644 --- a/arch/arm/src/lpc17xx_40xx/lpc17_40_lcd.h +++ b/arch/arm/src/lpc17xx_40xx/lpc17_40_lcd.h @@ -172,7 +172,7 @@ * Description: * This is a non-standard LCD interface just for the LPC17xx/LPC40xx. Clearing the display * in the normal way by writing a sequences of runs that covers the entire display - * can be slow. Here the dispaly is cleared by simply setting all VRAM memory to + * can be slow. Here the display is cleared by simply setting all VRAM memory to * the specified color. * ************************************************************************************/ diff --git a/arch/arm/src/lpc17xx_40xx/lpc17_40_ohciram.h b/arch/arm/src/lpc17xx_40xx/lpc17_40_ohciram.h index d87d7933042..3c2060dd824 100644 --- a/arch/arm/src/lpc17xx_40xx/lpc17_40_ohciram.h +++ b/arch/arm/src/lpc17xx_40xx/lpc17_40_ohciram.h @@ -147,7 +147,7 @@ #endif #if CONFIG_LP17_USBHOST_NTDS < 2 -# error "Insufficent TDs" +# error "Insufficient TDs" #endif /* Derived size of user transfer descriptor (TD) memory. */ diff --git a/arch/arm/src/lpc17xx_40xx/lpc17_40_sdcard.c b/arch/arm/src/lpc17xx_40xx/lpc17_40_sdcard.c index d10bd90bc91..a962eabb40e 100644 --- a/arch/arm/src/lpc17xx_40xx/lpc17_40_sdcard.c +++ b/arch/arm/src/lpc17xx_40xx/lpc17_40_sdcard.c @@ -532,7 +532,7 @@ static inline void lpc17_40_setclock(uint32_t clkcr) * Name: lpc17_40_configwaitints * * Description: - * Enable/disable SD card interrupts needed to suport the wait function + * Enable/disable SD card interrupts needed to support the wait function * * Input Parameters: * priv - A reference to the SD card device state structure @@ -2349,7 +2349,7 @@ errout: * * Events are automatically disabled once the callback is performed and no * further callback events will occur until they are again enabled by - * calling this methos. + * calling this method. * * Input Parameters: * dev - An instance of the SD card device interface diff --git a/arch/arm/src/lpc17xx_40xx/lpc17_40_serial.c b/arch/arm/src/lpc17xx_40xx/lpc17_40_serial.c index 8f8e03c0bd6..6fc08996049 100644 --- a/arch/arm/src/lpc17xx_40xx/lpc17_40_serial.c +++ b/arch/arm/src/lpc17xx_40xx/lpc17_40_serial.c @@ -571,7 +571,7 @@ void up_setbaud(uintptr_t uartbase, uint32_t basefreq, uint32_t baud) uint32_t cdivadd; /* Candidate FDR DIVADDVAL value */ uint32_t errval; /* Error value associated with the candidate */ - /* The UART buad is given by: + /* The UART baud is given by: * * Fbaud = Fbase * mul / (mul + divadd) / (16 * dl) * dl = Fbase * mul / (mul + divadd) / Fbaud / 16 @@ -1576,7 +1576,7 @@ static bool up_txempty(struct uart_dev_s *dev) } /**************************************************************************** - * Public Funtions + * Public Functions ****************************************************************************/ /**************************************************************************** diff --git a/arch/arm/src/lpc17xx_40xx/lpc17_40_spi.c b/arch/arm/src/lpc17xx_40xx/lpc17_40_spi.c index 0d367adea12..843f8d59b87 100644 --- a/arch/arm/src/lpc17xx_40xx/lpc17_40_spi.c +++ b/arch/arm/src/lpc17xx_40xx/lpc17_40_spi.c @@ -92,7 +92,7 @@ * Private Types ****************************************************************************/ -/* This structure descibes the state of the SSP driver */ +/* This structure describes the state of the SSP driver */ struct lpc17_40_spidev_s { @@ -163,12 +163,12 @@ static struct lpc17_40_spidev_s g_spidev = * Name: spi_lock * * Description: - * On SPI busses where there are multiple devices, it will be necessary to - * lock SPI to have exclusive access to the busses for a sequence of + * On SPI buses where there are multiple devices, it will be necessary to + * lock SPI to have exclusive access to the buses for a sequence of * transfers. The bus should be locked before the chip is selected. After * locking the SPI bus, the caller should then also call the setfrequency, * setbits, and setmode methods to make sure that the SPI is properly - * configured for the device. If the SPI buss is being shared, then it + * configured for the device. If the SPI bus is being shared, then it * may have been left in an incompatible state. * * Input Parameters: diff --git a/arch/arm/src/lpc17xx_40xx/lpc17_40_spi.h b/arch/arm/src/lpc17xx_40xx/lpc17_40_spi.h index 6baf0947cd9..71da30cac35 100644 --- a/arch/arm/src/lpc17xx_40xx/lpc17_40_spi.h +++ b/arch/arm/src/lpc17xx_40xx/lpc17_40_spi.h @@ -143,7 +143,7 @@ void spi_flush(FAR struct spi_dev_s *dev); * * Description: * If the board supports a card detect callback to inform the SPI-based - * MMC/SD drvier when an SD card is inserted or removed, then + * MMC/SD driver when an SD card is inserted or removed, then * CONFIG_SPI_CALLBACK should be defined and the following function must * must be implemented. These functions implements the registercallback * method of the SPI interface (see include/nuttx/spi/spi.h for details) diff --git a/arch/arm/src/lpc17xx_40xx/lpc17_40_ssp.c b/arch/arm/src/lpc17xx_40xx/lpc17_40_ssp.c index 48f6c7c031e..197e11f358d 100644 --- a/arch/arm/src/lpc17xx_40xx/lpc17_40_ssp.c +++ b/arch/arm/src/lpc17xx_40xx/lpc17_40_ssp.c @@ -106,7 +106,7 @@ * Private Types ****************************************************************************/ -/* This structure descibes the state of the SSP driver */ +/* This structure describes the state of the SSP driver */ struct lpc17_40_sspdev_s { @@ -310,12 +310,12 @@ static inline void ssp_putreg(FAR struct lpc17_40_sspdev_s *priv, uint8_t offset * Name: ssp_lock * * Description: - * On SPI busses where there are multiple devices, it will be necessary to - * lock SPI to have exclusive access to the busses for a sequence of + * On SPI buses where there are multiple devices, it will be necessary to + * lock SPI to have exclusive access to the buses for a sequence of * transfers. The bus should be locked before the chip is selected. After * locking the SPI bus, the caller should then also call the setfrequency, * setbits, and setmode methods to make sure that the SPI is properly - * configured for the device. If the SPI buss is being shared, then it + * configured for the device. If the SPI bus is being shared, then it * may have been left in an incompatible state. * * Input Parameters: @@ -617,7 +617,7 @@ static void ssp_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer, size uint32_t data; uint32_t sr; - /* Loop while thre are bytes remaining to be sent */ + /* Loop while there are bytes remaining to be sent */ spiinfo("nwords: %d\n", nwords); u.pv = buffer; diff --git a/arch/arm/src/lpc17xx_40xx/lpc17_40_ssp.h b/arch/arm/src/lpc17xx_40xx/lpc17_40_ssp.h index cf515509fc3..02e5a32ab7b 100644 --- a/arch/arm/src/lpc17xx_40xx/lpc17_40_ssp.h +++ b/arch/arm/src/lpc17xx_40xx/lpc17_40_ssp.h @@ -149,9 +149,9 @@ void ssp_flush(FAR struct spi_dev_s *dev); * * Description: * If the board supports a card detect callback to inform the SPI-based - * MMC/SD drvier when an SD card is inserted or removed, then + * MMC/SD driver when an SD card is inserted or removed, then * CONFIG_SPI_CALLBACK should be defined and the following function(s) must - * must be implemented. These functiosn implements the registercallback + * must be implemented. These functions implements the registercallback * method of the SPI interface (see include/nuttx/spi/spi.h for details) * * Input Parameters: diff --git a/arch/arm/src/lpc17xx_40xx/lpc17_40_usbdev.c b/arch/arm/src/lpc17xx_40xx/lpc17_40_usbdev.c index 96e2621d16e..a48b399e605 100644 --- a/arch/arm/src/lpc17xx_40xx/lpc17_40_usbdev.c +++ b/arch/arm/src/lpc17xx_40xx/lpc17_40_usbdev.c @@ -220,7 +220,7 @@ #define DEVSTATUS_RESET(s) (((s)&CMD_STATUS_RESET)!=0) /* If this bit is set in the lpc17_40_epread response, it means that the - * recevied packet was overwritten by a later setup packet (ep0 only). + * received packet was overwritten by a later setup packet (ep0 only). */ #define LPC17_40_READOVERRUN_BIT (0x80000000) @@ -255,7 +255,7 @@ #define LPC17_40_EP0MAXPACKET (64) /* EP0 max packet size (1-64) */ #define LPC17_40_BULKMAXPACKET (64) /* Bulk endpoint max packet (8/16/32/64) */ #define LPC17_40_INTRMAXPACKET (64) /* Interrupt endpoint max packet (1 to 64) */ -#define LPC17_40_ISOCMAXPACKET (512) /* Acutally 1..1023 */ +#define LPC17_40_ISOCMAXPACKET (512) /* Actually 1..1023 */ /* EP0 status. EP0 transfers occur in a number of different contexts. A * simple state machine is required to handle the various transfer complete @@ -973,7 +973,7 @@ static int lpc17_40_epread(uint8_t epphy, uint8_t *data, uint32_t nbytes) result = lpc17_40_usbcmd(CMD_USBDEV_EPCLRBUFFER, 0); /* The packet overrun bit in the clear buffer response is applicable only - * on EP0 transfers. If set it means that the recevied packet was overwritten + * on EP0 transfers. If set it means that the received packet was overwritten * by a later setup packet. */ @@ -2285,7 +2285,7 @@ static int lpc17_40_usbinterrupt(int irq, FAR void *context, FAR void *arg) lpc17_40_epclrinterrupt(epphy); - /* Get the endpoint sructure corresponding to the physical + /* Get the endpoint structure corresponding to the physical * endpoint number. */ diff --git a/arch/arm/src/lpc17xx_40xx/lpc17_40_usbhost.c b/arch/arm/src/lpc17xx_40xx/lpc17_40_usbhost.c index 3dcd11a645a..61279e83cf1 100644 --- a/arch/arm/src/lpc17xx_40xx/lpc17_40_usbhost.c +++ b/arch/arm/src/lpc17xx_40xx/lpc17_40_usbhost.c @@ -2349,7 +2349,7 @@ static int lpc17_40_epfree(struct usbhost_driver_s *drvr, usbhost_ep_t ep) lpc17_40_takesem(&priv->exclsem); - /* Remove the ED to the correct list depending on the trasfer type */ + /* Remove the ED to the correct list depending on the transfer type */ switch (ed->xfrtype) { diff --git a/arch/arm/src/lpc214x/chip.h b/arch/arm/src/lpc214x/chip.h index eccd6baf35c..b0ef47c6a1f 100644 --- a/arch/arm/src/lpc214x/chip.h +++ b/arch/arm/src/lpc214x/chip.h @@ -183,14 +183,14 @@ #define LPC214X_AD_ADGDR_OFFSET 0x04 /* A/D Global Data Register (only one common register!) */ #define LPC214X_AD_ADGSR_OFFSET 0x08 /* A/D Global Start Register */ #define LPC214X_AD_ADINTEN_OFFSET 0x0c /* A/D Interrupt Enable Register */ -#define LPC214X_AD_ADDR0_OFFSET 0x10 /* A/D Chanel 0 Data Register */ -#define LPC214X_AD_ADDR1_OFFSET 0x14 /* A/D Chanel 0 Data Register */ -#define LPC214X_AD_ADDR2_OFFSET 0x18 /* A/D Chanel 0 Data Register */ -#define LPC214X_AD_ADDR3_OFFSET 0x1c /* A/D Chanel 0 Data Register */ -#define LPC214X_AD_ADDR4_OFFSET 0x20 /* A/D Chanel 0 Data Register */ -#define LPC214X_AD_ADDR5_OFFSET 0x24 /* A/D Chanel 0 Data Register */ -#define LPC214X_AD_ADDR6_OFFSET 0x28 /* A/D Chanel 0 Data Register */ -#define LPC214X_AD_ADDR7_OFFSET 0x2c /* A/D Chanel 0 Data Register */ +#define LPC214X_AD_ADDR0_OFFSET 0x10 /* A/D Channel 0 Data Register */ +#define LPC214X_AD_ADDR1_OFFSET 0x14 /* A/D Channel 0 Data Register */ +#define LPC214X_AD_ADDR2_OFFSET 0x18 /* A/D Channel 0 Data Register */ +#define LPC214X_AD_ADDR3_OFFSET 0x1c /* A/D Channel 0 Data Register */ +#define LPC214X_AD_ADDR4_OFFSET 0x20 /* A/D Channel 0 Data Register */ +#define LPC214X_AD_ADDR5_OFFSET 0x24 /* A/D Channel 0 Data Register */ +#define LPC214X_AD_ADDR6_OFFSET 0x28 /* A/D Channel 0 Data Register */ +#define LPC214X_AD_ADDR7_OFFSET 0x2c /* A/D Channel 0 Data Register */ #define LPC214X_AD_ADSTAT_OFFSET 0x30 /* A/D Status Register */ /* SPI0 register offsets */ @@ -258,7 +258,7 @@ #define LPC214X_FIO_SET_OFFSET 0x18 /* Fast GPIO Port Output Set Register */ #define LPC214X_FIO_CLR_OFFSET 0x1c /* Fast GPIO Port Output Clear Register */ -/* Memory Accelerator Module (MAM) Regiser Offsets */ +/* Memory Accelerator Module (MAM) Register Offsets */ #define LPC214X_MAM_CR_OFFSET 0x00 /* MAM Control Offset*/ #define LPC214x_MAM_TIM_OFFSET 0x04 /* MAM Timing Offset */ diff --git a/arch/arm/src/lpc214x/lpc214x_head.S b/arch/arm/src/lpc214x/lpc214x_head.S index 127e5f164a3..3d1438893f8 100644 --- a/arch/arm/src/lpc214x/lpc214x_head.S +++ b/arch/arm/src/lpc214x/lpc214x_head.S @@ -519,7 +519,7 @@ __start: configpinsel2 r0, r1 - /* Setup the External Memory Controllor (EMC) as configured */ + /* Setup the External Memory Controller (EMC) as configured */ configemc r0, r1 diff --git a/arch/arm/src/lpc214x/lpc214x_i2c.h b/arch/arm/src/lpc214x/lpc214x_i2c.h index b5d5eb8a25a..2ecd7e2ecc0 100644 --- a/arch/arm/src/lpc214x/lpc214x_i2c.h +++ b/arch/arm/src/lpc214x/lpc214x_i2c.h @@ -94,10 +94,10 @@ # define I2C_STAT_MXSTART (0 << I2C_STAT_SHIFT) /* Start transmitted */ # define I2C_STAT_MXRSTART (2 << I2C_STAT_SHIFT) /* Repeated start transmitted */ -# define I2C_STAT_MXSLAWACK (3 << I2C_STAT_SHIFT) /* SLA+W tranmitted + ACK received */ -# define I2C_STAT_MXSLAWNAK (4 << I2C_STAT_SHIFT) /* SLA+W tranmitted + NAK received */ -# define I2C_STAT_MXDATAACK (5 << I2C_STAT_SHIFT) /* Data tranmitted + ACK received */ -# define I2C_STAT_MXDATANAK (6 << I2C_STAT_SHIFT) /* Data tranmitted + NAK received */ +# define I2C_STAT_MXSLAWACK (3 << I2C_STAT_SHIFT) /* SLA+W transmitted + ACK received */ +# define I2C_STAT_MXSLAWNAK (4 << I2C_STAT_SHIFT) /* SLA+W transmitted + NAK received */ +# define I2C_STAT_MXDATAACK (5 << I2C_STAT_SHIFT) /* Data transmitted + ACK received */ +# define I2C_STAT_MXDATANAK (6 << I2C_STAT_SHIFT) /* Data transmitted + NAK received */ # define I2C_STAT_MXARBLOST (7 << I2C_STAT_SHIFT) /* Abritration lost in SLA+W or data */ /* Master receive mode */ @@ -105,8 +105,8 @@ # define I2C_STAT_MRSTART (0 << I2C_STAT_SHIFT) /* Start transmitted */ # define I2C_STAT_MRRSTART (2 << I2C_STAT_SHIFT) /* Repeated start transmitted */ # define I2C_STAT_MRARBLOST (7 << I2C_STAT_SHIFT) /* Abritration lost in NAK bit */ -# define I2C_STAT_MRSLARACK (8 << I2C_STAT_SHIFT) /* SLA+R tranmitted + ACK received */ -# define I2C_STAT_MRSLARNAK (9 << I2C_STAT_SHIFT) /* SLA+R tranmitted + NAK received */ +# define I2C_STAT_MRSLARACK (8 << I2C_STAT_SHIFT) /* SLA+R transmitted + ACK received */ +# define I2C_STAT_MRSLARNAK (9 << I2C_STAT_SHIFT) /* SLA+R transmitted + NAK received */ # define I2C_STAT_MRDATAACK (10 << I2C_STAT_SHIFT) /* Data received + send ACK */ # define I2C_STAT_MRDATANAK (11 << I2C_STAT_SHIFT) /* Data received + send NAK */ diff --git a/arch/arm/src/lpc214x/lpc214x_serial.c b/arch/arm/src/lpc214x/lpc214x_serial.c index 99fd4354ed3..270f6844968 100644 --- a/arch/arm/src/lpc214x/lpc214x_serial.c +++ b/arch/arm/src/lpc214x/lpc214x_serial.c @@ -450,7 +450,7 @@ static void up_detach(struct uart_dev_s *dev) * when an interrupt received on the 'irq' It should call * uart_transmitchars or uart_receivechar to perform the * appropriate data transfers. The interrupt handling logic\ - * must be able to map the 'irq' number into the approprite + * must be able to map the 'irq' number into the appropriate * uart_dev_s structure in order to call these functions. * ****************************************************************************/ @@ -728,7 +728,7 @@ static bool up_txempty(struct uart_dev_s *dev) } /**************************************************************************** - * Public Funtions + * Public Functions ****************************************************************************/ #ifdef USE_EARLYSERIALINIT diff --git a/arch/arm/src/lpc214x/lpc214x_spi.h b/arch/arm/src/lpc214x/lpc214x_spi.h index da3aa11bee6..99f5b383276 100644 --- a/arch/arm/src/lpc214x/lpc214x_spi.h +++ b/arch/arm/src/lpc214x/lpc214x_spi.h @@ -87,7 +87,7 @@ #define LPC214X_SPI0CR0_BITS15 (0x0f00) /* 15-bits per transfer */ #define LPC214X_SPI0CR0_BITS16 (0x0000) /* 16-bits per transfer */ -/* Status Regiser (SR) for SPI0 */ +/* Status Register (SR) for SPI0 */ #define LPC214X_SPI0SR_ABRT (0x08) /* Bit 3=1: Slave abort */ #define LPC214X_SPI0SR_MODF (0x10) /* Bit 4=1: Mode fault */ diff --git a/arch/arm/src/lpc214x/lpc214x_timerisr.c b/arch/arm/src/lpc214x/lpc214x_timerisr.c index 250e05411a8..7abc49760e0 100644 --- a/arch/arm/src/lpc214x/lpc214x_timerisr.c +++ b/arch/arm/src/lpc214x/lpc214x_timerisr.c @@ -140,7 +140,7 @@ void up_timer_initialize(void) tmr_putreg32(LPC214X_PCLKFREQ/TICK_PER_SEC, LPC214X_TMR_MR0_OFFSET); - /* Reset timer counter regiser and interrupt on match */ + /* Reset timer counter register and interrupt on match */ mcr = tmr_getreg16(LPC214X_TMR_MCR_OFFSET); mcr &= ~LPC214X_TMR_MCR_MR1I; diff --git a/arch/arm/src/lpc214x/lpc214x_usbdev.c b/arch/arm/src/lpc214x/lpc214x_usbdev.c index 4997566e268..8e18ff7522d 100644 --- a/arch/arm/src/lpc214x/lpc214x_usbdev.c +++ b/arch/arm/src/lpc214x/lpc214x_usbdev.c @@ -204,7 +204,7 @@ #define DEVSTATUS_RESET(s) (((s)&USBDEV_DEVSTATUS_RESET)!=0) /* If this bit is set in the lpc214x_epread response, it means that the - * recevied packet was overwritten by a later setup packet (ep0 only). + * received packet was overwritten by a later setup packet (ep0 only). */ #define LPC214X_READOVERRUN_BIT (0x80000000) @@ -214,7 +214,7 @@ * * UBS_UDCA is is list of 32 pointers to DMA descriptors located at the * beginning of USB RAM. Each pointer points to a DMA descriptor with - * assocated DMA buffer. + * associated DMA buffer. */ #define USB_UDCA (uint32_t *)LPC214X_USBDEV_RAMBASE) @@ -263,7 +263,7 @@ #define LPC214X_EP0MAXPACKET (64) /* EP0 max packet size (1-64) */ #define LPC214X_BULKMAXPACKET (64) /* Bulk endpoint max packet (8/16/32/64) */ #define LPC214X_INTRMAXPACKET (64) /* Interrupt endpoint max packet (1 to 64) */ -#define LPC214X_ISOCMAXPACKET (512) /* Acutally 1..1023 */ +#define LPC214X_ISOCMAXPACKET (512) /* Actually 1..1023 */ /* EP0 status. EP0 transfers occur in a number of different contexts. A * simple state machine is required to handle the various transfer complete @@ -323,7 +323,7 @@ struct lpc214x_ep_s #ifdef CONFIG_LPC214X_USBDEV_DMA struct lpc214x_dmadesc_s { - uint32_t nextdesc; /* Address of the next DMA descripto in RAM */ + uint32_t nextdesc; /* Address of the next DMA descriptor in RAM */ uint32_t config; /* Misc. bit encoded configuration information */ uint32_t start; /* DMA start address */ uint32_t status; /* Misc. bit encoded status inforamation */ @@ -915,7 +915,7 @@ static int lpc214x_epread(uint8_t epphy, uint8_t *data, uint32_t nbytes) result = lpc214x_usbcmd(CMD_USB_EP_CLRBUFFER, 0); /* The packet overrun bit in the clear buffer response is applicable only - * on EP0 transfers. If set it means that the recevied packet was overwritten + * on EP0 transfers. If set it means that the received packet was overwritten * by a later setup packet. */ @@ -2248,7 +2248,7 @@ static int lpc214x_usbinterrupt(int irq, FAR void *context, FAR void *arg) lpc214x_epclrinterrupt(epphy); - /* Get the endpoint sructure corresponding to the physical + /* Get the endpoint structure corresponding to the physical * endpoint number. */ diff --git a/arch/arm/src/lpc214x/lpc214x_usbdev.h b/arch/arm/src/lpc214x/lpc214x_usbdev.h index df2d3195f52..0e0208b6130 100644 --- a/arch/arm/src/lpc214x/lpc214x_usbdev.h +++ b/arch/arm/src/lpc214x/lpc214x_usbdev.h @@ -167,7 +167,7 @@ #define USBDEV_CMDCODE_CMDCODE (0x00ff0000) #define USBDEV_CMDCODE_MASK (0x00ffff00) -/* DMAINSTST/DMAINSTEN bit defintions */ +/* DMAINSTST/DMAINSTEN bit definitions */ #define USBDEV_DMAINST_EOT (0x00000001) #define USBDEV_DMAINST_NDDR (0x00000002) diff --git a/arch/arm/src/lpc2378/chip.h b/arch/arm/src/lpc2378/chip.h index 4110a03c788..2012562494b 100644 --- a/arch/arm/src/lpc2378/chip.h +++ b/arch/arm/src/lpc2378/chip.h @@ -236,21 +236,21 @@ #define AD_ADGDR_OFFSET 0x04 /* A/D Global Data Register (only one common register!) */ //~ #define AD_ADGSR_OFFSET 0x08 /* A/D Global Start Register */ #define AD_ADINTEN_OFFSET 0x0c /* A/D Interrupt Enable Register */ -#define AD_ADDR0_OFFSET 0x10 /* A/D Chanel 0 Data Register */ -#define AD_ADDR1_OFFSET 0x14 /* A/D Chanel 0 Data Register */ -#define AD_ADDR2_OFFSET 0x18 /* A/D Chanel 0 Data Register */ -#define AD_ADDR3_OFFSET 0x1c /* A/D Chanel 0 Data Register */ -#define AD_ADDR4_OFFSET 0x20 /* A/D Chanel 0 Data Register */ -#define AD_ADDR5_OFFSET 0x24 /* A/D Chanel 0 Data Register */ -#define AD_ADDR6_OFFSET 0x28 /* A/D Chanel 0 Data Register */ -#define AD_ADDR7_OFFSET 0x2c /* A/D Chanel 0 Data Register */ +#define AD_ADDR0_OFFSET 0x10 /* A/D Channel 0 Data Register */ +#define AD_ADDR1_OFFSET 0x14 /* A/D Channel 0 Data Register */ +#define AD_ADDR2_OFFSET 0x18 /* A/D Channel 0 Data Register */ +#define AD_ADDR3_OFFSET 0x1c /* A/D Channel 0 Data Register */ +#define AD_ADDR4_OFFSET 0x20 /* A/D Channel 0 Data Register */ +#define AD_ADDR5_OFFSET 0x24 /* A/D Channel 0 Data Register */ +#define AD_ADDR6_OFFSET 0x28 /* A/D Channel 0 Data Register */ +#define AD_ADDR7_OFFSET 0x2c /* A/D Channel 0 Data Register */ #define AD_ADSTAT_OFFSET 0x30 /* A/D Status Register */ /* Digital to Analog (DAC) Base Address */ #define DAC_BASE_ADDR 0xE006C000 -/* Digital to Analog (DAC) reister offset */ +/* Digital to Analog (DAC) register offset */ //#define DACR_OFFSET 0x00 @@ -547,7 +547,7 @@ #define SCB_BASE_ADDR 0xE01FC000 -/* Memory Accelerator Module (MAM) Regiser */ +/* Memory Accelerator Module (MAM) Register */ #define SCB_MAMCR (*(volatile uint32_t*)(0xE01FC000)) #define SCB_MAMTIM (*(volatile uint32_t*)(0xE01FC004)) diff --git a/arch/arm/src/lpc2378/lpc23xx_i2c.c b/arch/arm/src/lpc2378/lpc23xx_i2c.c index fc3a9b906e6..82905c04121 100644 --- a/arch/arm/src/lpc2378/lpc23xx_i2c.c +++ b/arch/arm/src/lpc2378/lpc23xx_i2c.c @@ -185,7 +185,7 @@ static void lpc2378_i2c_setfrequency(struct lpc2378_i2cdev_s *priv, { if (frequency > 100000) { - /* Asymetric per 400Khz I2C spec */ + /* Asymmetric per 400Khz I2C spec */ putreg32(LPC23XX_CCLK / (83 + 47) * 47 / frequency, priv->base + I2C_SCLH_OFFSET); diff --git a/arch/arm/src/lpc2378/lpc23xx_serial.c b/arch/arm/src/lpc2378/lpc23xx_serial.c index 8005b58334e..ff62b9fa5bf 100644 --- a/arch/arm/src/lpc2378/lpc23xx_serial.c +++ b/arch/arm/src/lpc2378/lpc23xx_serial.c @@ -569,7 +569,7 @@ static void up_detach(struct uart_dev_s *dev) * when an interrupt received on the 'irq' It should call * uart_transmitchars or uart_receivechar to perform the * appropriate data transfers. The interrupt handling logic\ - * must be able to map the 'irq' number into the approprite + * must be able to map the 'irq' number into the appropriate * uart_dev_s structure in order to call these functions. * ****************************************************************************/ @@ -842,7 +842,7 @@ static bool up_txempty(struct uart_dev_s *dev) } /**************************************************************************** - * Public Funtions + * Public Functions ****************************************************************************/ #ifdef USE_EARLYSERIALINIT diff --git a/arch/arm/src/lpc2378/lpc23xx_timerisr.c b/arch/arm/src/lpc2378/lpc23xx_timerisr.c index 79b48b860a5..8ba3d146cf7 100644 --- a/arch/arm/src/lpc2378/lpc23xx_timerisr.c +++ b/arch/arm/src/lpc2378/lpc23xx_timerisr.c @@ -170,7 +170,7 @@ void up_timer_initialize(void) /* Set timer match register to get a TICK_PER_SEC rate See arch/board.h and */ - tmr_putreg32(T0_TICKS_COUNT, TMR_MR0_OFFSET); /* 10ms Intterrupt */ + tmr_putreg32(T0_TICKS_COUNT, TMR_MR0_OFFSET); /* 10ms Interrupt */ /* Reset timer counter register and interrupt on match */ diff --git a/arch/arm/src/lpc31xx/lpc31_boot.c b/arch/arm/src/lpc31xx/lpc31_boot.c index 8578cef04f9..ee12add4f39 100644 --- a/arch/arm/src/lpc31xx/lpc31_boot.c +++ b/arch/arm/src/lpc31xx/lpc31_boot.c @@ -285,7 +285,7 @@ static void up_copyvectorblock(void) uint32_t *dest; /* If we are using vectors in low memory but RAM in that area has been marked - * read only, then temparily mark the mapping write-able (non-buffered). + * read only, then temporarily mark the mapping write-able (non-buffered). */ #if !defined(CONFIG_ARCH_ROMPGTABLE) && defined(CONFIG_ARCH_LOWVECTORS) && defined(CONFIG_PAGING) diff --git a/arch/arm/src/lpc31xx/lpc31_cgu.h b/arch/arm/src/lpc31xx/lpc31_cgu.h index ff0a928d402..080f998b8fe 100644 --- a/arch/arm/src/lpc31xx/lpc31_cgu.h +++ b/arch/arm/src/lpc31xx/lpc31_cgu.h @@ -1009,7 +1009,7 @@ #define LPC31_CGU_DYNSEL5 (LPC31_CGU_CSB_VBASE+LPC31_CGU_DYNSEL5_OFFSET) #define LPC31_CGU_DYNSEL6 (LPC31_CGU_CSB_VBASE+LPC31_CGU_DYNSEL6_OFFSET) -/* CGU configuration (virtural) register address ************************************************/ +/* CGU configuration (virtual) register address *************************************************/ /* Power and oscillator control */ #define LPC31_CGU_POWERMODE (LPC31_CGU_CFG_VBASE+LPC31_CGU_POWERMODE_OFFSET) diff --git a/arch/arm/src/lpc31xx/lpc31_ehci.c b/arch/arm/src/lpc31xx/lpc31_ehci.c index fd5b83b5ef4..797966403a1 100644 --- a/arch/arm/src/lpc31xx/lpc31_ehci.c +++ b/arch/arm/src/lpc31xx/lpc31_ehci.c @@ -325,7 +325,7 @@ enum usbhost_trace1codes_e EHCI_TRACE1_QTDSTATUS_FAILED, /* EHCI ERROR: lpc31_qtd_statusphase failed */ EHCI_TRACE1_TRANSFER_FAILED, /* EHCI ERROR: Transfer failed */ EHCI_TRACE1_QHFOREACH_FAILED, /* EHCI ERROR: lpc31_qh_foreach failed: */ - EHCI_TRACE1_SYSERR_INTR, /* EHCI: Host System Error Interrup */ + EHCI_TRACE1_SYSERR_INTR, /* EHCI: Host System Error Interrupt */ EHCI_TRACE1_USBERR_INTR, /* EHCI: USB Error Interrupt (USBERRINT) Interrupt */ EHCI_TRACE1_EPALLOC_FAILED, /* EHCI ERROR: Failed to allocate EP info structure */ EHCI_TRACE1_BADXFRTYPE, /* EHCI ERROR: Support for transfer type not implemented */ @@ -1618,7 +1618,7 @@ static int lpc31_ioc_wait(struct lpc31_epinfo_s *epinfo) * Name: lpc31_qh_enqueue * * Description: - * Add a new, ready-to-go QH w/attached qTDs to the asynchonous queue. + * Add a new, ready-to-go QH w/attached qTDs to the asynchronous queue. * * Assumptions: The caller holds the EHCI exclsem * @@ -1985,7 +1985,7 @@ static struct lpc31_qtd_s *lpc31_qtd_dataphase(struct lpc31_epinfo_s *epinfo, qtd->hw.token = lpc31_swap32(regval); - /* Add the buffer information to the bufffer pointer list */ + /* Add the buffer information to the buffer pointer list */ ret = lpc31_qtd_addbpl(qtd, buffer, buflen); if (ret < 0) @@ -2281,7 +2281,7 @@ static int lpc31_async_setup(struct lpc31_rhport_s *rhport, physaddr = lpc31_physramaddr((uintptr_t)qtd); *flink = lpc31_swap32(physaddr); - /* In an IN data qTD was also enqueued, then linke the data qTD's + /* In an IN data qTD was also enqueued, then linked the data qTD's * alternate pointer to this STATUS phase qTD in order to handle short * transfers. */ @@ -3236,7 +3236,7 @@ static void lpc31_ehci_bottomhalf(FAR void *arg) * underflow). If the TD on which the error interrupt occurred also * had its IOC bit set, both this bit and USBINT bit are set. ..." * - * We do the same thing in either case: Traverse the asynchonous queue + * We do the same thing in either case: Traverse the asynchronous queue * and remove all of the transfers that are no longer active. */ diff --git a/arch/arm/src/lpc31xx/lpc31_i2c.c b/arch/arm/src/lpc31xx/lpc31_i2c.c index c65d55c4712..206ebfd4d33 100644 --- a/arch/arm/src/lpc31xx/lpc31_i2c.c +++ b/arch/arm/src/lpc31xx/lpc31_i2c.c @@ -155,7 +155,7 @@ static void i2c_setfrequency(struct lpc31_i2cdev_s *priv, uint32_t frequency) if (freq > 100000) { - /* asymetric per 400Khz I2C spec */ + /* asymmetric per 400Khz I2C spec */ putreg32(((47 * freq) / (83 + 47)) / frequency, priv->base + LPC31_I2C_CLKHI_OFFSET); diff --git a/arch/arm/src/lpc31xx/lpc31_irq.c b/arch/arm/src/lpc31xx/lpc31_irq.c index 07d46518840..d62a4dc22e7 100644 --- a/arch/arm/src/lpc31xx/lpc31_irq.c +++ b/arch/arm/src/lpc31xx/lpc31_irq.c @@ -101,7 +101,7 @@ void up_irqinitialize(void) putreg32(0, LPC31_INTC_VECTOR0); putreg32(0, LPC31_INTC_VECTOR1); - /* Set the priority treshold to 0, i.e. don't mask any interrupt on the + /* Set the priority threshold to 0, i.e. don't mask any interrupt on the * basis of priority level, for both targets (IRQ/FIQ) */ diff --git a/arch/arm/src/lpc31xx/lpc31_memorymap.h b/arch/arm/src/lpc31xx/lpc31_memorymap.h index aa5ac817888..852a1e855f5 100644 --- a/arch/arm/src/lpc31xx/lpc31_memorymap.h +++ b/arch/arm/src/lpc31xx/lpc31_memorymap.h @@ -197,7 +197,7 @@ #define LPC31_NAND_MMUFLAGS MMU_IOFLAGS /* board_memorymap.h contains special mappings that are needed when a ROM - * memory map is used. It is included in this odd location becaue it depends + * memory map is used. It is included in this odd location because it depends * on some the virtual address definitions provided above. */ diff --git a/arch/arm/src/lpc31xx/lpc31_mpmc.h b/arch/arm/src/lpc31xx/lpc31_mpmc.h index 5c2b8761a6b..de16e050100 100644 --- a/arch/arm/src/lpc31xx/lpc31_mpmc.h +++ b/arch/arm/src/lpc31xx/lpc31_mpmc.h @@ -89,7 +89,7 @@ #define LPC31_MPMC_STWAITPAGE1_OFFSET 0x230 /* Static Memory Page Mode Read Delay Registers 1 */ #define LPC31_MPMC_STWAITWR1_OFFSET 0x234 /* Static Memory Write Delay Registers 1 */ #define LPC31_MPMC_STWAITTURN1_OFFSET 0x238 /* Static Memory Turn Round Delay Registers 1 */ - /* 0x240-0x278: Reserverd */ + /* 0x240-0x278: Reserved */ /* MPMC register (virtual) addresses ************************************************************/ diff --git a/arch/arm/src/lpc31xx/lpc31_resetclks.c b/arch/arm/src/lpc31xx/lpc31_resetclks.c index 13465f3348a..85745199fe4 100644 --- a/arch/arm/src/lpc31xx/lpc31_resetclks.c +++ b/arch/arm/src/lpc31xx/lpc31_resetclks.c @@ -133,7 +133,7 @@ void lpc31_resetclks(void) putreg32(regval, regaddr); - /* Set/clear the RUN bit in the PCR regiser of all clocks, depending + /* Set/clear the RUN bit in the PCR register of all clocks, depending * upon if the clock is needed by the board logic or not */ diff --git a/arch/arm/src/lpc31xx/lpc31_setfdiv.c b/arch/arm/src/lpc31xx/lpc31_setfdiv.c index c532dcf97c5..5b6ff1e5e6a 100644 --- a/arch/arm/src/lpc31xx/lpc31_setfdiv.c +++ b/arch/arm/src/lpc31xx/lpc31_setfdiv.c @@ -89,7 +89,7 @@ void lpc31_setfdiv(enum lpc31_domainid_e dmnid, fdcndx = lpc31_fdcndx(clkid, dmnid); - /* Does this clock have a frequency divicer? */ + /* Does this clock have a frequency divider? */ if (fdcndx != FDCNDX_INVALID) { diff --git a/arch/arm/src/lpc31xx/lpc31_spi.c b/arch/arm/src/lpc31xx/lpc31_spi.c index 763c1719e89..3a08508281f 100644 --- a/arch/arm/src/lpc31xx/lpc31_spi.c +++ b/arch/arm/src/lpc31xx/lpc31_spi.c @@ -423,12 +423,12 @@ static inline void spi_writeword(FAR struct lpc31_spidev_s *priv, uint16_t word) * Name: spi_lock * * Description: - * On SPI busses where there are multiple devices, it will be necessary to - * lock SPI to have exclusive access to the busses for a sequence of + * On SPI buses where there are multiple devices, it will be necessary to + * lock SPI to have exclusive access to the buses for a sequence of * transfers. The bus should be locked before the chip is selected. After * locking the SPI bus, the caller should then also call the setfrequency, * setbits, and setmode methods to make sure that the SPI is properly - * configured for the device. If the SPI buss is being shared, then it + * configured for the device. If the SPI bus is being shared, then it * may have been left in an incompatible state. * * Input Parameters: diff --git a/arch/arm/src/lpc31xx/lpc31_timer.h b/arch/arm/src/lpc31xx/lpc31_timer.h index b3d580ab671..53af1a7ecd5 100644 --- a/arch/arm/src/lpc31xx/lpc31_timer.h +++ b/arch/arm/src/lpc31xx/lpc31_timer.h @@ -93,7 +93,7 @@ /* TIMER register bit definitions ***************************************************************/ /* Timer Control register TIMER0_CTRL, address 0x13008008 TIMER1_CTRL, address 0x13008408 - * TIMER2_CTRL, address 0x13008808 TIMER3_CTRL, adddress 0x13008c08 + * TIMER2_CTRL, address 0x13008808 TIMER3_CTRL, address 0x13008c08 */ #define TIMER_CTRL_ENABLE (1 << 7) /* Bit 7: Timer enable */ diff --git a/arch/arm/src/lpc31xx/lpc31_usbdev.c b/arch/arm/src/lpc31xx/lpc31_usbdev.c index 5e33ee13a15..7cae79fba9a 100644 --- a/arch/arm/src/lpc31xx/lpc31_usbdev.c +++ b/arch/arm/src/lpc31xx/lpc31_usbdev.c @@ -173,7 +173,7 @@ struct lpc31_dtd_s { - volatile uint32_t nextdesc; /* Address of the next DMA descripto in RAM */ + volatile uint32_t nextdesc; /* Address of the next DMA descriptor in RAM */ volatile uint32_t config; /* Misc. bit encoded configuration information */ uint32_t buffer0; /* Buffer start address */ uint32_t buffer1; /* Buffer start address */ @@ -244,7 +244,7 @@ struct lpc31_dqh_s #define LPC31_EP0MAXPACKET (64) /* EP0 max packet size (1-64) */ #define LPC31_BULKMAXPACKET (512) /* Bulk endpoint max packet (8/16/32/64/512) */ #define LPC31_INTRMAXPACKET (1024) /* Interrupt endpoint max packet (1 to 1024) */ -#define LPC31_ISOCMAXPACKET (512) /* Acutally 1..1023 */ +#define LPC31_ISOCMAXPACKET (512) /* Actually 1..1023 */ /* The address of the endpoint control register */ #define LPC31_USBDEV_ENDPTCTRL(epphy) (LPC31_USBDEV_ENDPTCTRL0 + ((epphy)>>1)*4) @@ -491,7 +491,7 @@ static uint32_t lpc31_getreg(uint32_t addr) uint32_t val = getreg32(addr); - /* Is this the same value that we read from the same registe last time? Are + /* Is this the same value that we read from the same register last time? Are * we polling the register? If so, suppress some of the output. */ @@ -1105,7 +1105,7 @@ static void lpc31_usbreset(struct lpc31_usbdev_s *priv) /* Set USB address to 0 */ lpc31_set_address (priv, 0); - /* Initialise the Enpoint List Address */ + /* Initialise the Endpoint List Address */ lpc31_putreg ((uint32_t)g_qh, LPC31_USBDEV_ENDPOINTLIST); /* EndPoint 0 initialization */ diff --git a/arch/arm/src/lpc43xx/hardware/lpc4310203050_pinconfig.h b/arch/arm/src/lpc43xx/hardware/lpc4310203050_pinconfig.h index 57a25b45c97..065e6f1cc25 100644 --- a/arch/arm/src/lpc43xx/hardware/lpc4310203050_pinconfig.h +++ b/arch/arm/src/lpc43xx/hardware/lpc4310203050_pinconfig.h @@ -57,7 +57,7 @@ * 3. Alternative pin selections are provided with a numeric suffix like _1, _2, etc. Drivers, * however, will use the pin selection without the numeric suffix. Additional definitions are * required in the board.h file to select between the alternative pins. For example, if CAN1_RD - * connects via Pins1[18], then the following definition should appear inthe board.h header file + * connects via Pins1[18], then the following definition should appear in the board.h header file * for that board: * * 4. For ADC pins (PINCONF_ADCNpM), the pin must first be configured configured as a GPIO input. diff --git a/arch/arm/src/lpc43xx/hardware/lpc43_adc.h b/arch/arm/src/lpc43xx/hardware/lpc43_adc.h index 292589f1c48..7459ff328d1 100644 --- a/arch/arm/src/lpc43xx/hardware/lpc43_adc.h +++ b/arch/arm/src/lpc43xx/hardware/lpc43_adc.h @@ -142,7 +142,7 @@ /* A/D Interrupt Enable Register */ #define ADC_INTEN_CHAN(n) (1 << (n)) -#define ADC_INTEN_CHAN0 (1 << 0) /* Bit 0: Enable ADC chan 0 complete intterrupt */ +#define ADC_INTEN_CHAN0 (1 << 0) /* Bit 0: Enable ADC chan 0 complete interrupt */ #define ADC_INTEN_CHAN1 (1 << 1) /* Bit 1: Enable ADC chan 1 complete interrupt */ #define ADC_INTEN_CHAN2 (1 << 2) /* Bit 2: Enable ADC chan 2 complete interrupt */ #define ADC_INTEN_CHAN3 (1 << 3) /* Bit 3: Enable ADC chan 3 complete interrupt */ diff --git a/arch/arm/src/lpc43xx/hardware/lpc43_can.h b/arch/arm/src/lpc43xx/hardware/lpc43_can.h index 15195298824..aaa215e302b 100644 --- a/arch/arm/src/lpc43xx/hardware/lpc43_can.h +++ b/arch/arm/src/lpc43xx/hardware/lpc43_can.h @@ -403,22 +403,22 @@ /* Bits 16-31: Reserved */ /* Interrupt pending 1 */ -#define CAN_IR1_MASK 0xffff /* Bits 0-15: Interrup pending msg 1-16 */ +#define CAN_IR1_MASK 0xffff /* Bits 0-15: Interrupt pending msg 1-16 */ #define CAN_IR1(n) (1 << ((n)-1) /* Bits 16-31: Reserved */ /* Interrupt pending 2 */ -#define CAN_IR2_MASK 0xffff /* Bits 0-15: Interrup pending msg 17-32 */ +#define CAN_IR2_MASK 0xffff /* Bits 0-15: Interrupt pending msg 17-32 */ #define CAN_IR2(n) (1 << ((n)-17) /* Bits 16-31: Reserved */ /* Message valid 1 */ -#define CAN_MSGV1_MASK 0xffff /* Bits 0-15: Interrup pending msg 1-16 */ +#define CAN_MSGV1_MASK 0xffff /* Bits 0-15: Interrupt pending msg 1-16 */ #define CAN_MSGV1(n) (1 << ((n)-1) /* Bits 16-31: Reserved */ /* Message valid 2 */ -#define CAN_MSGV2_MASK 0xffff /* Bits 0-15: Interrup pending msg 17-32 */ +#define CAN_MSGV2_MASK 0xffff /* Bits 0-15: Interrupt pending msg 17-32 */ #define CAN_MSGV2(n) (1 << ((n)-17) /* Bits 16-31: Reserved */ /* CAN clock divider register */ diff --git a/arch/arm/src/lpc43xx/hardware/lpc43_mcpwm.h b/arch/arm/src/lpc43xx/hardware/lpc43_mcpwm.h index 76a67434b95..edbfc034eba 100644 --- a/arch/arm/src/lpc43xx/hardware/lpc43_mcpwm.h +++ b/arch/arm/src/lpc43xx/hardware/lpc43_mcpwm.h @@ -134,7 +134,7 @@ */ /* PWM Control read address (CON), PWM Control set address (CONSET), and PWM Control - * clear address (CONCLR) common regiser bit definitions. + * clear address (CONCLR) common register bit definitions. */ #define MCPWM_CON_RUN0 (1 << 0) /* Bit 0: Stops/starts timer channel 0 */ @@ -160,7 +160,7 @@ #define MCPWM_CON_DCMODE (1 << 31) /* Bit 31: 3-phase DC mode select */ /* Capture Control read address (CAPCON), Capture Control set address (CAPCONSET), - * and Event Control clear address (CAPCONCLR) common register bit defintions + * and Event Control clear address (CAPCONCLR) common register bit definitions */ #define MCPWM_CAPCON_CAP0MCI0RE (1 << 0) /* Bit 0: Enable chan0 rising edge capture MCI0 */ diff --git a/arch/arm/src/lpc43xx/hardware/lpc43_ssp.h b/arch/arm/src/lpc43xx/hardware/lpc43_ssp.h index 5286b79c752..05e242fb9c7 100644 --- a/arch/arm/src/lpc43xx/hardware/lpc43_ssp.h +++ b/arch/arm/src/lpc43xx/hardware/lpc43_ssp.h @@ -148,7 +148,7 @@ #define SSP_INT_ROR (1 << 0) /* Bit 0: RX FIFO overrun */ #define SSP_INT_RT (1 << 1) /* Bit 1: RX FIFO timeout */ #define SSP_INT_RX (1 << 2) /* Bit 2: RX FIFO at least half full (not ICR) */ -#define SSP_INT_TX (1 << 3 ) /* Bit 3: TX FIFO at least half empy (not ICR) */ +#define SSP_INT_TX (1 << 3 ) /* Bit 3: TX FIFO at least half empty (not ICR) */ /* Bits 4-31: Reserved */ /* DMA Control Register */ diff --git a/arch/arm/src/lpc43xx/lpc43_allocateheap.c b/arch/arm/src/lpc43xx/lpc43_allocateheap.c index c8a76af931f..50dd872158e 100644 --- a/arch/arm/src/lpc43xx/lpc43_allocateheap.c +++ b/arch/arm/src/lpc43xx/lpc43_allocateheap.c @@ -126,12 +126,12 @@ * Configuration A: * Program memory = FLASH * Data memory = Local RAM Bank 0 - * Additional regions = Local RAM Bank 1 + AHB SRAM (exluding DMA buffers) + * Additional regions = Local RAM Bank 1 + AHB SRAM (excluding DMA buffers) * * Configuration B: * Program memory = Local RAM Bank 0 * Data memory = Local RAM Bank 1 - * Additional regions = AHB SRAM (exluding DMA buffers) + * Additional regions = AHB SRAM (excluding DMA buffers) * * This file supports only memory configuration A. * diff --git a/arch/arm/src/lpc43xx/lpc43_can.c b/arch/arm/src/lpc43xx/lpc43_can.c index e210c56323d..25e36ccfa2c 100644 --- a/arch/arm/src/lpc43xx/lpc43_can.c +++ b/arch/arm/src/lpc43xx/lpc43_can.c @@ -702,7 +702,7 @@ static int can_remoterequest(FAR struct can_dev_s *dev, uint16_t id) * * Byte 0: Bits 0-7: Bits 3-10 of the 11-bit CAN identifier * Byte 1: Bits 5-7: Bits 0-2 of the 11-bit CAN identifier - * Bit 4: Remote Tranmission Request (RTR) + * Bit 4: Remote Transmission Request (RTR) * Bits 0-3: Data Length Code (DLC) * Bytes 2-10: CAN data * diff --git a/arch/arm/src/lpc43xx/lpc43_cgu.c b/arch/arm/src/lpc43xx/lpc43_cgu.c index 74668fcd650..0720350f89f 100644 --- a/arch/arm/src/lpc43xx/lpc43_cgu.c +++ b/arch/arm/src/lpc43xx/lpc43_cgu.c @@ -49,7 +49,7 @@ /**************************************************************************** * Pre-processor Definitions ****************************************************************************/ -/* Maximum/Threashold Frequencies *******************************************/ +/* Maximum/Threshold Frequencies ********************************************/ #define LOW_XTAL_FREQUENCY 15000000 #define MAX_XTAL_FREQUENCY 25000000 diff --git a/arch/arm/src/lpc43xx/lpc43_config.h b/arch/arm/src/lpc43xx/lpc43_config.h index d6df508ee04..12c369799ff 100644 --- a/arch/arm/src/lpc43xx/lpc43_config.h +++ b/arch/arm/src/lpc43xx/lpc43_config.h @@ -54,7 +54,7 @@ # define HAVE_UART 1 #endif -/* Make sure all features are disabled for diabled U[S]ARTs. This simplifies +/* Make sure all features are disabled for disabled U[S]ARTs. This simplifies * checking later. */ diff --git a/arch/arm/src/lpc43xx/lpc43_ehci.c b/arch/arm/src/lpc43xx/lpc43_ehci.c index 5abdf71d5d6..667b8c171b9 100644 --- a/arch/arm/src/lpc43xx/lpc43_ehci.c +++ b/arch/arm/src/lpc43xx/lpc43_ehci.c @@ -326,7 +326,7 @@ enum usbhost_trace1codes_e EHCI_TRACE1_QTDSTATUS_FAILED, /* EHCI ERROR: lpc43_qtd_statusphase failed */ EHCI_TRACE1_TRANSFER_FAILED, /* EHCI ERROR: Transfer failed */ EHCI_TRACE1_QHFOREACH_FAILED, /* EHCI ERROR: lpc43_qh_foreach failed: */ - EHCI_TRACE1_SYSERR_INTR, /* EHCI: Host System Error Interrup */ + EHCI_TRACE1_SYSERR_INTR, /* EHCI: Host System Error Interrupt */ EHCI_TRACE1_USBERR_INTR, /* EHCI: USB Error Interrupt (USBERRINT) Interrupt */ EHCI_TRACE1_EPALLOC_FAILED, /* EHCI ERROR: Failed to allocate EP info structure */ EHCI_TRACE1_BADXFRTYPE, /* EHCI ERROR: Support for transfer type not implemented */ @@ -1518,7 +1518,7 @@ static int lpc43_ioc_wait(struct lpc43_epinfo_s *epinfo) * Name: lpc43_qh_enqueue * * Description: - * Add a new, ready-to-go QH w/attached qTDs to the asynchonous queue. + * Add a new, ready-to-go QH w/attached qTDs to the asynchronous queue. * * Assumptions: The caller holds the EHCI exclsem * @@ -1876,7 +1876,7 @@ static struct lpc43_qtd_s *lpc43_qtd_dataphase(struct lpc43_epinfo_s *epinfo, qtd->hw.token = lpc43_swap32(regval); - /* Add the buffer information to the bufffer pointer list */ + /* Add the buffer information to the buffer pointer list */ ret = lpc43_qtd_addbpl(qtd, buffer, buflen); if (ret < 0) @@ -2171,7 +2171,7 @@ static int lpc43_async_setup(struct lpc43_rhport_s *rhport, physaddr = lpc43_physramaddr((uintptr_t)qtd); *flink = lpc43_swap32(physaddr); - /* In an IN data qTD was also enqueued, then linke the data qTD's + /* In an IN data qTD was also enqueued, then linked the data qTD's * alternate pointer to this STATUS phase qTD in order to handle short * transfers. */ @@ -3080,7 +3080,7 @@ static void lpc43_ehci_bottomhalf(FAR void *arg) * underflow). If the TD on which the error interrupt occurred also * had its IOC bit set, both this bit and USBINT bit are set. ..." * - * We do the same thing in either case: Traverse the asynchonous queue + * We do the same thing in either case: Traverse the asynchronous queue * and remove all of the transfers that are no longer active. */ diff --git a/arch/arm/src/lpc43xx/lpc43_ethernet.c b/arch/arm/src/lpc43xx/lpc43_ethernet.c index e3f0b171da0..4041e5164f4 100644 --- a/arch/arm/src/lpc43xx/lpc43_ethernet.c +++ b/arch/arm/src/lpc43xx/lpc43_ethernet.c @@ -992,7 +992,7 @@ static int lpc43_transmit(FAR struct lpc43_ethmac_s *priv) txdesc->tdes0 |= (ETH_TDES0_LS | ETH_TDES0_IC); - /* This segement is, most likely, of fractional buffersize */ + /* This segment is, most likely, of fractional buffersize */ txdesc->tdes1 = lastsize; buffer += lastsize; @@ -2634,7 +2634,7 @@ static void lpc43_txdescinit(FAR struct lpc43_ethmac_s *priv) } } - /* Set Transmit Desciptor List Address Register */ + /* Set Transmit Descriptor List Address Register */ lpc43_putreg((uint32_t)priv->txtable, LPC43_ETH_DMATXDLA); } @@ -3081,7 +3081,7 @@ static int lpc43_phyinit(FAR struct lpc43_ethmac_s *priv) } #endif - /* Perform auto-negotion if so configured */ + /* Perform auto-negotiation if so configured */ #ifdef CONFIG_LPC43_AUTONEG /* Wait for link status */ @@ -3212,7 +3212,7 @@ static int lpc43_phyinit(FAR struct lpc43_ethmac_s *priv) #endif #endif -#else /* Auto-negotion not selected */ +#else /* Auto-negotiation not selected */ #ifdef CONFIG_LPC43_ETHFD priv->fduplex = 1; @@ -3267,7 +3267,7 @@ static int lpc43_phyinit(FAR struct lpc43_ethmac_s *priv) * Name: lpc43_selectmii * * Description: - * Selects the MII inteface. + * Selects the MII interface. * * Input Parameters: * None @@ -3292,7 +3292,7 @@ static inline void lpc43_selectmii(void) * Name: lpc43_selectrmii * * Description: - * Selects the RMII inteface. + * Selects the RMII interface. * * Input Parameters: * None diff --git a/arch/arm/src/lpc43xx/lpc43_i2c.c b/arch/arm/src/lpc43xx/lpc43_i2c.c index a16f5e8f404..ea0a50df454 100644 --- a/arch/arm/src/lpc43xx/lpc43_i2c.c +++ b/arch/arm/src/lpc43xx/lpc43_i2c.c @@ -167,7 +167,7 @@ static void lpc43_i2c_setfrequency(struct lpc43_i2cdev_s *priv, { if (frequency > 100000) { - /* asymetric per 400Khz I2C spec */ + /* asymmetric per 400Khz I2C spec */ putreg32(priv->base_freq / (83 + 47) * 47 / frequency, priv->base + LPC43_I2C_SCLH_OFFSET); diff --git a/arch/arm/src/lpc43xx/lpc43_sdmmc.c b/arch/arm/src/lpc43xx/lpc43_sdmmc.c index 4e082ae6135..f961335dac2 100644 --- a/arch/arm/src/lpc43xx/lpc43_sdmmc.c +++ b/arch/arm/src/lpc43xx/lpc43_sdmmc.c @@ -717,7 +717,7 @@ static void lpc43_disable_allints(struct lpc43_dev_s *priv) * Name: lpc43_config_waitints * * Description: - * Enable/disable SD card interrupts needed to suport the wait function + * Enable/disable SD card interrupts needed to support the wait function * * Input Parameters: * priv - A reference to the SD card device state structure @@ -2335,7 +2335,7 @@ errout: * * Events are automatically disabled once the callback is performed and no * further callback events will occur until they are again enabled by - * calling this methos. + * calling this method. * * Input Parameters: * dev - An instance of the SD card device interface diff --git a/arch/arm/src/lpc43xx/lpc43_serial.c b/arch/arm/src/lpc43xx/lpc43_serial.c index c00497c5258..dc1684c1160 100644 --- a/arch/arm/src/lpc43xx/lpc43_serial.c +++ b/arch/arm/src/lpc43xx/lpc43_serial.c @@ -1259,7 +1259,7 @@ static bool up_txempty(struct uart_dev_s *dev) } /**************************************************************************** - * Public Funtions + * Public Functions ****************************************************************************/ /**************************************************************************** diff --git a/arch/arm/src/lpc43xx/lpc43_spi.c b/arch/arm/src/lpc43xx/lpc43_spi.c index dcd64743666..d884dd7491d 100644 --- a/arch/arm/src/lpc43xx/lpc43_spi.c +++ b/arch/arm/src/lpc43xx/lpc43_spi.c @@ -84,7 +84,7 @@ * Private Types ****************************************************************************/ -/* This structure descibes the state of the SSP driver */ +/* This structure describes the state of the SSP driver */ struct lpc43_spidev_s { @@ -156,12 +156,12 @@ static struct lpc43_spidev_s g_spidev = * Name: spi_lock * * Description: - * On SPI busses where there are multiple devices, it will be necessary to - * lock SPI to have exclusive access to the busses for a sequence of + * On SPI buses where there are multiple devices, it will be necessary to + * lock SPI to have exclusive access to the buses for a sequence of * transfers. The bus should be locked before the chip is selected. After * locking the SPI bus, the caller should then also call the setfrequency, * setbits, and setmode methods to make sure that the SPI is properly - * configured for the device. If the SPI buss is being shared, then it + * configured for the device. If the SPI bus is being shared, then it * may have been left in an incompatible state. * * Input Parameters: diff --git a/arch/arm/src/lpc43xx/lpc43_ssp.c b/arch/arm/src/lpc43xx/lpc43_ssp.c index 1370cabd045..0da6da5ef02 100644 --- a/arch/arm/src/lpc43xx/lpc43_ssp.c +++ b/arch/arm/src/lpc43xx/lpc43_ssp.c @@ -68,7 +68,7 @@ * Private Types ****************************************************************************/ -/* This structure descibes the state of the SSP driver */ +/* This structure describes the state of the SSP driver */ struct lpc43_sspdev_s { @@ -252,12 +252,12 @@ static inline void ssp_putreg(FAR struct lpc43_sspdev_s *priv, uint8_t offset, u * Name: ssp_lock * * Description: - * On SPI busses where there are multiple devices, it will be necessary to - * lock SPI to have exclusive access to the busses for a sequence of + * On SPI buses where there are multiple devices, it will be necessary to + * lock SPI to have exclusive access to the buses for a sequence of * transfers. The bus should be locked before the chip is selected. After * locking the SPI bus, the caller should then also call the setfrequency, * setbits, and setmode methods to make sure that the SPI is properly - * configured for the device. If the SPI buss is being shared, then it + * configured for the device. If the SPI bus is being shared, then it * may have been left in an incompatible state. * * Input Parameters: diff --git a/arch/arm/src/lpc43xx/lpc43_start.c b/arch/arm/src/lpc43xx/lpc43_start.c index aba3d5efc2f..285da7538bf 100644 --- a/arch/arm/src/lpc43xx/lpc43_start.c +++ b/arch/arm/src/lpc43xx/lpc43_start.c @@ -45,7 +45,7 @@ * and the Cortex-M4 starts the boot loader. By default the JTAG access to the * chip is disabled at reset. The boot ROM determines the boot mode based on * the OTP BOOT_SRC value or reset state pins. For flash-based parts, the part - * boots from internal flash by default. Otherwse, the boot ROM copies the + * boots from internal flash by default. Otherwise, the boot ROM copies the * image to internal SRAM at location 0x1000:0000, sets the ARM's shadow * pointer to 0x1000:0000, and jumps to that location. * diff --git a/arch/arm/src/lpc43xx/lpc43_timer.c b/arch/arm/src/lpc43xx/lpc43_timer.c index c674e5bcb3c..4f14336812c 100644 --- a/arch/arm/src/lpc43xx/lpc43_timer.c +++ b/arch/arm/src/lpc43xx/lpc43_timer.c @@ -175,7 +175,7 @@ static uint32_t lpc43_getreg(uint32_t addr) uint32_t val = getreg32(addr); - /* Is this the same value that we read from the same registe last time? + /* Is this the same value that we read from the same register last time? * Are we polling the register? If so, suppress some of the output. */ @@ -608,7 +608,7 @@ static int lpc43_settimeout(FAR struct timer_lowerhalf_s *lower, priv->adjustment = priv->timeout - timeout; - tmrinfo("fclk=%d clkticks=%d timout=%d, adjustment=%d\n", + tmrinfo("fclk=%d clkticks=%d timeout=%d, adjustment=%d\n", TMR_FCLK, priv->clkticks, priv->timeout, priv->adjustment); return OK; diff --git a/arch/arm/src/lpc43xx/lpc43_uart.c b/arch/arm/src/lpc43xx/lpc43_uart.c index e6537728269..dd7e18d327e 100644 --- a/arch/arm/src/lpc43xx/lpc43_uart.c +++ b/arch/arm/src/lpc43xx/lpc43_uart.c @@ -602,7 +602,7 @@ void lpc43_setbaud(uintptr_t uartbase, uint32_t basefreq, uint32_t baud) uint32_t cdivadd; /* Candidate FDR DIVADDVAL value */ uint32_t errval; /* Error value associated with the candidate */ - /* The U[S]ART buad is given by: + /* The U[S]ART baud is given by: * * Fbaud = Fbase * mul / (mul + divadd) / (16 * dl) * dl = Fbase * mul / (mul + divadd) / Fbaud / 16 diff --git a/arch/arm/src/lpc43xx/lpc43_usb0dev.c b/arch/arm/src/lpc43xx/lpc43_usb0dev.c index 64ee5c5add8..09347df9f6b 100644 --- a/arch/arm/src/lpc43xx/lpc43_usb0dev.c +++ b/arch/arm/src/lpc43xx/lpc43_usb0dev.c @@ -180,7 +180,7 @@ struct lpc43_dtd_s { - volatile uint32_t nextdesc; /* Address of the next DMA descripto in RAM */ + volatile uint32_t nextdesc; /* Address of the next DMA descriptor in RAM */ volatile uint32_t config; /* Misc. bit encoded configuration information */ uint32_t buffer0; /* Buffer start address */ uint32_t buffer1; /* Buffer start address */ @@ -259,7 +259,7 @@ struct lpc43_dqh_s #define LPC43_EP0MAXPACKET (64) /* EP0 max packet size (1-64) */ #define LPC43_BULKMAXPACKET (512) /* Bulk endpoint max packet (8/16/32/64/512) */ #define LPC43_INTRMAXPACKET (1024) /* Interrupt endpoint max packet (1 to 1024) */ -#define LPC43_ISOCMAXPACKET (512) /* Acutally 1..1023 */ +#define LPC43_ISOCMAXPACKET (512) /* Actually 1..1023 */ /* Endpoint bit position in SETUPSTAT, PRIME, FLUSH, STAT, COMPLETE registers */ @@ -512,7 +512,7 @@ static uint32_t lpc43_getreg(uint32_t addr) uint32_t val = getreg32(addr); - /* Is this the same value that we read from the same registe last time? Are + /* Is this the same value that we read from the same register last time? Are * we polling the register? If so, suppress some of the output. */ @@ -1141,7 +1141,7 @@ static void lpc43_usbreset(struct lpc43_usbdev_s *priv) lpc43_set_address (priv, 0); - /* Initialise the Enpoint List Address */ + /* Initialise the Endpoint List Address */ lpc43_putreg ((uint32_t)g_qh, LPC43_USBDEV_ENDPOINTLIST); diff --git a/arch/arm/src/lpc43xx/lpc43_wwdt.c b/arch/arm/src/lpc43xx/lpc43_wwdt.c index 7dda5098126..54e93d58406 100644 --- a/arch/arm/src/lpc43xx/lpc43_wwdt.c +++ b/arch/arm/src/lpc43xx/lpc43_wwdt.c @@ -66,7 +66,7 @@ #define LPC43_MAX_WWDT_WINDOW 0xFFFFFF /* 24-bit max value */ #define LPC43_MIN_WWDT_WINDOW 0x100 /* Minimum window value allowed */ #define WWDT_WARNINT_VALUE 0x3FF /* 10-bit max value */ -#define WWDT_MAXTIMEOUT 5592 /* Max timeout value in miliseconds */ +#define WWDT_MAXTIMEOUT 5592 /* Max timeout value in milliseconds */ /* Configuration ************************************************************/ @@ -99,7 +99,7 @@ struct lpc43_lowerhalf_wwdt_s static void lpc43_setwindow(uint32_t window); static void lpc43_setwarning(uint32_t warning); -/* Interrupt hanlding *******************************************************/ +/* Interrupt handling *******************************************************/ static int lpc43_interrupt(int irq, FAR void *context, FAR void *arg); @@ -463,7 +463,7 @@ static int lpc43_settimeout(FAR struct watchdog_lowerhalf_s *lower, /* Remember the selected values */ priv->reload = reload; - wdinfo("reload=%d timout=%d\n", reload, priv->timeout); + wdinfo("reload=%d timeout=%d\n", reload, priv->timeout); regval = reload; putreg32(regval, LPC43_WWDT_TC); diff --git a/arch/arm/src/lpc43xx/spifi/changelog.txt b/arch/arm/src/lpc43xx/spifi/changelog.txt index 69a515e8edf..fed8137b9a4 100644 --- a/arch/arm/src/lpc43xx/spifi/changelog.txt +++ b/arch/arm/src/lpc43xx/spifi/changelog.txt @@ -100,7 +100,7 @@ Change Log: 9. LPCXpresso XML projects added. 10. M0 Library added. 11. Sub-block erase fixed for devices with full capability. -12. IAR libarary renamed to match Keil library +12. IAR library renamed to match Keil library 13. Moved project files into proj directory Known issues: (carried forward) diff --git a/arch/arm/src/lpc43xx/spifi/inc/spifilib_api.h b/arch/arm/src/lpc43xx/spifi/inc/spifilib_api.h index 67d3a480d2d..0d1d219da2a 100644 --- a/arch/arm/src/lpc43xx/spifi/inc/spifilib_api.h +++ b/arch/arm/src/lpc43xx/spifi/inc/spifilib_api.h @@ -339,7 +339,7 @@ uint32_t spifiDevGetInfo(const SPIFI_HANDLE_T *pHandle, SPIFI_INFO_ID_T infoId); /** * @brief Returns the starting address of a block number * @param pHandle : Pointer to a LPCSPIFILIB device handle - * @param blockNum : Block number fo get starting address for + * @param blockNum : Block number to get starting address for * @return The starting address for the block, or 0xFFFFFFFF if the block number if invalid */ uint32_t spifiGetAddrFromBlock(const SPIFI_HANDLE_T *pHandle, uint32_t blockNum); @@ -347,7 +347,7 @@ uint32_t spifiGetAddrFromBlock(const SPIFI_HANDLE_T *pHandle, uint32_t blockNum) /** * @brief Returns the starting address of a sub-block number * @param pHandle : Pointer to a LPCSPIFILIB device handle - * @param subBlockNum : Sub-block number fo get starting address for + * @param subBlockNum : Sub-block number to get starting address for * @return The starting address for the sub-block, or 0xFFFFFFFF if the block number if invalid */ uint32_t spifiGetAddrFromSubBlock(const SPIFI_HANDLE_T *pHandle, uint32_t subBlockNum); diff --git a/arch/arm/src/lpc43xx/spifi/inc/spifilib_dev.h b/arch/arm/src/lpc43xx/spifi/inc/spifilib_dev.h index 0c499e91ffb..b33d0c7842e 100644 --- a/arch/arm/src/lpc43xx/spifi/inc/spifilib_dev.h +++ b/arch/arm/src/lpc43xx/spifi/inc/spifilib_dev.h @@ -129,12 +129,12 @@ typedef enum { } SPIFI_INFO_ID_T; /** - * @brief SPIFI_INFO_QUADREAD_CLOCK Depricated! Do NOT use for new development + * @brief SPIFI_INFO_QUADREAD_CLOCK Deprecated! Do NOT use for new development */ #define SPIFI_INFO_QUADREAD_CLOCK SPIFI_INFO_MAX_HSREAD_CLOCK /** - * @brief SPIFI_INFO_QUADPROG_CLOCK Depricated! Do NOT use for new development + * @brief SPIFI_INFO_QUADPROG_CLOCK Deprecated! Do NOT use for new development */ #define SPIFI_INFO_QUADPROG_CLOCK SPIFI_INFO_MAX_HSPROG_CLOCK /** @@ -377,32 +377,32 @@ typedef struct SPIFI_DEV_ENUMERATOR { SPIFI_FAM_NODE_T *spifi_REG_FAMILY_CommonCommandSet(void); /** - * @brief SPIFI_REG_FAMILY_Spansion_2Byte_PStatus Depricated! Do NOT use for new development + * @brief SPIFI_REG_FAMILY_Spansion_2Byte_PStatus Deprecated! Do NOT use for new development */ #define SPIFI_REG_FAMILY_Spansion_2Byte_PStatus spifi_REG_FAMILY_CommonCommandSet /** - * @brief SPIFI_REG_FAMILY_Spansion_3Byte_Status Depricated! Do NOT use for new development + * @brief SPIFI_REG_FAMILY_Spansion_3Byte_Status Deprecated! Do NOT use for new development */ #define SPIFI_REG_FAMILY_Spansion_3Byte_Status spifi_REG_FAMILY_CommonCommandSet /** - * @brief SPIFI_REG_FAMILY_Macronix_2Byte_Status Depricated! Do NOT use for new development + * @brief SPIFI_REG_FAMILY_Macronix_2Byte_Status Deprecated! Do NOT use for new development */ #define SPIFI_REG_FAMILY_Macronix_2Byte_Status spifi_REG_FAMILY_CommonCommandSet /** - * @brief SPIFI_REG_FAMILY_SpansionS25FLP Depricated! Do NOT use for new development + * @brief SPIFI_REG_FAMILY_SpansionS25FLP Deprecated! Do NOT use for new development */ #define SPIFI_REG_FAMILY_SpansionS25FLP spifi_REG_FAMILY_CommonCommandSet /** - * @brief SPIFI_REG_FAMILY_SpansionS25FL1 Depricated! Do NOT use for new development + * @brief SPIFI_REG_FAMILY_SpansionS25FL1 Deprecated! Do NOT use for new development */ #define SPIFI_REG_FAMILY_SpansionS25FL1 spifi_REG_FAMILY_CommonCommandSet /** - * @brief SPIFI_REG_FAMILY_MacronixMX25L Depricated! Do NOT use for new development + * @brief SPIFI_REG_FAMILY_MacronixMX25L Deprecated! Do NOT use for new development */ #define SPIFI_REG_FAMILY_MacronixMX25L spifi_REG_FAMILY_CommonCommandSet diff --git a/arch/arm/src/lpc43xx/spifi/src/spifilib_dev_common.c b/arch/arm/src/lpc43xx/spifi/src/spifilib_dev_common.c index 60b6ea8d2e6..e24bf80ed60 100644 --- a/arch/arm/src/lpc43xx/spifi/src/spifilib_dev_common.c +++ b/arch/arm/src/lpc43xx/spifi/src/spifilib_dev_common.c @@ -140,7 +140,7 @@ static void spifiPrvDevGetID(uint32_t spifiAddr, SPIFI_DEVICE_ID_T *pID) /* Get info from the device */ pID->mfgId[0] = spifi_HW_GetData8(pSpifiCtrlAddr); /* Manufacturers ID */ pID->mfgId[1] = spifi_HW_GetData8(pSpifiCtrlAddr); /* Memory Type */ - pID->mfgId[2] = spifi_HW_GetData8(pSpifiCtrlAddr); /* Memmory Capacity */ + pID->mfgId[2] = spifi_HW_GetData8(pSpifiCtrlAddr); /* Memory Capacity */ /* Read the specified number of extended bytes */ for (idx = 0; idx < pID->extCount; ++idx) { @@ -758,7 +758,7 @@ uint32_t spifiGetSubBlockFromAddr(const SPIFI_HANDLE_T *pHandle, uint32_t addr) return subBlock; } -/* Returns the first sub-block in hte passed block */ +/* Returns the first sub-block in the passed block */ uint32_t spifiGetSubBlockFromBlock(const SPIFI_HANDLE_T *pHandle, uint32_t blockNum) { uint32_t subBlock = ~0UL; diff --git a/arch/arm/src/lpc54xx/Kconfig b/arch/arm/src/lpc54xx/Kconfig index 2bec112e098..f9a56575838 100644 --- a/arch/arm/src/lpc54xx/Kconfig +++ b/arch/arm/src/lpc54xx/Kconfig @@ -1000,10 +1000,10 @@ config LPC54_LCD_CLKIN_FREQUENCY depends on LPC54_LCD_USE_CLKIN config LPC54_LCD_REFRESH_FREQ - int "LCD refesh rate (Hz)" + int "LCD refresh rate (Hz)" default 50 ---help--- - LCD refesh rate (Hz) + LCD refresh rate (Hz) config LPC54_LCD_BACKLIGHT bool "Enable backlight" diff --git a/arch/arm/src/lpc54xx/hardware/lpc54_lcd.h b/arch/arm/src/lpc54xx/hardware/lpc54_lcd.h index a8566da291d..b0156aa2920 100644 --- a/arch/arm/src/lpc54xx/hardware/lpc54_lcd.h +++ b/arch/arm/src/lpc54xx/hardware/lpc54_lcd.h @@ -174,7 +174,7 @@ #define LCD_LPBASE_LCDLPBASE_SHIFT (3) /* Bits 3-31: LCD lower panel base address */ #define LCD_LPBASE_LCDLPBASE_MASK (0x1FFFFFFF << LCD_UPBASE_LCDUPBASE_SHIFT) -/* LCD_CTRL - Controle Register */ +/* LCD_CTRL - Control Register */ #define LCD_CTRL_LCDEN (1 << 0) /* Bit 0: LCD enable control bit */ #define LCD_CTRL_LCDBPP_SHIFT (1) /* Bits 1-3: LCD bits per pixel */ @@ -211,7 +211,7 @@ /* LCD_INTRAW - Raw Interrupt Status Register */ /* Bits 0: Reserved */ -#define LCD_INTRAW_FUFRIS (1 << 1) /* Bit 1: FIFO Undeflow raw interrupt status */ +#define LCD_INTRAW_FUFRIS (1 << 1) /* Bit 1: FIFO Underflow raw interrupt status */ #define LCD_INTRAW_LNBURIS (1 << 2) /* Bit 2: LCD Next address base update intterupt */ #define LCD_INTRAW_VCOMPRIS (1 << 3) /* Bit 3: Vertical compare interrupt status */ #define LCD_INTRAW_BERRAW (1 << 4) /* Bit 4: AHB Master bus error interrupt status */ @@ -220,7 +220,7 @@ /* LCD_INTSTAT - Masked Interrupt Status Register */ /* Bits 0: Reserved */ -#define LCD_INTSTAT_FUFMIS (1 << 1) /* Bit 1: FIFO Undeflow raw interrupt status */ +#define LCD_INTSTAT_FUFMIS (1 << 1) /* Bit 1: FIFO Underflow raw interrupt status */ #define LCD_INTSTAT_LNBUMIS (1 << 2) /* Bit 2: LCD Next address base update intterupt */ #define LCD_INTSTAT_VCOMPMIS (1 << 3) /* Bit 3: Vertical compare interrupt status */ #define LCD_INTSTAT_BERMIS (1 << 4) /* Bit 4: AHB Master bus error interrupt status */ @@ -229,7 +229,7 @@ /* LCD_INTCLR - Interrupt Clear Register */ /* Bits 0: Reserved */ -#define LCD_INTCLR_FUFIC (1 << 1) /* Bit 1: FIFO Undeflow raw interrupt clear */ +#define LCD_INTCLR_FUFIC (1 << 1) /* Bit 1: FIFO Underflow raw interrupt clear */ #define LCD_INTCLR_LNBUIC (1 << 2) /* Bit 2: LCD Next address base update intterupt */ #define LCD_INTCLR_VCOMPIC (1 << 3) /* Bit 3: Vertical compare interrupt clear */ #define LCD_INTCLR_BERIC (1 << 4) /* Bit 4: AHB Master bus error interrupt clear */ diff --git a/arch/arm/src/lpc54xx/hardware/lpc54_rtc.h b/arch/arm/src/lpc54xx/hardware/lpc54_rtc.h index 958dcab27f0..f8568b2d34c 100644 --- a/arch/arm/src/lpc54xx/hardware/lpc54_rtc.h +++ b/arch/arm/src/lpc54xx/hardware/lpc54_rtc.h @@ -47,7 +47,7 @@ * Pre-processor Definitions ********************************************************************************************/ -#define LPC54_RTC_NGPREGS 8 /* Nubmer of general purpose registers */ +#define LPC54_RTC_NGPREGS 8 /* Number of general purpose registers */ /* Register offsets *************************************************************************/ diff --git a/arch/arm/src/lpc54xx/hardware/lpc54_sdmmc.h b/arch/arm/src/lpc54xx/hardware/lpc54_sdmmc.h index 4dd2844a7f0..00db72d3f5e 100644 --- a/arch/arm/src/lpc54xx/hardware/lpc54_sdmmc.h +++ b/arch/arm/src/lpc54xx/hardware/lpc54_sdmmc.h @@ -250,7 +250,7 @@ #define SDMMC_CMD_DISBOOT (1 << 26) /* Bit 26: Disable Boot */ #define SDMMC_CMD_BOOTMODE (1 << 27) /* Bit 27: Boot Mode */ #define SDMMC_CMD_VSWITCH (1 << 28) /* Bit 28: Voltage switch bit */ -#define SDMMC_CMD_USEHOLD (1 << 29) /* Bit 29: Use Hold Registert */ +#define SDMMC_CMD_USEHOLD (1 << 29) /* Bit 29: Use Hold Registered */ /* Bit 30: Reserved */ #define SDMMC_CMD_STARTCMD (1 << 31) /* Bit 31: Start command */ diff --git a/arch/arm/src/lpc54xx/hardware/lpc54_usart.h b/arch/arm/src/lpc54xx/hardware/lpc54_usart.h index 09b20875d3b..c07d9689e14 100644 --- a/arch/arm/src/lpc54xx/hardware/lpc54_usart.h +++ b/arch/arm/src/lpc54xx/hardware/lpc54_usart.h @@ -279,7 +279,7 @@ #define USART_CFG_DATALEN_MASK (3 << USART_CFG_DATALEN_SHIFT) # define USART_CFG_DATALEN_7BIT (0 << USART_CFG_DATALEN_SHIFT) /* 7 bit Data length */ # define USART_CFG_DATALEN_8BIT (1 << USART_CFG_DATALEN_SHIFT) /* 8 bit Data length */ -# define USART_CFG_DATALEN_9BIT (2 << USART_CFG_DATALEN_SHIFT) /* 9 bit data lengt */ +# define USART_CFG_DATALEN_9BIT (2 << USART_CFG_DATALEN_SHIFT) /* 9 bit data length */ #define USART_CFG_PARITYSEL_SHIFT (4) /* Bits 4-5: Selects what type of parity is used by the USART */ #define USART_CFG_PARITYSEL_MASK (3 << USART_CFG_PARITYSEL_SHIFT) # define USART_CFG_PARITYSEL_NONE (0 << USART_CFG_PARITYSEL_SHIFT) /* No parity */ diff --git a/arch/arm/src/lpc54xx/lpc546x_power.h b/arch/arm/src/lpc54xx/lpc546x_power.h index 2a76cb5ec8e..c113095e254 100644 --- a/arch/arm/src/lpc54xx/lpc546x_power.h +++ b/arch/arm/src/lpc54xx/lpc546x_power.h @@ -50,7 +50,7 @@ ************************************************************************************/ /* Setting the bit corresponding in the PDRUNCFGSET0/1 register powers down the - * selected component; clearling the bit enables it. + * selected component; clearing the bit enables it. */ #define lpc54_powerup0(s) putreg32((s), LPC54_SYSCON_PDRUNCFGCLR0) diff --git a/arch/arm/src/lpc54xx/lpc54_clockconfig.c b/arch/arm/src/lpc54xx/lpc54_clockconfig.c index 05a148a3cf9..39e4b1c4f00 100644 --- a/arch/arm/src/lpc54xx/lpc54_clockconfig.c +++ b/arch/arm/src/lpc54xx/lpc54_clockconfig.c @@ -297,7 +297,7 @@ void lpc54_clockconfig(FAR const struct pll_setup_s *pllsetup) putreg32(SYSCON_MAINCLKSELB_MAINCLKSELA, LPC54_SYSCON_MAINCLKSELB); /* Set the voltage for the find PLL output frequency. This assumes - * that the PLL output frequncy is >=12MHz. + * that the PLL output frequency is >=12MHz. */ lpc54_setvoltage(pllsetup->pllfout); diff --git a/arch/arm/src/lpc54xx/lpc54_emc.c b/arch/arm/src/lpc54xx/lpc54_emc.c index 08cd0efd310..a85eb346870 100644 --- a/arch/arm/src/lpc54xx/lpc54_emc.c +++ b/arch/arm/src/lpc54xx/lpc54_emc.c @@ -310,7 +310,7 @@ void lpc54_emc_sdram_initialize(FAR const struct emc_dynamic_timing_config_s *ti EMC_DYNCONFIG_ADDRMAP(config->addrmap); putreg32(regval, LPC54_EMC_DYNCONFIG(config->chndx)); - /* Abstract CAS latency from the SDRAM mode reigster setting values */ + /* Abstract CAS latency from the SDRAM mode register setting values */ caslat = (config->mode & EMC_SDRAM_MODE_CL_MASK) >> EMC_SDRAM_MODE_CL_SHIFT; regval = EMC_DYNRASCAS_RAS(config->rasnclk) | EMC_DYNRASCAS_CAS(caslat); @@ -446,7 +446,7 @@ void lpc54_emc_sdram_initialize(FAR const struct emc_dynamic_timing_config_s *ti putreg32(regval, LPC54_EMC_DYNCONTROL); /* The buffer will be disabled when do the sdram initialization and - * enabled after the initialization during normal opeation. + * enabled after the initialization during normal operation. */ for (i = 0, config = chconfig; diff --git a/arch/arm/src/lpc54xx/lpc54_emc.h b/arch/arm/src/lpc54xx/lpc54_emc.h index cd0ebfcb34c..02c40fa45d8 100644 --- a/arch/arm/src/lpc54xx/lpc54_emc.h +++ b/arch/arm/src/lpc54xx/lpc54_emc.h @@ -82,7 +82,7 @@ enum emc_dynamic_read_e { EMC_NODELAY = 0, /* No delay */ EMC_CMDDELAY, /* Command delayed strategy, using EMCCLKDELAY */ - EMC_CMDDELAYPLUS1, /* Command delayed strategy pluse one clock cycle + EMC_CMDDELAYPLUS1, /* Command delayed strategy pulse one clock cycle * using EMCCLKDELAY */ EMC_CMDDELAYPLUS2, /* Command delayed strategy pulse two clock cycle * using EMCCLKDELAY */ diff --git a/arch/arm/src/lpc54xx/lpc54_ethernet.c b/arch/arm/src/lpc54xx/lpc54_ethernet.c index 23b0d521634..239da1c8b12 100644 --- a/arch/arm/src/lpc54xx/lpc54_ethernet.c +++ b/arch/arm/src/lpc54xx/lpc54_ethernet.c @@ -2482,7 +2482,7 @@ static void lpc54_pktbuf_initialize(struct lpc54_ethdriver_s *priv) * priv - Reference to the driver state structure * * Returned Value: - * A pointer to the allocated packet buffer on succes; NULL is returned if + * A pointer to the allocated packet buffer on success; NULL is returned if * there are no available packet buffers. * * Assumptions: @@ -2560,7 +2560,7 @@ static void lpc54_txring_initialize(struct lpc54_ethdriver_s *priv, regval = ETH_DMACH_TXDESC_RING_LENGTH(txring->tr_ndesc); lpc54_putreg(regval, LPC54_ETH_DMACH_TXDESC_RING_LENGTH(chan)); - /* Inituialize the Tx desriptors . */ + /* Inituialize the Tx descriptors . */ for (i = 0; i < txring->tr_ndesc; i++, txdesc++) { diff --git a/arch/arm/src/lpc54xx/lpc54_gpio.c b/arch/arm/src/lpc54xx/lpc54_gpio.c index 192f3713862..2acc620b4d4 100644 --- a/arch/arm/src/lpc54xx/lpc54_gpio.c +++ b/arch/arm/src/lpc54xx/lpc54_gpio.c @@ -115,9 +115,9 @@ static const uint32_t g_typea_mask[LPC54_GPIO_NPORTS] = * Description: * Get the LPC548x IOCON register mask. * - * Type D: FUNC MODE INVERT DIGIMODE FILTEROFF SLEW OD + * Type D: FUNC MODE INVERT DIGIMODE FILTEROFF SLEW ON * Type I: FUNC I2CSLEW INVERT DIGIMODE FILTEROFF I2CDRIVE I2CFILTEROFF - * Type A: FUNC MODE INVERT DIGIMODE FILTEROFF OD + * Type A: FUNC MODE INVERT DIGIMODE FILTEROFF ON * ****************************************************************************/ @@ -212,7 +212,7 @@ static inline void lpc54_gpio_output(lpc54_pinset_t cfgset, putreg32(regval, regaddr); /* Set the initial value of the output. Apparently this cannot be done - * before cofiguring the pin as an output. I don't see anyway to avoid + * before configuring the pin as an output. I don't see anyway to avoid * glitch. */ @@ -254,9 +254,9 @@ static void lpc54_gpio_iocon(lpc54_pinset_t cfgset, unsigned int port, /* Configure pins for supported pin type(s): * - * Type D: FUNC MODE INVERT DIGIMODE FILTEROFF SLEW OD + * Type D: FUNC MODE INVERT DIGIMODE FILTEROFF SLEW ON * Type I: FUNC I2CSLEW INVERT DIGIMODE FILTEROFF I2CDRIVE I2CFILTEROFF - * Type A: FUNC MODE INVERT DIGIMODE FILTEROFF OD + * Type A: FUNC MODE INVERT DIGIMODE FILTEROFF ON */ pintype = lpc54_pintype(port, pin); @@ -312,7 +312,7 @@ static void lpc54_gpio_iocon(lpc54_pinset_t cfgset, unsigned int port, iocon |= IOCON_I2CDRIVE_HIGH; } - /* OD: Type D and A only */ + /* ON: Type D and A only */ if ((pintype & (PIN_TYPED | PIN_TYPEA)) != 0 && (cfgset & GPIO_OD_MASK) != 0) diff --git a/arch/arm/src/lpc54xx/lpc54_gpio.h b/arch/arm/src/lpc54xx/lpc54_gpio.h index 3c64a4012ca..055e27361eb 100644 --- a/arch/arm/src/lpc54xx/lpc54_gpio.h +++ b/arch/arm/src/lpc54xx/lpc54_gpio.h @@ -314,7 +314,7 @@ int lpc54_gpio_irqno(lpc54_pinset_t pinset); * Description: * Acknowledge edge interrupts by clearing the associated bits in the rising and * falling registers. This acknowledgemment is, of course, not needed for level - * interupts. + * interrupts. * ************************************************************************************/ diff --git a/arch/arm/src/lpc54xx/lpc54_gpioirq.c b/arch/arm/src/lpc54xx/lpc54_gpioirq.c index edb51ae21f9..3d915c7fcb7 100644 --- a/arch/arm/src/lpc54xx/lpc54_gpioirq.c +++ b/arch/arm/src/lpc54xx/lpc54_gpioirq.c @@ -323,7 +323,7 @@ int lpc54_gpio_irqno(lpc54_pinset_t pinset) * Description: * Acknowledge edge interrupts by clearing the associated bits in the rising and * falling registers. This acknowledgemment is, of course, not needed for level - * interupts. + * interrupts. * ************************************************************************************/ diff --git a/arch/arm/src/lpc54xx/lpc54_lcd.c b/arch/arm/src/lpc54xx/lpc54_lcd.c index 538b45ce5c5..8cc9e1adbb5 100644 --- a/arch/arm/src/lpc54xx/lpc54_lcd.c +++ b/arch/arm/src/lpc54xx/lpc54_lcd.c @@ -269,7 +269,7 @@ static int lpc54_getcmap(FAR struct fb_vtable_s *vtable, cmap->transp[i] = 0; #endif - /* Handle the case where the len ends on an odd boudary */ + /* Handle the case where the len ends on an odd boundary */ if ((i + 1) < last) { @@ -884,7 +884,7 @@ void up_fbuninitialize(int display) * Description: * This is a non-standard LCD interface just for the LPC54xx. Clearing * the display in the normal way by writing a sequences of runs that - * covers the entire display can be slow. Here the dispaly is cleared by + * covers the entire display can be slow. Here the display is cleared by * simply setting all VRAM memory to the specified color. * ****************************************************************************/ diff --git a/arch/arm/src/lpc54xx/lpc54_lcd.h b/arch/arm/src/lpc54xx/lpc54_lcd.h index c79929b6bb2..a880168481c 100644 --- a/arch/arm/src/lpc54xx/lpc54_lcd.h +++ b/arch/arm/src/lpc54xx/lpc54_lcd.h @@ -166,7 +166,7 @@ * Description: * This is a non-standard LCD interface just for the LPC54xx. Clearing * the display in the normal way by writing a sequences of runs that - * covers the entire display can be slow. Here the dispaly is cleared by + * covers the entire display can be slow. Here the display is cleared by * simply setting all VRAM memory to the specified color. * ****************************************************************************/ diff --git a/arch/arm/src/lpc54xx/lpc54_sdmmc.c b/arch/arm/src/lpc54xx/lpc54_sdmmc.c index ef8c58fcf10..bae4b8d7fd3 100644 --- a/arch/arm/src/lpc54xx/lpc54_sdmmc.c +++ b/arch/arm/src/lpc54xx/lpc54_sdmmc.c @@ -717,7 +717,7 @@ static void lpc54_disable_allints(struct lpc54_dev_s *priv) * Name: lpc54_config_waitints * * Description: - * Enable/disable SD card interrupts needed to suport the wait function + * Enable/disable SD card interrupts needed to support the wait function * * Input Parameters: * priv - A reference to the SD card device state structure @@ -2335,7 +2335,7 @@ errout: * * Events are automatically disabled once the callback is performed and no * further callback events will occur until they are again enabled by - * calling this methos. + * calling this method. * * Input Parameters: * dev - An instance of the SD card device interface diff --git a/arch/arm/src/lpc54xx/lpc54_serial.c b/arch/arm/src/lpc54xx/lpc54_serial.c index 701e6992c4e..eea04e8f990 100644 --- a/arch/arm/src/lpc54xx/lpc54_serial.c +++ b/arch/arm/src/lpc54xx/lpc54_serial.c @@ -1076,7 +1076,7 @@ static void lpc54_detach(struct uart_dev_s *dev) * interrupt received on the 'irq' It should call uart_transmitchars or * uart_receivechar to perform the appropriate data transfers. The * interrupt handling logic must be able to map the 'irq' number into the - * approprite uart_dev_s structure in order to call these functions. + * appropriate uart_dev_s structure in order to call these functions. * ****************************************************************************/ diff --git a/arch/arm/src/lpc54xx/lpc54_spi_master.c b/arch/arm/src/lpc54xx/lpc54_spi_master.c index 99821ae76da..9d41d59cefd 100644 --- a/arch/arm/src/lpc54xx/lpc54_spi_master.c +++ b/arch/arm/src/lpc54xx/lpc54_spi_master.c @@ -1247,7 +1247,7 @@ static void lpc54_spi_recvblock16(FAR struct lpc54_spidev_s *priv, * transfers. The bus should be locked before the chip is selected. After * locking the SPI bus, the caller should then also call the setfrequency, * setbits, and setmode methods to make sure that the SPI is properly - * configured for the device. If the SPI buss is being shared, then it + * configured for the device. If the SPI bus is being shared, then it * may have been left in an incompatible state. * * Input Parameters: diff --git a/arch/arm/src/lpc54xx/lpc54_usb0_ohci.c b/arch/arm/src/lpc54xx/lpc54_usb0_ohci.c index 64f28bac4c4..e5ffdc9bc45 100644 --- a/arch/arm/src/lpc54xx/lpc54_usb0_ohci.c +++ b/arch/arm/src/lpc54xx/lpc54_usb0_ohci.c @@ -170,7 +170,7 @@ #endif #if CONFIG_LP17_OHCI_NTDS < 2 -# error "Insufficent TDs" +# error "Insufficient TDs" #endif /* Derived size of user transfer descriptor (TD) memory. */ @@ -2466,7 +2466,7 @@ static int lpc54_epfree(struct usbhost_driver_s *drvr, usbhost_ep_t ep) lpc54_takesem(&priv->exclsem); - /* Remove the ED to the correct list depending on the trasfer type */ + /* Remove the ED to the correct list depending on the transfer type */ switch (ed->xfrtype) { diff --git a/arch/arm/src/lpc54xx/lpc54_wwdt.c b/arch/arm/src/lpc54xx/lpc54_wwdt.c index ca720c3857f..019e788081a 100644 --- a/arch/arm/src/lpc54xx/lpc54_wwdt.c +++ b/arch/arm/src/lpc54xx/lpc54_wwdt.c @@ -67,7 +67,7 @@ #define LPC54_MAX_WWDT_WINDOW 0xFFFFFF /* 24-bit max value */ #define LPC54_MIN_WWDT_WINDOW 0x100 /* Minimum window value allowed */ #define WWDT_WARNINT_VALUE 0x3FF /* 10-bit max value */ -#define WWDT_MAXTIMEOUT 5592 /* Max timeout value in miliseconds */ +#define WWDT_MAXTIMEOUT 5592 /* Max timeout value in milliseconds */ /* Configuration ************************************************************/ @@ -100,7 +100,7 @@ struct lpc54_lowerhalf_wwdt_s static void lpc54_setwindow(uint32_t window); static void lpc54_setwarning(uint32_t warning); -/* Interrupt hanlding *******************************************************/ +/* Interrupt handling *******************************************************/ static int lpc54_wwdt_interrupt(int irq, FAR void *context); @@ -464,7 +464,7 @@ static int lpc54_settimeout(FAR struct watchdog_lowerhalf_s *lower, /* Remember the selected values */ priv->reload = reload; - wdinfo("reload=%d timout=%d\n", reload, priv->timeout); + wdinfo("reload=%d timeout=%d\n", reload, priv->timeout); regval = reload; putreg32(regval, LPC54_WWDT_TC); @@ -645,7 +645,7 @@ void lpc54_wwdt_initialize(FAR const char *devpath) */ lpc54_wdtosc_powerup(); -#warning "Mising WDTOSCCTRL setup" +#warning "Missing WDTOSCCTRL setup" /* Enable the register interface (WWDT bus clock): Set the WWDT bit in the * AHBCLKCTRL0 register. diff --git a/arch/arm/src/max326xx/max32660/max32660_spim.c b/arch/arm/src/max326xx/max32660/max32660_spim.c index 29fd55daddc..34e65578ada 100644 --- a/arch/arm/src/max326xx/max32660/max32660_spim.c +++ b/arch/arm/src/max326xx/max32660/max32660_spim.c @@ -804,12 +804,12 @@ static int spi_interrupt(int irq, void *context, void *arg) * Name: spi_lock * * Description: - * On SPI busses where there are multiple devices, it will be necessary to - * lock SPI to have exclusive access to the busses for a sequence of + * On SPI buses where there are multiple devices, it will be necessary to + * lock SPI to have exclusive access to the buses for a sequence of * transfers. The bus should be locked before the chip is selected. After * locking the SPI bus, the caller should then also call the setfrequency, * setbits, and setmode methods to make sure that the SPI is properly - * configured for the device. If the SPI buss is being shared, then it + * configured for the device. If the SPI bus is being shared, then it * may have been left in an incompatible state. * * Input Parameters: @@ -867,7 +867,7 @@ static void spi0_select(struct spi_dev_s *dev, uint32_t devid, bool selected) DEBUGASSERT(dev != NULL); max326_spi0select(dev, devid, selected); - /* The hardware requires that the SPI block be disabled and renabled at + /* The hardware requires that the SPI block be disabled and re-enabled at * end of each transaction to cancel the on ongoing transaction (while * chip select is inactive). */ diff --git a/arch/arm/src/max326xx/max32660/max32660_wdt.c b/arch/arm/src/max326xx/max32660/max32660_wdt.c index 74046f50692..bb394d57ac9 100644 --- a/arch/arm/src/max326xx/max32660/max32660_wdt.c +++ b/arch/arm/src/max326xx/max32660/max32660_wdt.c @@ -65,7 +65,7 @@ /* Clocking *****************************************************************/ -/* The watchdog is alway running with source clock Fpclk. There are two +/* The watchdog is always running with source clock Fpclk. There are two * timeout periods: * * INTPERIOD - Number of PCLK cycles until a watchdog timer interrupt is @@ -281,7 +281,7 @@ static uint32_t max326_time_left(FAR struct max326_wdt_lowerhalf_s *priv) * exp - max32660 time exponent * * Returned Values: - * The time period in millseconds. + * The time period in milliseconds. * ****************************************************************************/ diff --git a/arch/arm/src/moxart/moxart_lowputc.S b/arch/arm/src/moxart/moxart_lowputc.S index ea1f552f2a9..dff1683ea74 100644 --- a/arch/arm/src/moxart/moxart_lowputc.S +++ b/arch/arm/src/moxart/moxart_lowputc.S @@ -102,8 +102,8 @@ up_lowputc: strb r0, [r2, #UART_THR] - /* Wait for the tranmsit holding regiser (THR) to be - * emptied. This is detemined when bit 6 of the LSR + /* Wait for the tranmsit holding register (THR) to be + * emptied. This is determined when bit 6 of the LSR * is set. */ diff --git a/arch/arm/src/nrf52/hardware/nrf52_clock.h b/arch/arm/src/nrf52/hardware/nrf52_clock.h index dd80d0b6a5f..0e0ba0dab49 100644 --- a/arch/arm/src/nrf52/hardware/nrf52_clock.h +++ b/arch/arm/src/nrf52/hardware/nrf52_clock.h @@ -138,7 +138,7 @@ /* LFCLKSRC Register */ -#define CLOCK_LFCLKSRC_SRC_SHIFT (0) /* Bits 0-1: LFRC clock soruce */ +#define CLOCK_LFCLKSRC_SRC_SHIFT (0) /* Bits 0-1: LFRC clock source */ #define CLOCK_LFCLKSRC_SRC_MASK (3 << CLOCK_LFCLKSRC_SRC_SHIFT) # define CLOCK_LFCLKSRC_SRC_RC (0 << CLOCK_LFCLKSRC_SRC_SHIFT) # define CLOCK_LFCLKSRC_SRC_RC (1 << CLOCK_LFCLKSRC_SRC_SHIFT) diff --git a/arch/arm/src/nrf52/hardware/nrf52_saadc.h b/arch/arm/src/nrf52/hardware/nrf52_saadc.h index 593db596f2a..3adf2300e1f 100644 --- a/arch/arm/src/nrf52/hardware/nrf52_saadc.h +++ b/arch/arm/src/nrf52/hardware/nrf52_saadc.h @@ -102,7 +102,7 @@ /* CH[n] PSELP Register */ -#define SAADC_CHPSELP_SHIFT (0) /* Bits 0-4: Intput positive pin selection for CH[x] */ +#define SAADC_CHPSELP_SHIFT (0) /* Bits 0-4: Input positive pin selection for CH[x] */ #define SAADC_CHPSELP_MASK (0xf << SAADC_CHPSELP_SHIFT) # define SAADC_CHPSELP_NC (0x0 << SAADC_CHPSELP_SHIFT) # define SAADC_CHPSELP_IN0 (0x1 << SAADC_CHPSELP_SHIFT) @@ -118,7 +118,7 @@ /* CH[n] PSELN Register */ -#define SAADC_CHPSELN_SHIFT (0) /* Bits 0-4: Intput negative pin selection for CH[x] */ +#define SAADC_CHPSELN_SHIFT (0) /* Bits 0-4: Input negative pin selection for CH[x] */ #define SAADC_CHPSELN_MASK (0xf << SAADC_CHPSELN_SHIFT) # define SAADC_CHPSELN_NC (0x0 << SAADC_CHPSELN_SHIFT) # define SAADC_CHPSELN_IN0 (0x1 << SAADC_CHPSELN_SHIFT) diff --git a/arch/arm/src/nrf52/nrf52832_errdata.c b/arch/arm/src/nrf52/nrf52832_errdata.c index 128da9ae71e..a17f1c18ea6 100644 --- a/arch/arm/src/nrf52/nrf52832_errdata.c +++ b/arch/arm/src/nrf52/nrf52832_errdata.c @@ -76,7 +76,7 @@ static bool errata_16(void) static bool errata_66(void) { - /* This piece of code is modifed from Nordic SDK , there is no document to + /* This piece of code is modified from Nordic SDK , there is no document to * describe how to get the errdata information */ diff --git a/arch/arm/src/nrf52/nrf52_i2c.c b/arch/arm/src/nrf52/nrf52_i2c.c index 679f462f824..4da303fddf5 100644 --- a/arch/arm/src/nrf52/nrf52_i2c.c +++ b/arch/arm/src/nrf52/nrf52_i2c.c @@ -237,7 +237,7 @@ static int nrf52_i2c_transfer(FAR struct i2c_master_s *dev, i2cinfo("I2C TRANSFER count=%d\n", count); - /* Do we need change I2C bus freqency ? */ + /* Do we need change I2C bus frequency ? */ if (priv->msgv->frequency != priv->freq) { diff --git a/arch/arm/src/nrf52/nrf52_rng.c b/arch/arm/src/nrf52/nrf52_rng.c index a7e97f8e247..fccddf92a40 100644 --- a/arch/arm/src/nrf52/nrf52_rng.c +++ b/arch/arm/src/nrf52/nrf52_rng.c @@ -79,8 +79,8 @@ struct rng_dev_s uint8_t *rd_buf; size_t rd_count; size_t buflen; - sem_t rd_sem; /* semphore for read RNG data */ - sem_t excl_sem; /* semphore for access RNG dev */ + sem_t rd_sem; /* semaphore for read RNG data */ + sem_t excl_sem; /* semaphore for access RNG dev */ }; /**************************************************************************** diff --git a/arch/arm/src/nrf52/nrf52_serial.c b/arch/arm/src/nrf52/nrf52_serial.c index 06306070b38..92e8802283b 100644 --- a/arch/arm/src/nrf52/nrf52_serial.c +++ b/arch/arm/src/nrf52/nrf52_serial.c @@ -391,7 +391,7 @@ static void nrf52_detach(struct uart_dev_s *dev) * interrupt received on the 'irq' It should call uart_transmitchars or * uart_receivechar to perform the appropriate data transfers. The * interrupt handling logic must be able to map the 'irq' number into the - * approprite uart_dev_s structure in order to call these functions. + * appropriate uart_dev_s structure in order to call these functions. * ****************************************************************************/ diff --git a/arch/arm/src/nrf52/nrf52_spi.c b/arch/arm/src/nrf52/nrf52_spi.c index e9bb9a99f60..ced714ecfab 100644 --- a/arch/arm/src/nrf52/nrf52_spi.c +++ b/arch/arm/src/nrf52/nrf52_spi.c @@ -456,12 +456,12 @@ static int nrf52_spi_init(FAR struct nrf52_spidev_s *priv) * Name: nrf52_spi_lock * * Description: - * On SPI busses where there are multiple devices, it will be necessary to - * lock SPI to have exclusive access to the busses for a sequence of + * On SPI buses where there are multiple devices, it will be necessary to + * lock SPI to have exclusive access to the buses for a sequence of * transfers. The bus should be locked before the chip is selected. After * locking the SPI bus, the caller should then also call the setfrequency, * setbits, and setmode methods to make sure that the SPI is properly - * configured for the device. If the SPI buss is being shared, then it + * configured for the device. If the SPI bus is being shared, then it * may have been left in an incompatible state. * * Input Parameters: diff --git a/arch/arm/src/nrf52/nrf52_wdt.c b/arch/arm/src/nrf52/nrf52_wdt.c index d444cef403c..6bcb2359db9 100644 --- a/arch/arm/src/nrf52/nrf52_wdt.c +++ b/arch/arm/src/nrf52/nrf52_wdt.c @@ -65,7 +65,7 @@ /* Clocking *****************************************************************/ -/* The watchdog is alway running under 32.768KHz: +/* The watchdog is always running under 32.768KHz: * * Fmin = Flsi / 32768 * diff --git a/arch/arm/src/nuc1xx/hardware/nuc_clk.h b/arch/arm/src/nuc1xx/hardware/nuc_clk.h index 2c7b20ec7d5..365c4b30c03 100644 --- a/arch/arm/src/nuc1xx/hardware/nuc_clk.h +++ b/arch/arm/src/nuc1xx/hardware/nuc_clk.h @@ -136,7 +136,7 @@ #define CLK_CLKSTATUS_OSC10K_STB (1 << 3) /* Bit 3: Internal 10kHz low speed clock source * stable flag */ #define CLK_CLKSTATUS_OSC22M_STB (1 << 4) /* Bit 4: Internal 22.1184MHz high speed - * osciallator clock source stable flag */ + * oscillator clock source stable flag */ #define CLK_CLKSTATUS_CLK_SW_FAIL (1 << 7) /* Bit 7: Clock switching fail flag */ /* Clock source select control register 0 */ diff --git a/arch/arm/src/nuc1xx/hardware/nuc_uart.h b/arch/arm/src/nuc1xx/hardware/nuc_uart.h index 442e7846db0..e594e07607b 100644 --- a/arch/arm/src/nuc1xx/hardware/nuc_uart.h +++ b/arch/arm/src/nuc1xx/hardware/nuc_uart.h @@ -152,7 +152,7 @@ # define UART_FCR_RFITL_30 (4 << UART_FCR_RFITL_SHIFT) /* High speed */ # define UART_FCR_RFITL_46 (5 << UART_FCR_RFITL_SHIFT) /* High speed */ # define UART_FCR_RFITL_62 (6 << UART_FCR_RFITL_SHIFT) /* High speed */ -#define UART_FCR_RX_DIS (1 << 8) /* Bit 8: Recive disable register */ +#define UART_FCR_RX_DIS (1 << 8) /* Bit 8: Receive disable register */ #define UART_FCR_RTS_TRI_LEV_SHIFT (16) /* Bits 16-19: RTS trigger level for auto flow control */ #define UART_FCR_RTS_TRI_LEV_MASK (15 << UART_FCR_RTS_TRI_LEV_SHIFT) # define UART_FCR_RTS_TRI_LEV_1 (0 << UART_FCR_RTS_TRI_LEV_SHIFT) diff --git a/arch/arm/src/nuc1xx/nuc_clockconfig.c b/arch/arm/src/nuc1xx/nuc_clockconfig.c index 29849fc4214..9cf1844ac2f 100644 --- a/arch/arm/src/nuc1xx/nuc_clockconfig.c +++ b/arch/arm/src/nuc1xx/nuc_clockconfig.c @@ -151,7 +151,7 @@ void nuc_clockconfig(void) * Power down mode (PD) = Normal mode (0) * Bypass (BP) = Normal mode (0) * FOUT enable (OE) = PLL FOUT enabled (0) - * PLL srouce clock (PLL_SRC) = External high speed crystal (0) + * PLL source clock (PLL_SRC) = External high speed crystal (0) */ regval = getreg32(NUC_CLK_PLLCON); diff --git a/arch/arm/src/nuc1xx/nuc_config.h b/arch/arm/src/nuc1xx/nuc_config.h index 11f3e3f04ee..819fc84ed76 100644 --- a/arch/arm/src/nuc1xx/nuc_config.h +++ b/arch/arm/src/nuc1xx/nuc_config.h @@ -67,7 +67,7 @@ # define HAVE_UART 1 #endif -/* Make sure all features are disabled for diabled U[S]ARTs. This simplifies +/* Make sure all features are disabled for disabled U[S]ARTs. This simplifies * checking later. */ diff --git a/arch/arm/src/nuc1xx/nuc_irq.c b/arch/arm/src/nuc1xx/nuc_irq.c index 72cc753c504..e3dfc576f8e 100644 --- a/arch/arm/src/nuc1xx/nuc_irq.c +++ b/arch/arm/src/nuc1xx/nuc_irq.c @@ -131,7 +131,7 @@ static void nuc_dumpnvic(const char *msg, int irq) * nuc_dbgmonitor, nuc_pendsv, nuc_reserved * * Description: - * Handlers for various execptions. None are handled and all are fatal + * Handlers for various exceptions. None are handled and all are fatal * error conditions. The only advantage these provided over the default * unexpected interrupt handler is that they provide a diagnostic output. * diff --git a/arch/arm/src/nuc1xx/nuc_serial.c b/arch/arm/src/nuc1xx/nuc_serial.c index 3a7dd4622a4..8ec35b21068 100644 --- a/arch/arm/src/nuc1xx/nuc_serial.c +++ b/arch/arm/src/nuc1xx/nuc_serial.c @@ -680,8 +680,8 @@ static int up_interrupt(int irq, void *context, void *arg) { /* We are receiving data and the RX timeout is not enabled. * Set the RX FIFO threshold so that RX interrupts will only be - * generated after several bytes have been recevied and enable - * the RX timout. + * generated after several bytes have been received and enable + * the RX timeout. */ up_rxto_enable(priv); @@ -711,7 +711,7 @@ static int up_interrupt(int irq, void *context, void *arg) if ((isr & UART_ISR_RLS_INT) != 0 || (isr & UART_ISR_BUF_ERR_INT) != 0) { - /* Both errors are cleared by reseting the RX FIFO */ + /* Both errors are cleared by resetting the RX FIFO */ regval = up_serialin(priv, NUC_UART_FCR_OFFSET); up_serialout(priv, NUC_UART_FCR_OFFSET, regval | UART_FCR_RFR); @@ -874,8 +874,8 @@ static void up_rxint(struct uart_dev_s *dev, bool enable) else { /* Otherwise, set the RX FIFO threshold so that RX interrupts will - * only be generated after several bytes have been recevied and - * enable* the RX timout. + * only be generated after several bytes have been received and + * enable* the RX timeout. */ up_rxto_enable(priv); @@ -994,7 +994,7 @@ static bool up_txempty(struct uart_dev_s *dev) } /**************************************************************************** - * Public Funtions + * Public Functions ****************************************************************************/ #ifdef USE_EARLYSERIALINIT diff --git a/arch/arm/src/s32k1xx/hardware/s32k1xx_enet.h b/arch/arm/src/s32k1xx/hardware/s32k1xx_enet.h index 4bef913fb5c..8d2009755f2 100644 --- a/arch/arm/src/s32k1xx/hardware/s32k1xx_enet.h +++ b/arch/arm/src/s32k1xx/hardware/s32k1xx_enet.h @@ -497,7 +497,7 @@ /* Legacy/Common TX Buffer Descriptor Bit Definitions. * * The descriptors are represented by structures Unfortunately, when the - * structures are overlayed on the data, the bytes are reversed because + * structures are overlaid on the data, the bytes are reversed because * the underlying hardware writes the data in big-endian byte order. */ diff --git a/arch/arm/src/s32k1xx/s32k11x/s32k11x_irq.c b/arch/arm/src/s32k1xx/s32k11x/s32k11x_irq.c index ad456a609c1..4fc61181116 100644 --- a/arch/arm/src/s32k1xx/s32k11x/s32k11x_irq.c +++ b/arch/arm/src/s32k1xx/s32k11x/s32k11x_irq.c @@ -88,7 +88,7 @@ volatile uint32_t *g_current_regs[1]; * s32k11x_dbgmonitor, s32k11x_pendsv, s32k11x_reserved * * Description: - * Handlers for various execptions. None are handled and all are fatal + * Handlers for various exceptions. None are handled and all are fatal * error conditions. The only advantage these provided over the default * unexpected interrupt handler is that they provide a diagnostic output. * diff --git a/arch/arm/src/s32k1xx/s32k1xx_clockconfig.c b/arch/arm/src/s32k1xx/s32k1xx_clockconfig.c index 492b32c014a..dfa3a538b24 100644 --- a/arch/arm/src/s32k1xx/s32k1xx_clockconfig.c +++ b/arch/arm/src/s32k1xx/s32k1xx_clockconfig.c @@ -262,7 +262,7 @@ static enum scg_system_clock_mode_e s32k1xx_get_runmode(void) mode = SCG_SYSTEM_CLOCK_MODE_VLPR; break; - /* Hight speed run mode */ + /* High speed run mode */ case SMC_PMSTAT_PMSTAT_HSRUN: mode = SCG_SYSTEM_CLOCK_MODE_HSRUN; diff --git a/arch/arm/src/s32k1xx/s32k1xx_enet.c b/arch/arm/src/s32k1xx/s32k1xx_enet.c index 682cd4f2654..5ca8edf6406 100644 --- a/arch/arm/src/s32k1xx/s32k1xx_enet.c +++ b/arch/arm/src/s32k1xx/s32k1xx_enet.c @@ -397,7 +397,7 @@ static void s32k1xx_reset(struct s32k1xx_driver_s *priv); * * Description: * The descriptors are represented by structures Unfortunately, when the - * structures are overlayed on the data, the bytes are reversed because + * structures are overlaid on the data, the bytes are reversed because * the underlying hardware writes the data in big-endian byte order. * * Input Parameters: @@ -2251,7 +2251,7 @@ static inline int s32k1xx_initphy(struct s32k1xx_driver_s *priv, { if (renogphy == false) { - /* Give things one more chance with renegociation turned on */ + /* Give things one more chance with renegotiation turned on */ return s32k1xx_initphy(priv, true); } diff --git a/arch/arm/src/s32k1xx/s32k1xx_lowputc.c b/arch/arm/src/s32k1xx/s32k1xx_lowputc.c index 05f0c72beb2..c2f686a7b8c 100644 --- a/arch/arm/src/s32k1xx/s32k1xx_lowputc.c +++ b/arch/arm/src/s32k1xx/s32k1xx_lowputc.c @@ -325,7 +325,7 @@ int s32k1xx_lpuart_configure(uint32_t base, else if (config->users485) { /* Both TX and RX side can't control RTS, so this gives - * the RX side precidence. This should have been filtered + * the RX side precedence. This should have been filtered * in layers above anyway, but it's just a precaution. */ diff --git a/arch/arm/src/s32k1xx/s32k1xx_lpi2c.c b/arch/arm/src/s32k1xx/s32k1xx_lpi2c.c index d7fca330963..cb012c397d0 100644 --- a/arch/arm/src/s32k1xx/s32k1xx_lpi2c.c +++ b/arch/arm/src/s32k1xx/s32k1xx_lpi2c.c @@ -1213,7 +1213,7 @@ static int s32k1xx_lpi2c_isr_process(struct s32k1xx_lpi2c_priv_s *priv) s32k1xx_lpi2c_traceevent(priv, I2CEVENT_RCVBYTE, priv->dcnt); /* No interrupts or contex switches should occur in the following - * seuence. Otherwise, additional bytes may be sent by the device. + * sequence. Otherwise, additional bytes may be sent by the device. */ #ifdef CONFIG_I2C_POLLED diff --git a/arch/arm/src/s32k1xx/s32k1xx_lpspi.c b/arch/arm/src/s32k1xx/s32k1xx_lpspi.c index 5fad2a6d551..33d9e922488 100644 --- a/arch/arm/src/s32k1xx/s32k1xx_lpspi.c +++ b/arch/arm/src/s32k1xx/s32k1xx_lpspi.c @@ -830,12 +830,12 @@ static inline void s32k1xx_lpspi_master_set_delays(FAR struct s32k1xx_lpspidev_s * Name: s32k1xx_lpspi_lock * * Description: - * On SPI busses where there are multiple devices, it will be necessary to - * lock SPI to have exclusive access to the busses for a sequence of + * On SPI buses where there are multiple devices, it will be necessary to + * lock SPI to have exclusive access to the buses for a sequence of * transfers. The bus should be locked before the chip is selected. After * locking the SPI bus, the caller should then also call the setfrequency, * setbits, and setmode methods to make sure that the SPI is properly - * configured for the device. If the SPI buss is being shared, then it + * configured for the device. If the SPI bus is being shared, then it * may have been left in an incompatible state. * * Input Parameters: diff --git a/arch/arm/src/s32k1xx/s32k1xx_pin.h b/arch/arm/src/s32k1xx/s32k1xx_pin.h index ac41b130ec3..46c809138aa 100644 --- a/arch/arm/src/s32k1xx/s32k1xx_pin.h +++ b/arch/arm/src/s32k1xx/s32k1xx_pin.h @@ -113,7 +113,7 @@ # define _PIN_INPUT_PULLDOWN (2 << _PIN_OPTIONS_SHIFT) /* x010 Input with internal pull-down resistor */ # define _PIN_INPUT_PULLUP (6 << _PIN_OPTIONS_SHIFT) /* x110 Input with internal pull-up resistor */ -#define _PIN_OUTPUT_DRIVE_MASK (9 << _PIN_OPTIONS_SHIFT) /* 1xx1 Mask to test for high drive strengh */ +#define _PIN_OUTPUT_DRIVE_MASK (9 << _PIN_OPTIONS_SHIFT) /* 1xx1 Mask to test for high drive strength */ # define _PIN_OUTPUT_LOWDRIVE (1 << _PIN_OPTIONS_SHIFT) /* 0xx1 Output with low drive strength */ # define _PIN_OUTPUT_HIGHDRIVE (9 << _PIN_OPTIONS_SHIFT) /* 1xx1 Output with high drive strength */ diff --git a/arch/arm/src/sam34/hardware/sam4cm_slcdc.h b/arch/arm/src/sam34/hardware/sam4cm_slcdc.h index babfcb7ecb6..b6765e10b2e 100644 --- a/arch/arm/src/sam34/hardware/sam4cm_slcdc.h +++ b/arch/arm/src/sam34/hardware/sam4cm_slcdc.h @@ -69,7 +69,7 @@ #define SAM_SLCDC_LMEMR_OFFSET(com) (0x200 + (com)*8 + 0x0) #define SAM_SLCDC_MMEMR_OFFSET(com) (0x200 + (com)*8 + 0x4) -/* SLCDC register adresses ***********************************************************/ +/* SLCDC register addresses **********************************************************/ #define SAM_SLCDC_CR (SAM_SLCDC_BASE + SAM_SLCDC_CR_OFFSET) #define SAM_SLCDC_MR (SAM_SLCDC_BASE + SAM_SLCDC_MR_OFFSET) diff --git a/arch/arm/src/sam34/hardware/sam4cm_supc.h b/arch/arm/src/sam34/hardware/sam4cm_supc.h index 11951c9ddd6..c9492f14875 100644 --- a/arch/arm/src/sam34/hardware/sam4cm_supc.h +++ b/arch/arm/src/sam34/hardware/sam4cm_supc.h @@ -59,7 +59,7 @@ #define SAM_SUPC_WUIR_OFFSET 0x10 /* Supply Controller Wake Up Inputs Register */ #define SAM_SUPC_SR_OFFSET 0x14 /* Supply Controller Status Register */ -/* SUPC register adresses ***************************************************************/ +/* SUPC register addresses **************************************************************/ #define SAM_SUPC_CR (SAM_SUPC_BASE+SAM_SUPC_CR_OFFSET) #define SAM_SUPC_SMMR (SAM_SUPC_BASE+SAM_SUPC_SMMR_OFFSET) diff --git a/arch/arm/src/sam34/hardware/sam4l_usart.h b/arch/arm/src/sam34/hardware/sam4l_usart.h index 4e7a3552fd9..8dee273387d 100644 --- a/arch/arm/src/sam34/hardware/sam4l_usart.h +++ b/arch/arm/src/sam34/hardware/sam4l_usart.h @@ -355,7 +355,7 @@ /* USART Number of Errors Register */ -#define UART_NER_NBERRORS_SHIFT (0) /* Bits 0-7: Number of Errrors */ +#define UART_NER_NBERRORS_SHIFT (0) /* Bits 0-7: Number of Errors */ #define UART_NER_NBERRORS_MASK (0xff << UART_NER_NBERRORS_SHIFT) /* USART IrDA FILTER Register */ @@ -405,7 +405,7 @@ /* USART LIN Identifier Register */ -#define UART_LINIR_MASK 0xff /* Bits 0-7: Identifer character */ +#define UART_LINIR_MASK 0xff /* Bits 0-7: Identifier character */ /* USART LIN Baud Rate Register */ diff --git a/arch/arm/src/sam34/hardware/sam_tc.h b/arch/arm/src/sam34/hardware/sam_tc.h index 20bccbdf573..a04a69d9168 100644 --- a/arch/arm/src/sam34/hardware/sam_tc.h +++ b/arch/arm/src/sam34/hardware/sam_tc.h @@ -337,7 +337,7 @@ #define TC_CMR_CLKI (1 << 3) /* Bit 3: Clock Invert */ #define TC_CMR_BURST_SHIFT (4) /* Bits 4-5: Burst Signal Selection */ #define TC_CMR_BURST_MASK (3 << TC_CMR_BURST_SHIFT) -# define TC_CMR_BURST_NOTGATED (0 << TC_CMR_BURST_SHIFT) /* Nott gated by external signal */ +# define TC_CMR_BURST_NOTGATED (0 << TC_CMR_BURST_SHIFT) /* Not gated by external signal */ # define TC_CMR_BURST_XC0 (1 << TC_CMR_BURST_SHIFT) /* XC0 ANDed with selected clock */ # define TC_CMR_BURST_XC1 (2 << TC_CMR_BURST_SHIFT) /* XC1 ANDed with selected clock */ # define TC_CMR_BURST_XC2 (3 << TC_CMR_BURST_SHIFT) /* XC2 ANDed with selected clock */ diff --git a/arch/arm/src/sam34/hardware/sam_uart.h b/arch/arm/src/sam34/hardware/sam_uart.h index 87161c7de4f..dc90677deff 100644 --- a/arch/arm/src/sam34/hardware/sam_uart.h +++ b/arch/arm/src/sam34/hardware/sam_uart.h @@ -473,7 +473,7 @@ /* USART Number of Errors Register (USART only) */ -#define UART_NER_NBERRORS_SHIFT (0) /* Bits 0-7: Number of Errrors (USART only) */ +#define UART_NER_NBERRORS_SHIFT (0) /* Bits 0-7: Number of Errors (USART only) */ #define UART_NER_NBERRORS_MASK (0xff << UART_NER_NBERRORS_SHIFT) /* USART IrDA FILTER Register (USART only) */ diff --git a/arch/arm/src/sam34/sam4cm_cpustart.c b/arch/arm/src/sam34/sam4cm_cpustart.c index 512c9ae526f..d55c0778d4e 100644 --- a/arch/arm/src/sam34/sam4cm_cpustart.c +++ b/arch/arm/src/sam34/sam4cm_cpustart.c @@ -148,7 +148,7 @@ static void cpu1_boot(void) * * Each CPU is provided the entry point to is IDLE task when started. A * TCB for each CPU's IDLE task has been initialized and placed in the - * CPU's g_assignedtasks[cpu] list. Not stack has been alloced or + * CPU's g_assignedtasks[cpu] list. Not stack has been allocated or * initialized. * * The OS initialization logic calls this function repeatedly until each diff --git a/arch/arm/src/sam34/sam4cm_oneshot_lowerhalf.c b/arch/arm/src/sam34/sam4cm_oneshot_lowerhalf.c index 22912dd1a08..50071719fa4 100644 --- a/arch/arm/src/sam34/sam4cm_oneshot_lowerhalf.c +++ b/arch/arm/src/sam34/sam4cm_oneshot_lowerhalf.c @@ -159,7 +159,7 @@ static void sam_oneshot_handler(void *arg) * lower An instance of the lower-half oneshot state structure. This * structure must have been previously initialized via a call to * oneshot_initialize(); - * ts The location in which to return the maxumum delay. + * ts The location in which to return the maximum delay. * * Returned Value: * Zero (OK) is returned on success; a negated errno value is returned diff --git a/arch/arm/src/sam34/sam4l_clockconfig.c b/arch/arm/src/sam34/sam4l_clockconfig.c index 86c90a7b834..e24797abe0f 100644 --- a/arch/arm/src/sam34/sam4l_clockconfig.c +++ b/arch/arm/src/sam34/sam4l_clockconfig.c @@ -390,7 +390,7 @@ * 0: 80MHz < fvco < 180MHz * 1: 160MHz < fvco < 240MHz * - * Select the correct frequncy range using the recommended threshold + * Select the correct frequency range using the recommended threshold * value. */ @@ -461,7 +461,7 @@ * Name: sam_picocache * * Description: - * Initialiaze the PICOCACHE. + * Initialize the PICOCACHE. * ****************************************************************************/ @@ -486,7 +486,7 @@ static inline void sam_picocache(void) * Name: sam_enableosc0 * * Description: - * Initialiaze OSC0 settings per the definitions in the board.h file. + * Initialize OSC0 settings per the definitions in the board.h file. * ****************************************************************************/ @@ -513,7 +513,7 @@ static inline void sam_enableosc0(void) * Name: sam_enableosc32 * * Description: - * Initialiaze the 32KHz oscillator per settings in the board.h header + * Initialize the 32KHz oscillator per settings in the board.h header * file. * ****************************************************************************/ @@ -545,7 +545,7 @@ static inline void sam_enableosc32(void) * Name: sam_enablerc80m * * Description: - * Initialiaze the 80 MHz RC oscillator per settings in the board.h header + * Initialize the 80 MHz RC oscillator per settings in the board.h header * file. * ****************************************************************************/ @@ -572,7 +572,7 @@ static inline void sam_enablerc80m(void) * Name: sam_enablerc80m * * Description: - * Initialiaze the 12/8/4 RC fast oscillator per settings in the board.h + * Initialize the 12/8/4 RC fast oscillator per settings in the board.h * header file. * ****************************************************************************/ @@ -602,7 +602,7 @@ static inline void sam_enablercfast(void) * Name: sam_enablerc1m * * Description: - * Initialiaze the 1M RC oscillator per settings in the board.h header + * Initialize the 1M RC oscillator per settings in the board.h header * file. * ****************************************************************************/ @@ -632,7 +632,7 @@ static inline void sam_enablerc1m(void) * Name: sam_enablerc32k * * Description: - * Initialiaze the 23KHz RC oscillator per settings in the board.h header + * Initialize the 23KHz RC oscillator per settings in the board.h header * file. * ****************************************************************************/ @@ -679,7 +679,7 @@ static inline void sam_enableglck9(void) * Name: sam_enablepll0 (and its helper sam_pll0putreg()) * * Description: - * Initialiaze PLL0 settings per the definitions in the board.h file. + * Initialize PLL0 settings per the definitions in the board.h file. * ****************************************************************************/ @@ -732,7 +732,7 @@ static inline void sam_enablepll0(void) * Name: sam_enabledfll0 (and its helper sam_dfll0_putreg32()) * * Description: - * Initialiaze DFLL0 settings per the definitions in the board.h file. + * Initialize DFLL0 settings per the definitions in the board.h file. * ****************************************************************************/ @@ -1163,7 +1163,7 @@ static inline void sam_setpsm(uint32_t psm) { uint32_t regval; - /* Setup the PMCON register content fo the new power scaling mode */ + /* Setup the PMCON register content for the new power scaling mode */ regval = getreg32(SAM_BPM_PMCON); regval &= ~BPM_PMCON_PS_MASK; diff --git a/arch/arm/src/sam34/sam_dmac.c b/arch/arm/src/sam34/sam_dmac.c index f8f1995f1ba..50ea4053933 100644 --- a/arch/arm/src/sam34/sam_dmac.c +++ b/arch/arm/src/sam34/sam_dmac.c @@ -1378,7 +1378,7 @@ void weak_function up_dma_initialize(void) * dma_flags) then gives the caller exclusive access to the DMA channel. * * The naming convention in all of the DMA interfaces is that one side is - * the 'peripheral' and the other is 'memory'. Howerver, the interface + * the 'peripheral' and the other is 'memory'. However, the interface * could still be used if, for example, both sides were memory although * the naming would be awkward. * diff --git a/arch/arm/src/sam34/sam_dmac.h b/arch/arm/src/sam34/sam_dmac.h index 58e7e68eb80..e38ee663f34 100644 --- a/arch/arm/src/sam34/sam_dmac.h +++ b/arch/arm/src/sam34/sam_dmac.h @@ -175,7 +175,7 @@ extern "C" * dma_flags) then gives the caller exclusive access to the DMA channel. * * The naming convention in all of the DMA interfaces is that one side is - * the 'peripheral' and the other is 'memory'. Howerver, the interface + * the 'peripheral' and the other is 'memory'. However, the interface * could still be used if, for example, both sides were memory although * the naming would be awkward. * diff --git a/arch/arm/src/sam34/sam_emac.c b/arch/arm/src/sam34/sam_emac.c index 4b32dc5269c..2d255281953 100644 --- a/arch/arm/src/sam34/sam_emac.c +++ b/arch/arm/src/sam34/sam_emac.c @@ -600,7 +600,7 @@ static uint16_t sam_txfree(struct sam_emac_s *priv) * * Description: * Allocate aligned TX and RX descriptors and buffers. For the case of - * pre-allocated structures, the function degenerates to a few assignements. + * pre-allocated structures, the function degenerates to a few assignments. * * Input Parameters: * priv - The EMAC driver state @@ -2858,7 +2858,7 @@ static int sam_autonegotiate(struct sam_emac_s *priv) regval |= EMAC_NCR_MPE; sam_putreg(priv, SAM_EMAC_NCR, regval); - /* Verify tht we can read the PHYID register */ + /* Verify that we can read the PHYID register */ ret = sam_phyread(priv, priv->phyaddr, MII_PHYID1, &phyid1); if (ret < 0) diff --git a/arch/arm/src/sam34/sam_gpio.c b/arch/arm/src/sam34/sam_gpio.c index 8c8250741d4..f8f6491cf66 100644 --- a/arch/arm/src/sam34/sam_gpio.c +++ b/arch/arm/src/sam34/sam_gpio.c @@ -322,7 +322,7 @@ static inline int sam_configoutput(uintptr_t base, uint32_t pin, } #endif - /* Enable the open drain driver if requrested */ + /* Enable the open drain driver if requested */ if ((cfgset & GPIO_CFG_OPENDRAIN) != 0) { diff --git a/arch/arm/src/sam34/sam_hsmci.c b/arch/arm/src/sam34/sam_hsmci.c index fb146a05e83..f6f01c22ede 100644 --- a/arch/arm/src/sam34/sam_hsmci.c +++ b/arch/arm/src/sam34/sam_hsmci.c @@ -704,7 +704,7 @@ static void sam_disablexfrints(struct sam_dev_s *priv) * Name: sam_enableints * * Description: - * Enable the previously configured HSMCI interrupts needed to suport the + * Enable the previously configured HSMCI interrupts needed to support the * wait and transfer functions. * * Input Parameters: @@ -990,7 +990,7 @@ static inline void sam_cmdsample2(int index, uint32_t sr) * Name: sam_cmddump * * Description: - * Dump all comand/response register data + * Dump all command/response register data * ****************************************************************************/ @@ -1182,7 +1182,7 @@ static void sam_endtransfer(struct sam_dev_s *priv, * Name: sam_notransfer * * Description: - * Setup for no transfer. This is the default setup that is overriddden + * Setup for no transfer. This is the default setup that is overridden * by sam_dmarecvsetup or sam_dmasendsetup * * Input Parameters: @@ -2472,7 +2472,7 @@ static int sam_dmarecvsetup(FAR struct sdio_dev_s *dev, FAR uint8_t *buffer, #endif /* Configure transfer-related interrupts. Transfer interrupts are not - * enabled until after the transfer is stard with an SD command (i.e., + * enabled until after the transfer is start with an SD command (i.e., * at the beginning of sam_eventwait(). */ @@ -2542,7 +2542,7 @@ static int sam_dmasendsetup(FAR struct sdio_dev_s *dev, #endif /* Configure transfer-related interrupts. Transfer interrupts are not - * enabled until after the transfer is stard with an SD command (i.e., + * enabled until after the transfer is start with an SD command (i.e., * at the beginning of sam_eventwait(). */ diff --git a/arch/arm/src/sam34/sam_rtc.c b/arch/arm/src/sam34/sam_rtc.c index 32f211cb84c..7180471948c 100644 --- a/arch/arm/src/sam34/sam_rtc.c +++ b/arch/arm/src/sam34/sam_rtc.c @@ -473,7 +473,7 @@ int up_rtc_getdatetime(FAR struct tm *tp) * tm_min 0-59 MIN (0-59) * tm_hour 0-23 HOUR (0-23) * - * *To allow for leap seconds. But these never actuall happen. + * *To allow for leap seconds. But these never actually happen. */ tmp = (timr & RTC_TIMR_SEC_MASK) >> RTC_TIMR_SEC_SHIFT; @@ -552,7 +552,7 @@ int up_rtc_settime(FAR const struct timespec *tp) * tm_min 0-59 MIN (0-59) * tm_hour 0-23 HOUR (0-23) * - * *To allow for leap seconds. But these never actuall happen. + * *To allow for leap seconds. But these never actually happen. */ timr = (rtc_bin2bcd(newtime.tm_sec) << RTC_TIMR_SEC_SHIFT) & RTC_TIMR_SEC_MASK; @@ -678,7 +678,7 @@ int sam_rtc_setalarm(FAR const struct timespec *tp, alarmcb_t callback) * tm_min 0-59 MIN (0-59) * tm_hour 0-23 HOUR (0-23) * - * *To allow for leap seconds. But these never actuall happen. + * *To allow for leap seconds. But these never actually happen. */ timalr = (rtc_bin2bcd(newalarm.tm_sec) << RTC_TIMALR_SEC_SHIFT) & RTC_TIMALR_SEC_MASK; diff --git a/arch/arm/src/sam34/sam_rtt.c b/arch/arm/src/sam34/sam_rtt.c index cf61d92e3f5..721c8cba6bf 100644 --- a/arch/arm/src/sam34/sam_rtt.c +++ b/arch/arm/src/sam34/sam_rtt.c @@ -196,7 +196,7 @@ static uint32_t sam34_getreg(uint32_t addr) uint32_t val = getreg32(addr); - /* Is this the same value that we read from the same registe last time? Are + /* Is this the same value that we read from the same register last time? Are * we polling the register? If so, suppress some of the output. */ @@ -539,7 +539,7 @@ static int sam34_settimeout(FAR struct timer_lowerhalf_s *lower, timeout = (1000000ULL * priv->clkticks) / RTT_FCLK; /* Truncated timeout */ priv->adjustment = priv->timeout - timeout; /* Truncated time to be added to next interval (dither) */ - tmrinfo("fclk=%d clkticks=%d timout=%d, adjustment=%d\n", + tmrinfo("fclk=%d clkticks=%d timeout=%d, adjustment=%d\n", RTT_FCLK, priv->clkticks, priv->timeout, priv->adjustment); return OK; diff --git a/arch/arm/src/sam34/sam_serial.c b/arch/arm/src/sam34/sam_serial.c index 00dae5bdc97..ea09d9aac7d 100644 --- a/arch/arm/src/sam34/sam_serial.c +++ b/arch/arm/src/sam34/sam_serial.c @@ -908,7 +908,7 @@ static void up_detach(struct uart_dev_s *dev) * interrupt received on the 'irq' It should call uart_transmitchars or * uart_receivechar to perform the appropriate data transfers. The * interrupt handling logic must be able to map the 'irq' number into the - * approprite uart_dev_s structure in order to call these functions. + * appropriate uart_dev_s structure in order to call these functions. * ****************************************************************************/ diff --git a/arch/arm/src/sam34/sam_start.c b/arch/arm/src/sam34/sam_start.c index 467bc06538d..c10d63e7ec5 100644 --- a/arch/arm/src/sam34/sam_start.c +++ b/arch/arm/src/sam34/sam_start.c @@ -334,7 +334,7 @@ void __start(void) /* For the case of the separate user-/kernel-space build, perform whatever * platform specific initialization of the user memory is required. * Normally this just means initializing the user space .data and .bss - * segements. + * segments. */ #ifdef CONFIG_BUILD_PROTECTED diff --git a/arch/arm/src/sam34/sam_tc.c b/arch/arm/src/sam34/sam_tc.c index 2d8b0c160bb..e3376bec4ca 100644 --- a/arch/arm/src/sam34/sam_tc.c +++ b/arch/arm/src/sam34/sam_tc.c @@ -176,7 +176,7 @@ static uint32_t sam34_getreg(uint32_t addr) uint32_t val = getreg32(addr); - /* Is this the same value that we read from the same registe last time? Are + /* Is this the same value that we read from the same register last time? Are * we polling the register? If so, suppress some of the output. */ @@ -282,7 +282,7 @@ static int sam34_interrupt(int irq, FAR void *context, FAR void *arg) sam34_putreg(priv->clkticks, priv->base + SAM_TC_RC_OFFSET); - timeout = (1000000ULL * priv->clkticks) / TC_FCLK; /* trucated timeout */ + timeout = (1000000ULL * priv->clkticks) / TC_FCLK; /* truncated timeout */ priv->adjustment = (priv->adjustment + priv->timeout) - timeout; /* truncated time to be added to next interval (dither) */ } else @@ -487,7 +487,7 @@ static int sam34_settimeout(FAR struct timer_lowerhalf_s *lower, timeout = (1000000ULL * priv->clkticks) / TC_FCLK; /* Truncated timeout */ priv->adjustment = priv->timeout - timeout; /* Truncated time to be added to next interval (dither) */ - tmrinfo("fclk=%d clkticks=%d timout=%d, adjustment=%d\n", + tmrinfo("fclk=%d clkticks=%d timeout=%d, adjustment=%d\n", TC_FCLK, priv->clkticks, priv->timeout, priv->adjustment); return OK; diff --git a/arch/arm/src/sam34/sam_wdt.c b/arch/arm/src/sam34/sam_wdt.c index 53a0755b260..9de791efac1 100644 --- a/arch/arm/src/sam34/sam_wdt.c +++ b/arch/arm/src/sam34/sam_wdt.c @@ -177,7 +177,7 @@ static uint32_t sam34_getreg(uint32_t addr) uint32_t val = getreg32(addr); - /* Is this the same value that we read from the same registe last time? Are + /* Is this the same value that we read from the same register last time? Are * we polling the register? If so, suppress some of the output. */ @@ -493,7 +493,7 @@ static int sam34_settimeout(FAR struct watchdog_lowerhalf_s *lower, priv->reload = reload; - wdinfo("fwdt=%d reload=%d timout=%d\n", + wdinfo("fwdt=%d reload=%d timeout=%d\n", WDT_FCLK, reload, priv->timeout); /* Don't commit to MR register until started! */ diff --git a/arch/arm/src/sama5/hardware/_sama5d2x_memorymap.h b/arch/arm/src/sama5/hardware/_sama5d2x_memorymap.h index ce9bd2263c6..a798af70be6 100644 --- a/arch/arm/src/sama5/hardware/_sama5d2x_memorymap.h +++ b/arch/arm/src/sama5/hardware/_sama5d2x_memorymap.h @@ -65,7 +65,7 @@ * Section MMU Flags * SAMA5 Virtual (mapped) Memory Map * - Peripheral virtual base addresses - * - NuttX vitual base address + * - NuttX virtual base address * MMU Page Table Location * Page table start addresses * Base address of the interrupt vector table @@ -386,7 +386,7 @@ /* SAMA5 Virtual (mapped) Memory Map * * board_memorymap.h contains special mappings that are needed when a ROM - * memory map is used. It is included in this odd location becaue it depends + * memory map is used. It is included in this odd location because it depends * on some the virtual address definitions provided above. */ diff --git a/arch/arm/src/sama5/hardware/_sama5d3x_memorymap.h b/arch/arm/src/sama5/hardware/_sama5d3x_memorymap.h index a0626540fb2..7770a950c52 100644 --- a/arch/arm/src/sama5/hardware/_sama5d3x_memorymap.h +++ b/arch/arm/src/sama5/hardware/_sama5d3x_memorymap.h @@ -64,7 +64,7 @@ * Section MMU Flags * SAMA5 Virtual (mapped) Memory Map * - Peripheral virtual base addresses - * - NuttX vitual base address + * - NuttX virtual base address * MMU Page Table Location * Page table start addresses * Base address of the interrupt vector table @@ -325,7 +325,7 @@ /* SAMA5 Virtual (mapped) Memory Map * * board_memorymap.h contains special mappings that are needed when a ROM - * memory map is used. It is included in this odd location becaue it depends + * memory map is used. It is included in this odd location because it depends * on some the virtual address definitions provided above. */ @@ -445,7 +445,7 @@ #define SAM_GPBR_VBASE (SAM_SYSC_VADDR+SAM_GPBR_OFFSET) #define SAM_RTCC_VBASE (SAM_SYSC_VADDR+SAM_RTCC_OFFSET) -/* NuttX vitual base address +/* NuttX virtual base address * * The boot logic will create a temporarily mapping based on where NuttX is * executing in memory. In this case, NuttX could be running from NOR FLASH, diff --git a/arch/arm/src/sama5/hardware/_sama5d4x_memorymap.h b/arch/arm/src/sama5/hardware/_sama5d4x_memorymap.h index ceed872f787..401f2ccc838 100644 --- a/arch/arm/src/sama5/hardware/_sama5d4x_memorymap.h +++ b/arch/arm/src/sama5/hardware/_sama5d4x_memorymap.h @@ -326,7 +326,7 @@ /* SAMA5 Virtual (mapped) Memory Map * * board_memorymap.h contains special mappings that are needed when a ROM - * memory map is used. It is included in this odd location becaue it depends + * memory map is used. It is included in this odd location because it depends * on some the virtual address definitions provided above. */ diff --git a/arch/arm/src/sama5/hardware/sam_adc.h b/arch/arm/src/sama5/hardware/sam_adc.h index 208d529b720..45bd1f79dbc 100644 --- a/arch/arm/src/sama5/hardware/sam_adc.h +++ b/arch/arm/src/sama5/hardware/sam_adc.h @@ -113,7 +113,7 @@ #define SAM_ADC_WPSR_OFFSET 0x00e8 /* Write Protect Status Register */ /* 0x00ec-fc Reserved */ -/* ADC register adresses ***************************************************************/ +/* ADC register addresses **************************************************************/ #define SAM_ADC_CR (SAM_TSADC_VBASE+SAM_ADC_CR_OFFSET) #define SAM_ADC_MR (SAM_TSADC_VBASE+SAM_ADC_MR_OFFSET) diff --git a/arch/arm/src/sama5/hardware/sam_dmac.h b/arch/arm/src/sama5/hardware/sam_dmac.h index f037819689e..902816e2bd0 100644 --- a/arch/arm/src/sama5/hardware/sam_dmac.h +++ b/arch/arm/src/sama5/hardware/sam_dmac.h @@ -92,7 +92,7 @@ #define SAM_DMAC_WPSR_OFFSET 0x01e8 /* DMAC Write Protect Status Register */ /* 0x01ec-0x1fc: Reserved */ -/* DMAC0 register adresses **************************************************************/ +/* DMAC0 register addresses *************************************************************/ /* DMAC0 Global Registers */ #define SAM_DMAC0_GCFG (SAM_DMAC0_VBASE+SAM_DMAC_GCFG_OFFSET) @@ -204,7 +204,7 @@ #define SAM_DMAC0_CH7_SPIP (SAM_DMAC0_CH7_BASE+SAM_DMAC_CH_SPIP_OFFSET) #define SAM_DMAC0_CH7_DPIP (SAM_DMAC0_CH7_BASE+SAM_DMAC_CH_DPIP_OFFSET) -/* DMAC1 register adresses **************************************************************/ +/* DMAC1 register addresses *************************************************************/ /* DMAC1 Global Registers */ #define SAM_DMAC1_GCFG (SAM_DMAC1_VBASE+SAM_DMAC_GCFG_OFFSET) diff --git a/arch/arm/src/sama5/hardware/sam_ehci.h b/arch/arm/src/sama5/hardware/sam_ehci.h index b06511dbaca..60b843de86d 100644 --- a/arch/arm/src/sama5/hardware/sam_ehci.h +++ b/arch/arm/src/sama5/hardware/sam_ehci.h @@ -62,7 +62,7 @@ * the 'caplength' byte of the Host Controller Capability Registers. * * However, for the case of the SAMA5 EHCI, we know apriori that the value - * of 'caplength' is 0x10. We keep this structure, however, to faciltate + * of 'caplength' is 0x10. We keep this structure, however, to facilitate * porting this driver to other environments where, perhaps, such knowledge * is not available. */ diff --git a/arch/arm/src/sama5/hardware/sam_flexcom_usart.h b/arch/arm/src/sama5/hardware/sam_flexcom_usart.h index 302eada4cd3..8cabc300a3a 100644 --- a/arch/arm/src/sama5/hardware/sam_flexcom_usart.h +++ b/arch/arm/src/sama5/hardware/sam_flexcom_usart.h @@ -85,7 +85,7 @@ #define SAM_FLEXUS_WPSR_OFFSET 0x02e8 /* Write Protect Status Register (4) */ /* 0x02ec-0x02fc: Reserved (USART) */ -/* USART register adresses ***********************************************************************/ +/* USART register addresses **********************************************************************/ #ifdef CONFIG_SAMA5_HAVE_FLEXCOM0 # define SAM_FLEXUS0_CR (SAM_FLEXCOM0_VBASE+SAM_FLEXUS_CR_OFFSET) @@ -426,7 +426,7 @@ /* FLEXUS Number of Errors Register */ -#define FLEXUS_NER_NBERRORS_SHIFT (0) /* Bits 0-7: Number of Errrors */ +#define FLEXUS_NER_NBERRORS_SHIFT (0) /* Bits 0-7: Number of Errors */ #define FLEXUS_NER_NBERRORS_MASK (0xff << FLEXUS_NER_NBERRORS_SHIFT) /* FLEXUS IrDA FILTER Register */ diff --git a/arch/arm/src/sama5/hardware/sam_gmac.h b/arch/arm/src/sama5/hardware/sam_gmac.h index 64ed40af5d5..010073f2458 100644 --- a/arch/arm/src/sama5/hardware/sam_gmac.h +++ b/arch/arm/src/sama5/hardware/sam_gmac.h @@ -894,7 +894,7 @@ /* Screening Type1 Register Priority Queue 0-15 */ -#define GMAC_ST1RPQ0_QNB_SHIFT (0) /* Bits 0-3: Que Number (0->7) */ +#define GMAC_ST1RPQ0_QNB_SHIFT (0) /* Bits 0-3: Queue Number (0->7) */ #define GMAC_ST1RPQ0_QNB_MASK (15 << GMAC_ST1RPQ0_QNB_SHIFT) # define GMAC_ST1RPQ0_QNB(n) ((uint32_t)(n) << GMAC_ST1RPQ0_QNB_SHIFT) #define GMAC_ST1RPQ0_DSTCM_SHIFT (4) /* Bits 4-11: Differentiated Services or Traffic Class Match */ @@ -908,7 +908,7 @@ /* Screening Type2 Register Priority Queue 0-15 */ -#define GMAC_ST2RPQ0_QNB_SHIFT (0) /* Bits 0-3: Que Number (0->7) */ +#define GMAC_ST2RPQ0_QNB_SHIFT (0) /* Bits 0-3: Queue Number (0->7) */ #define GMAC_ST2RPQ0_QNB_MASK (15 << GMAC_ST2RPQ0_QNB_SHIFT) # define GMAC_ST2RPQ0_QNB(n) ((uint32_t)(n) << GMAC_ST2RPQ0_QNB_SHIFT) #define GMAC_ST2RPQ0_VLANP_SHIFT (4) /* Bits 4-7: VLAN Priority */ diff --git a/arch/arm/src/sama5/hardware/sam_pmc.h b/arch/arm/src/sama5/hardware/sam_pmc.h index aa5e9ee56ac..7f89b744811 100644 --- a/arch/arm/src/sama5/hardware/sam_pmc.h +++ b/arch/arm/src/sama5/hardware/sam_pmc.h @@ -286,8 +286,8 @@ #ifdef ATSAMA5D2 # define PMC_CKGR_MCFR_CCSS (1 << 24) /* Bit 24: Counter Clock Source Selection */ -# define PMC_CKGR_MCFR_CCSS_RCOSC (0) /* Bit 24: 0=MAINF clock is the RC osciallator */ -# define PMC_CKGR_MCFR_CCSS_XOSC (1 << 24) /* Bit 24: 1=MAINF clock is the crystal osciallator */ +# define PMC_CKGR_MCFR_CCSS_RCOSC (0) /* Bit 24: 0=MAINF clock is the RC oscillator */ +# define PMC_CKGR_MCFR_CCSS_XOSC (1 << 24) /* Bit 24: 1=MAINF clock is the crystal oscillator */ #endif /* PMC Clock Generator PLLA Register */ diff --git a/arch/arm/src/sama5/hardware/sam_rxlp.h b/arch/arm/src/sama5/hardware/sam_rxlp.h index bb31ff3bd56..6064aa16f0b 100644 --- a/arch/arm/src/sama5/hardware/sam_rxlp.h +++ b/arch/arm/src/sama5/hardware/sam_rxlp.h @@ -64,7 +64,7 @@ #define SAM_RXLP_WPMR_OFFSET 0x00e4 /* Write Protect Mode Register (4) */ /* 0x00e8-0xfc: Reserved */ -/* RXLP register adresses ***********************************************************************/ +/* RXLP register addresses **********************************************************************/ #define SAM_RXLP0_CR (SAM_RXLP_VBASE+SAM_RXLP_CR_OFFSET) #define SAM_RXLP0_MR (SAM_RXLP_VBASE+SAM_RXLP_MR_OFFSET) diff --git a/arch/arm/src/sama5/hardware/sam_spi.h b/arch/arm/src/sama5/hardware/sam_spi.h index a2dde6dd01f..6d3cb299fc2 100644 --- a/arch/arm/src/sama5/hardware/sam_spi.h +++ b/arch/arm/src/sama5/hardware/sam_spi.h @@ -73,7 +73,7 @@ #define SAM_SPI_WPSR_OFFSET 0x00e8 /* Write Protection Status Register */ /* 0xec-0x124: Reserved */ -/* SPI register adresses ****************************************************************/ +/* SPI register addresses ***************************************************************/ #define SAM_SPI0_CR (SAM_SPI0_VBASE+SAM_SPI_CR_OFFSET) #define SAM_SPI0_MR (SAM_SPI0_VBASE+SAM_SPI_MR_OFFSET) diff --git a/arch/arm/src/sama5/hardware/sam_twi.h b/arch/arm/src/sama5/hardware/sam_twi.h index 536b0c721b1..2727359d5f0 100644 --- a/arch/arm/src/sama5/hardware/sam_twi.h +++ b/arch/arm/src/sama5/hardware/sam_twi.h @@ -69,7 +69,7 @@ #define SAM_TWI_WPSR_OFFSET 0x00e8 /* Protection Status Register */ /* 0x00ec-0x00fc: Reserved */ -/* TWI register adresses ****************************************************************/ +/* TWI register addresses ***************************************************************/ #define SAM_TWI0_CR (SAM_TWI0_VBASE+SAM_TWI_CR_OFFSET) #define SAM_TWI0_MMR (SAM_TWI0_VBASE+SAM_TWI_MMR_OFFSET) diff --git a/arch/arm/src/sama5/hardware/sam_uart.h b/arch/arm/src/sama5/hardware/sam_uart.h index a7e16a4dd2b..538d6f611d4 100644 --- a/arch/arm/src/sama5/hardware/sam_uart.h +++ b/arch/arm/src/sama5/hardware/sam_uart.h @@ -92,7 +92,7 @@ #endif /* 0x00ec-0xfc: Reserved (USART) */ -/* UART register adresses ***********************************************************************/ +/* UART register addresses **********************************************************************/ #define SAM_UART0_CR (SAM_UART0_VBASE+SAM_UART_CR_OFFSET) #define SAM_UART0_MR (SAM_UART0_VBASE+SAM_UART_MR_OFFSET) @@ -508,7 +508,7 @@ #if defined(ATSAMA5D3) ||defined(ATSAMA5D4) /* USART Number of Errors Register (USART only) */ -# define UART_NER_NBERRORS_SHIFT (0) /* Bits 0-7: Number of Errrors (USART only) */ +# define UART_NER_NBERRORS_SHIFT (0) /* Bits 0-7: Number of Errors (USART only) */ # define UART_NER_NBERRORS_MASK (0xff << UART_NER_NBERRORS_SHIFT) #endif diff --git a/arch/arm/src/sama5/hardware/sam_wdt.h b/arch/arm/src/sama5/hardware/sam_wdt.h index 60746125463..e270ca26591 100644 --- a/arch/arm/src/sama5/hardware/sam_wdt.h +++ b/arch/arm/src/sama5/hardware/sam_wdt.h @@ -56,7 +56,7 @@ #define SAM_WDT_MR_OFFSET 0x04 /* Mode Register */ #define SAM_WDT_SR_OFFSET 0x08 /* Status Register */ -/* WDT register adresses ***************************************************************/ +/* WDT register addresses **************************************************************/ #define SAM_WDT_CR (SAM_WDT_VBASE+SAM_WDT_CR_OFFSET) #define SAM_WDT_MR (SAM_WDT_VBASE+SAM_WDT_MR_OFFSET) diff --git a/arch/arm/src/sama5/sam_adc.c b/arch/arm/src/sama5/sam_adc.c index 9b0fcfe968f..24ccbf003d4 100644 --- a/arch/arm/src/sama5/sam_adc.c +++ b/arch/arm/src/sama5/sam_adc.c @@ -228,7 +228,7 @@ SAMA5_CHAN6_ENABLE | SAMA5_CHAN7_ENABLE | SAMA5_CHAN8_ENABLE | \ SAMA5_CHAN9_ENABLE | SAMA5_CHAN10_ENABLE | SAMA5_CHAN11_ENABLE) -/* If we are supporting the analog chang feature, then sure that there +/* If we are supporting the analog change feature, then sure that there * is a gain setting for each enabled channel. * * Valid gain settings are {0, 1, 2, 3} which may be interpreted as @@ -1293,7 +1293,7 @@ static int sam_adc_settimer(struct sam_adc_s *priv, uint32_t frequency, return ret; } - /* Set the timer/counter waveform mode the clock input slected by + /* Set the timer/counter waveform mode the clock input selected by * sam_tc_divisor() */ diff --git a/arch/arm/src/sama5/sam_boot.c b/arch/arm/src/sama5/sam_boot.c index 31385596923..7b2da4e801d 100644 --- a/arch/arm/src/sama5/sam_boot.c +++ b/arch/arm/src/sama5/sam_boot.c @@ -362,7 +362,7 @@ static inline void sam_wdtdisable(void) * a. Stack Setup for ARM supervisor mode * b. Main Oscillator Detection: The bootloader attempts to use an * external crystal. If this is not successful, then the 12 MHz - * Fast RC internal oscillator is used as the main osciallator. + * Fast RC internal oscillator is used as the main oscillator. * c. Main Clock Selection: The Master Clock source is switched from * to the main oscillator without prescaler. PCK and MCK are now * the Main Clock. diff --git a/arch/arm/src/sama5/sam_can.c b/arch/arm/src/sama5/sam_can.c index cfa6ea72a5c..87a986645fc 100644 --- a/arch/arm/src/sama5/sam_can.c +++ b/arch/arm/src/sama5/sam_can.c @@ -95,7 +95,7 @@ #if SAM_CAN_NMAILBOXES == 8 # define CAN_ALL_MAILBOXES 0xff /* 8 mailboxes */ #else -# error Unsupport/undefined number of mailboxes +# error Unsupported/undefined number of mailboxes #endif /* Interrupts ***************************************************************/ @@ -1047,7 +1047,7 @@ static int can_remoterequest(FAR struct can_dev_s *dev, uint16_t id) * * Byte 0: Bits 0-7: Bits 3-10 of the 11-bit CAN identifier * Byte 1: Bits 5-7: Bits 0-2 of the 11-bit CAN identifier - * Bit 4: Remote Tranmission Request (RTR) + * Bit 4: Remote Transmission Request (RTR) * Bits 0-3: Data Length Code (DLC) * Bytes 2-10: CAN data * @@ -1537,7 +1537,7 @@ static void can_interrupt(int irq, void *context, FAR void *arg) * PROPAG field of the CAN Baudrate Register. * 3. Phase segment 1 (PHASE_SEG1): defines the location of the sample * point. Phase Segment 1 is programmable to be 1-8 Tq long. - * 4. Phase segement 2 (PHASE_SEG2): defines the location of the transmit + * 4. Phase segment 2 (PHASE_SEG2): defines the location of the transmit * point.Phase Segment 2 length has to be at least as long as the * Information Processing Time (IPT) and may not be more than the * length of Phase Segment 1 (since Phase Segment 2 also begins at the @@ -1654,7 +1654,7 @@ static int can_bittiming(struct sam_can_s *priv) t1t2 = tq - 1 - (propag + 1); - /* Calcuate phase1 and phase2 */ + /* Calculate phase1 and phase2 */ phase1 = (t1t2 >> 1) - 1; phase2 = phase1; diff --git a/arch/arm/src/sama5/sam_clockconfig.c b/arch/arm/src/sama5/sam_clockconfig.c index 17d8272fbb2..6a209d7b01e 100644 --- a/arch/arm/src/sama5/sam_clockconfig.c +++ b/arch/arm/src/sama5/sam_clockconfig.c @@ -586,7 +586,7 @@ static inline void sam_usbclockconfig(void) * a. Stack Setup for ARM supervisor mode * b. Main Oscillator Detection: The bootloader attempts to use an * external crystal. If this is not successful, then the 12 MHz - * Fast RC internal oscillator is used as the main osciallator. + * Fast RC internal oscillator is used as the main oscillator. * c. Main Clock Selection: The Master Clock source is switched from * to the main oscillator without prescaler. PCK and MCK are now * the Main Clock. diff --git a/arch/arm/src/sama5/sam_clockconfig.h b/arch/arm/src/sama5/sam_clockconfig.h index 6c88fdae182..424d806cc70 100644 --- a/arch/arm/src/sama5/sam_clockconfig.h +++ b/arch/arm/src/sama5/sam_clockconfig.h @@ -98,7 +98,7 @@ void __ramfunc__ sam_clockconfig(void); * allows execution of the code contained into the memory connected to * Chip Select 0 of the External Bus Interface. * - * "To achieve that, the following sequence is preformed by the ROM + * "To achieve that, the following sequence is performed by the ROM * Code: * * - The main clock is the on-chip 12 MHz RC oscillator, diff --git a/arch/arm/src/sama5/sam_dmac.c b/arch/arm/src/sama5/sam_dmac.c index d971314fd26..23d84189719 100644 --- a/arch/arm/src/sama5/sam_dmac.c +++ b/arch/arm/src/sama5/sam_dmac.c @@ -118,7 +118,7 @@ struct sam_pidmap_s uint8_t pchan; /* DMA channel */ }; -/* This structure descibes one DMA channel */ +/* This structure describes one DMA channel */ struct sam_dmach_s { @@ -139,14 +139,14 @@ struct sam_dmach_s struct dma_linklist_s *lltail; /* DMA link list head */ }; -/* This structure describes the stae of one DMA controller */ +/* This structure describes the state of one DMA controller */ struct sam_dmac_s { /* These semaphores protect the DMA channel and descriptor tables */ sem_t chsem; /* Protects channel table */ - sem_t dsem; /* Protects descriptior table */ + sem_t dsem; /* Protects descriptor table */ uint32_t base; /* DMA register channel base address */ /* This array describes the available link list descriptors */ @@ -1416,7 +1416,7 @@ sam_allocdesc(struct sam_dmach_s *dmach, struct dma_linklist_s *prev, desc->ctrlb |= DMAC_CH_CTRLB_BOTHDSCR; dmach->lltail = desc; - /* Assume that we will be doing multple buffer transfers and that + /* Assume that we will be doing multiple buffer transfers and that * that hardware will be accessing the descriptor via DMA. */ @@ -1815,7 +1815,7 @@ static int sam_dmac_interrupt(int irq, void *context, FAR void *arg) sam_dmaterminate(dmach, OK); } - /* Otherwise, this must be a Bufffer Transfer Complete (BTC) + /* Otherwise, this must be a Buffer Transfer Complete (BTC) * interrupt as part of a multiple buffer transfer. */ @@ -1929,7 +1929,7 @@ void weak_function up_dma_initialize(void) * gives the caller exclusive access to the DMA channel. * * The naming convention in all of the DMA interfaces is that one side is - * the 'peripheral' and the other is 'memory'. Howerver, the interface + * the 'peripheral' and the other is 'memory'. However, the interface * could still be used if, for example, both sides were memory although * the naming would be awkward. * @@ -2265,7 +2265,7 @@ int sam_dmastart(DMA_HANDLE handle, dma_callback_t callback, void *arg) if (dmach->llhead) { - /* Save the callback info. This will be invoked whent the DMA commpletes */ + /* Save the callback info. This will be invoked whent the DMA completes */ dmach->callback = callback; dmach->arg = arg; diff --git a/arch/arm/src/sama5/sam_dmac.h b/arch/arm/src/sama5/sam_dmac.h index b6ba92c23f1..5f718cab9ea 100644 --- a/arch/arm/src/sama5/sam_dmac.h +++ b/arch/arm/src/sama5/sam_dmac.h @@ -371,7 +371,7 @@ extern "C" * caller exclusive access to the DMA channel. * * The naming convention in all of the DMA interfaces is that one side is the - * 'peripheral' and the other is 'memory'. Howerver, the interface could still + * 'peripheral' and the other is 'memory'. However, the interface could still * be used if, for example, both sides were memory although the naming would be * awkward. * diff --git a/arch/arm/src/sama5/sam_ehci.c b/arch/arm/src/sama5/sam_ehci.c index 121ae72d339..35e7f4eaf05 100644 --- a/arch/arm/src/sama5/sam_ehci.c +++ b/arch/arm/src/sama5/sam_ehci.c @@ -1437,7 +1437,7 @@ static int sam_ioc_wait(struct sam_epinfo_s *epinfo) * Name: sam_qh_enqueue * * Description: - * Add a new, ready-to-go QH w/attached qTDs to the asynchonous queue. + * Add a new, ready-to-go QH w/attached qTDs to the asynchronous queue. * * Assumptions: The caller holds the EHCI exclsem * @@ -2104,7 +2104,7 @@ static int sam_async_setup(struct sam_rhport_s *rhport, physaddr = sam_physramaddr((uintptr_t)qtd); *flink = sam_swap32(physaddr); - /* In an IN data qTD was also enqueued, then linke the data qTD's + /* In an IN data qTD was also enqueued, then linked the data qTD's * alternate pointer to this STATUS phase qTD in order to handle short * transfers. */ @@ -3054,7 +3054,7 @@ static void sam_ehci_bottomhalf(FAR void *arg) * underflow). If the TD on which the error interrupt occurred also * had its IOC bit set, both this bit and USBINT bit are set. ..." * - * We do the same thing in either case: Traverse the asynchonous queue + * We do the same thing in either case: Traverse the asynchronous queue * and remove all of the transfers that are no longer active. */ diff --git a/arch/arm/src/sama5/sam_emaca.c b/arch/arm/src/sama5/sam_emaca.c index d6ee3295f5f..0b049a83c53 100644 --- a/arch/arm/src/sama5/sam_emaca.c +++ b/arch/arm/src/sama5/sam_emaca.c @@ -603,7 +603,7 @@ static uint16_t sam_txfree(struct sam_emac_s *priv) * * Description: * Allocate aligned TX and RX descriptors and buffers. For the case of - * pre-allocated structures, the function degenerates to a few assignements. + * pre-allocated structures, the function degenerates to a few assignments. * * Input Parameters: * priv - The EMAC driver state @@ -2875,7 +2875,7 @@ static int sam_autonegotiate(struct sam_emac_s *priv) regval |= EMAC_NCR_MPE; sam_putreg(priv, SAM_EMAC_NCR, regval); - /* Verify tht we can read the PHYID register */ + /* Verify that we can read the PHYID register */ ret = sam_phyread(priv, priv->phyaddr, MII_PHYID1, &phyid1); if (ret < 0) diff --git a/arch/arm/src/sama5/sam_emacb.c b/arch/arm/src/sama5/sam_emacb.c index 3fd9fac15db..c685e7d1291 100644 --- a/arch/arm/src/sama5/sam_emacb.c +++ b/arch/arm/src/sama5/sam_emacb.c @@ -938,7 +938,7 @@ static uint16_t sam_txfree(struct sam_emac_s *priv) * * Description: * Allocate aligned TX and RX descriptors and buffers. For the case of - * pre-allocated structures, the function degenerates to a few assignements. + * pre-allocated structures, the function degenerates to a few assignments. * * Input Parameters: * priv - The EMAC driver state @@ -3360,7 +3360,7 @@ static int sam_autonegotiate(struct sam_emac_s *priv) regval |= EMAC_NCR_MPE; sam_putreg(priv, SAM_EMAC_NCR_OFFSET, regval); - /* Verify tht we can read the PHYID register */ + /* Verify that we can read the PHYID register */ ret = sam_phyread(priv, priv->phyaddr, MII_PHYID1, &phyid1); if (ret < 0) diff --git a/arch/arm/src/sama5/sam_gmac.c b/arch/arm/src/sama5/sam_gmac.c index d597589b7e0..84a7376f20b 100644 --- a/arch/arm/src/sama5/sam_gmac.c +++ b/arch/arm/src/sama5/sam_gmac.c @@ -534,7 +534,7 @@ static uint16_t sam_txfree(struct sam_gmac_s *priv) * * Description: * Allocate aligned TX and RX descriptors and buffers. For the case of - * pre-allocated structures, the function degenerates to a few assignements. + * pre-allocated structures, the function degenerates to a few assignments. * * Input Parameters: * priv - The GMAC driver state @@ -708,7 +708,7 @@ static int sam_transmit(struct sam_gmac_s *priv) return -EBUSY; } - /* Setup/Copy data to transmition buffer */ + /* Setup/Copy data to transmission buffer */ if (dev->d_len > 0) { @@ -2979,7 +2979,7 @@ static int sam_autonegotiate(struct sam_gmac_s *priv) ninfo(" MCR: 0x%X\n", phyval); - /* Wait for autonegotion to complete */ + /* Wait for autonegotiation to complete */ timeout = 0; for (; ; ) diff --git a/arch/arm/src/sama5/sam_hsmci.c b/arch/arm/src/sama5/sam_hsmci.c index f5362a07237..2cb84ce1355 100644 --- a/arch/arm/src/sama5/sam_hsmci.c +++ b/arch/arm/src/sama5/sam_hsmci.c @@ -896,7 +896,7 @@ static void sam_disablexfrints(struct sam_dev_s *priv) * Name: sam_enableints * * Description: - * Enable the previously configured HSMCI interrupts needed to suport the + * Enable the previously configured HSMCI interrupts needed to support the * wait and transfer functions. * * Input Parameters: @@ -1170,7 +1170,7 @@ static inline void sam_cmdsample2(struct sam_dev_s *priv, int index, * Name: sam_cmddump * * Description: - * Dump all comand/response register data + * Dump all command/response register data * ****************************************************************************/ @@ -3025,7 +3025,7 @@ static int sam_dmasendsetup(FAR struct sdio_dev_s *dev, sam_dmastart(priv->dma, sam_dmacallback, priv); /* Configure transfer-related interrupts. Transfer interrupts are not - * enabled until after the transfer is stard with an SD command (i.e., + * enabled until after the transfer is start with an SD command (i.e., * at the beginning of sam_eventwait(). */ diff --git a/arch/arm/src/sama5/sam_irq.c b/arch/arm/src/sama5/sam_irq.c index d7401f6c5ac..4fb12fc90ed 100644 --- a/arch/arm/src/sama5/sam_irq.c +++ b/arch/arm/src/sama5/sam_irq.c @@ -100,7 +100,7 @@ static const uint8_t g_srctype[SCRTYPE_NTYPES] = 0, 0, 1, 1, 2, 3 }; -/* This is an arry of bit maps that can be used to quickly determine is the +/* This is an array of bit maps that can be used to quickly determine is the * peripheral identified by its PID is served by H64MX or H32MX. Then the * appropriate MATRIX SPSELR register can be consulted to determine if the * peripheral interrupts are secured or not. diff --git a/arch/arm/src/sama5/sam_lcd.c b/arch/arm/src/sama5/sam_lcd.c index fb136d31a1b..8b4e517f2fd 100644 --- a/arch/arm/src/sama5/sam_lcd.c +++ b/arch/arm/src/sama5/sam_lcd.c @@ -705,7 +705,7 @@ static int sam_base_putcmap(struct fb_vtable_s *vtable, static int sam_hcr_getcursor(struct fb_vtable_s *vtable, struct fb_cursorattrib_s *attrib); static int sam_hcr_setcursor(struct fb_vtable_s *vtable, - struct fb_setcursor_s *setttings); + struct fb_setcursor_s *settings); #endif /* Initialization ***********************************************************/ @@ -1199,10 +1199,10 @@ static int sam_hcr_getcursor(struct fb_vtable_s *vtable, #ifdef CONFIG_FB_HWCURSOR static int sam_hcr_setcursor(struct fb_vtable_s *vtable, - struct fb_setcursor_s *setttings) + struct fb_setcursor_s *settings) { - lcdinfo("vtable=%p setttings=%p\n", vtable, setttings); - if (vtable && setttings) + lcdinfo("vtable=%p settings=%p\n", vtable, settings); + if (vtable && settings) { lcdinfo("flags: %02x\n", settings->flags); if ((flags & FB_CUR_SETPOSITION) != 0) diff --git a/arch/arm/src/sama5/sam_lcd.h b/arch/arm/src/sama5/sam_lcd.h index 6fe2439c453..8839eeb69e8 100644 --- a/arch/arm/src/sama5/sam_lcd.h +++ b/arch/arm/src/sama5/sam_lcd.h @@ -89,7 +89,7 @@ * Description: * This is a non-standard LCD interface just for the SAMA5. Clearing the display * in the normal way by writing a sequences of runs that covers the entire display - * can be slow. Here the dispaly is cleared by simply setting all VRAM memory to + * can be slow. Here the display is cleared by simply setting all VRAM memory to * the specified color. * ************************************************************************************/ diff --git a/arch/arm/src/sama5/sam_nand.c b/arch/arm/src/sama5/sam_nand.c index 920093f4759..b79798549b1 100644 --- a/arch/arm/src/sama5/sam_nand.c +++ b/arch/arm/src/sama5/sam_nand.c @@ -1578,7 +1578,7 @@ static int nand_read(struct sam_nandcs_s *priv, uint8_t *buffer, * data - Buffer where the data area will be stored. * * Returned Value: - * OK is returned in succes; a negated errno value is returned on failure. + * OK is returned in success; a negated errno value is returned on failure. * ****************************************************************************/ @@ -1880,7 +1880,7 @@ static int nand_write(struct sam_nandcs_s *priv, uint8_t *buffer, * spare - Buffer where the spare area will be stored. * * Returned Value: - * OK is returned in succes; a negated errno value is returned on failure. + * OK is returned in success; a negated errno value is returned on failure. * ****************************************************************************/ @@ -1964,7 +1964,7 @@ static int nand_readpage_noecc(struct sam_nandcs_s *priv, off_t block, /* Read the spare area if so requested. If there is no data, then the * spare data will appear at offset 0; If there is data, thenthe spare data - * will appear followign the data at offset pagesize. + * will appear following the data at offset pagesize. */ if (spare) @@ -1995,7 +1995,7 @@ static int nand_readpage_noecc(struct sam_nandcs_s *priv, off_t block, * data - Buffer where the data area will be stored. * * Returned Value: - * OK is returned in succes; a negated errno value is returned on failure. + * OK is returned in success; a negated errno value is returned on failure. * ****************************************************************************/ @@ -2112,11 +2112,11 @@ errout: * priv - Lower-half, private NAND FLASH device state * block - Number of the block where the page to write resides. * page - Number of the page to write inside the given block. - * data - Buffer containing the data to be writting - * spare - Buffer conatining the spare data to be written. + * data - Buffer containing the data to be writing + * spare - Buffer containing the spare data to be written. * * Returned Value: - * OK is returned in succes; a negated errno value is returned on failure. + * OK is returned in success; a negated errno value is returned on failure. * ****************************************************************************/ @@ -2266,10 +2266,10 @@ static int nand_writepage_noecc(struct sam_nandcs_s *priv, off_t block, * priv - Lower-half, private NAND FLASH device state * block - Number of the block where the page to write resides. * page - Number of the page to write inside the given block. - * data - Buffer containing the data to be writting + * data - Buffer containing the data to be writing * * Returned Value: - * OK is returned in succes; a negated errno value is returned on failure. + * OK is returned in success; a negated errno value is returned on failure. * ****************************************************************************/ @@ -2481,7 +2481,7 @@ errout: * block - Number of the physical block to erase. * * Returned Value: - * OK is returned in succes; a negated errno value is returned on failure. + * OK is returned in success; a negated errno value is returned on failure. * ****************************************************************************/ @@ -2564,7 +2564,7 @@ static int nand_eraseblock(struct nand_raw_s *raw, off_t block) * spare - Buffer where the spare area will be stored. * * Returned Value: - * OK is returned in succes; a negated errno value is returned on failure. + * OK is returned in success; a negated errno value is returned on failure. * ****************************************************************************/ @@ -2597,11 +2597,11 @@ static int nand_rawread(struct nand_raw_s *raw, off_t block, * raw - Lower-half, raw NAND FLASH interface * block - Number of the block where the page to write resides. * page - Number of the page to write inside the given block. - * data - Buffer containing the data to be writting + * data - Buffer containing the data to be writing * spare - Buffer containing the spare data to be written. * * Returned Value: - * OK is returned in succes; a negated errno value is returned on failure. + * OK is returned in success; a negated errno value is returned on failure. * ****************************************************************************/ @@ -2640,7 +2640,7 @@ static int nand_rawwrite(struct nand_raw_s *raw, off_t block, * spare - Buffer where the spare area will be stored. * * Returned Value: - * OK is returned in succes; a negated errno value is returned on failure. + * OK is returned in success; a negated errno value is returned on failure. * ****************************************************************************/ @@ -2698,11 +2698,11 @@ static int nand_readpage(struct nand_raw_s *raw, off_t block, * raw - Lower-half, raw NAND FLASH interface * block - Number of the block where the page to write resides. * page - Number of the page to write inside the given block. - * data - Buffer containing the data to be writting - * spare - Buffer conatining the spare data to be written. + * data - Buffer containing the data to be writing + * spare - Buffer containing the spare data to be written. * * Returned Value: - * OK is returned in succes; a negated errno value is returned on failure. + * OK is returned in success; a negated errno value is returned on failure. * ****************************************************************************/ diff --git a/arch/arm/src/sama5/sam_ohci.c b/arch/arm/src/sama5/sam_ohci.c index 8673206ae27..5f9dceae40f 100644 --- a/arch/arm/src/sama5/sam_ohci.c +++ b/arch/arm/src/sama5/sam_ohci.c @@ -99,7 +99,7 @@ #endif #if CONFIG_SAMA5_OHCI_NTDS < 2 -# error Insufficent number of transfer descriptors (CONFIG_SAMA5_OHCI_NTDS < 2) +# error Insufficient number of transfer descriptors (CONFIG_SAMA5_OHCI_NTDS < 2) #endif /* Minimum alignment for DMA access is 16 bytes, but it is safer to align to the @@ -284,7 +284,7 @@ struct sam_ohci_s /* The OCHI expects the size of an endpoint descriptor to be 16 bytes. * However, the size allocated for an endpoint descriptor is 32 bytes. This * is necessary first because the Cortex-A5 cache line size is 32 bytes and - * tht is the smallest amount of memory that we can perform cache operations + * this is the smallest amount of memory that we can perform cache operations * on. The 16-bytes is also used by the OHCI host driver in order to maintain * additional endpoint-specific data. */ diff --git a/arch/arm/src/sama5/sam_oneshot_lowerhalf.c b/arch/arm/src/sama5/sam_oneshot_lowerhalf.c index e9737ea167d..e74a7b206f8 100644 --- a/arch/arm/src/sama5/sam_oneshot_lowerhalf.c +++ b/arch/arm/src/sama5/sam_oneshot_lowerhalf.c @@ -161,7 +161,7 @@ static void sam_oneshot_handler(void *arg) * lower An instance of the lower-half oneshot state structure. This * structure must have been previously initialized via a call to * oneshot_initialize(); - * ts The location in which to return the maxumum delay. + * ts The location in which to return the maximum delay. * * Returned Value: * Zero (OK) is returned on success; a negated errno value is returned diff --git a/arch/arm/src/sama5/sam_pck.c b/arch/arm/src/sama5/sam_pck.c index 6fe8b667ad0..19d64d2baea 100644 --- a/arch/arm/src/sama5/sam_pck.c +++ b/arch/arm/src/sama5/sam_pck.c @@ -156,7 +156,7 @@ uint32_t sam_pck_configure(enum pckid_e pckid, enum pckid_clksrc_e clksrc, } #ifdef SAMA5_HAVE_PCK_INT_PRES - /* Programmable Clock frequency is selected clock freqency divided by PRES + 1 */ + /* Programmable Clock frequency is selected clock frequency divided by PRES + 1 */ pres = clkin / frequency; if (pres < 1) diff --git a/arch/arm/src/sama5/sam_pio.h b/arch/arm/src/sama5/sam_pio.h index b2cb5c70080..ad8a476b007 100644 --- a/arch/arm/src/sama5/sam_pio.h +++ b/arch/arm/src/sama5/sam_pio.h @@ -54,7 +54,7 @@ * Pre-processor Definitions ************************************************************************************/ -/* Definitions and types customized for each SAMA5Dx familiy */ +/* Definitions and types customized for each SAMA5Dx family */ #if defined(ATSAMA5D2) # include "sama5d2x_pio.h" diff --git a/arch/arm/src/sama5/sam_pmecc.c b/arch/arm/src/sama5/sam_pmecc.c index cebaea4d988..03c283836e4 100644 --- a/arch/arm/src/sama5/sam_pmecc.c +++ b/arch/arm/src/sama5/sam_pmecc.c @@ -1420,7 +1420,7 @@ void pmecc_buildgf(uint32_t mm, int16_t *indexof, int16_t *alphato) /* First * - * build alpha ^ mm it will help to generate the field (primitiv) + * build alpha ^ mm it will help to generate the field (primitive) */ alphato[mm] = 0; diff --git a/arch/arm/src/sama5/sam_pwm.c b/arch/arm/src/sama5/sam_pwm.c index 71cce715f59..b58fe932eb1 100644 --- a/arch/arm/src/sama5/sam_pwm.c +++ b/arch/arm/src/sama5/sam_pwm.c @@ -1185,7 +1185,7 @@ static unsigned int pwm_clk_prescaler_log2(uint32_t mck, uint32_t fclk) * Description: * Given that we have already selected the prescaler value, select the * divider in the range of 1 through 255. The CLKA/B frequency is - * determined by both the prescaler and divider valuess: + * determined by both the prescaler and divider values: * * frequency = MCK / prescaler / div * @@ -1226,7 +1226,7 @@ static unsigned int pwm_clk_divider(uint32_t mck, uint32_t fclk, * Name: pwm_clk_frequency * * Description: - * Given that we have already selected the prescaler value and cacluated + * Given that we have already selected the prescaler value and calculated * the corresponding divider, the result clock frequency is give by: * * frequency = MCK / prescaler / div diff --git a/arch/arm/src/sama5/sam_rtc.c b/arch/arm/src/sama5/sam_rtc.c index 8006da7b6d9..f32daad4167 100644 --- a/arch/arm/src/sama5/sam_rtc.c +++ b/arch/arm/src/sama5/sam_rtc.c @@ -404,7 +404,7 @@ int up_rtc_getdatetime(FAR struct tm *tp) * tm_min 0-59 MIN (0-59) * tm_hour 0-23 HOUR (0-23) * - * *To allow for leap seconds. But these never actuall happen. + * *To allow for leap seconds. But these never actually happen. */ tmp = (timr & RTC_TIMR_SEC_MASK) >> RTC_TIMR_SEC_SHIFT; @@ -483,7 +483,7 @@ int up_rtc_settime(FAR const struct timespec *tp) * tm_min 0-59 MIN (0-59) * tm_hour 0-23 HOUR (0-23) * - * *To allow for leap seconds. But these never actuall happen. + * *To allow for leap seconds. But these never actually happen. */ timr = (rtc_bin2bcd(newtime.tm_sec) << RTC_TIMR_SEC_SHIFT) & RTC_TIMR_SEC_MASK; @@ -609,7 +609,7 @@ int sam_rtc_setalarm(FAR const struct timespec *tp, alarmcb_t callback) * tm_min 0-59 MIN (0-59) * tm_hour 0-23 HOUR (0-23) * - * *To allow for leap seconds. But these never actuall happen. + * *To allow for leap seconds. But these never actually happen. */ timalr = (rtc_bin2bcd(newalarm.tm_sec) << RTC_TIMALR_SEC_SHIFT) & RTC_TIMALR_SEC_MASK; diff --git a/arch/arm/src/sama5/sam_spi.c b/arch/arm/src/sama5/sam_spi.c index c1eb4e6a064..ef5fa25f203 100644 --- a/arch/arm/src/sama5/sam_spi.c +++ b/arch/arm/src/sama5/sam_spi.c @@ -179,7 +179,7 @@ struct sam_spics_s #endif }; -/* Type of board-specific SPI status fuction */ +/* Type of board-specific SPI status function */ typedef void (*select_t)(uint32_t devid, bool selected); @@ -843,12 +843,12 @@ static inline uintptr_t spi_physregaddr(struct sam_spics_s *spics, * Name: spi_lock * * Description: - * On SPI busses where there are multiple devices, it will be necessary to - * lock SPI to have exclusive access to the busses for a sequence of + * On SPI buses where there are multiple devices, it will be necessary to + * lock SPI to have exclusive access to the buses for a sequence of * transfers. The bus should be locked before the chip is selected. After * locking the SPI bus, the caller should then also call the setfrequency, * setbits, and setmode methods to make sure that the SPI is properly - * configured for the device. If the SPI buss is being shared, then it + * configured for the device. If the SPI bus is being shared, then it * may have been left in an incompatible state. * * Input Parameters: @@ -1212,7 +1212,7 @@ static uint16_t spi_send(struct spi_dev_s *dev, uint16_t wd) * that performs DMA SPI transfers, but only when a larger block of * data is being transferred. And (2) another version that does polled * SPI transfers. When CONFIG_SAMA5_SPI_DMA=n the latter is the only - * version avaialable; when CONFIG_SAMA5_SPI_DMA=y, this version is only + * version available; when CONFIG_SAMA5_SPI_DMA=y, this version is only * used for short SPI transfers and gets renamed as spi_exchange_nodma). * * Input Parameters: @@ -1491,7 +1491,7 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer, spi_txdma_sample(spics, DMA_AFTER_START); - /* Wait for DMA completion. This is done in a loop becaue there my be + /* Wait for DMA completion. This is done in a loop because there my be * false alarm semaphore counts that cause sam_wait() not fail to wait * or to wake-up prematurely (for example due to the receipt of a signal). * We know that the DMA has completed when the result is anything other @@ -1527,7 +1527,7 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer, /* Not that we might be awkened before the wait is over due to * residual counts on the semaphore. So, to handle, that case, - * we loop until somthing changes the DMA result to any value other + * we loop until something changes the DMA result to any value other * than -EBUSY. */ } diff --git a/arch/arm/src/sama5/sam_ssc.c b/arch/arm/src/sama5/sam_ssc.c index c89dbad3b12..3fcd1d9ebcd 100644 --- a/arch/arm/src/sama5/sam_ssc.c +++ b/arch/arm/src/sama5/sam_ssc.c @@ -2230,7 +2230,7 @@ static int ssc_receive(struct i2s_dev_s *dev, struct ap_buffer_s *apb, sq_addlast((sq_entry_t *)bfcontainer, &priv->rx.pend); ssc_dump_rxqueues(priv, "Receiving"); - /* Then start the next transfer. If there is already a transfer in progess, + /* Then start the next transfer. If there is already a transfer in progress, * then this will do nothing. */ @@ -2324,7 +2324,7 @@ static uint32_t ssc_txdatawidth(struct i2s_dev_s *dev, int bits) return 0; } - /* Upate the DMA flags */ + /* Update the DMA flags */ ret = ssc_dma_flags(priv, &dmaflags); if (ret < 0) @@ -2447,7 +2447,7 @@ static int ssc_send(struct i2s_dev_s *dev, struct ap_buffer_s *apb, sq_addlast((sq_entry_t *)bfcontainer, &priv->tx.pend); ssc_dump_txqueues(priv, "Transmitting"); - /* Then start the next transfer. If there is already a transfer in progess, + /* Then start the next transfer. If there is already a transfer in progress, * then this will do nothing. */ @@ -2563,7 +2563,7 @@ static int ssc_rx_configure(struct sam_ssc_s *priv) /* RFMR settings. Some of these settings will need to be configurable as well. * Currently hardcoded to: * - * SSC_RFMR_DATLEN(n) 'n' deterimined by configuration + * SSC_RFMR_DATLEN(n) 'n' determined by configuration * SSC_RFMR_LOOP Determined by configuration * SSC_RFMR_MSBF Most significant bit first * SSC_RFMR_DATNB(n) Data number 'n' per frame (hard-coded) diff --git a/arch/arm/src/sama5/sam_tc.c b/arch/arm/src/sama5/sam_tc.c index f2192070975..8733107a38d 100644 --- a/arch/arm/src/sama5/sam_tc.c +++ b/arch/arm/src/sama5/sam_tc.c @@ -523,7 +523,7 @@ static void sam_regdump(struct sam_chan_s *chan, const char *msg) * Input Parameters: * tc - The timer/counter peripheral state * wr - True:write access false:read access - * regval - The regiser value associated with the access + * regval - The register value associated with the access * regaddr - The address of the register being accessed * * Returned Value: diff --git a/arch/arm/src/sama5/sam_trng.c b/arch/arm/src/sama5/sam_trng.c index 6ba33ffe216..aa746b2b599 100644 --- a/arch/arm/src/sama5/sam_trng.c +++ b/arch/arm/src/sama5/sam_trng.c @@ -143,7 +143,7 @@ static int sam_interrupt(int irq, void *context, FAR void *arg) odata = getreg32(SAM_TRNG_ODATA); /* Verify that sample data is available (DATARDY is cleared when the - * interrupt status regiser is read) + * interrupt status register is read) */ if ((getreg32(SAM_TRNG_ISR) & TRNG_INT_DATRDY) == 0) @@ -197,7 +197,7 @@ static int sam_interrupt(int irq, void *context, FAR void *arg) g_trngdev.first = false; } - /* Yes.. the first sample has been dicarded */ + /* Yes.. the first sample has been discarded */ else { diff --git a/arch/arm/src/sama5/sam_udphs.c b/arch/arm/src/sama5/sam_udphs.c index 1e7b1430a9b..da391876391 100644 --- a/arch/arm/src/sama5/sam_udphs.c +++ b/arch/arm/src/sama5/sam_udphs.c @@ -971,7 +971,7 @@ static void sam_dma_wrsetup(struct sam_usbdev_s *priv, struct sam_ep_s *privep, { privreq->inflight = remaining; - /* If the size is an exact multple of full packets, then note if + /* If the size is an exact multiple of full packets, then note if * we need to send a zero length packet next. */ @@ -2432,8 +2432,8 @@ static void sam_dma_interrupt(struct sam_usbdev_s *priv, int epno) } /* Check for end of channel transfer. END_TR_ST is set by hardware when - * the last packet transfer is complete iff END_TR_EN is set in the - * DMACONTROL rgister. The request is complete. + * the last packet transfer is complete if END_TR_EN is set in the + * DMACONTROL register. The request is complete. * * "Used for OUT transfers only. * diff --git a/arch/arm/src/sama5/sam_usbhost.h b/arch/arm/src/sama5/sam_usbhost.h index 90e2b81a590..f56f0390f38 100644 --- a/arch/arm/src/sama5/sam_usbhost.h +++ b/arch/arm/src/sama5/sam_usbhost.h @@ -117,7 +117,7 @@ enum usbhost_trace1codes_e EHCI_TRACE1_QTDSTATUS_FAILED, /* EHCI ERROR: sam_qtd_statusphase failed */ EHCI_TRACE1_TRANSFER_FAILED, /* EHCI ERROR: Transfer failed */ EHCI_TRACE1_QHFOREACH_FAILED, /* EHCI ERROR: sam_qh_foreach failed: */ - EHCI_TRACE1_SYSERR_INTR, /* EHCI: Host System Error Interrup */ + EHCI_TRACE1_SYSERR_INTR, /* EHCI: Host System Error Interrupt */ EHCI_TRACE1_USBERR_INTR, /* EHCI: USB Error Interrupt (USBERRINT) Interrupt */ EHCI_TRACE1_EPALLOC_FAILED, /* EHCI ERROR: Failed to allocate EP info structure */ EHCI_TRACE1_BADXFRTYPE, /* EHCI ERROR: Support for transfer type not implemented */ diff --git a/arch/arm/src/sama5/sam_wdt.c b/arch/arm/src/sama5/sam_wdt.c index 7e6708a162e..e8bf848fa2b 100644 --- a/arch/arm/src/sama5/sam_wdt.c +++ b/arch/arm/src/sama5/sam_wdt.c @@ -117,7 +117,7 @@ static void sam_putreg(uint32_t regval, uintptr_t regaddr); # define sam_putreg(regval,regaddr) putreg32(regval,regaddr) #endif -/* Interrupt hanlding *******************************************************/ +/* Interrupt handling *******************************************************/ #ifdef CONFIG_SAMA5_WDT_INTERRUPT static int sam_interrupt(int irq, FAR void *context, FAR void *arg); @@ -180,7 +180,7 @@ static uint32_t sam_getreg(uintptr_t regaddr) uint32_t regval = getreg32(regaddr); - /* Is this the same value that we read from the same registe last time? Are + /* Is this the same value that we read from the same register last time? Are * we polling the register? If so, suppress some of the output. */ @@ -359,7 +359,7 @@ static int sam_keepalive(FAR struct watchdog_lowerhalf_s *lower) { wdinfo("Entry\n"); - /* Write WDT_CR_WDRSTT to the WDT CR regiser (along with the KEY value) + /* Write WDT_CR_WDRSTT to the WDT CR register (along with the KEY value) * will restart the watchdog timer. */ @@ -459,7 +459,7 @@ static int sam_settimeout(FAR struct watchdog_lowerhalf_s *lower, return -ERANGE; } - /* Calculate the reload value to achiee this (appoximate) timeout. + /* Calculate the reload value to achiee this (approximate) timeout. * * Examples with WDT_FREQUENCY = 32768 / 128 = 256: * timeout = 4 -> reload = 1 @@ -487,7 +487,7 @@ static int sam_settimeout(FAR struct watchdog_lowerhalf_s *lower, priv->reload = reload; - wdinfo("reload=%d timout: %d->%d\n", + wdinfo("reload=%d timeout: %d->%d\n", reload, timeout, priv->timeout); /* Set the WDT_MR according to calculated value diff --git a/arch/arm/src/sama5/sam_xdmac.c b/arch/arm/src/sama5/sam_xdmac.c index 2467c634b5c..a78e212280d 100644 --- a/arch/arm/src/sama5/sam_xdmac.c +++ b/arch/arm/src/sama5/sam_xdmac.c @@ -1956,7 +1956,7 @@ void weak_function up_dma_initialize(void) * gives the caller exclusive access to the DMA channel. * * The naming convention in all of the DMA interfaces is that one side is - * the 'peripheral' and the other is 'memory'. Howerver, the interface + * the 'peripheral' and the other is 'memory'. However, the interface * could still be used if, for example, both sides were memory although * the naming would be awkward. * @@ -2301,7 +2301,7 @@ int sam_dmastart(DMA_HANDLE handle, dma_callback_t callback, void *arg) if (xdmach->llhead) { - /* Save the callback info. This will be invoked whent the DMA commpletes */ + /* Save the callback info. This will be invoked whent the DMA completes */ xdmach->callback = callback; xdmach->arg = arg; diff --git a/arch/arm/src/sama5/sama5d2x_pio.c b/arch/arm/src/sama5/sama5d2x_pio.c index 5147eb3eb5d..73c82dc91a0 100644 --- a/arch/arm/src/sama5/sama5d2x_pio.c +++ b/arch/arm/src/sama5/sama5d2x_pio.c @@ -267,7 +267,7 @@ static uint32_t sam_configcommon(pio_pinset_t cfgset) } /* Select I/O drive. - * REVISIT: Does't rive strength apply only to output and peripheral + * REVISIT: Doesn't rive strength apply only to output and peripheral * pins as well? */ diff --git a/arch/arm/src/samd2l2/hardware/samd_dmac.h b/arch/arm/src/samd2l2/hardware/samd_dmac.h index bdf1c363168..6672be858e0 100644 --- a/arch/arm/src/samd2l2/hardware/samd_dmac.h +++ b/arch/arm/src/samd2l2/hardware/samd_dmac.h @@ -332,7 +332,7 @@ trigger */ /* Channel Status Register */ -#define DMAC_CHSTATUS_PEND (1 << 0) /* Bit 0: Chennel pending */ +#define DMAC_CHSTATUS_PEND (1 << 0) /* Bit 0: Channel pending */ #define DMAC_CHSTATUS_BUSY (1 << 1) /* Bit 1: Channel busy */ #define DMAC_CHSTATUS_FERR (1 << 2) /* Bit 2: Channel fetch error */ diff --git a/arch/arm/src/samd2l2/hardware/samd_nvmctrl.h b/arch/arm/src/samd2l2/hardware/samd_nvmctrl.h index 88be8178161..4c76e09fff9 100644 --- a/arch/arm/src/samd2l2/hardware/samd_nvmctrl.h +++ b/arch/arm/src/samd2l2/hardware/samd_nvmctrl.h @@ -143,7 +143,7 @@ # define NVMCTRL_PARAM_PSZ_1KB (7 << NVMCTRL_PARAM_PSZ_SHIFT) /* 1024 bytes */ #ifdef CONFIG_ARCH_FAMILY_SAMD21 -# define NVMCTRL_PARAM_RWWEEP_SHIFT (20) /* Bits 20-31: Read whle write EEPROM emulation area pages */ +# define NVMCTRL_PARAM_RWWEEP_SHIFT (20) /* Bits 20-31: Read while write EEPROM emulation area pages */ # define NVMCTRL_PARAM_RWWEEP_MASK (0xfff << NVMCTRL_PARAM_RWWEEP_SHIFT) #endif diff --git a/arch/arm/src/samd2l2/hardware/saml_dmac.h b/arch/arm/src/samd2l2/hardware/saml_dmac.h index c747b97f532..81b7bb4d15a 100644 --- a/arch/arm/src/samd2l2/hardware/saml_dmac.h +++ b/arch/arm/src/samd2l2/hardware/saml_dmac.h @@ -321,7 +321,7 @@ trigger */ /* Channel Status Register */ -#define DMAC_CHSTATUS_PEND (1 << 0) /* Bit 0: Chennel pending */ +#define DMAC_CHSTATUS_PEND (1 << 0) /* Bit 0: Channel pending */ #define DMAC_CHSTATUS_BUSY (1 << 1) /* Bit 1: Channel busy */ #define DMAC_CHSTATUS_FERR (1 << 2) /* Bit 2: Channel fetch error */ diff --git a/arch/arm/src/samd2l2/hardware/saml_gclk.h b/arch/arm/src/samd2l2/hardware/saml_gclk.h index 384b9280b60..6439a005fc0 100644 --- a/arch/arm/src/samd2l2/hardware/saml_gclk.h +++ b/arch/arm/src/samd2l2/hardware/saml_gclk.h @@ -95,7 +95,7 @@ #define GCLK_GENCTRL_SRC_MASK (31 << GCLK_GENCTRL_SRC_SHIFT) # define GCLK_GENCTRL_SRC_XOSC (0 << GCLK_GENCTRL_SRC_SHIFT) /* XOSC oscillator inpupt */ # define GCLK_GENCTRL_SRC_GCLK_IN (1 << GCLK_GENCTRL_SRC_SHIFT) /* Generator input pad */ -# define GCLK_GENCTRL_SRC_GLCK_GEN1 (2 << GCLK_GENCTRL_SRC_SHIFT) /* Generic clock generater 1 output */ +# define GCLK_GENCTRL_SRC_GLCK_GEN1 (2 << GCLK_GENCTRL_SRC_SHIFT) /* Generic clock generator 1 output */ # define GCLK_GENCTRL_SRC_OSCULP32K (3 << GCLK_GENCTRL_SRC_SHIFT) /* OSCULP32K oscillator output */ # define GCLK_GENCTRL_SRC_OSC32K (4 << GCLK_GENCTRL_SRC_SHIFT) /* OSC32K osccillator output */ # define GCLK_GENCTRL_SRC_XOSC32K (5 << GCLK_GENCTRL_SRC_SHIFT) /* XOSC32K oscillator output */ diff --git a/arch/arm/src/samd2l2/hardware/saml_i2c_slave.h b/arch/arm/src/samd2l2/hardware/saml_i2c_slave.h index 22bf0f6655d..9587b8a26b2 100644 --- a/arch/arm/src/samd2l2/hardware/saml_i2c_slave.h +++ b/arch/arm/src/samd2l2/hardware/saml_i2c_slave.h @@ -144,7 +144,7 @@ #define I2C_CTRLA_SPEED_SHIFT (24) /* Bits 24-25: Trnasfer speed */ #define I2C_CTRLA_SPEED_MASK (3 << I2C_CTRLA_SPEED_SHIFT) # define I2C_CTRLA_SPEED_STD (0 << I2C_CTRLA_SPEED_SHIFT) /* Standard (<=100KHz) fast <=400KHz */ -# define I2C_CTRLA_SPEED_FAST (1 << I2C_CTRLA_SPEED_SHIFT) /* Fast-mode plase (<=1MHz) */ +# define I2C_CTRLA_SPEED_FAST (1 << I2C_CTRLA_SPEED_SHIFT) /* Fast-mode please (<=1MHz) */ # define I2C_CTRLA_SPEED_HIGH (2 << I2C_CTRLA_SPEED_SHIFT) /* High-speed mode (<=3.4Mhz */ #define I2C_CTRLA_SCLSM (1 << 27) /* Bit 27: SCL clock stretch mode */ #define I2C_CTRLA_LOWTOUT (1 << 30) /* Bit 30: SCL Low Time-Out */ @@ -152,7 +152,7 @@ /* Control B register */ #define I2C_CTRLB_SMEN (1 << 8) /* Bit 8: Smart Mode Enable */ -#define I2C_CTRLB_GCMD (1 << 9) /* Bit 9: PMBus group commend */ +#define I2C_CTRLB_GCMD (1 << 9) /* Bit 9: PMBus group command */ #define I2C_CTRLB_AACKEN (1 << 10) /* Bit 10: Automatic acknowledge enable */ #define I2C_CRLB_AMODE_SHIFT (14) /* Bits 14-15: Address Mode */ #define I2C_CRLB_AMODE_MASK (3 << I2C_CRLB_AMODE_SHIFT) diff --git a/arch/arm/src/samd2l2/hardware/saml_oscctrl.h b/arch/arm/src/samd2l2/hardware/saml_oscctrl.h index c37e8d43b05..3b1bfa720ef 100644 --- a/arch/arm/src/samd2l2/hardware/saml_oscctrl.h +++ b/arch/arm/src/samd2l2/hardware/saml_oscctrl.h @@ -280,7 +280,7 @@ /* DPLL synchronization busy */ -#define OSCCTRL_DPLLSYNCBUSY_ENABLE (1 << 1) /* Bit 1: DPLL Enable synchonization status */ +#define OSCCTRL_DPLLSYNCBUSY_ENABLE (1 << 1) /* Bit 1: DPLL Enable synchronization status */ #define OSCCTRL_DPLLSYNCBUSY_DPLLRATIO (1 << 2) /* Bit 2: DPLL Loop divider ration status */ #define OSCCTRL_DPLLSYNCBUSY_DPLLPRESC (1 << 3) /* Bit 3: DPLL prescaler synchronization status */ diff --git a/arch/arm/src/samd2l2/hardware/saml_pm.h b/arch/arm/src/samd2l2/hardware/saml_pm.h index d765e3bb7bb..381668c2c67 100644 --- a/arch/arm/src/samd2l2/hardware/saml_pm.h +++ b/arch/arm/src/samd2l2/hardware/saml_pm.h @@ -61,7 +61,7 @@ #define SAM_PM_INTENCLR_OFFSET 0x0004 /* Interrupt enable clear register */ #define SAM_PM_INTENSET_OFFSET 0x0005 /* Interrupt enable set register */ #define SAM_PM_INTFLAG_OFFSET 0x0006 /* Interrupt flag status and clear register */ -#define SAM_PM_STDBYCFG_OFFSET 0x0008 /* Standy configuration */ +#define SAM_PM_STDBYCFG_OFFSET 0x0008 /* Standby configuration */ /* PM register addresses ****************************************************************************/ @@ -100,7 +100,7 @@ #define PM_INT_PLRDY (1 << 0) /* Bit 0: Performanc level ready */ -/* Standy configuration */ +/* Standby configuration */ #define PM_STDBYCFG_PDCFG_SHIFT (0) /* Bits 0-1: Power domain configuration */ #define PM_STDBYCFG_PDCFG_MASK (3 << PM_STDBYCFG_PDCFG_SHIFT) diff --git a/arch/arm/src/samd2l2/sam_dmac.h b/arch/arm/src/samd2l2/sam_dmac.h index 985a6f94a97..46382cae872 100644 --- a/arch/arm/src/samd2l2/sam_dmac.h +++ b/arch/arm/src/samd2l2/sam_dmac.h @@ -122,7 +122,7 @@ #define DMACH_FLAG_PERIPH_QOS_SHIFT (22) /* Bits 22-23: Peripheral quality of service */ #define DMACH_FLAG_PERIPH_QOS_MASK (3 << DMACH_FLAG_PERIPH_QOS_SHIFT) # define DMACH_FLAG_PERIPH_QOS_DISABLE (0 << DMACH_FLAG_PERIPH_QOS_SHIFT) /* Background */ -# define DMACH_FLAG_PERIPH_QOS_LOW (1 << DMACH_FLAG_PERIPH_QOS_SHIFT) /* Sensitve bandwidth */ +# define DMACH_FLAG_PERIPH_QOS_LOW (1 << DMACH_FLAG_PERIPH_QOS_SHIFT) /* Sensitive bandwidth */ # define DMACH_FLAG_PERIPH_QOS_MEDIUM (2 << DMACH_FLAG_PERIPH_QOS_SHIFT) /* Sensitive latency */ # define DMACH_FLAG_PERIPH_QOS_HIGH (3 << DMACH_FLAG_PERIPH_QOS_SHIFT) /* Critical latency */ @@ -137,7 +137,7 @@ #define DMACH_FLAG_MEM_QOS_SHIFT (25) /* Bits 25-26: Memory quality of service */ #define DMACH_FLAG_MEM_QOS_MASK (3 << DMACH_FLAG_MEM_QOS_SHIFT) # define DMACH_FLAG_MEM_QOS_DISABLE (0 << DMACH_FLAG_MEM_QOS_SHIFT) /* Background */ -# define DMACH_FLAG_MEM_QOS_LOW (1 << DMACH_FLAG_MEM_QOS_SHIFT) /* Sensitve bandwidth */ +# define DMACH_FLAG_MEM_QOS_LOW (1 << DMACH_FLAG_MEM_QOS_SHIFT) /* Sensitive bandwidth */ # define DMACH_FLAG_MEM_QOS_MEDIUM (2 << DMACH_FLAG_MEM_QOS_SHIFT) /* Sensitive latency */ # define DMACH_FLAG_MEM_QOS_HIGH (3 << DMACH_FLAG_MEM_QOS_SHIFT) /* Critical latency */ /* Bits 27-31: Not used */ diff --git a/arch/arm/src/samd2l2/sam_irq.c b/arch/arm/src/samd2l2/sam_irq.c index a922aa08b86..1c02b3e789c 100644 --- a/arch/arm/src/samd2l2/sam_irq.c +++ b/arch/arm/src/samd2l2/sam_irq.c @@ -87,7 +87,7 @@ volatile uint32_t *g_current_regs[1]; * sam_dbgmonitor, sam_pendsv, sam_reserved * * Description: - * Handlers for various execptions. None are handled and all are fatal + * Handlers for various exceptions. None are handled and all are fatal * error conditions. The only advantage these provided over the default * unexpected interrupt handler is that they provide a diagnostic output. * diff --git a/arch/arm/src/samd2l2/sam_spi.c b/arch/arm/src/samd2l2/sam_spi.c index a92975baa14..c2941fb7899 100644 --- a/arch/arm/src/samd2l2/sam_spi.c +++ b/arch/arm/src/samd2l2/sam_spi.c @@ -807,7 +807,7 @@ static int spi_interrupt(int irq, void *context, FAR void *arg) * transfers. The bus should be locked before the chip is selected. After * locking the SPI bus, the caller should then also call the setfrequency, * setbits, and setmode methods to make sure that the SPI is properly - * configured for the device. If the SPI buss is being shared, then it + * configured for the device. If the SPI bus is being shared, then it * may have been left in an incompatible state. * * Input Parameters: diff --git a/arch/arm/src/samd2l2/sam_usb.c b/arch/arm/src/samd2l2/sam_usb.c index 737b0bbce5d..e9e96263cce 100644 --- a/arch/arm/src/samd2l2/sam_usb.c +++ b/arch/arm/src/samd2l2/sam_usb.c @@ -1160,7 +1160,7 @@ static int sam_req_write(struct sam_usbdev_s *priv, struct sam_ep_s *privep) * (2) called with a request packet that has len == 0 * * len == 0 means that it is requested to send a zero length packet - * required by protocoll + * required by protocol */ else if ((privreq->req.len == 0) && !privep->zlpsent) @@ -3316,7 +3316,7 @@ static int sam_usb_interrupt(int irq, void *context, void *arg) regval = sam_getreg16(SAM_USBDEV_INTENSET); pending = isr & regval; - /* Get the set of pending enpoint interrupts */ + /* Get the set of pending endpoint interrupts */ pendingep = sam_getreg16(SAM_USBDEV_EPINTSMRY); @@ -3386,7 +3386,7 @@ static int sam_usb_interrupt(int irq, void *context, void *arg) sam_putreg16(USBDEV_INT_WAKEUP | USBDEV_INT_EORSM | USBDEV_INT_SUSPEND, SAM_USBDEV_INTFLAG); - /* Disable wakup and endofresume Enable suspend interrupt */ + /* Disable wakeup and endofresume Enable suspend interrupt */ sam_putreg16(USBDEV_INT_WAKEUP | USBDEV_INT_EORSM, SAM_USBDEV_INTENCLR); sam_putreg16(USBDEV_INT_SUSPEND, SAM_USBDEV_INTENSET); diff --git a/arch/arm/src/samd5e5/hardware/sam_dmac.h b/arch/arm/src/samd5e5/hardware/sam_dmac.h index 763b0e1c4f7..a1349a6729a 100644 --- a/arch/arm/src/samd5e5/hardware/sam_dmac.h +++ b/arch/arm/src/samd5e5/hardware/sam_dmac.h @@ -70,7 +70,7 @@ # define SAM_DMAC_CHCTRLA_OFFSET 0x0000 /* Channel Control A Register */ # define SAM_DMAC_CHCTRLB_OFFSET 0x0004 /* Channel Control B Register */ # define SAM_DMAC_CHPRILVL_OFFSET 0x0005 /* Channel Priority Level */ -# define SAM_DMAC_CHEVCTRL_OFFSET 0x0006 /* Channel Event Contol Register */ +# define SAM_DMAC_CHEVCTRL_OFFSET 0x0006 /* Channel Event Control Register */ # define SAM_DMAC_CHINTENCLR_OFFSET 0x000c /* Channel Interrupt Enable Clear Register */ # define SAM_DMAC_CHINTENSET_OFFSET 0x000d /* Channel Interrupt Enable Set Register */ # define SAM_DMAC_CHINTFLAG_OFFSET 0x000e /* Channel Interrupt Flag Status and Clear Register */ @@ -406,7 +406,7 @@ /* Channel Status Register */ -#define DMAC_CHSTATUS_PEND (1 << 0) /* Bit 0: Chennel pending */ +#define DMAC_CHSTATUS_PEND (1 << 0) /* Bit 0: Channel pending */ #define DMAC_CHSTATUS_BUSY (1 << 1) /* Bit 1: Channel busy */ #define DMAC_CHSTATUS_FERR (1 << 2) /* Bit 2: Channel fetch error */ #define DMAC_CHSTATUS_CRCERR (1 << 3) /* Bit 3: CRC error */ diff --git a/arch/arm/src/samd5e5/hardware/sam_evsys.h b/arch/arm/src/samd5e5/hardware/sam_evsys.h index ee7f513b1d6..fd7a97fa2f1 100644 --- a/arch/arm/src/samd5e5/hardware/sam_evsys.h +++ b/arch/arm/src/samd5e5/hardware/sam_evsys.h @@ -63,7 +63,7 @@ #define SAM_EVSYS_CHOFFSET(n) (0x0020 + ((n) << 3)) /* Channel registers */ # define SAM_EVSYS_CHANNEL_OFFSET 0x0000 /* Channel control register */ -# define SAM_EVSYS_CHINTENCLR_OFFSET 0x0004 /* Channl interrupt clear register */ +# define SAM_EVSYS_CHINTENCLR_OFFSET 0x0004 /* Channel interrupt clear register */ # define SAM_EVSYS_CHINTENSET_OFFSET 0x0005 /* Channel interrupt enable register */ # define SAM_EVSYS_CHINTFLAG_OFFSET 0x0006 /* Channel interrupt status register */ # define SAM_EVSYS_CHSTATUS_OFFSET 0x0007 /* Channel status register */ diff --git a/arch/arm/src/samd5e5/hardware/sam_fuses.h b/arch/arm/src/samd5e5/hardware/sam_fuses.h index 356c17884cb..9df4e15cb99 100644 --- a/arch/arm/src/samd5e5/hardware/sam_fuses.h +++ b/arch/arm/src/samd5e5/hardware/sam_fuses.h @@ -215,7 +215,7 @@ #define SAM_FUSES_USBTRIM_MASK (7 << SAM_FUSES_USBTRIM_SHIFT) # define SAM_FUSES_USBTRIM(n) ((uint32_t)(n) << SAM_FUSES_USBTRIM_SHIFT) -/* NVM Software Callibration Area -- Temperature Calibration Parameters */ +/* NVM Software Calibration Area -- Temperature Calibration Parameters */ #define SAM_FUSES_TLI_ADDR SAM_NVM_CALIBTEMP0 #define SAM_FUSES_TLI_SHIFT (0) /* Bits 0-7: Integer part temperature TL */ diff --git a/arch/arm/src/samd5e5/hardware/sam_gclk.h b/arch/arm/src/samd5e5/hardware/sam_gclk.h index e1a32fad4db..59209864b59 100644 --- a/arch/arm/src/samd5e5/hardware/sam_gclk.h +++ b/arch/arm/src/samd5e5/hardware/sam_gclk.h @@ -98,7 +98,7 @@ # define GCLK_GENCTRL_SRC_XOSC0 (0 << GCLK_GENCTRL_SRC_SHIFT) /* XOSC 0 oscillator input */ # define GCLK_GENCTRL_SRC_XOSC1 (1 << GCLK_GENCTRL_SRC_SHIFT) /* XOSC 1 oscillator input */ # define GCLK_GENCTRL_SRC_GCLK_IN (2 << GCLK_GENCTRL_SRC_SHIFT) /* Generator input pad */ -# define GCLK_GENCTRL_SRC_GCLK_GEN1 (3 << GCLK_GENCTRL_SRC_SHIFT) /* Generic clock generater 1 output */ +# define GCLK_GENCTRL_SRC_GCLK_GEN1 (3 << GCLK_GENCTRL_SRC_SHIFT) /* Generic clock generator 1 output */ # define GCLK_GENCTRL_SRC_OSCULP32K (4 << GCLK_GENCTRL_SRC_SHIFT) /* OSCULP32K oscillator output */ # define GCLK_GENCTRL_SRC_XOSC32K (5 << GCLK_GENCTRL_SRC_SHIFT) /* XOSC32K oscillator output */ # define GCLK_GENCTRL_SRC_DFLL (6 << GCLK_GENCTRL_SRC_SHIFT) /* DFLL oscillator output */ diff --git a/arch/arm/src/samd5e5/hardware/sam_gmac.h b/arch/arm/src/samd5e5/hardware/sam_gmac.h index 79815edda3f..0bcc1fd55c1 100644 --- a/arch/arm/src/samd5e5/hardware/sam_gmac.h +++ b/arch/arm/src/samd5e5/hardware/sam_gmac.h @@ -895,7 +895,7 @@ /* Screening Type1 Register Priority Queue 0-15 */ -#define GMAC_ST1RPQ0_QNB_SHIFT (0) /* Bits 0-3: Que Number (0->7) */ +#define GMAC_ST1RPQ0_QNB_SHIFT (0) /* Bits 0-3: Queue Number (0->7) */ #define GMAC_ST1RPQ0_QNB_MASK (15 << GMAC_ST1RPQ0_QNB_SHIFT) # define GMAC_ST1RPQ0_QNB(n) ((uint32_t)(n) << GMAC_ST1RPQ0_QNB_SHIFT) #define GMAC_ST1RPQ0_DSTCM_SHIFT (4) /* Bits 4-11: Differentiated Services or Traffic Class Match */ @@ -909,7 +909,7 @@ /* Screening Type2 Register Priority Queue 0-15 */ -#define GMAC_ST2RPQ0_QNB_SHIFT (0) /* Bits 0-3: Que Number (0->7) */ +#define GMAC_ST2RPQ0_QNB_SHIFT (0) /* Bits 0-3: Queue Number (0->7) */ #define GMAC_ST2RPQ0_QNB_MASK (15 << GMAC_ST2RPQ0_QNB_SHIFT) # define GMAC_ST2RPQ0_QNB(n) ((uint32_t)(n) << GMAC_ST2RPQ0_QNB_SHIFT) #define GMAC_ST2RPQ0_VLANP_SHIFT (4) /* Bits 4-7: VLAN Priority */ diff --git a/arch/arm/src/samd5e5/hardware/sam_i2c_slave.h b/arch/arm/src/samd5e5/hardware/sam_i2c_slave.h index 2d968f41df2..c63edea571a 100644 --- a/arch/arm/src/samd5e5/hardware/sam_i2c_slave.h +++ b/arch/arm/src/samd5e5/hardware/sam_i2c_slave.h @@ -183,7 +183,7 @@ #define I2C_CTRLA_SPEED_SHIFT (24) /* Bits 24-25: Trnasfer speed */ #define I2C_CTRLA_SPEED_MASK (3 << I2C_CTRLA_SPEED_SHIFT) # define I2C_CTRLA_SPEED_STD (0 << I2C_CTRLA_SPEED_SHIFT) /* Standard (<=100KHz) fast <=400KHz */ -# define I2C_CTRLA_SPEED_FAST (1 << I2C_CTRLA_SPEED_SHIFT) /* Fast-mode plase (<=1MHz) */ +# define I2C_CTRLA_SPEED_FAST (1 << I2C_CTRLA_SPEED_SHIFT) /* Fast-mode please (<=1MHz) */ # define I2C_CTRLA_SPEED_HIGH (2 << I2C_CTRLA_SPEED_SHIFT) /* High-speed mode (<=3.4Mhz */ #define I2C_CTRLA_SCLSM (1 << 27) /* Bit 27: SCL clock stretch mode */ #define I2C_CTRLA_LOWTOUT (1 << 30) /* Bit 30: SCL Low Time-Out */ @@ -191,7 +191,7 @@ /* Control B register */ #define I2C_CTRLB_SMEN (1 << 8) /* Bit 8: Smart Mode Enable */ -#define I2C_CTRLB_GCMD (1 << 9) /* Bit 9: PMBus group commend */ +#define I2C_CTRLB_GCMD (1 << 9) /* Bit 9: PMBus group command */ #define I2C_CTRLB_AACKEN (1 << 10) /* Bit 10: Automatic acknowledge enable */ #define I2C_CRLB_AMODE_SHIFT (14) /* Bits 14-15: Address Mode */ #define I2C_CRLB_AMODE_MASK (3 << I2C_CRLB_AMODE_SHIFT) diff --git a/arch/arm/src/samd5e5/hardware/sam_pm.h b/arch/arm/src/samd5e5/hardware/sam_pm.h index d1963b47891..c3312a41c43 100644 --- a/arch/arm/src/samd5e5/hardware/sam_pm.h +++ b/arch/arm/src/samd5e5/hardware/sam_pm.h @@ -55,7 +55,7 @@ #define SAM_PM_INTENCLR_OFFSET 0x0004 /* Interrupt enable clear register */ #define SAM_PM_INTENSET_OFFSET 0x0005 /* Interrupt enable set register */ #define SAM_PM_INTFLAG_OFFSET 0x0006 /* Interrupt flag status and clear register */ -#define SAM_PM_STDBYCFG_OFFSET 0x0008 /* Standy configuration */ +#define SAM_PM_STDBYCFG_OFFSET 0x0008 /* Standby configuration */ #define SAM_PM_HIBCFG_OFFSET 0x0009 /* Hibernate configuration */ #define SAM_PM_BKUPCFG_OFFSET 0x000a /* Backup configuration */ @@ -93,7 +93,7 @@ #define PM_INT_SLEEPRDY (1 << 0) /* Bit 0: Sleep mode entry ready interrupt */ -/* Standy configuration */ +/* Standby configuration */ #define PM_STDBYCFG_RAMCFG_SHIFT (0) /* Bits 0-1: RAM Configuration */ #define PM_STDBYCFG_RAMCFG_MASK (3 << PM_STDBYCFG_RAMCFG_SHIFT) diff --git a/arch/arm/src/samd5e5/sam_clockconfig.c b/arch/arm/src/samd5e5/sam_clockconfig.c index 475ffd42399..1ea76634bf3 100644 --- a/arch/arm/src/samd5e5/sam_clockconfig.c +++ b/arch/arm/src/samd5e5/sam_clockconfig.c @@ -456,7 +456,7 @@ static uint32_t sam_xoscctrl(const struct sam_xosc_config_s *config) /* Get the XOSCTCTL register *configuration */ regval = OSCCTRL_XOSCCTRL_IPTAT(ipta) | OSCCTRL_XOSCCTRL_IMULT(imult) | - OSCCTRL_XOSCCTRL_STARTUP(config->starup) | + OSCCTRL_XOSCCTRL_STARTUP(config->startup) | OSCCTRL_XOSCCTRL_CFDPRESC(cfdpresc); if (config->enable) diff --git a/arch/arm/src/samd5e5/sam_gmac.c b/arch/arm/src/samd5e5/sam_gmac.c index 4c7b50698a5..400e8463b56 100644 --- a/arch/arm/src/samd5e5/sam_gmac.c +++ b/arch/arm/src/samd5e5/sam_gmac.c @@ -538,7 +538,7 @@ static uint16_t sam_txfree(struct sam_gmac_s *priv) * * Description: * Allocate aligned TX and RX descriptors and buffers. For the case of - * pre-allocated structures, the function degenerates to a few assignements. + * pre-allocated structures, the function degenerates to a few assignments. * * Input Parameters: * priv - The GMAC driver state @@ -712,7 +712,7 @@ static int sam_transmit(struct sam_gmac_s *priv) return -EBUSY; } - /* Setup/Copy data to transmition buffer */ + /* Setup/Copy data to transmission buffer */ if (dev->d_len > 0) { @@ -2959,7 +2959,7 @@ static int sam_autonegotiate(struct sam_gmac_s *priv) ninfo(" MCR: 0x%X\n", phyval); - /* Wait for autonegotion to complete */ + /* Wait for autonegotiation to complete */ timeout = 0; for (; ; ) diff --git a/arch/arm/src/samd5e5/sam_spi.c b/arch/arm/src/samd5e5/sam_spi.c index ad61eaa3295..4aaca3dbe1a 100644 --- a/arch/arm/src/samd5e5/sam_spi.c +++ b/arch/arm/src/samd5e5/sam_spi.c @@ -902,7 +902,7 @@ static int spi_interrupt(int irq, void *context, FAR void *arg) * transfers. The bus should be locked before the chip is selected. After * locking the SPI bus, the caller should then also call the setfrequency, * setbits, and setmode methods to make sure that the SPI is properly - * configured for the device. If the SPI buss is being shared, then it + * configured for the device. If the SPI bus is being shared, then it * may have been left in an incompatible state. * * Input Parameters: diff --git a/arch/arm/src/samd5e5/sam_usb.c b/arch/arm/src/samd5e5/sam_usb.c index d9d34ccf947..fbda1dfd7bd 100644 --- a/arch/arm/src/samd5e5/sam_usb.c +++ b/arch/arm/src/samd5e5/sam_usb.c @@ -1162,7 +1162,7 @@ static int sam_req_write(struct sam_usbdev_s *priv, struct sam_ep_s *privep) * (2) called with a request packet that has len == 0 * * len == 0 means that it is requested to send a zero length packet - * required by protocoll + * required by protocol */ else if ((privreq->req.len == 0) && !privep->zlpsent) @@ -3314,7 +3314,7 @@ static int sam_usb_interrupt(int irq, void *context, void *arg) regval = sam_getreg16(SAM_USBDEV_INTENSET); pending = isr & regval; - /* Get the set of pending enpoint interrupts */ + /* Get the set of pending endpoint interrupts */ pendingep = sam_getreg16(SAM_USBDEV_EPINTSMRY); @@ -3384,7 +3384,7 @@ static int sam_usb_interrupt(int irq, void *context, void *arg) sam_putreg16(USBDEV_INT_WAKEUP | USBDEV_INT_EORSM | USBDEV_INT_SUSPEND, SAM_USBDEV_INTFLAG); - /* Disable wakup and endofresume Enable suspend interrupt */ + /* Disable wakeup and endofresume Enable suspend interrupt */ sam_putreg16(USBDEV_INT_WAKEUP | USBDEV_INT_EORSM, SAM_USBDEV_INTENCLR); sam_putreg16(USBDEV_INT_SUSPEND, SAM_USBDEV_INTENSET); diff --git a/arch/arm/src/samv7/Kconfig b/arch/arm/src/samv7/Kconfig index 00544c58823..38cd8ad1be9 100644 --- a/arch/arm/src/samv7/Kconfig +++ b/arch/arm/src/samv7/Kconfig @@ -1821,7 +1821,7 @@ config SAMV7_EMAC0_NRXBUFFERS descriptors that will be allocated The selected value must be an even power of 2. - NOTE that the defaut of 16 correspond to a total of only 2Kb of + NOTE that the default of 16 correspond to a total of only 2Kb of RX buffering. That can easily exceeded on a busy network or with large packet MTUs. You will know if this happens because you will see the "Buffer Not Available (BNA)" receive error. diff --git a/arch/arm/src/samv7/hardware/sam_afec.h b/arch/arm/src/samv7/hardware/sam_afec.h index adc0be0514c..62202207254 100644 --- a/arch/arm/src/samv7/hardware/sam_afec.h +++ b/arch/arm/src/samv7/hardware/sam_afec.h @@ -244,8 +244,8 @@ #define AFEC_EMR_SIGNMODE_MASK (3 << AFEC_EMR_SIGNMODE_SHIFT) # define AFEC_EMR_SIGNMODE_SEUNSG (0 << AFEC_EMR_SIGNMODE_SHIFT) /* Single ended channels unsigned */ # define AFEC_EMR_SIGNMODE_DFSIGN (0 << AFEC_EMR_SIGNMODE_SHIFT) /* Differential channels signed */ -# define AFEC_EMR_SIGNMODE_SESIGN (1 << AFEC_EMR_SIGNMODE_SHIFT) /* Singed ended channels signed */ -# define AFEC_EMR_SIGNMODE_DFUNSG (1 << AFEC_EMR_SIGNMODE_SHIFT) /* Differential channels unsiged */ +# define AFEC_EMR_SIGNMODE_SESIGN (1 << AFEC_EMR_SIGNMODE_SHIFT) /* Single ended channels signed */ +# define AFEC_EMR_SIGNMODE_DFUNSG (1 << AFEC_EMR_SIGNMODE_SHIFT) /* Differential channels unsigned */ # define AFEC_EMR_SIGNMODE_UNSIGNED (2 << AFEC_EMR_SIGNMODE_SHIFT) /* All channels unsigned */ # define AFEC_EMR_SIGNMODE_SIGNED (2 << AFEC_EMR_SIGNMODE_SHIFT) /* All channels signed */ diff --git a/arch/arm/src/samv7/hardware/sam_mcan.h b/arch/arm/src/samv7/hardware/sam_mcan.h index a452cc79d5c..e24b717a399 100644 --- a/arch/arm/src/samv7/hardware/sam_mcan.h +++ b/arch/arm/src/samv7/hardware/sam_mcan.h @@ -682,10 +682,10 @@ /* Common */ -#define BUFFER_R0_EXTID_SHIFT (0) /* Bits 0-28: Extended identifer */ +#define BUFFER_R0_EXTID_SHIFT (0) /* Bits 0-28: Extended identifier */ #define BUFFER_R0_EXTID_MASK (0x1fffffff << BUFFER_R0_EXTID_SHIFT) # define BUFFER_R0_EXTID(n) ((uint32_t)(n) << BUFFER_R0_EXTID_SHIFT) -#define BUFFER_R0_STDID_SHIFT (18) /* Bits 18-28: Standard idendifier */ +#define BUFFER_R0_STDID_SHIFT (18) /* Bits 18-28: Standard identifier */ #define BUFFER_R0_STDID_MASK (0x7ff << BUFFER_R0_STDID_SHIFT) # define BUFFER_R0_STDID(n) ((uint32_t)(n) << BUFFER_R0_STDID_SHIFT) #define BUFFER_R0_RTR (1 << 29) /* Bit 29: Remote Transmission Request */ diff --git a/arch/arm/src/samv7/hardware/sam_uart.h b/arch/arm/src/samv7/hardware/sam_uart.h index 7d531c2ae3f..059474956ab 100644 --- a/arch/arm/src/samv7/hardware/sam_uart.h +++ b/arch/arm/src/samv7/hardware/sam_uart.h @@ -82,7 +82,7 @@ #define SAM_UART_LONPRIO_OFFSET 0x007c /* LON Priority Register (USART only) */ #define SAM_UART_IDTTX_OFFSET 0x0080 /* LON IDT Tx Register (USART only) */ #define SAM_UART_IDTRX_OFFSET 0x0084 /* LON IDT Rx Register (USART only) */ -#define SAM_UART_ICDIFF_OFFSET 0x0088 /* IC DIFF Registe (USART only) */ +#define SAM_UART_ICDIFF_OFFSET 0x0088 /* IC DIFF Register (USART only) */ /* 0x008c-0x00e0: Reserved (USART) */ #define SAM_UART_WPMR_OFFSET 0x00e4 /* Write Protect Mode Register (common) */ #define SAM_UART_WPSR_OFFSET 0x00e8 /* Write Protect Status Register (USART only) */ @@ -541,7 +541,7 @@ #define UART_IDTRX_MASK 0x00ffffff /* Bits 0-23: LON Indeterminate Time after Reception */ -/* IC DIFF Registe (USART only) */ +/* IC DIFF Register (USART only) */ #define UART_ICDIFF_MASK 0x0000000f /* Bit 0-3: IC Differentiator Number */ diff --git a/arch/arm/src/samv7/sam_emac.c b/arch/arm/src/samv7/sam_emac.c index 112bba8c3dd..4e21a1584a5 100644 --- a/arch/arm/src/samv7/sam_emac.c +++ b/arch/arm/src/samv7/sam_emac.c @@ -3843,7 +3843,7 @@ static int sam_autonegotiate(struct sam_emac_s *priv) regval |= EMAC_NCR_MPE; sam_putreg(priv, SAM_EMAC_NCR_OFFSET, regval); - /* Verify tht we can read the PHYID register */ + /* Verify that we can read the PHYID register */ ret = sam_phyread(priv, priv->phyaddr, MII_PHYID1, &phyid1); if (ret < 0) diff --git a/arch/arm/src/samv7/sam_gpio.c b/arch/arm/src/samv7/sam_gpio.c index 342db5ba587..b8a0ffaaafa 100644 --- a/arch/arm/src/samv7/sam_gpio.c +++ b/arch/arm/src/samv7/sam_gpio.c @@ -291,7 +291,7 @@ static inline int sam_configoutput(uintptr_t base, uint32_t pin, } #endif - /* Enable the open drain driver if requrested */ + /* Enable the open drain driver if requested */ if ((cfgset & GPIO_CFG_OPENDRAIN) != 0) { @@ -474,7 +474,7 @@ static inline int sam_configperiph(uintptr_t base, uint32_t pin, * * Assumptions: * This function is called early in the initialization sequence so that - * no mutual exlusion is necessary. + * no mutual exclusion is necessary. * ****************************************************************************/ diff --git a/arch/arm/src/samv7/sam_hsmci.c b/arch/arm/src/samv7/sam_hsmci.c index e653711d339..f75ba5c15c7 100644 --- a/arch/arm/src/samv7/sam_hsmci.c +++ b/arch/arm/src/samv7/sam_hsmci.c @@ -828,7 +828,7 @@ static void sam_disablexfrints(struct sam_dev_s *priv) * Name: sam_enableints * * Description: - * Enable the previously configured HSMCI interrupts needed to suport the + * Enable the previously configured HSMCI interrupts needed to support the * wait and transfer functions. * * Input Parameters: @@ -3099,7 +3099,7 @@ static int sam_dmasendsetup(FAR struct sdio_dev_s *dev, sam_dmastart(priv->dma, sam_dmacallback, priv); /* Configure transfer-related interrupts. Transfer interrupts are not - * enabled until after the transfer is stard with an SD command (i.e., + * enabled until after the transfer is start with an SD command (i.e., * at the beginning of sam_eventwait(). */ diff --git a/arch/arm/src/samv7/sam_mcan.c b/arch/arm/src/samv7/sam_mcan.c index 99d6a5a394a..b79bef24320 100644 --- a/arch/arm/src/samv7/sam_mcan.c +++ b/arch/arm/src/samv7/sam_mcan.c @@ -3477,7 +3477,7 @@ static int mcan_interrupt(int irq, void *context, FAR void *arg) canerr("ERROR: RX %08x\n", pending & MCAN_RXERR_INTS); /* To prevent Interrupt-Flooding the current active - * RX error interupts are disabled. After successfully + * RX error interrupts are disabled. After successfully * receiving at least one CAN packet all RX error interrupts * are turned back on. * diff --git a/arch/arm/src/samv7/sam_oneshot_lowerhalf.c b/arch/arm/src/samv7/sam_oneshot_lowerhalf.c index 04014fe741f..b4dbcf64017 100644 --- a/arch/arm/src/samv7/sam_oneshot_lowerhalf.c +++ b/arch/arm/src/samv7/sam_oneshot_lowerhalf.c @@ -159,7 +159,7 @@ static void sam_oneshot_handler(void *arg) * lower An instance of the lower-half oneshot state structure. This * structure must have been previously initialized via a call to * oneshot_initialize(); - * ts The location in which to return the maxumum delay. + * ts The location in which to return the maximum delay. * * Returned Value: * Zero (OK) is returned on success; a negated errno value is returned diff --git a/arch/arm/src/samv7/sam_pck.c b/arch/arm/src/samv7/sam_pck.c index 9b467bc9e4a..fe3d78629b5 100644 --- a/arch/arm/src/samv7/sam_pck.c +++ b/arch/arm/src/samv7/sam_pck.c @@ -132,7 +132,7 @@ uint32_t sam_pck_configure(enum pckid_e pckid, enum pckid_clksrc_e clksrc, return 0; } - /* Programmable Clock frequency is selected clock freqency divided by PRES + 1 */ + /* Programmable Clock frequency is selected clock frequency divided by PRES + 1 */ pres = clkin / frequency; if (pres < 1) diff --git a/arch/arm/src/samv7/sam_progmem.c b/arch/arm/src/samv7/sam_progmem.c index 3705db4e16b..c26401bd220 100644 --- a/arch/arm/src/samv7/sam_progmem.c +++ b/arch/arm/src/samv7/sam_progmem.c @@ -398,10 +398,10 @@ ssize_t up_progmem_eraseblock(size_t cluster) #elif SAMV7_PAGE_PER_CLUSTER == 16 arg = page | 2; #elif SAMV7_PAGE_PER_CLUSTER == 8 -# error Cluster size of 8 not suportted +# error Cluster size of 8 not supported arg = page | 1; /* Only valid for small 8 KB sectors */ #elif SAMV7_PAGE_PER_CLUSTER == 4 -# error Cluster size of 4 not suportted +# error Cluster size of 4 not supported arg = page | 0; /* Only valid for small 8 KB sectors */ #else # error Unsupported/undefined pages-per-cluster size diff --git a/arch/arm/src/samv7/sam_qspi.c b/arch/arm/src/samv7/sam_qspi.c index 2c448ec3ea6..68191907533 100644 --- a/arch/arm/src/samv7/sam_qspi.c +++ b/arch/arm/src/samv7/sam_qspi.c @@ -1503,7 +1503,7 @@ static int qspi_command(struct qspi_dev_s *dev, MEMORY_SYNC(); /* If the insruction frame does not include data, writing to the IFR - * tiggers sending of the instruction frame. Fall through to INSTRE + * triggers sending of the instruction frame. Fall through to INSTRE * wait. */ } @@ -1575,7 +1575,7 @@ static int qspi_memory(struct qspi_dev_s *dev, * buflen - Buffer length to allocate in bytes * * Returned Value: - * Address of tha allocated memory on success; NULL is returned on any + * Address of the allocated memory on success; NULL is returned on any * failure. * ****************************************************************************/ diff --git a/arch/arm/src/samv7/sam_rswdt.c b/arch/arm/src/samv7/sam_rswdt.c index c1d849e9fc0..f104635922c 100644 --- a/arch/arm/src/samv7/sam_rswdt.c +++ b/arch/arm/src/samv7/sam_rswdt.c @@ -117,7 +117,7 @@ static void sam_putreg(uint32_t regval, uintptr_t regaddr); # define sam_putreg(regval,regaddr) putreg32(regval,regaddr) #endif -/* Interrupt hanlding *******************************************************/ +/* Interrupt handling *******************************************************/ #ifdef CONFIG_SAMV7_RSWDT_INTERRUPT static int sam_interrupt(int irq, FAR void *context, FAR void *arg); @@ -180,7 +180,7 @@ static uint32_t sam_getreg(uintptr_t regaddr) uint32_t regval = getreg32(regaddr); - /* Is this the same value that we read from the same registe last time? Are + /* Is this the same value that we read from the same register last time? Are * we polling the register? If so, suppress some of the output. */ @@ -359,7 +359,7 @@ static int sam_keepalive(FAR struct watchdog_lowerhalf_s *lower) { wdinfo("Entry\n"); - /* Write RSWDT_CR_WDRSTT to the RSWDT CR regiser (along with the KEY value) + /* Write RSWDT_CR_WDRSTT to the RSWDT CR register (along with the KEY value) * will restart the watchdog timer. */ @@ -459,7 +459,7 @@ static int sam_settimeout(FAR struct watchdog_lowerhalf_s *lower, return -ERANGE; } - /* Calculate the reload value to achiee this (appoximate) timeout. + /* Calculate the reload value to achiee this (approximate) timeout. * * Examples with RSWDT_FREQUENCY = 32768 / 128 = 256: * timeout = 4 -> reload = 1 @@ -487,7 +487,7 @@ static int sam_settimeout(FAR struct watchdog_lowerhalf_s *lower, priv->reload = reload; - wdinfo("reload=%d timout: %d->%d\n", + wdinfo("reload=%d timeout: %d->%d\n", reload, timeout, priv->timeout); /* Set the RSWDT_MR according to calculated value diff --git a/arch/arm/src/samv7/sam_spi.c b/arch/arm/src/samv7/sam_spi.c index 3a8ceab9572..25f5c57fbf7 100644 --- a/arch/arm/src/samv7/sam_spi.c +++ b/arch/arm/src/samv7/sam_spi.c @@ -1443,7 +1443,7 @@ static uint16_t spi_send(struct spi_dev_s *dev, uint16_t wd) * that performs DMA SPI transfers, but only when a larger block of * data is being transferred. And (2) another version that does polled * SPI transfers. When CONFIG_SAMV7_SPI_DMA=n the latter is the only - * version avaialable; when CONFIG_SAMV7_SPI_DMA=y, this version is only + * version available; when CONFIG_SAMV7_SPI_DMA=y, this version is only * used for short SPI transfers and gets renamed as spi_exchange_nodma). * * Input Parameters: diff --git a/arch/arm/src/samv7/sam_spi_slave.c b/arch/arm/src/samv7/sam_spi_slave.c index 6b53aef14ba..b4780edd0ed 100644 --- a/arch/arm/src/samv7/sam_spi_slave.c +++ b/arch/arm/src/samv7/sam_spi_slave.c @@ -409,7 +409,7 @@ static int spi_interrupt(int irq, void *context, FAR void *arg) return OK; } - /* TThe SPI waits until NSS goes active before receiving the serial + /* The SPI waits until NSS goes active before receiving the serial * clock from an external master. When NSS falls, the clock is * validated and the data is loaded in the SPI_RDR depending on the * BITS field configured in the SPI_CSR0. These bits are processed @@ -564,7 +564,7 @@ static uint16_t spi_dequeue(struct sam_spidev_s *priv) if (priv->head != priv->tail) { - /* No, take the oldest value from the tail of the cicular buffer */ + /* No, take the oldest value from the tail of the circular buffer */ ret = priv->outq[priv->tail]; diff --git a/arch/arm/src/samv7/sam_ssc.c b/arch/arm/src/samv7/sam_ssc.c index 4afb6340270..2e7a1fc2f37 100644 --- a/arch/arm/src/samv7/sam_ssc.c +++ b/arch/arm/src/samv7/sam_ssc.c @@ -2209,7 +2209,7 @@ static int ssc_receive(struct i2s_dev_s *dev, struct ap_buffer_s *apb, sq_addlast((sq_entry_t *)bfcontainer, &priv->rx.pend); ssc_dump_rxqueues(priv, "Receiving"); - /* Then start the next transfer. If there is already a transfer in progess, + /* Then start the next transfer. If there is already a transfer in progress, * then this will do nothing. */ @@ -2303,7 +2303,7 @@ static uint32_t ssc_txdatawidth(struct i2s_dev_s *dev, int bits) return 0; } - /* Upate the DMA flags */ + /* Update the DMA flags */ ret = ssc_dma_flags(priv, &dmaflags); if (ret < 0) @@ -2426,7 +2426,7 @@ static int ssc_send(struct i2s_dev_s *dev, struct ap_buffer_s *apb, sq_addlast((sq_entry_t *)bfcontainer, &priv->tx.pend); ssc_dump_txqueues(priv, "Transmitting"); - /* Then start the next transfer. If there is already a transfer in progess, + /* Then start the next transfer. If there is already a transfer in progress, * then this will do nothing. */ @@ -2542,7 +2542,7 @@ static int ssc_rx_configure(struct sam_ssc_s *priv) /* RFMR settings. Some of these settings will need to be configurable as well. * Currently hardcoded to: * - * SSC_RFMR_DATLEN(n) 'n' deterimined by configuration + * SSC_RFMR_DATLEN(n) 'n' determined by configuration * SSC_RFMR_LOOP Determined by configuration * SSC_RFMR_MSBF Most significant bit first * SSC_RFMR_DATNB(n) Data number 'n' per frame (hard-coded) diff --git a/arch/arm/src/samv7/sam_start.c b/arch/arm/src/samv7/sam_start.c index a1e111a368d..71f240a5e1e 100644 --- a/arch/arm/src/samv7/sam_start.c +++ b/arch/arm/src/samv7/sam_start.c @@ -372,7 +372,7 @@ void __start(void) /* For the case of the separate user-/kernel-space build, perform whatever * platform specific initialization of the user memory is required. * Normally this just means initializing the user space .data and .bss - * segements. + * segments. */ #ifdef CONFIG_BUILD_PROTECTED diff --git a/arch/arm/src/samv7/sam_tc.c b/arch/arm/src/samv7/sam_tc.c index b153d52c05a..6256515cca8 100644 --- a/arch/arm/src/samv7/sam_tc.c +++ b/arch/arm/src/samv7/sam_tc.c @@ -663,7 +663,7 @@ static void sam_regdump(struct sam_chan_s *chan, const char *msg) * Input Parameters: * tc - The timer/counter peripheral state * wr - True:write access false:read access - * regval - The regiser value associated with the access + * regval - The register value associated with the access * regaddr - The address of the register being accessed * * Returned Value: @@ -1026,7 +1026,7 @@ static inline uint32_t sam_tc_tcclks_lookup(int ndx) * Input Parameters: * frequency Desired timer frequency. * tcclks TCCLKS field value for divisor. - * actual The actual freqency of the MCK + * actual The actual frequency of the MCK * * Returned Value: * Zero (OK) if a proper divisor has been found, otherwise a negated errno @@ -1648,7 +1648,7 @@ uint32_t sam_tc_divfreq(TC_HANDLE handle) * Input Parameters: * frequency Desired timer frequency. * tcclks TCCLKS field value for divisor. - * actual The actual freqency of the MCK + * actual The actual frequency of the MCK * * Returned Value: * Zero (OK) if a proper divisor has been found, otherwise a negated errno diff --git a/arch/arm/src/samv7/sam_tc.h b/arch/arm/src/samv7/sam_tc.h index a2937cc925f..15b2c881aa7 100644 --- a/arch/arm/src/samv7/sam_tc.h +++ b/arch/arm/src/samv7/sam_tc.h @@ -332,7 +332,7 @@ uint32_t sam_tc_divfreq(TC_HANDLE handle); * Input Parameters: * frequency Desired timer frequency. * tcclks TCCLKS field value for divisor. - * actual The actual freqency of the MCK + * actual The actual frequency of the MCK * * Returned Value: * Zero (OK) if a proper divisor has been found, otherwise a negated errno diff --git a/arch/arm/src/samv7/sam_trng.c b/arch/arm/src/samv7/sam_trng.c index a9b5ddb6c3a..246332a8f75 100644 --- a/arch/arm/src/samv7/sam_trng.c +++ b/arch/arm/src/samv7/sam_trng.c @@ -144,7 +144,7 @@ static int sam_interrupt(int irq, void *context, FAR void *arg) odata = getreg32(SAM_TRNG_ODATA); /* Verify that sample data is available (DATARDY is cleared when the - * interrupt status regiser is read) + * interrupt status register is read) */ if ((getreg32(SAM_TRNG_ISR) & TRNG_INT_DATRDY) == 0) @@ -198,7 +198,7 @@ static int sam_interrupt(int irq, void *context, FAR void *arg) g_trngdev.first = false; } - /* Yes.. the first sample has been dicarded */ + /* Yes.. the first sample has been discarded */ else { diff --git a/arch/arm/src/samv7/sam_twihs.c b/arch/arm/src/samv7/sam_twihs.c index 2f29df7c1a4..a2df6493ff3 100644 --- a/arch/arm/src/samv7/sam_twihs.c +++ b/arch/arm/src/samv7/sam_twihs.c @@ -623,7 +623,7 @@ static int twi_interrupt(int irq, FAR void *context, FAR void *arg) if (priv->msgc <= 1 || (next->flags & I2C_M_NOSTART) == 0) { /* This is the last message OR a restart is required before - * the next mesage. Send the stop signal. + * the next message. Send the stop signal. */ twi_putrel(priv, SAM_TWIHS_CR_OFFSET, TWIHS_CR_STOP); diff --git a/arch/arm/src/samv7/sam_usbdevhs.c b/arch/arm/src/samv7/sam_usbdevhs.c index 4160b7a74d3..d25c5086ede 100644 --- a/arch/arm/src/samv7/sam_usbdevhs.c +++ b/arch/arm/src/samv7/sam_usbdevhs.c @@ -1036,7 +1036,7 @@ static void sam_dma_wrsetup(struct sam_usbdev_s *priv, struct sam_ep_s *privep, { privreq->inflight = remaining; - /* If the size is an exact multple of full packets, then note if + /* If the size is an exact multiple of full packets, then note if * we need to send a zero length packet next. */ @@ -1216,7 +1216,7 @@ static void sam_req_complete(struct sam_ep_s *privep, int16_t result) * * At least the USB class CDC/ACM calls the function sam_ep_submit within * the callback. This function uses sam_req_write or sam_req_read to process - * the request, both functions can change the state. Therefore it is verry + * the request, both functions can change the state. Therefore it is very * important to set the state to USBHS_EPSTATE_IDLE before the callback is * called. */ @@ -1702,7 +1702,7 @@ static int sam_req_read(struct sam_usbdev_s *priv, struct sam_ep_s *privep, } /* No DMA for this endpoint and we have an available, empty read - * request. We need to wait for data to become avaialable. + * request. We need to wait for data to become available. */ else @@ -2603,7 +2603,7 @@ static void sam_dma_interrupt(struct sam_usbdev_s *priv, int epno) } /* Check for end of channel transfer. END_TR_ST is set by hardware when - * the last packet transfer is complete iff END_TR_EN is set in the + * the last packet transfer is complete if END_TR_EN is set in the * DMACONTROL register. The request is complete. * * "Used for OUT transfers only. diff --git a/arch/arm/src/samv7/sam_wdt.c b/arch/arm/src/samv7/sam_wdt.c index cc5330fb6d5..842005967f1 100644 --- a/arch/arm/src/samv7/sam_wdt.c +++ b/arch/arm/src/samv7/sam_wdt.c @@ -117,7 +117,7 @@ static void sam_putreg(uint32_t regval, uintptr_t regaddr); # define sam_putreg(regval,regaddr) putreg32(regval,regaddr) #endif -/* Interrupt hanlding *******************************************************/ +/* Interrupt handling *******************************************************/ #ifdef CONFIG_SAMV7_WDT_INTERRUPT static int sam_interrupt(int irq, FAR void *context, FAR void *arg); @@ -180,7 +180,7 @@ static uint32_t sam_getreg(uintptr_t regaddr) uint32_t regval = getreg32(regaddr); - /* Is this the same value that we read from the same registe last time? Are + /* Is this the same value that we read from the same register last time? Are * we polling the register? If so, suppress some of the output. */ @@ -359,7 +359,7 @@ static int sam_keepalive(FAR struct watchdog_lowerhalf_s *lower) { wdinfo("Entry\n"); - /* Write WDT_CR_WDRSTT to the WDT CR regiser (along with the KEY value) + /* Write WDT_CR_WDRSTT to the WDT CR register (along with the KEY value) * will restart the watchdog timer. */ @@ -459,7 +459,7 @@ static int sam_settimeout(FAR struct watchdog_lowerhalf_s *lower, return -ERANGE; } - /* Calculate the reload value to achiee this (appoximate) timeout. + /* Calculate the reload value to achiee this (approximate) timeout. * * Examples with WDT_FREQUENCY = 32768 / 128 = 256: * timeout = 4 -> reload = 1 @@ -487,7 +487,7 @@ static int sam_settimeout(FAR struct watchdog_lowerhalf_s *lower, priv->reload = reload; - wdinfo("reload=%d timout: %d->%d\n", + wdinfo("reload=%d timeout: %d->%d\n", reload, timeout, priv->timeout); /* Set the WDT_MR according to calculated value @@ -497,7 +497,7 @@ static int sam_settimeout(FAR struct watchdog_lowerhalf_s *lower, * timer with the newly programmed mode parameters. * * NOTE: The WDD Value is the lower bound of a so called Forbidden Window - * (see Datasheet for further Informations). To disable this Forbidden + * (see Datasheet for further Information). To disable this Forbidden * Window we have to set the WDD Value greater than or equal to WDV * (according the Datasheet). * @@ -506,7 +506,7 @@ static int sam_settimeout(FAR struct watchdog_lowerhalf_s *lower, * configuration and the first reset) of the watchdog. * * On fast systems this can lead to a direct hit of the WDD boundary and - * thus to a reset of the system. This is why we program the WDD Value toi + * thus to a reset of the system. This is why we program the WDD Value to * WDT_MR_WDD_MAX to truly disable this Forbidden Window Feature. */ diff --git a/arch/arm/src/samv7/sam_xdmac.c b/arch/arm/src/samv7/sam_xdmac.c index 79bb30090a9..65537cb103d 100644 --- a/arch/arm/src/samv7/sam_xdmac.c +++ b/arch/arm/src/samv7/sam_xdmac.c @@ -1620,7 +1620,7 @@ void weak_function up_dma_initialize(void) * gives the caller exclusive access to the DMA channel. * * The naming convention in all of the DMA interfaces is that one side is - * the 'peripheral' and the other is 'memory'. Howerver, the interface + * the 'peripheral' and the other is 'memory'. However, the interface * could still be used if, for example, both sides were memory although * the naming would be awkward. * diff --git a/arch/arm/src/stm32/Kconfig b/arch/arm/src/stm32/Kconfig index 1190bb0f192..4b5be6ec96b 100644 --- a/arch/arm/src/stm32/Kconfig +++ b/arch/arm/src/stm32/Kconfig @@ -8738,7 +8738,7 @@ config STM32_HCIUART_RXDMAPRIO default 0x00010000 if !STM32_STM32F10XX depends on STM32_HCIUART_RXDMA ---help--- - Select HCI UART DMA prority. + Select HCI UART DMA priority. For STM32 F1 family, options are: 0x00000000 low, 0x00001000 medium, 0x00002000 high, 0x00003000 very high. Default: medium. @@ -9011,7 +9011,7 @@ config STM32_SDIO_DMAPRIO default 0x00001000 if STM32_STM32F10XX default 0x00010000 if !STM32_STM32F10XX ---help--- - Select SDIO DMA prority. + Select SDIO DMA priority. For STM32 F1 family, options are: 0x00000000 low, 0x00001000 medium, 0x00002000 high, 0x00003000 very high. Default: medium. diff --git a/arch/arm/src/stm32/hardware/stm32_dbgmcu.h b/arch/arm/src/stm32/hardware/stm32_dbgmcu.h index 68e8b627cb7..0a50dc02333 100644 --- a/arch/arm/src/stm32/hardware/stm32_dbgmcu.h +++ b/arch/arm/src/stm32/hardware/stm32_dbgmcu.h @@ -75,7 +75,7 @@ #define DBGMCU_CR_STANDBY (1 << 2) /* Bit 2: Debug Standby mode */ #define DBGMCU_CR_TRACEIOEN (1 << 5) /* Bit 5: Trace enabled */ -#define DBGMCU_CR_TRACEMODE_SHIFT (6) /* Bits 7-6: Trace mode pin assignement */ +#define DBGMCU_CR_TRACEMODE_SHIFT (6) /* Bits 7-6: Trace mode pin assignment */ #define DBGMCU_CR_TRACEMODE_MASK (3 << DBGMCU_CR_TRACEMODE_SHIFT) # define DBGMCU_CR_ASYNCH (0 << DBGMCU_CR_TRACEMODE_SHIFT) /* Asynchronous Mode */ # define DBGMCU_CR_SYNCH1 (1 << DBGMCU_CR_TRACEMODE_SHIFT) /* Synchronous Mode, TRACEDATA size=1 */ diff --git a/arch/arm/src/stm32/hardware/stm32_dma_v2.h b/arch/arm/src/stm32/hardware/stm32_dma_v2.h index f9b38addb7b..4ad371e47b7 100644 --- a/arch/arm/src/stm32/hardware/stm32_dma_v2.h +++ b/arch/arm/src/stm32/hardware/stm32_dma_v2.h @@ -285,7 +285,7 @@ #define DMA_STREAM_HTIF_BIT (1 << 4) /* Bit 4: Stream Half Transfer flag */ #define DMA_STREAM_TCIF_BIT (1 << 5) /* Bit 5: Stream Transfer Complete flag */ -/* DMA interrupt status register and interrupt flag clear register field defintions */ +/* DMA interrupt status register and interrupt flag clear register field definitions */ #define DMA_INT_STREAM0_SHIFT (0) /* Bits 0-5: DMA Stream 0 interrupt */ #define DMA_INT_STREAM0_MASK (DMA_STREAM_MASK << DMA_INT_STREAM0_SHIFT) diff --git a/arch/arm/src/stm32/hardware/stm32_otghs.h b/arch/arm/src/stm32/hardware/stm32_otghs.h index 67431405035..77a80de7a76 100644 --- a/arch/arm/src/stm32/hardware/stm32_otghs.h +++ b/arch/arm/src/stm32/hardware/stm32_otghs.h @@ -979,7 +979,7 @@ #define OTGHS_DOEPCTL_MPSIZ_MASK (0x7ff << OTGHS_DOEPCTL_MPSIZ_SHIFT) /* Bits 11-14: Reserved, must be kept at reset value */ #define OTGHS_DOEPCTL_USBAEP (1 << 15) /* Bit 15: USB active endpoint */ -#define OTGHS_DOEPCTL_DPID (1 << 16) /* Bit 16: Endpoint data PID (interrupt/buld) */ +#define OTGHS_DOEPCTL_DPID (1 << 16) /* Bit 16: Endpoint data PID (interrupt/bulk) */ # define OTGHS_DOEPCTL_DATA0 (0) # define OTGHS_DOEPCTL_DATA1 OTGHS_DOEPCTL_DPID #define OTGHS_DOEPCTL_EONUM (1 << 16) /* Bit 16: Even/odd frame (isochronous) */ diff --git a/arch/arm/src/stm32/hardware/stm32_tim.h b/arch/arm/src/stm32/hardware/stm32_tim.h index 458357adc78..0786c58b490 100644 --- a/arch/arm/src/stm32/hardware/stm32_tim.h +++ b/arch/arm/src/stm32/hardware/stm32_tim.h @@ -32,7 +32,7 @@ * POSSIBILITY OF SUCH DAMAGE. * * This the lower half driver for PWM and the STM32 F1 to F4 family MCUs - * Athough this driver does make the difference between 16/32-bit timers, + * Although this driver does make the difference between 16/32-bit timers, * it does manage all of them as 16-bit. This will have to be improved. * ****************************************************************************************************/ diff --git a/arch/arm/src/stm32/hardware/stm32f20xxx_pinmap.h b/arch/arm/src/stm32/hardware/stm32f20xxx_pinmap.h index 0b725a904d4..e0e61b80f00 100644 --- a/arch/arm/src/stm32/hardware/stm32f20xxx_pinmap.h +++ b/arch/arm/src/stm32/hardware/stm32f20xxx_pinmap.h @@ -55,7 +55,7 @@ * Drivers, however, will use the pin selection without the numeric suffix. * Additional definitions are required in the board.h file. For example, if * CAN1_RX connects vis PA11 on some board, then the following definitions should - * appear inthe board.h header file for that board: + * appear in the board.h header file for that board: * * #define GPIO_CAN1_RX GPIO_CAN1_RX_1 * diff --git a/arch/arm/src/stm32/hardware/stm32f30xxx_pinmap.h b/arch/arm/src/stm32/hardware/stm32f30xxx_pinmap.h index 3adcfdd49c0..aca2a279189 100644 --- a/arch/arm/src/stm32/hardware/stm32f30xxx_pinmap.h +++ b/arch/arm/src/stm32/hardware/stm32f30xxx_pinmap.h @@ -57,7 +57,7 @@ * Drivers, however, will use the pin selection without the numeric suffix. * Additional definitions are required in the board.h file. For example, if * CAN1_RX connects vis PA11 on some board, then the following definitions should - * appear inthe board.h header file for that board: + * appear in the board.h header file for that board: * * #define GPIO_CAN1_RX GPIO_CAN1_RX_1 * diff --git a/arch/arm/src/stm32/hardware/stm32f33xxx_hrtim.h b/arch/arm/src/stm32/hardware/stm32f33xxx_hrtim.h index 7902e3eeb6a..a642d4e7d5e 100644 --- a/arch/arm/src/stm32/hardware/stm32f33xxx_hrtim.h +++ b/arch/arm/src/stm32/hardware/stm32f33xxx_hrtim.h @@ -1051,7 +1051,7 @@ #define HRTIM_CR1_TEUDIS (1 << 5) /* Bit 5: Timer E Update Disable */ #define HRTIM_CR1_AD1USRC_SHIFT 16 /* Bits 16-18: ADC Trigger 1 Update Source */ #define HRTIM_CR1_AD1USRC_MASK (7 << HRTIM_CR1_AD1USRC_SHIFT) -# define HRTIM_CR1_AD1USRC_MT (0 << HRTIM_CR1_AD1USRC_SHIFT) /* 000: Mater Timer */ +# define HRTIM_CR1_AD1USRC_MT (0 << HRTIM_CR1_AD1USRC_SHIFT) /* 000: Master Timer */ # define HRTIM_CR1_AD1USRC_TA (1 << HRTIM_CR1_AD1USRC_SHIFT) /* 001: Timer A */ # define HRTIM_CR1_AD1USRC_TB (2 << HRTIM_CR1_AD1USRC_SHIFT) /* 010: Timer B */ # define HRTIM_CR1_AD1USRC_TC (3 << HRTIM_CR1_AD1USRC_SHIFT) /* 011: Timer C */ @@ -1059,7 +1059,7 @@ # define HRTIM_CR1_AD1USRC_TE (5 << HRTIM_CR1_AD1USRC_SHIFT) /* 101: Timer A */ #define HRTIM_CR1_AD2USRC_SHIFT 19 /* Bits 19-21: ADC Trigger 2 Update Source */ #define HRTIM_CR1_AD2USRC_MASK (7 << HRTIM_CR1_AD2USRC_SHIFT) -# define HRTIM_CR1_AD2USRC_MT (0 << HRTIM_CR1_AD2USRC_SHIFT) /* 000: Mater Timer */ +# define HRTIM_CR1_AD2USRC_MT (0 << HRTIM_CR1_AD2USRC_SHIFT) /* 000: Master Timer */ # define HRTIM_CR1_AD2USRC_TA (1 << HRTIM_CR1_AD2USRC_SHIFT) /* 001: Timer A */ # define HRTIM_CR1_AD2USRC_TB (2 << HRTIM_CR1_AD2USRC_SHIFT) /* 010: Timer B */ # define HRTIM_CR1_AD2USRC_TC (3 << HRTIM_CR1_AD2USRC_SHIFT) /* 011: Timer C */ @@ -1067,7 +1067,7 @@ # define HRTIM_CR1_AD2USRC_TE (5 << HRTIM_CR1_AD2USRC_SHIFT) /* 101: Timer A */ #define HRTIM_CR1_AD3USRC_SHIFT 22 /* Bits 22-24: ADC Trigger 3 Update Source */ #define HRTIM_CR1_AD3USRC_MASK (7 << HRTIM_CR1_AD3USRC_SHIFT) -# define HRTIM_CR1_AD3USRC_MT (0 << HRTIM_CR1_AD3USRC_SHIFT) /* 000: Mater Timer */ +# define HRTIM_CR1_AD3USRC_MT (0 << HRTIM_CR1_AD3USRC_SHIFT) /* 000: Master Timer */ # define HRTIM_CR1_AD3USRC_TA (1 << HRTIM_CR1_AD3USRC_SHIFT) /* 001: Timer A */ # define HRTIM_CR1_AD3USRC_TB (2 << HRTIM_CR1_AD3USRC_SHIFT) /* 010: Timer B */ # define HRTIM_CR1_AD3USRC_TC (3 << HRTIM_CR1_AD3USRC_SHIFT) /* 011: Timer C */ @@ -1075,7 +1075,7 @@ # define HRTIM_CR1_AD3USRC_TE (5 << HRTIM_CR1_AD3USRC_SHIFT) /* 101: Timer A */ #define HRTIM_CR1_AD4USRC_SHIFT 25 /* Bits 25-27: ADC Trigger 4 Update Source */ #define HRTIM_CR1_AD4USRC_MASK (7 << HRTIM_CR1_AD4USRC_SHIFT) -# define HRTIM_CR1_AD4USRC_MT (0 << HRTIM_CR1_AD4USRC_SHIFT) /* 000: Mater Timer */ +# define HRTIM_CR1_AD4USRC_MT (0 << HRTIM_CR1_AD4USRC_SHIFT) /* 000: Master Timer */ # define HRTIM_CR1_AD4USRC_TA (1 << HRTIM_CR1_AD4USRC_SHIFT) /* 001: Timer A */ # define HRTIM_CR1_AD4USRC_TB (2 << HRTIM_CR1_AD4USRC_SHIFT) /* 010: Timer B */ # define HRTIM_CR1_AD4USRC_TC (3 << HRTIM_CR1_AD4USRC_SHIFT) /* 011: Timer C */ diff --git a/arch/arm/src/stm32/hardware/stm32f33xxx_pinmap.h b/arch/arm/src/stm32/hardware/stm32f33xxx_pinmap.h index 55cfc6bb5c6..cd73f116e30 100644 --- a/arch/arm/src/stm32/hardware/stm32f33xxx_pinmap.h +++ b/arch/arm/src/stm32/hardware/stm32f33xxx_pinmap.h @@ -56,7 +56,7 @@ * Drivers, however, will use the pin selection without the numeric suffix. * Additional definitions are required in the board.h file. For example, if * CAN1_RX connects vis PA11 on some board, then the following definitions should - * appear inthe board.h header file for that board: + * appear in the board.h header file for that board: * * #define GPIO_CAN1_RX GPIO_CAN1_RX_1 * diff --git a/arch/arm/src/stm32/hardware/stm32f37xxx_pinmap.h b/arch/arm/src/stm32/hardware/stm32f37xxx_pinmap.h index 7a8f0adeb51..f1550c63212 100644 --- a/arch/arm/src/stm32/hardware/stm32f37xxx_pinmap.h +++ b/arch/arm/src/stm32/hardware/stm32f37xxx_pinmap.h @@ -56,7 +56,7 @@ * Drivers, however, will use the pin selection without the numeric suffix. * Additional definitions are required in the board.h file. For example, if * CAN1_RX connects vis PA11 on some board, then the following definitions should - * appear inthe board.h header file for that board: + * appear in the board.h header file for that board: * * #define GPIO_CAN1_RX GPIO_CAN1_RX_1 * diff --git a/arch/arm/src/stm32/hardware/stm32fxxxxx_otgfs.h b/arch/arm/src/stm32/hardware/stm32fxxxxx_otgfs.h index a42ad5a87cf..1befff48e93 100644 --- a/arch/arm/src/stm32/hardware/stm32fxxxxx_otgfs.h +++ b/arch/arm/src/stm32/hardware/stm32fxxxxx_otgfs.h @@ -975,7 +975,7 @@ #define OTGFS_DOEPCTL_MPSIZ_MASK (0x7ff << OTGFS_DOEPCTL_MPSIZ_SHIFT) /* Bits 11-14: Reserved, must be kept at reset value */ #define OTGFS_DOEPCTL_USBAEP (1 << 15) /* Bit 15: USB active endpoint */ -#define OTGFS_DOEPCTL_DPID (1 << 16) /* Bit 16: Endpoint data PID (interrupt/buld) */ +#define OTGFS_DOEPCTL_DPID (1 << 16) /* Bit 16: Endpoint data PID (interrupt/bulk) */ # define OTGFS_DOEPCTL_DATA0 (0) # define OTGFS_DOEPCTL_DATA1 OTGFS_DOEPCTL_DPID #define OTGFS_DOEPCTL_EONUM (1 << 16) /* Bit 16: Even/odd frame (isochronous) */ diff --git a/arch/arm/src/stm32/stm32_adc.c b/arch/arm/src/stm32/stm32_adc.c index ebe5fc3f587..68e20575d07 100644 --- a/arch/arm/src/stm32/stm32_adc.c +++ b/arch/arm/src/stm32/stm32_adc.c @@ -348,7 +348,7 @@ #endif /* Number of channels per ADC: - * - F0, L0 - 19, but singe SMP for all channels + * - F0, L0 - 19, but single SMP for all channels * - F1 - 18 * - F2,F3,F4,F7,L4,L4+ - 19 * - H7 - 20 @@ -1387,7 +1387,7 @@ static int adc_timinit(FAR struct stm32_dev_s *priv) /* Configure the timer channel to drive the ADC */ - /* Caculate optimal values for the timer prescaler and for the timer + /* Calculate optimal values for the timer prescaler and for the timer * reload register. If freq is the desired frequency, then * * reload = timclk / freq diff --git a/arch/arm/src/stm32/stm32_adc.h b/arch/arm/src/stm32/stm32_adc.h index c0f20b179c3..6bfb4238c27 100644 --- a/arch/arm/src/stm32/stm32_adc.h +++ b/arch/arm/src/stm32/stm32_adc.h @@ -2020,7 +2020,7 @@ struct stm32_adc_dev_s FAR const struct stm32_adc_ops_s *llops; - /* Require cast-compatibility with private "lower-half" ADC strucutre */ + /* Require cast-compatibility with private "lower-half" ADC structure */ }; /* Low-level operations for ADC */ diff --git a/arch/arm/src/stm32/stm32_can.c b/arch/arm/src/stm32/stm32_can.c index 78a915fd3ab..6d287c1ebc9 100644 --- a/arch/arm/src/stm32/stm32_can.c +++ b/arch/arm/src/stm32/stm32_can.c @@ -1143,7 +1143,7 @@ static int stm32can_remoterequest(FAR struct can_dev_s *dev, uint16_t id) * * Byte 0: Bits 0-7: Bits 3-10 of the 11-bit CAN identifier * Byte 1: Bits 5-7: Bits 0-2 of the 11-bit CAN identifier - * Bit 4: Remote Tranmission Request (RTR) + * Bit 4: Remote Transmission Request (RTR) * Bits 0-3: Data Length Code (DLC) * Bytes 2-10: CAN data * diff --git a/arch/arm/src/stm32/stm32_comp.h b/arch/arm/src/stm32/stm32_comp.h index 29007a68d14..f3448612fe0 100644 --- a/arch/arm/src/stm32/stm32_comp.h +++ b/arch/arm/src/stm32/stm32_comp.h @@ -51,7 +51,7 @@ #elif defined(CONFIG_STM32_STM32F33XX) # include "hardware/stm32f33xxx_comp.h" #elif defined(CONFIG_STM32_STM32F37XX) -# error "COMP support for STM32F37XX ot implemented yet" +# error "COMP support for STM32F37XX not implemented yet" #endif /************************************************************************************ diff --git a/arch/arm/src/stm32/stm32_dac.c b/arch/arm/src/stm32/stm32_dac.c index 5368a141e67..5dc976d87f2 100644 --- a/arch/arm/src/stm32/stm32_dac.c +++ b/arch/arm/src/stm32/stm32_dac.c @@ -169,11 +169,11 @@ #if defined(CONFIG_STM32_DAC1CH1_DMA) && !defined(DAC1CH1_HRTIM) && \ !defined(CONFIG_STM32_DAC1CH1_DMA_EXTERNAL) # if !defined(CONFIG_STM32_DAC1CH1_TIMER) -# warning "A timer number must be specificed in CONFIG_STM32_DAC1CH1_TIMER" +# warning "A timer number must be specified in CONFIG_STM32_DAC1CH1_TIMER" # undef CONFIG_STM32_DAC1CH1_DMA # undef CONFIG_STM32_DAC1CH1_TIMER_FREQUENCY # elif !defined(CONFIG_STM32_DAC1CH1_TIMER_FREQUENCY) -# warning "A timer frequency must be specificed in CONFIG_STM32_DAC1CH1_TIMER_FREQUENCY" +# warning "A timer frequency must be specified in CONFIG_STM32_DAC1CH1_TIMER_FREQUENCY" # undef CONFIG_STM32_DAC1CH1_DMA # undef CONFIG_STM32_DAC1CH1_TIMER # endif @@ -182,11 +182,11 @@ #if defined(CONFIG_STM32_DAC1CH2_DMA) && !defined(DAC1CH2_HRTIM) && \ !defined(CONFIG_STM32_DAC1CH2_DMA_EXTERNAL) # if !defined(CONFIG_STM32_DAC1CH2_TIMER) -# warning "A timer number must be specificed in CONFIG_STM32_DAC1CH2_TIMER" +# warning "A timer number must be specified in CONFIG_STM32_DAC1CH2_TIMER" # undef CONFIG_STM32_DAC1CH2_DMA # undef CONFIG_STM32_DAC1CH2_TIMER_FREQUENCY # elif !defined(CONFIG_STM32_DAC1CH2_TIMER_FREQUENCY) -# warning "A timer frequency must be specificed in CONFIG_STM32_DAC1CH2_TIMER_FREQUENCY" +# warning "A timer frequency must be specified in CONFIG_STM32_DAC1CH2_TIMER_FREQUENCY" # undef CONFIG_STM32_DAC1CH2_DMA # undef CONFIG_STM32_DAC1CH2_TIMER # endif @@ -195,11 +195,11 @@ #if defined(CONFIG_STM32_DAC2CH1_DMA) && !defined(DAC2CH1_HRTIM) && \ !defined(CONFIG_STM32_DAC2CH1_DMA_EXTERNAL) # if !defined(CONFIG_STM32_DAC2CH1_TIMER) -# warning "A timer number must be specificed in CONFIG_STM32_DAC2CH1_TIMER" +# warning "A timer number must be specified in CONFIG_STM32_DAC2CH1_TIMER" # undef CONFIG_STM32_DAC2CH1_DMA # undef CONFIG_STM32_DAC2CH1_TIMER_FREQUENCY # elif !defined(CONFIG_STM32_DAC2CH1_TIMER_FREQUENCY) -# warning "A timer frequency must be specificed in CONFIG_STM32_DAC2CH1_TIMER_FREQUENCY" +# warning "A timer frequency must be specified in CONFIG_STM32_DAC2CH1_TIMER_FREQUENCY" # undef CONFIG_STM32_DAC2CH1_DMA # undef CONFIG_STM32_DAC2CH1_TIMER # endif @@ -1229,7 +1229,7 @@ static int dac_timinit(FAR struct stm32_chan_s *chan) * counter mode (up). */ - /* Enable the timer. At most, two of the following cases (pluse the + /* Enable the timer. At most, two of the following cases (pulse the * default) will be enabled */ diff --git a/arch/arm/src/stm32/stm32_dma_v1.c b/arch/arm/src/stm32/stm32_dma_v1.c index 8dce8b7709f..d6f4a0b333c 100644 --- a/arch/arm/src/stm32/stm32_dma_v1.c +++ b/arch/arm/src/stm32/stm32_dma_v1.c @@ -81,7 +81,7 @@ * Private Types ****************************************************************************/ -/* This structure descibes one DMA channel */ +/* This structure describes one DMA channel */ struct stm32_dma_s { @@ -545,7 +545,7 @@ void stm32_dmastart(DMA_HANDLE handle, dma_callback_t callback, DEBUGASSERT(handle != NULL); - /* Save the callback info. This will be invoked whent the DMA commpletes */ + /* Save the callback info. This will be invoked whent the DMA completes */ dmach->callback = callback; dmach->arg = arg; diff --git a/arch/arm/src/stm32/stm32_dma_v2.c b/arch/arm/src/stm32/stm32_dma_v2.c index 329c2edb260..903faaca6b2 100644 --- a/arch/arm/src/stm32/stm32_dma_v2.c +++ b/arch/arm/src/stm32/stm32_dma_v2.c @@ -80,7 +80,7 @@ * Private Types ****************************************************************************/ -/* This structure descibes one DMA channel */ +/* This structure describes one DMA channel */ struct stm32_dma_s { @@ -299,7 +299,7 @@ static inline FAR struct stm32_dma_s *stm32_dmamap(unsigned long dmamap) unsigned int controller = STM32_DMA_CONTROLLER(dmamap); - /* Extact the stream number from the bit encoded value */ + /* Extract the stream number from the bit encoded value */ unsigned int stream = STM32_DMA_STREAM(dmamap); @@ -734,7 +734,7 @@ void stm32_dmastart(DMA_HANDLE handle, dma_callback_t callback, void *arg, bool DEBUGASSERT(handle != NULL); - /* Save the callback info. This will be invoked whent the DMA commpletes */ + /* Save the callback info. This will be invoked whent the DMA completes */ dmast->callback = callback; dmast->arg = arg; diff --git a/arch/arm/src/stm32/stm32_eth.c b/arch/arm/src/stm32/stm32_eth.c index d579343da87..7f7534a145e 100644 --- a/arch/arm/src/stm32/stm32_eth.c +++ b/arch/arm/src/stm32/stm32_eth.c @@ -1100,7 +1100,7 @@ static int stm32_transmit(FAR struct stm32_ethmac_s *priv) txdesc->tdes0 |= (ETH_TDES0_LS | ETH_TDES0_IC); - /* This segement is, most likely, of fractional buffersize */ + /* This segment is, most likely, of fractional buffersize */ txdesc->tdes1 = lastsize; buffer += lastsize; @@ -1637,7 +1637,7 @@ static int stm32_recvframe(FAR struct stm32_ethmac_s *priv) dev->d_buf = (uint8_t *)rxcurr->rdes2; rxcurr->rdes2 = (uint32_t)buffer; - /* Return success, remebering where we should re-start scanning + /* Return success, remembering where we should re-start scanning * and resetting the segment scanning logic */ @@ -1905,7 +1905,7 @@ static void stm32_freeframe(FAR struct stm32_ethmac_s *priv) txdesc->tdes2 = 0; - /* Check if this is the last segement of a TX frame */ + /* Check if this is the last segment of a TX frame */ if ((txdesc->tdes0 & ETH_TDES0_LS) != 0) { @@ -2748,7 +2748,7 @@ static void stm32_txdescinit(FAR struct stm32_ethmac_s *priv) } } - /* Set Transmit Desciptor List Address Register */ + /* Set Transmit Descriptor List Address Register */ stm32_putreg((uint32_t)priv->txtable, STM32_ETH_DMATDLAR); } @@ -3210,7 +3210,7 @@ static int stm32_phyinit(FAR struct stm32_ethmac_s *priv) } #endif - /* Perform auto-negotion if so configured */ + /* Perform auto-negotiation if so configured */ #ifdef CONFIG_STM32_AUTONEG /* Wait for link status */ @@ -3328,7 +3328,7 @@ static int stm32_phyinit(FAR struct stm32_ethmac_s *priv) } #endif -#else /* Auto-negotion not selected */ +#else /* Auto-negotiation not selected */ phyval = 0; #ifdef CONFIG_STM32_ETHFD @@ -3367,7 +3367,7 @@ static int stm32_phyinit(FAR struct stm32_ethmac_s *priv) * Name: stm32_selectmii * * Description: - * Selects the MII inteface. + * Selects the MII interface. * * Input Parameters: * None @@ -3398,7 +3398,7 @@ static inline void stm32_selectmii(void) * Name: stm32_selectrmii * * Description: - * Selects the RMII inteface. + * Selects the RMII interface. * * Input Parameters: * None diff --git a/arch/arm/src/stm32/stm32_gpio.c b/arch/arm/src/stm32/stm32_gpio.c index 0d0a3f9facc..5a403985852 100644 --- a/arch/arm/src/stm32/stm32_gpio.c +++ b/arch/arm/src/stm32/stm32_gpio.c @@ -228,7 +228,7 @@ static inline void stm32_gpioremap(void) * * Assumptions: * This function is called early in the initialization sequence so that - * no mutual exlusion is necessary. + * no mutual exclusion is necessary. * ****************************************************************************/ @@ -250,7 +250,7 @@ void stm32_gpioinit(void) * * Returned Value: * OK on success - * A negated errono valu on invalid port, or when pin is locked as ALT + * A negated errono value on invalid port, or when pin is locked as ALT * function. * * To-Do: Auto Power Enable diff --git a/arch/arm/src/stm32/stm32_gpio.h b/arch/arm/src/stm32/stm32_gpio.h index f89556a9ac9..df9980a20de 100644 --- a/arch/arm/src/stm32/stm32_gpio.h +++ b/arch/arm/src/stm32/stm32_gpio.h @@ -98,7 +98,7 @@ /* If the pin is a GPIO digital output, then this identifies the initial output value. * If the pin is an input, this bit is overloaded to provide the qualifier to\ - * distinquish input pull-up and -down: + * distinguish input pull-up and -down: * * 1111 1100 0000 0000 * 5432 1098 7654 3210 @@ -320,7 +320,7 @@ /* If the pin is a GPIO digital output, then this identifies the initial output value. * If the pin is an input, this bit is overloaded to provide the qualifier to - * distinquish input pull-up and -down: + * distinguish input pull-up and -down: * * 1111 1111 1100 0000 0000 * 9876 5432 1098 7654 3210 diff --git a/arch/arm/src/stm32/stm32_hciuart.c b/arch/arm/src/stm32/stm32_hciuart.c index 51d93018809..82d272a4d46 100644 --- a/arch/arm/src/stm32/stm32_hciuart.c +++ b/arch/arm/src/stm32/stm32_hciuart.c @@ -1297,7 +1297,7 @@ static ssize_t hciuart_copytotxfifo(const struct hciuart_config_s *config) * * Per "Specification of the Bluetooth System, Wireless connections made * easy, Host Controller Interface [Transport Layer]", Volume 4, Revision - * 1.2 or later, 1 January 2006, HCI UART tranport uses these settings: + * 1.2 or later, 1 January 2006, HCI UART transport uses these settings: * * 8 data bits, no parity, 1 stop, RTS/CTS flow control * @@ -1561,7 +1561,7 @@ static void hciuart_apbclock_enable(const struct hciuart_config_s *config) * * Per "Specification of the Bluetooth System, Wireless connections made * easy, Host Controller Interface [Transport Layer]", Volume 4, Revision - * 1.2 or later, 1 January 2006, HCI UART tranport uses these settings: + * 1.2 or later, 1 January 2006, HCI UART transport uses these settings: * * 8 data bits, no parity, 1 stop, RTS/CTS flow control * diff --git a/arch/arm/src/stm32/stm32_hrtim.c b/arch/arm/src/stm32/stm32_hrtim.c index 30ea9107251..8ff8be35029 100644 --- a/arch/arm/src/stm32/stm32_hrtim.c +++ b/arch/arm/src/stm32/stm32_hrtim.c @@ -520,7 +520,7 @@ struct stm32_hrtim_eev_cfg_s uint8_t filter:4; /* External Event filter */ uint8_t src:4; /* External Event source */ uint8_t pol:1; /* External Event polarity */ - uint8_t sen:1; /* External Event sensivity */ + uint8_t sen:1; /* External Event ssensitivit */ uint8_t mode:1; /* External Event mode */ uint8_t _res:5; }; @@ -1880,7 +1880,7 @@ static FAR struct stm32_hrtim_slave_priv_s * goto errout; } - /* Get Timer data strucutre */ + /* Get Timer data structure */ tim = hrtim_tim_get(priv, timer); if (tim == NULL) @@ -2595,7 +2595,7 @@ static int hrtim_gpios_config(FAR struct stm32_hrtim_s *priv) * Input Parameters: * priv - A reference to the HRTIM block * timer - HRTIM Timer index - * capture - capture trigers configuration + * capture - capture triggers configuration * * Returned Value: * 0 on success, a negated errno value on failure @@ -3198,7 +3198,7 @@ static int hrtim_output_set_set(FAR struct hrtim_dev_s *dev, uint16_t output, timer = output_tim_index_get(output); - /* Get Slave Timer data strucutre */ + /* Get Slave Timer data structure */ slave = hrtim_slave_get(priv, timer); if (slave == NULL) @@ -3252,7 +3252,7 @@ static int hrtim_output_rst_set(FAR struct hrtim_dev_s *dev, uint16_t output, timer = output_tim_index_get(output); - /* Get Salve Timer data strucutre */ + /* Get Salve Timer data structure */ slave = hrtim_slave_get(priv, timer); if (slave == NULL) @@ -3644,7 +3644,7 @@ static int hrtim_tim_deadtime_cfg(FAR struct stm32_hrtim_s *priv, uint8_t timer) goto errout; } - /* Get Slave Timer data strucutre */ + /* Get Slave Timer data structure */ slave = hrtim_slave_get(priv, timer); if (slave == NULL) @@ -3844,7 +3844,7 @@ static int hrtim_tim_chopper_cfg(FAR struct stm32_hrtim_s *priv, goto errout; } - /* Get Slave Timer data strucutre */ + /* Get Slave Timer data structure */ slave = hrtim_slave_get(priv, timer); if (slave == NULL) @@ -4848,7 +4848,7 @@ static uint8_t hrtim_cmpcap_mask_get(FAR struct stm32_hrtim_s *priv, FAR struct stm32_hrtim_tim_s *tim; uint8_t mask = 0; - /* Get Timer data strucutre */ + /* Get Timer data structure */ tim = hrtim_tim_get(priv, timer); if (tim == NULL) diff --git a/arch/arm/src/stm32/stm32_hrtim.h b/arch/arm/src/stm32/stm32_hrtim.h index 4227454af9b..4a9039d9ec6 100644 --- a/arch/arm/src/stm32/stm32_hrtim.h +++ b/arch/arm/src/stm32/stm32_hrtim.h @@ -877,15 +877,15 @@ enum stm32_hrtim_dma_e HRTIM_DMA_CMP4 = (1 << 3), /* Common:Compare 4 DMA request */ HRTIM_DMA_REP = (1 << 4), /* Common: Repetition DMA request */ HRTIM_DMA_SYNC = (1 << 5), /* Master: Sync Input DMA request */ - HRTIM_DMA_UPD = (1 << 6), /* Common: Update DMA reques */ - HRTIM_DMA_CPT1 = (1 << 7), /* Slaves: Capture 1 DMA reques */ - HRTIM_DMA_CPT2 = (1 << 8), /* Slaves: Capture 2 DMA reques */ - HRTIM_DMA_SET1 = (1 << 9), /* Slaves: Output 1 Set DMA reques */ - HRTIM_DMA_RST1 = (1 << 10), /* Slaves: Output 1 Reset DMA reques */ - HRTIM_DMA_SET2 = (1 << 11), /* Slaves: Output 2 Set DMA reques */ - HRTIM_DMA_RST2 = (1 << 12), /* Slaves: Output 2 Reset DMA reques */ - HRTIM_DMA_RST = (1 << 13), /* Slaves: Reset DMA reques */ - HRTIM_DMA_DLYPRT = (1 << 14) /* Slaves: Delayed Protection DMA reques */ + HRTIM_DMA_UPD = (1 << 6), /* Common: Update DMA request */ + HRTIM_DMA_CPT1 = (1 << 7), /* Slaves: Capture 1 DMA request */ + HRTIM_DMA_CPT2 = (1 << 8), /* Slaves: Capture 2 DMA request */ + HRTIM_DMA_SET1 = (1 << 9), /* Slaves: Output 1 Set DMA request */ + HRTIM_DMA_RST1 = (1 << 10), /* Slaves: Output 1 Reset DMA request */ + HRTIM_DMA_SET2 = (1 << 11), /* Slaves: Output 2 Set DMA request */ + HRTIM_DMA_RST2 = (1 << 12), /* Slaves: Output 2 Reset DMA request */ + HRTIM_DMA_RST = (1 << 13), /* Slaves: Reset DMA request */ + HRTIM_DMA_DLYPRT = (1 << 14) /* Slaves: Delayed Protection DMA request */ }; /* HRTIM Output IDLE state */ diff --git a/arch/arm/src/stm32/stm32_i2s.c b/arch/arm/src/stm32/stm32_i2s.c index ac5af48c21b..9ef19448932 100644 --- a/arch/arm/src/stm32/stm32_i2s.c +++ b/arch/arm/src/stm32/stm32_i2s.c @@ -1553,7 +1553,7 @@ static void i2s_tx_worker(void *arg) while (sq_peek(&priv->tx.done) != NULL) { /* Remove the buffer container from the tx.done queue. NOTE that - * interupts must be enabled to do this because the tx.done queue is + * interrupts must be enabled to do this because the tx.done queue is * also modified from the interrupt level. */ @@ -1906,7 +1906,7 @@ static int stm32_i2s_receive(struct i2s_dev_s *dev, struct ap_buffer_s *apb, flags = enter_critical_section(); sq_addlast((sq_entry_t *)bfcontainer, &priv->rx.pend); - /* Then start the next transfer. If there is already a transfer in progess, + /* Then start the next transfer. If there is already a transfer in progress, * then this will do nothing. */ @@ -2011,7 +2011,7 @@ static uint32_t stm32_i2s_txdatawidth(struct i2s_dev_s *dev, int bits) return 0; } - /* Upate the DMA flags */ + /* Update the DMA flags */ ret = i2s_dma_flags(priv); if (ret < 0) @@ -2112,7 +2112,7 @@ static int stm32_i2s_send(struct i2s_dev_s *dev, struct ap_buffer_s *apb, flags = enter_critical_section(); sq_addlast((sq_entry_t *)bfcontainer, &priv->tx.pend); - /* Then start the next transfer. If there is already a transfer in progess, + /* Then start the next transfer. If there is already a transfer in progress, * then this will do nothing. */ diff --git a/arch/arm/src/stm32/stm32_irq.c b/arch/arm/src/stm32/stm32_irq.c index 3845fa0e199..a6e86ad97bc 100644 --- a/arch/arm/src/stm32/stm32_irq.c +++ b/arch/arm/src/stm32/stm32_irq.c @@ -157,7 +157,7 @@ static void stm32_dumpnvic(const char *msg, int irq) * stm32_dbgmonitor, stm32_pendsv, stm32_reserved * * Description: - * Handlers for various execptions. None are handled and all are fatal + * Handlers for various exceptions. None are handled and all are fatal * error conditions. The only advantage these provided over the default * unexpected interrupt handler is that they provide a diagnostic output. * diff --git a/arch/arm/src/stm32/stm32_lowputc.c b/arch/arm/src/stm32/stm32_lowputc.c index 798cdf1ce1b..61f3c92e34f 100644 --- a/arch/arm/src/stm32/stm32_lowputc.c +++ b/arch/arm/src/stm32/stm32_lowputc.c @@ -343,7 +343,7 @@ * usartdiv32 = 32 * usartdiv = fCK / (baud/2) * * (NOTE: all standard baud values are even so dividing by two does not - * lose precision). Eg. (same fCK and buad), usartdiv32 = 1250 + * lose precision). Eg. (same fCK and baud), usartdiv32 = 1250 */ # define STM32_USARTDIV32 (STM32_APBCLOCK / (STM32_CONSOLE_BAUD >> 1)) diff --git a/arch/arm/src/stm32/stm32_ltdc.h b/arch/arm/src/stm32/stm32_ltdc.h index d224adf19f9..9058c4724ba 100644 --- a/arch/arm/src/stm32/stm32_ltdc.h +++ b/arch/arm/src/stm32/stm32_ltdc.h @@ -79,7 +79,7 @@ int stm32_ltdcinitialize(void); * Name: stm32_ltdcuninitialize * * Description: - * Unitialize the ltdc controller + * Uninitialize the ltdc controller * ****************************************************************************/ diff --git a/arch/arm/src/stm32/stm32_oneshot_lowerhalf.c b/arch/arm/src/stm32/stm32_oneshot_lowerhalf.c index 41426958bcf..4ea7b2bf857 100644 --- a/arch/arm/src/stm32/stm32_oneshot_lowerhalf.c +++ b/arch/arm/src/stm32/stm32_oneshot_lowerhalf.c @@ -159,7 +159,7 @@ static void stm32_oneshot_handler(void *arg) * lower An instance of the lower-half oneshot state structure. This * structure must have been previously initialized via a call to * oneshot_initialize(); - * ts The location in which to return the maxumum delay. + * ts The location in which to return the maximum delay. * * Returned Value: * Zero (OK) is returned on success; a negated errno value is returned diff --git a/arch/arm/src/stm32/stm32_opamp.c b/arch/arm/src/stm32/stm32_opamp.c index b6da5a6f184..c82eb93948c 100644 --- a/arch/arm/src/stm32/stm32_opamp.c +++ b/arch/arm/src/stm32/stm32_opamp.c @@ -175,7 +175,7 @@ # endif # endif # ifndef OPAMP1_VPSEL -# error "OPAMP1_VPSEL must be slected in standalone mode!" +# error "OPAMP1_VPSEL must be selected in standalone mode!" # endif #endif #ifdef CONFIG_STM32_OPAMP2 @@ -191,7 +191,7 @@ # endif # endif # ifndef OPAMP2_VPSEL -# error "OPAMP2_VPSEL must be slected in standalone mode!" +# error "OPAMP2_VPSEL must be selected in standalone mode!" # endif #endif #ifdef CONFIG_STM32_OPAMP3 @@ -207,7 +207,7 @@ # endif # endif # ifndef OPAMP3_VPSEL -# error "OPAMP3_VPSEL must be slected in standalone mode!" +# error "OPAMP3_VPSEL must be selected in standalone mode!" # endif #endif #ifdef CONFIG_STM32_OPAMP4 @@ -223,7 +223,7 @@ # endif # endif # ifndef OPAMP4_VPSEL -# error "OPAMP4_VPSEL must be slected in standalone mode!" +# error "OPAMP4_VPSEL must be selected in standalone mode!" # endif #endif @@ -1113,7 +1113,7 @@ static int stm32_opampconfig(FAR struct stm32_opamp_s *priv) opamp_putreg_csr(priv, regval); - /* Configure defaul gain in PGA mode */ + /* Configure default gain in PGA mode */ stm32_opampgain_set(priv, priv->gain); diff --git a/arch/arm/src/stm32/stm32_opamp.h b/arch/arm/src/stm32/stm32_opamp.h index 61099360f3a..7b43becddf9 100644 --- a/arch/arm/src/stm32/stm32_opamp.h +++ b/arch/arm/src/stm32/stm32_opamp.h @@ -69,7 +69,7 @@ #define OPAMP_MUX_DISABLE 0 #define OPAMP_MUX_ENABLE 1 -/* User callibration */ +/* User calibration */ #define OPAMP_USERCAL_DISABLE 0 #define OPAMP_USERCAL_ENABLE 1 diff --git a/arch/arm/src/stm32/stm32_otgfsdev.c b/arch/arm/src/stm32/stm32_otgfsdev.c index b84cf7fbcf4..cb2a5573066 100644 --- a/arch/arm/src/stm32/stm32_otgfsdev.c +++ b/arch/arm/src/stm32/stm32_otgfsdev.c @@ -2570,7 +2570,7 @@ static inline void stm32_ep0out_setup(struct stm32_usbdev_s *priv) stm32_ep0_stall(priv); } - /* Reset state/data associated with thie SETUP request */ + /* Reset state/data associated with the SETUP request */ priv->ep0datlen = 0; } @@ -2704,7 +2704,7 @@ static inline void stm32_epout_interrupt(FAR struct stm32_usbdev_s *priv) doepint = stm32_getreg(STM32_OTGFS_DOEPINT(epno)); doepint &= stm32_getreg(STM32_OTGFS_DOEPMSK); - /* Transfer completed interrupt. This interrupt is trigged when + /* Transfer completed interrupt. This interrupt is triggered when * stm32_rxinterrupt() removes the last packet data from the RxFIFO. * In this case, core internally sets the NAK bit for this endpoint to * prevent it from receiving any more packets. @@ -4068,7 +4068,7 @@ static void stm32_ep0_configure(FAR struct stm32_usbdev_s *priv) * Name: stm32_epout_disable * * Description: - * Diable an OUT endpoint will no longer be used + * Disable an OUT endpoint will no longer be used * ****************************************************************************/ diff --git a/arch/arm/src/stm32/stm32_otgfshost.c b/arch/arm/src/stm32/stm32_otgfshost.c index b509ef9314d..400c5ea37e5 100644 --- a/arch/arm/src/stm32/stm32_otgfshost.c +++ b/arch/arm/src/stm32/stm32_otgfshost.c @@ -5047,7 +5047,7 @@ static void stm32_vbusdrive(FAR struct stm32_usbhost_s *priv, bool state) * Description: * Initialize/re-initialize hardware for host mode operation. At present, * this function is called only from stm32_hw_initialize(). But if OTG mode - * were supported, this function would also be called to swtich between + * were supported, this function would also be called to switch between * host and device modes on a connector ID change interrupt. * * Input Parameters: @@ -5105,7 +5105,7 @@ static void stm32_host_initialize(FAR struct stm32_usbhost_s *priv) (CONFIG_STM32_OTGFS_PTXFIFO_SIZE << OTGFS_HPTXFSIZ_PTXFD_SHIFT)); stm32_putreg(STM32_OTGFS_HPTXFSIZ, regval); - /* If OTG were supported, we sould need to clear HNP enable bit in the + /* If OTG were supported, we should need to clear HNP enable bit in the * USB_OTG control register about here. */ diff --git a/arch/arm/src/stm32/stm32_otghsdev.c b/arch/arm/src/stm32/stm32_otghsdev.c index 7a5acf2882f..913eb9e3bdd 100644 --- a/arch/arm/src/stm32/stm32_otghsdev.c +++ b/arch/arm/src/stm32/stm32_otghsdev.c @@ -252,7 +252,7 @@ #define EP0 (0) -/* The set of all enpoints available to the class implementation (1-3) */ +/* The set of all endpoints available to the class implementation (1-3) */ #define STM32_EP_AVAILABLE (0x0e) /* All available endpoints */ @@ -2521,7 +2521,7 @@ static inline void stm32_ep0out_setup(struct stm32_usbdev_s *priv) stm32_ep0_stall(priv); } - /* Reset state/data associated with thie SETUP request */ + /* Reset state/data associated with the SETUP request */ priv->ep0datlen = 0; } @@ -2655,7 +2655,7 @@ static inline void stm32_epout_interrupt(FAR struct stm32_usbdev_s *priv) doepint = stm32_getreg(STM32_OTGHS_DOEPINT(epno)); doepint &= stm32_getreg(STM32_OTGHS_DOEPMSK); - /* Transfer completed interrupt. This interrupt is trigged when + /* Transfer completed interrupt. This interrupt is triggered when * stm32_rxinterrupt() removes the last packet data from the RxFIFO. * In this case, core internally sets the NAK bit for this endpoint to * prevent it from receiving any more packets. @@ -4018,7 +4018,7 @@ static void stm32_ep0_configure(FAR struct stm32_usbdev_s *priv) * Name: stm32_epout_disable * * Description: - * Diable an OUT endpoint will no longer be used + * Disable an OUT endpoint will no longer be used * ****************************************************************************/ diff --git a/arch/arm/src/stm32/stm32_otghshost.c b/arch/arm/src/stm32/stm32_otghshost.c index ddacc932096..43f267867c0 100644 --- a/arch/arm/src/stm32/stm32_otghshost.c +++ b/arch/arm/src/stm32/stm32_otghshost.c @@ -5050,7 +5050,7 @@ static void stm32_vbusdrive(FAR struct stm32_usbhost_s *priv, bool state) * Description: * Initialize/re-initialize hardware for host mode operation. At present, * this function is called only from stm32_hw_initialize(). But if OTG mode - * were supported, this function would also be called to swtich between + * were supported, this function would also be called to switch between * host and device modes on a connector ID change interrupt. * * Input Parameters: diff --git a/arch/arm/src/stm32/stm32_pmstop.c b/arch/arm/src/stm32/stm32_pmstop.c index bde0334ec4a..d1c68712bd1 100644 --- a/arch/arm/src/stm32/stm32_pmstop.c +++ b/arch/arm/src/stm32/stm32_pmstop.c @@ -75,7 +75,7 @@ * * Returned Value: * Zero means that the STOP was successfully entered and the system has - * been re-awakened. The internal volatage regulator is back to its + * been re-awakened. The internal voltage regulator is back to its * original state. Otherwise, STOP mode did not occur and a negated * errno value is returned to indicate the cause of the failure. * diff --git a/arch/arm/src/stm32/stm32_pwm.c b/arch/arm/src/stm32/stm32_pwm.c index 978dd00b7c0..2306118f03a 100644 --- a/arch/arm/src/stm32/stm32_pwm.c +++ b/arch/arm/src/stm32/stm32_pwm.c @@ -407,7 +407,7 @@ struct stm32_pwmtimer_s uint8_t irq; /* Timer update IRQ */ uint8_t prev; /* The previous value of the RCR (pre-loaded) */ uint8_t curr; /* The current value of the RCR (pre-loaded) */ - uint32_t count; /* Remaining pluse count */ + uint32_t count; /* Remaining pulse count */ #else uint32_t frequency; /* Current frequency setting */ #endif @@ -2311,7 +2311,7 @@ static int pwm_duty_update(FAR struct pwm_lowerhalf_s *dev, uint8_t channel, pwminfo("ccr: %u\n", ccr); - /* Write coresponding CCR register */ + /* Write corresponding CCR register */ pwm_ccr_update(dev, channel, ccr); @@ -3283,7 +3283,7 @@ static int pwm_pulsecount_configure(FAR struct pwm_lowerhalf_s *dev) for (j = 0; j < priv->chan_num; j++) { - /* Skip channle if not in use */ + /* Skip channel if not in use */ if (priv->channels[j].channel != 0) { @@ -3368,7 +3368,7 @@ static int pwm_pulsecount_timer(FAR struct pwm_lowerhalf_s *dev, } /* If a non-zero repetition count has been selected, then set the - * repitition counter to the count-1 (pwm_pulsecount_start() has already + * repetition counter to the count-1 (pwm_pulsecount_start() has already * assured us that the count value is within range). */ @@ -3526,7 +3526,7 @@ static int pwm_configure(FAR struct pwm_lowerhalf_s *dev) for (j = 0; j < priv->chan_num; j++) { - /* Skip channle if not in use */ + /* Skip channel if not in use */ if (priv->channels[j].channel != 0) { @@ -3704,7 +3704,7 @@ static int pwm_timer(FAR struct pwm_lowerhalf_s *dev, priv->timtype == TIMTYPE_COUNTUP16_N) { /* If a non-zero repetition count has been selected, then set the - * repitition counter to the count-1 (pwm_start() has already + * repetition counter to the count-1 (pwm_start() has already * assured us that the count value is within range). */ @@ -3789,7 +3789,7 @@ static int pwm_interrupt(FAR struct pwm_lowerhalf_s *dev) pwm_soft_break(dev, true); - /* Disable first interrtups, stop and reset the timer */ + /* Disable first interrupts, stop and reset the timer */ pwm_stop(dev); diff --git a/arch/arm/src/stm32/stm32_pwm.h b/arch/arm/src/stm32/stm32_pwm.h index 1525910e047..a5549f0a00b 100644 --- a/arch/arm/src/stm32/stm32_pwm.h +++ b/arch/arm/src/stm32/stm32_pwm.h @@ -1042,7 +1042,7 @@ struct stm32_pwm_dev_s FAR const struct stm32_pwm_ops_s *llops; - /* Require cast-compatibility with private "lower-half" PWM strucutre */ + /* Require cast-compatibility with private "lower-half" PWM structure */ }; /* Low-level operations for PWM */ diff --git a/arch/arm/src/stm32/stm32_pwr.c b/arch/arm/src/stm32/stm32_pwr.c index 5a4b863b55d..1b3ecec3ad1 100644 --- a/arch/arm/src/stm32/stm32_pwr.c +++ b/arch/arm/src/stm32/stm32_pwr.c @@ -357,7 +357,7 @@ bool stm32_pwr_getwuf(void) * into the RAM will be maintained in the Standby and VBAT modes. * * Input Parameters: - * regon - state to set it to + * region - state to set it to * * Returned Value: * None @@ -365,16 +365,16 @@ bool stm32_pwr_getwuf(void) ************************************************************************************/ #if defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F4XXX) -void stm32_pwr_enablebreg(bool regon) +void stm32_pwr_enablebreg(bool region) { uint16_t regval; regval = stm32_pwr_getreg32(STM32_PWR_CSR_OFFSET); regval &= ~PWR_CSR_BRE; - regval |= regon ? PWR_CSR_BRE : 0; + regval |= region ? PWR_CSR_BRE : 0; stm32_pwr_putreg32(STM32_PWR_CSR_OFFSET, regval); - if (regon) + if (region) { while ((stm32_pwr_getreg32(STM32_PWR_CSR_OFFSET) & PWR_CSR_BRR) == 0); } diff --git a/arch/arm/src/stm32/stm32_pwr.h b/arch/arm/src/stm32/stm32_pwr.h index 58a9c544a10..f0a8a43aff3 100644 --- a/arch/arm/src/stm32/stm32_pwr.h +++ b/arch/arm/src/stm32/stm32_pwr.h @@ -193,7 +193,7 @@ bool stm32_pwr_getwuf(void); * into the RAM will be maintained in the Standby and VBAT modes. * * Input Parameters: - * regon - state to set it to + * region - state to set it to * * Returned Value: * None @@ -201,9 +201,9 @@ bool stm32_pwr_getwuf(void); ************************************************************************************/ #if defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F4XXX) -void stm32_pwr_enablebreg(bool regon); +void stm32_pwr_enablebreg(bool region); #else -# define stm32_pwr_enablebreg(regon) +# define stm32_pwr_enablebreg(region) #endif /************************************************************************************ diff --git a/arch/arm/src/stm32/stm32_qencoder.c b/arch/arm/src/stm32/stm32_qencoder.c index d42b662bc5a..46ba1c83c11 100644 --- a/arch/arm/src/stm32/stm32_qencoder.c +++ b/arch/arm/src/stm32/stm32_qencoder.c @@ -1082,7 +1082,7 @@ static int stm32_position(FAR struct qe_lowerhalf_s *lower, FAR int32_t *pos) do { - /* Don't let another task pre-empt us until we get the measurement. The timer + /* Don't let another task preempt us until we get the measurement. The timer * interrupt may still be processed */ diff --git a/arch/arm/src/stm32/stm32_rcc.c b/arch/arm/src/stm32/stm32_rcc.c index 3c0325b5c09..f5e69be7d4d 100644 --- a/arch/arm/src/stm32/stm32_rcc.c +++ b/arch/arm/src/stm32/stm32_rcc.c @@ -221,7 +221,7 @@ void stm32_clockconfig(void) * * This functional performs a subset of the operations performed by * stm32_clockconfig(): It does not reset any devices, and it does not reset the - * currenlty enabled peripheral clocks. + * currently enabled peripheral clocks. * * If CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is defined, then clocking will * be enabled by an externally provided, board-specific function called diff --git a/arch/arm/src/stm32/stm32_rcc.h b/arch/arm/src/stm32/stm32_rcc.h index 1237f30f276..3248d211fcf 100644 --- a/arch/arm/src/stm32/stm32_rcc.h +++ b/arch/arm/src/stm32/stm32_rcc.h @@ -264,7 +264,7 @@ void stm32_clockconfig(void); * * Description: * Any STM32 board may replace the "standard" board clock configuration logic with - * its own, custom clock cofiguration logic. + * its own, custom clock configuration logic. * ************************************************************************************/ @@ -283,7 +283,7 @@ void stm32_board_clockconfig(void); * * This functional performs a subset of the operations performed by * stm32_clockconfig(): It does not reset any devices, and it does not reset the - * currenlty enabled peripheral clocks. + * currently enabled peripheral clocks. * * If CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is defined, then clocking will * be enabled by an externally provided, board-specific function called diff --git a/arch/arm/src/stm32/stm32_rtcounter.c b/arch/arm/src/stm32/stm32_rtcounter.c index 5e8d5455bbb..62d3899a2a3 100644 --- a/arch/arm/src/stm32/stm32_rtcounter.c +++ b/arch/arm/src/stm32/stm32_rtcounter.c @@ -91,7 +91,7 @@ * * WARNING: Overflow interrupts are lost whenever the STM32 is powered down. The * overflow interrupt may be lost even if the STM32 is powered down only momentarily. - * Therefor hi-res solution is only useful in systems where the power is always on. + * Therefore hi-res solution is only useful in systems where the power is always on. */ #ifdef CONFIG_RTC_HIRES diff --git a/arch/arm/src/stm32/stm32_sdadc.c b/arch/arm/src/stm32/stm32_sdadc.c index c9848d547b4..e9eb6d1e47d 100644 --- a/arch/arm/src/stm32/stm32_sdadc.c +++ b/arch/arm/src/stm32/stm32_sdadc.c @@ -1028,7 +1028,7 @@ static void sdadc_shutdown(FAR struct adc_dev_s *dev) sdadc_enable(priv, false); - /* Disable intrerrupt / dma */ + /* Disable interrupt / dma */ sdadc_rxint(dev, false); diff --git a/arch/arm/src/stm32/stm32_sdio.c b/arch/arm/src/stm32/stm32_sdio.c index eb21192b2a6..693b0988e29 100644 --- a/arch/arm/src/stm32/stm32_sdio.c +++ b/arch/arm/src/stm32/stm32_sdio.c @@ -647,7 +647,7 @@ static inline void stm32_setclkcr(uint32_t clkcr) * Name: stm32_configwaitints * * Description: - * Enable/disable SDIO interrupts needed to suport the wait function + * Enable/disable SDIO interrupts needed to support the wait function * * Input Parameters: * priv - A reference to the SDIO device state structure @@ -2647,7 +2647,7 @@ errout: * * Events are automatically disabled once the callback is performed and no * further callback events will occur until they are again enabled by - * calling this methos. + * calling this method. * * Input Parameters: * dev - An instance of the SDIO device interface diff --git a/arch/arm/src/stm32/stm32_serial.c b/arch/arm/src/stm32/stm32_serial.c index c7efe3c9c33..48c35a79fc9 100644 --- a/arch/arm/src/stm32/stm32_serial.c +++ b/arch/arm/src/stm32/stm32_serial.c @@ -1830,7 +1830,7 @@ static int up_interrupt(int irq, void *context, void *arg) * " " USART_SR_ORE Overrun Error Detected * USART_CR3_CTSIE USART_SR_CTS CTS flag (not used) * - * NOTE: Some of these status bits must be cleared by explicity writing zero + * NOTE: Some of these status bits must be cleared by explicitly writing zero * to the SR register: USART_SR_CTS, USART_SR_LBD. Note of those are currently * being used. */ diff --git a/arch/arm/src/stm32/stm32_spi.c b/arch/arm/src/stm32/stm32_spi.c index c2cb1d81db6..5c651a66dcc 100644 --- a/arch/arm/src/stm32/stm32_spi.c +++ b/arch/arm/src/stm32/stm32_spi.c @@ -1122,12 +1122,12 @@ static void spi_modifycr2(FAR struct stm32_spidev_s *priv, uint16_t setbits, * Name: spi_lock * * Description: - * On SPI busses where there are multiple devices, it will be necessary to - * lock SPI to have exclusive access to the busses for a sequence of + * On SPI buses where there are multiple devices, it will be necessary to + * lock SPI to have exclusive access to the buses for a sequence of * transfers. The bus should be locked before the chip is selected. After * locking the SPI bus, the caller should then also call the setfrequency, * setbits, and setmode methods to make sure that the SPI is properly - * configured for the device. If the SPI buss is being shared, then it + * configured for the device. If the SPI bus is being shared, then it * may have been left in an incompatible state. * * Input Parameters: diff --git a/arch/arm/src/stm32/stm32_usbdev.c b/arch/arm/src/stm32/stm32_usbdev.c index 8ecff98f6ce..6e81c600c59 100644 --- a/arch/arm/src/stm32/stm32_usbdev.c +++ b/arch/arm/src/stm32/stm32_usbdev.c @@ -1440,7 +1440,7 @@ static int stm32_wrrequest(struct stm32_usbdev_s *priv, struct stm32_ep_s *prive * * Description: * This function is called from the stm32_ep0out handler when the ep0state - * is EP0STATE_SETUP_OUT and uppon new incoming data is available in the endpoint + * is EP0STATE_SETUP_OUT and upon new incoming data is available in the endpoint * 0's buffer. This function will simply copy the OUT data into ep0data. * ****************************************************************************/ @@ -2228,7 +2228,7 @@ static void stm32_ep0out(struct stm32_usbdev_s *priv) * last set up command with the OUT * data */ - priv->ep0state = EP0STATE_IDLE; /* There is no notion of reciving OUT + priv->ep0state = EP0STATE_IDLE; /* There is no notion of receiving OUT * data greater then the length of * CONFIG_USBDEV_SETUP_MAXDATASIZE * so we are done diff --git a/arch/arm/src/stm32/stm32_wwdg.c b/arch/arm/src/stm32/stm32_wwdg.c index c38b4f8e728..72c281c805e 100644 --- a/arch/arm/src/stm32/stm32_wwdg.c +++ b/arch/arm/src/stm32/stm32_wwdg.c @@ -119,7 +119,7 @@ static void stm32_putreg(uint16_t val, uint32_t addr); static void stm32_setwindow(FAR struct stm32_lowerhalf_s *priv, uint8_t window); -/* Interrupt hanlding *******************************************************/ +/* Interrupt handling *******************************************************/ static int stm32_interrupt(int irq, FAR void *context, FAR void *arg); @@ -180,7 +180,7 @@ static uint16_t stm32_getreg(uint32_t addr) uint16_t val = getreg16(addr); - /* Is this the same value that we read from the same registe last time? Are + /* Is this the same value that we read from the same register last time? Are * we polling the register? If so, suppress some of the output. */ @@ -539,7 +539,7 @@ static int stm32_settimeout(FAR struct watchdog_lowerhalf_s *lower, * reload = timeout * Fwwdg / 1000 - 1 * * Where - * timeout is the desired timout in milliseconds + * timeout is the desired timeout in milliseconds * reload is the contents of T{5:0] * Fwwdg is the frequency of the WWDG clock */ @@ -552,7 +552,7 @@ static int stm32_settimeout(FAR struct watchdog_lowerhalf_s *lower, */ #if 0 - wdinfo("wdgtb=%d fwwdg=%d reload=%d timout=%d\n", + wdinfo("wdgtb=%d fwwdg=%d reload=%d timeout=%d\n", wdgtb, fwwdg, reload, 1000 * (reload + 1) / fwwdg); #endif if (reload <= WWDG_CR_T_MAX || wdgtb == 3) @@ -585,7 +585,7 @@ static int stm32_settimeout(FAR struct watchdog_lowerhalf_s *lower, priv->fwwdg = fwwdg; priv->reload = reload; - wdinfo("wdgtb=%d fwwdg=%d reload=%d timout=%d\n", + wdinfo("wdgtb=%d fwwdg=%d reload=%d timeout=%d\n", wdgtb, fwwdg, reload, priv->timeout); /* Set WDGTB[1:0] bits according to calculated value */ diff --git a/arch/arm/src/stm32f0l0g0/hardware/stm32f03x_pinmap.h b/arch/arm/src/stm32f0l0g0/hardware/stm32f03x_pinmap.h index 598a2f850e6..528e009129b 100644 --- a/arch/arm/src/stm32f0l0g0/hardware/stm32f03x_pinmap.h +++ b/arch/arm/src/stm32f0l0g0/hardware/stm32f03x_pinmap.h @@ -54,7 +54,7 @@ * Drivers, however, will use the pin selection without the numeric suffix. * Additional definitions are required in the board.h file. For example, if * CAN1_RX connects vis PD0 on some board, then the following definition should - * appear inthe board.h header file for that board: + * appear in the board.h header file for that board: * * #define GPIO_CAN1_RX GPIO_CAN1_RX_1 * diff --git a/arch/arm/src/stm32f0l0g0/hardware/stm32f05x_pinmap.h b/arch/arm/src/stm32f0l0g0/hardware/stm32f05x_pinmap.h index 1c5b64030d2..eefdef033ba 100644 --- a/arch/arm/src/stm32f0l0g0/hardware/stm32f05x_pinmap.h +++ b/arch/arm/src/stm32f0l0g0/hardware/stm32f05x_pinmap.h @@ -55,7 +55,7 @@ * _2, etc. Drivers, however, will use the pin selection without the numeric * suffix. Additional definitions are required in the board.h file. For * example, if USART1_TX connects vis PA9 on some board, then the following - * definition should appear inthe board.h header file for that board: + * definition should appear in the board.h header file for that board: * * #define GPIO_USART1_TX GPIO_USART1_TX_1 * diff --git a/arch/arm/src/stm32f0l0g0/hardware/stm32f07x_pinmap.h b/arch/arm/src/stm32f0l0g0/hardware/stm32f07x_pinmap.h index eb40ae357c7..c3ee56555ac 100644 --- a/arch/arm/src/stm32f0l0g0/hardware/stm32f07x_pinmap.h +++ b/arch/arm/src/stm32f0l0g0/hardware/stm32f07x_pinmap.h @@ -54,7 +54,7 @@ * Drivers, however, will use the pin selection without the numeric suffix. * Additional definitions are required in the board.h file. For example, if * CAN1_RX connects vis PD0 on some board, then the following definition should - * appear inthe board.h header file for that board: + * appear in the board.h header file for that board: * * #define GPIO_CAN1_RX GPIO_CAN1_RX_1 * diff --git a/arch/arm/src/stm32f0l0g0/hardware/stm32f09x_pinmap.h b/arch/arm/src/stm32f0l0g0/hardware/stm32f09x_pinmap.h index cab3346f008..3eaec3f906b 100644 --- a/arch/arm/src/stm32f0l0g0/hardware/stm32f09x_pinmap.h +++ b/arch/arm/src/stm32f0l0g0/hardware/stm32f09x_pinmap.h @@ -54,7 +54,7 @@ * Drivers, however, will use the pin selection without the numeric suffix. * Additional definitions are required in the board.h file. For example, if * CAN1_RX connects vis PD0 on some board, then the following definition should - * appear inthe board.h header file for that board: + * appear in the board.h header file for that board: * * #define GPIO_CAN1_RX GPIO_CAN1_RX_1 * diff --git a/arch/arm/src/stm32f0l0g0/stm32_adc.c b/arch/arm/src/stm32f0l0g0/stm32_adc.c index b33337db120..1f6a3354d35 100644 --- a/arch/arm/src/stm32f0l0g0/stm32_adc.c +++ b/arch/arm/src/stm32f0l0g0/stm32_adc.c @@ -140,7 +140,7 @@ #endif /* Number of channels per ADC: - * - F0, L0, G0 - 19, but singe SMP for all channels + * - F0, L0, G0 - 19, but single SMP for all channels * * NOTE: this value can be obtained from SMPRx register description (ST manual) */ diff --git a/arch/arm/src/stm32f0l0g0/stm32_adc.h b/arch/arm/src/stm32f0l0g0/stm32_adc.h index 3c40c75bf8a..f227a8d1359 100644 --- a/arch/arm/src/stm32f0l0g0/stm32_adc.h +++ b/arch/arm/src/stm32f0l0g0/stm32_adc.h @@ -242,7 +242,7 @@ struct stm32_adc_dev_s FAR const struct stm32_adc_ops_s *llops; - /* Require cast-compatibility with private "lower-half" ADC strucutre */ + /* Require cast-compatibility with private "lower-half" ADC structure */ }; /* Low-level operations for ADC */ diff --git a/arch/arm/src/stm32f0l0g0/stm32_dma_v1.c b/arch/arm/src/stm32f0l0g0/stm32_dma_v1.c index c7e74d71d10..0beac4f1ef1 100644 --- a/arch/arm/src/stm32f0l0g0/stm32_dma_v1.c +++ b/arch/arm/src/stm32f0l0g0/stm32_dma_v1.c @@ -89,7 +89,7 @@ * Private Types ****************************************************************************/ -/* This structure descibes one DMA channel */ +/* This structure describes one DMA channel */ struct stm32_dma_s { @@ -545,7 +545,7 @@ void stm32_dmastart(DMA_HANDLE handle, dma_callback_t callback, DEBUGASSERT(handle != NULL); - /* Save the callback info. This will be invoked whent the DMA commpletes */ + /* Save the callback info. This will be invoked whent the DMA completes */ dmach->callback = callback; dmach->arg = arg; diff --git a/arch/arm/src/stm32f0l0g0/stm32_gpio.c b/arch/arm/src/stm32f0l0g0/stm32_gpio.c index 35d8d3cafa1..9180ad3e202 100644 --- a/arch/arm/src/stm32f0l0g0/stm32_gpio.c +++ b/arch/arm/src/stm32f0l0g0/stm32_gpio.c @@ -105,7 +105,7 @@ const uint32_t g_gpiobase[STM32_NPORTS] = * * Assumptions: * This function is called early in the initialization sequence so that - * no mutual exlusion is necessary. + * no mutual exclusion is necessary. * ****************************************************************************/ @@ -124,7 +124,7 @@ void stm32_gpioinit(void) * * Returned Value: * OK on success - * A negated errono valu on invalid port, or when pin is locked as ALT + * A negated errono value on invalid port, or when pin is locked as ALT * function. * * To-Do: Auto Power Enable diff --git a/arch/arm/src/stm32f0l0g0/stm32_gpio.h b/arch/arm/src/stm32f0l0g0/stm32_gpio.h index 97402063a6d..fd3f6bc894b 100644 --- a/arch/arm/src/stm32f0l0g0/stm32_gpio.h +++ b/arch/arm/src/stm32f0l0g0/stm32_gpio.h @@ -168,7 +168,7 @@ /* If the pin is a GPIO digital output, then this identifies the initial output value. * If the pin is an input, this bit is overloaded to provide the qualifier to - * distinquish input pull-up and -down: + * distinguish input pull-up and -down: * * 1111 1111 1100 0000 0000 * 9876 5432 1098 7654 3210 diff --git a/arch/arm/src/stm32f0l0g0/stm32_irq.c b/arch/arm/src/stm32f0l0g0/stm32_irq.c index c0ba411e123..652ee1102d5 100644 --- a/arch/arm/src/stm32f0l0g0/stm32_irq.c +++ b/arch/arm/src/stm32f0l0g0/stm32_irq.c @@ -128,7 +128,7 @@ static void stm32_dumpnvic(const char *msg, int irq) * stm32_dbgmonitor, stm32_pendsv, stm32_reserved * * Description: - * Handlers for various execptions. None are handled and all are fatal + * Handlers for various exceptions. None are handled and all are fatal * error conditions. The only advantage these provided over the default * unexpected interrupt handler is that they provide a diagnostic output. * diff --git a/arch/arm/src/stm32f0l0g0/stm32_pwm.c b/arch/arm/src/stm32f0l0g0/stm32_pwm.c index 3e65c1d186f..7a60502f594 100644 --- a/arch/arm/src/stm32f0l0g0/stm32_pwm.c +++ b/arch/arm/src/stm32f0l0g0/stm32_pwm.c @@ -1064,7 +1064,7 @@ static int stm32pwm_timer(FAR struct stm32_pwmtimer_s *priv, if (priv->timtype == TIMTYPE_ADVANCED) { /* If a non-zero repetition count has been selected, then set the - * repitition counter to the count-1 (stm32pwm_start() has already + * repetition counter to the count-1 (stm32pwm_start() has already * assured us that the count value is within range). */ @@ -1545,7 +1545,7 @@ static int stm32pwm_interrupt(struct stm32_pwmtimer_s *priv) regval &= ~ATIM_BDTR_MOE; stm32pwm_putreg(priv, STM32_ATIM_BDTR_OFFSET, regval); - /* Disable first interrtups, stop and reset the timer */ + /* Disable first interrupts, stop and reset the timer */ stm32pwm_stop((FAR struct pwm_lowerhalf_s *)priv); diff --git a/arch/arm/src/stm32f0l0g0/stm32_rcc.h b/arch/arm/src/stm32f0l0g0/stm32_rcc.h index 5c5444040e3..e9919e2efc5 100644 --- a/arch/arm/src/stm32f0l0g0/stm32_rcc.h +++ b/arch/arm/src/stm32f0l0g0/stm32_rcc.h @@ -49,7 +49,7 @@ #include "hardware/stm32_rcc.h" /************************************************************************************ - * Public Function Protoypes + * Public Function Prototypes ************************************************************************************/ /************************************************************************************ diff --git a/arch/arm/src/stm32f0l0g0/stm32_serial_v1.c b/arch/arm/src/stm32f0l0g0/stm32_serial_v1.c index 5bbbf35be64..d59d4f49495 100644 --- a/arch/arm/src/stm32f0l0g0/stm32_serial_v1.c +++ b/arch/arm/src/stm32f0l0g0/stm32_serial_v1.c @@ -66,7 +66,7 @@ #include "stm32_rcc.h" #include "hardware/stm32_pinmap.h" -/* board.h should be included last. It may depend on defintions from +/* board.h should be included last. It may depend on definitions from * previous header files and it may, in certain cases, override definitions * provided in previous header files. */ @@ -1493,7 +1493,7 @@ static int up_interrupt(int irq, FAR void *context, FAR void *arg) * " " USART_ISR_ORE Overrun Error Detected * USART_CR3_CTSIE USART_ISR_CTS CTS flag (not used) * - * NOTE: Some of these status bits must be cleared by explicity writing zero + * NOTE: Some of these status bits must be cleared by explicitly writing zero * to the SR register: USART_ISR_CTS, USART_ISR_LBD. Note of those are currently * being used. */ diff --git a/arch/arm/src/stm32f0l0g0/stm32_spi.c b/arch/arm/src/stm32f0l0g0/stm32_spi.c index 2e728e6ee2d..421f3d05a6c 100644 --- a/arch/arm/src/stm32f0l0g0/stm32_spi.c +++ b/arch/arm/src/stm32f0l0g0/stm32_spi.c @@ -837,12 +837,12 @@ static void spi_modifycr(uint32_t addr, FAR struct stm32_spidev_s *priv, * Name: spi_lock * * Description: - * On SPI busses where there are multiple devices, it will be necessary to - * lock SPI to have exclusive access to the busses for a sequence of + * On SPI buses where there are multiple devices, it will be necessary to + * lock SPI to have exclusive access to the buses for a sequence of * transfers. The bus should be locked before the chip is selected. After * locking the SPI bus, the caller should then also call the setfrequency, * setbits, and setmode methods to make sure that the SPI is properly - * configured for the device. If the SPI buss is being shared, then it + * configured for the device. If the SPI bus is being shared, then it * may have been left in an incompatible state. * * Input Parameters: @@ -1616,7 +1616,7 @@ static void spi_bus_initialize(FAR struct stm32_spidev_s *priv) * Mode 0: CR1.CPHA=0 and CR1.CPOL=0 * Master: CR1.MSTR=1 * 8-bit: CR2.DS=7 - * MSB tranmitted first: CR1.LSBFIRST=0 + * MSB transmitted first: CR1.LSBFIRST=0 * Replace NSS with SSI & SSI=1: CR1.SSI=1 CR1.SSM=1 (prevents MODF error) * Two lines full duplex: CR1.BIDIMODE=0 CR1.BIDIOIE=(Don't care) and CR1.RXONLY=0 */ diff --git a/arch/arm/src/stm32f0l0g0/stm32_usbdev.c b/arch/arm/src/stm32f0l0g0/stm32_usbdev.c index 2b9177182b3..5b92e4e84fb 100644 --- a/arch/arm/src/stm32f0l0g0/stm32_usbdev.c +++ b/arch/arm/src/stm32f0l0g0/stm32_usbdev.c @@ -4,7 +4,7 @@ * Copyright (C) 2017 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * - * Ported from the STM32 F1 implmentation. References: + * Ported from the STM32 F1 implementation. References: * - RM0008 Reference manual, STMicro document ID 13902 * - STM32F10xxx USB development kit, UM0424, STMicro * @@ -1401,7 +1401,7 @@ static int stm32_wrrequest(struct stm32_usbdev_s *priv, struct stm32_ep_s *prive * * Description: * This function is called from the stm32_ep0out handler when the ep0state - * is EP0STATE_SETUP_OUT and uppon new incoming data is available in the endpoint + * is EP0STATE_SETUP_OUT and upon new incoming data is available in the endpoint * 0's buffer. This function will simply copy the OUT data into ep0data. * ****************************************************************************/ @@ -2191,7 +2191,7 @@ static void stm32_ep0out(struct stm32_usbdev_s *priv) * last set up command with the OUT * data */ - priv->ep0state = EP0STATE_IDLE; /* There is no notion of reciving OUT + priv->ep0state = EP0STATE_IDLE; /* There is no notion of receiving OUT * data greater then the length of * CONFIG_USBDEV_SETUP_MAXDATASIZE * so we are done diff --git a/arch/arm/src/stm32f7/Kconfig b/arch/arm/src/stm32f7/Kconfig index b650ea6d5e2..d6a5e57bda5 100644 --- a/arch/arm/src/stm32f7/Kconfig +++ b/arch/arm/src/stm32f7/Kconfig @@ -769,7 +769,7 @@ config STM32F7_STM32F765XX select ARMV7M_HAVE_DTCM select STM32F7_HAVE_FMC select STM32F7_HAVE_ETHRNET - select STM32F7_HAVE_RNG # data sheet says yes, Product matix says no + select STM32F7_HAVE_RNG # data sheet says yes, Product matrix says no select STM32F7_HAVE_SPI5 if !STM32F7_IO_CONFIG_V select STM32F7_HAVE_SPI6 if !STM32F7_IO_CONFIG_V select STM32F7_HAVE_SDMMC2 if !STM32F7_IO_CONFIG_V @@ -2396,7 +2396,7 @@ config STM32F7_SDMMC1_DMAPRIO hex "SDMMC1 DMA priority" default 0x00010000 ---help--- - Select SDMMC1 DMA prority. + Select SDMMC1 DMA priority. Options are: 0x00000000 low, 0x00010000 medium, 0x00020000 high, 0x00030000 very high. Default: medium. @@ -2432,7 +2432,7 @@ config STM32F7_SDMMC2_DMAPRIO hex "SDMMC2 DMA priority" default 0x00010000 ---help--- - Select SDMMC2 DMA prority. + Select SDMMC2 DMA priority. Options are: 0x00000000 low, 0x00010000 medium, 0x00020000 high, 0x00030000 very high. Default: medium. diff --git a/arch/arm/src/stm32f7/hardware/stm32_otg.h b/arch/arm/src/stm32f7/hardware/stm32_otg.h index c7a077dba59..3092850afac 100644 --- a/arch/arm/src/stm32f7/hardware/stm32_otg.h +++ b/arch/arm/src/stm32f7/hardware/stm32_otg.h @@ -835,7 +835,7 @@ #define OTG_DOEPCTL_MPSIZ_MASK (0x7ff << OTG_DOEPCTL_MPSIZ_SHIFT) /* Bits 11-14: Reserved, must be kept at reset value */ #define OTG_DOEPCTL_USBAEP (1 << 15) /* Bit 15: USB active endpoint */ -#define OTG_DOEPCTL_DPID (1 << 16) /* Bit 16: Endpoint data PID (interrupt/buld) */ +#define OTG_DOEPCTL_DPID (1 << 16) /* Bit 16: Endpoint data PID (interrupt/bulk) */ # define OTG_DOEPCTL_DATA0 (0) # define OTG_DOEPCTL_DATA1 OTG_DOEPCTL_DPID #define OTG_DOEPCTL_EONUM (1 << 16) /* Bit 16: Even/odd frame (isochronous) */ diff --git a/arch/arm/src/stm32f7/hardware/stm32f72xx73xx_dbgmcu.h b/arch/arm/src/stm32f7/hardware/stm32f72xx73xx_dbgmcu.h index 3a2036ae7d9..22fc18b8bf2 100644 --- a/arch/arm/src/stm32f7/hardware/stm32f72xx73xx_dbgmcu.h +++ b/arch/arm/src/stm32f7/hardware/stm32f72xx73xx_dbgmcu.h @@ -73,7 +73,7 @@ #define DBGMCU_CR_STANDBY (1 << 2) /* Bit 2: Debug Standby mode */ #define DBGMCU_CR_TRACEIOEN (1 << 5) /* Bit 5: Trace enabled */ -#define DBGMCU_CR_TRACEMODE_SHIFT (6) /* Bits 7-6: Trace mode pin assignement */ +#define DBGMCU_CR_TRACEMODE_SHIFT (6) /* Bits 7-6: Trace mode pin assignment */ #define DBGMCU_CR_TRACEMODE_MASK (3 << DBGMCU_CR_TRACEMODE_SHIFT) #define DBGMCU_CR_ASYNCH (0 << DBGMCU_CR_TRACEMODE_SHIFT) /* Asynchronous Mode */ diff --git a/arch/arm/src/stm32f7/hardware/stm32f72xx73xx_pinmap.h b/arch/arm/src/stm32f7/hardware/stm32f72xx73xx_pinmap.h index 0bc2853378e..54387420ad1 100644 --- a/arch/arm/src/stm32f7/hardware/stm32f72xx73xx_pinmap.h +++ b/arch/arm/src/stm32f7/hardware/stm32f72xx73xx_pinmap.h @@ -59,7 +59,7 @@ * Drivers, however, will use the pin selection without the numeric suffix. * Additional definitions are required in the board.h file. For example, if * CAN1_RX connects via PA11 on some board, then the following definitions should - * appear inthe board.h header file for that board: + * appear in the board.h header file for that board: * * #define GPIO_CAN1_RX GPIO_CAN1_RX_1 * diff --git a/arch/arm/src/stm32f7/hardware/stm32f74xx75xx_dbgmcu.h b/arch/arm/src/stm32f7/hardware/stm32f74xx75xx_dbgmcu.h index d88cef1fa09..d6b16ad0f1a 100644 --- a/arch/arm/src/stm32f7/hardware/stm32f74xx75xx_dbgmcu.h +++ b/arch/arm/src/stm32f7/hardware/stm32f74xx75xx_dbgmcu.h @@ -72,7 +72,7 @@ #define DBGMCU_CR_STANDBY (1 << 2) /* Bit 2: Debug Standby mode */ #define DBGMCU_CR_TRACEIOEN (1 << 5) /* Bit 5: Trace enabled */ -#define DBGMCU_CR_TRACEMODE_SHIFT (6) /* Bits 7-6: Trace mode pin assignement */ +#define DBGMCU_CR_TRACEMODE_SHIFT (6) /* Bits 7-6: Trace mode pin assignment */ #define DBGMCU_CR_TRACEMODE_MASK (3 << DBGMCU_CR_TRACEMODE_SHIFT) #define DBGMCU_CR_ASYNCH (0 << DBGMCU_CR_TRACEMODE_SHIFT) /* Asynchronous Mode */ #define DBGMCU_CR_SYNCH1 (1 << DBGMCU_CR_TRACEMODE_SHIFT) /* Synchronous Mode, TRACEDATA size=1 */ diff --git a/arch/arm/src/stm32f7/hardware/stm32f74xx75xx_pinmap.h b/arch/arm/src/stm32f7/hardware/stm32f74xx75xx_pinmap.h index 70e2e109d65..56dafc8522b 100644 --- a/arch/arm/src/stm32f7/hardware/stm32f74xx75xx_pinmap.h +++ b/arch/arm/src/stm32f7/hardware/stm32f74xx75xx_pinmap.h @@ -58,7 +58,7 @@ * Drivers, however, will use the pin selection without the numeric suffix. * Additional definitions are required in the board.h file. For example, if * CAN1_RX connects via PA11 on some board, then the following definitions should - * appear inthe board.h header file for that board: + * appear in the board.h header file for that board: * * #define GPIO_CAN1_RX GPIO_CAN1_RX_1 * diff --git a/arch/arm/src/stm32f7/hardware/stm32f76xx77xx_dbgmcu.h b/arch/arm/src/stm32f7/hardware/stm32f76xx77xx_dbgmcu.h index 9c8c3375428..e47ef7f9a0f 100644 --- a/arch/arm/src/stm32f7/hardware/stm32f76xx77xx_dbgmcu.h +++ b/arch/arm/src/stm32f7/hardware/stm32f76xx77xx_dbgmcu.h @@ -72,7 +72,7 @@ #define DBGMCU_CR_STANDBY (1 << 2) /* Bit 2: Debug Standby mode */ #define DBGMCU_CR_TRACEIOEN (1 << 5) /* Bit 5: Trace enabled */ -#define DBGMCU_CR_TRACEMODE_SHIFT (6) /* Bits 7-6: Trace mode pin assignement */ +#define DBGMCU_CR_TRACEMODE_SHIFT (6) /* Bits 7-6: Trace mode pin assignment */ #define DBGMCU_CR_TRACEMODE_MASK (3 << DBGMCU_CR_TRACEMODE_SHIFT) #define DBGMCU_CR_ASYNCH (0 << DBGMCU_CR_TRACEMODE_SHIFT) /* Asynchronous Mode */ #define DBGMCU_CR_SYNCH1 (1 << DBGMCU_CR_TRACEMODE_SHIFT) /* Synchronous Mode, TRACEDATA size=1 */ diff --git a/arch/arm/src/stm32f7/hardware/stm32f76xx77xx_pinmap.h b/arch/arm/src/stm32f7/hardware/stm32f76xx77xx_pinmap.h index 2fbd4414e4c..121b1f98863 100644 --- a/arch/arm/src/stm32f7/hardware/stm32f76xx77xx_pinmap.h +++ b/arch/arm/src/stm32f7/hardware/stm32f76xx77xx_pinmap.h @@ -58,7 +58,7 @@ * Drivers, however, will use the pin selection without the numeric suffix. * Additional definitions are required in the board.h file. For example, if * CAN1_RX connects vis PA11 on some board, then the following definitions should - * appear inthe board.h header file for that board: + * appear in the board.h header file for that board: * * #define GPIO_CAN1_RX GPIO_CAN1_RX_1 * diff --git a/arch/arm/src/stm32f7/stm32_adc.c b/arch/arm/src/stm32f7/stm32_adc.c index 50fd4efbde7..45c366e6f25 100644 --- a/arch/arm/src/stm32f7/stm32_adc.c +++ b/arch/arm/src/stm32f7/stm32_adc.c @@ -737,7 +737,7 @@ static int adc_timinit(FAR struct stm32_dev_s *priv) /* Configure the timer channel to drive the ADC */ - /* Caculate optimal values for the timer prescaler and for the timer + /* Calculate optimal values for the timer prescaler and for the timer * reload register. If freq is the desired frequency, then * * reload = timclk / freq diff --git a/arch/arm/src/stm32f7/stm32_can.c b/arch/arm/src/stm32f7/stm32_can.c index 376584c9f25..edc67f824fc 100644 --- a/arch/arm/src/stm32f7/stm32_can.c +++ b/arch/arm/src/stm32f7/stm32_can.c @@ -1175,7 +1175,7 @@ static int stm32can_remoterequest(FAR struct can_dev_s *dev, uint16_t id) * * Byte 0: Bits 0-7: Bits 3-10 of the 11-bit CAN identifier * Byte 1: Bits 5-7: Bits 0-2 of the 11-bit CAN identifier - * Bit 4: Remote Tranmission Request (RTR) + * Bit 4: Remote Transmission Request (RTR) * Bits 0-3: Data Length Code (DLC) * Bytes 2-10: CAN data * diff --git a/arch/arm/src/stm32f7/stm32_dma.c b/arch/arm/src/stm32f7/stm32_dma.c index 4a4f252be7f..46a7d5ed446 100644 --- a/arch/arm/src/stm32f7/stm32_dma.c +++ b/arch/arm/src/stm32f7/stm32_dma.c @@ -302,7 +302,7 @@ static inline FAR struct stm32_dma_s *stm32_dmamap(unsigned long dmamap) unsigned int controller = STM32_DMA_CONTROLLER(dmamap); - /* Extact the stream number from the bit encoded value */ + /* Extract the stream number from the bit encoded value */ unsigned int stream = STM32_DMA_STREAM(dmamap); diff --git a/arch/arm/src/stm32f7/stm32_ethernet.c b/arch/arm/src/stm32f7/stm32_ethernet.c index 7f96c167f89..cac910b31a1 100644 --- a/arch/arm/src/stm32f7/stm32_ethernet.c +++ b/arch/arm/src/stm32f7/stm32_ethernet.c @@ -236,7 +236,7 @@ #define STM32_ETH_NFREEBUFFERS (CONFIG_STM32F7_ETH_NTXDESC+1) -/* Buffers use fro DMA access must begin on an address aligned with the +/* Buffers use for DMA access must begin on an address aligned with the * D-Cache line and must be an even multiple of the D-Cache line size. * These size/alignment requirements are necessary so that D-Cache flush * and invalidate operations will not have any additional effects. @@ -1128,7 +1128,7 @@ static int stm32_transmit(struct stm32_ethmac_s *priv) txdesc->tdes0 |= (ETH_TDES0_LS | ETH_TDES0_IC); - /* This segement is, most likely, of fractional buffersize */ + /* This segment is, most likely, of fractional buffersize */ txdesc->tdes1 = lastsize; buffer += lastsize; @@ -3446,7 +3446,7 @@ static int stm32_phyinit(struct stm32_ethmac_s *priv) } #endif -#else /* Auto-negotion not selected */ +#else /* Auto-negotiation not selected */ phyval = 0; #ifdef CONFIG_STM32F7_ETHFD @@ -3486,7 +3486,7 @@ static int stm32_phyinit(struct stm32_ethmac_s *priv) * Name: stm32_selectmii * * Description: - * Selects the MII inteface. + * Selects the MII interface. * * Input Parameters: * None @@ -3511,7 +3511,7 @@ static inline void stm32_selectmii(void) * Name: stm32_selectrmii * * Description: - * Selects the RMII inteface. + * Selects the RMII interface. * * Input Parameters: * None diff --git a/arch/arm/src/stm32f7/stm32_gpio.h b/arch/arm/src/stm32f7/stm32_gpio.h index feef673c4ec..73fb662d6d6 100644 --- a/arch/arm/src/stm32f7/stm32_gpio.h +++ b/arch/arm/src/stm32f7/stm32_gpio.h @@ -164,7 +164,7 @@ /* If the pin is a GPIO digital output, then this identifies the initial output value. * If the pin is an input, this bit is overloaded to provide the qualifier to - * distinquish input pull-up and -down: + * distinguish input pull-up and -down: * * 1111 1111 1100 0000 0000 * 9876 5432 1098 7654 3210 diff --git a/arch/arm/src/stm32f7/stm32_ltdc.h b/arch/arm/src/stm32f7/stm32_ltdc.h index c2cebe4155a..ee5f45a7daa 100644 --- a/arch/arm/src/stm32f7/stm32_ltdc.h +++ b/arch/arm/src/stm32f7/stm32_ltdc.h @@ -79,7 +79,7 @@ int stm32_ltdcinitialize(void); * Name: stm32_ltdcuninitialize * * Description: - * Unitialize the ltdc controller + * Uninitialize the ltdc controller * ****************************************************************************/ diff --git a/arch/arm/src/stm32f7/stm32_otgdev.c b/arch/arm/src/stm32f7/stm32_otgdev.c index 38b6834ee05..b123773f666 100644 --- a/arch/arm/src/stm32f7/stm32_otgdev.c +++ b/arch/arm/src/stm32f7/stm32_otgdev.c @@ -375,7 +375,7 @@ # define EP0 (0) -/* The set of all enpoints available to the class implementation (1-3) */ +/* The set of all endpoints available to the class implementation (1-3) */ # define STM32_EP_AVAILABLE (0xfe) /* All available endpoints */ @@ -2644,7 +2644,7 @@ static inline void stm32_ep0out_setup(struct stm32_usbdev_s *priv) stm32_ep0_stall(priv); } - /* Reset state/data associated with thie SETUP request */ + /* Reset state/data associated with the SETUP request */ priv->ep0datlen = 0; } @@ -2777,7 +2777,7 @@ static inline void stm32_epout_interrupt(FAR struct stm32_usbdev_s *priv) doepint = stm32_getreg(STM32_OTG_DOEPINT(epno)); doepint &= stm32_getreg(STM32_OTG_DOEPMSK); - /* Transfer completed interrupt. This interrupt is trigged when + /* Transfer completed interrupt. This interrupt is triggered when * stm32_rxinterrupt() removes the last packet data from the RxFIFO. * In this case, core internally sets the NAK bit for this endpoint * to prevent it from receiving any more packets. @@ -4151,7 +4151,7 @@ static void stm32_ep0_configure(FAR struct stm32_usbdev_s *priv) * Name: stm32_epout_disable * * Description: - * Diable an OUT endpoint will no longer be used + * Disable an OUT endpoint will no longer be used * ****************************************************************************/ @@ -5290,7 +5290,7 @@ static void stm32_hwinitialize(FAR struct stm32_usbdev_s *priv) # else /* CONFIG_STM32F7_NO_ULPI */ - /* Switch off FS tranceiver */ + /* Switch off FS transceiver */ regval = stm32_getreg(STM32_OTG_GCCFG); regval &= ~(OTG_GCCFG_PWRDWN); @@ -5313,7 +5313,7 @@ static void stm32_hwinitialize(FAR struct stm32_usbdev_s *priv) # ifdef CONFIG_STM32F7_INTERNAL_ULPI - /* Select UTMI/ULPI Interace */ + /* Select UTMI/ULPI Interface */ regval = stm32_getreg(STM32_OTG_GUSBCFG); regval &= ~OTG_GUSBCFG_ULPISEL; diff --git a/arch/arm/src/stm32f7/stm32_otghost.c b/arch/arm/src/stm32f7/stm32_otghost.c index b5ae9387b4c..0eaca219048 100644 --- a/arch/arm/src/stm32f7/stm32_otghost.c +++ b/arch/arm/src/stm32f7/stm32_otghost.c @@ -5040,7 +5040,7 @@ static void stm32_vbusdrive(FAR struct stm32_usbhost_s *priv, bool state) * Description: * Initialize/re-initialize hardware for host mode operation. At present, * this function is called only from stm32_hw_initialize(). But if OTG mode - * were supported, this function would also be called to swtich between + * were supported, this function would also be called to switch between * host and device modes on a connector ID change interrupt. * * Input Parameters: diff --git a/arch/arm/src/stm32f7/stm32_pmstandby.c b/arch/arm/src/stm32f7/stm32_pmstandby.c index 9f58a8967b8..aa1125ddb5d 100644 --- a/arch/arm/src/stm32f7/stm32_pmstandby.c +++ b/arch/arm/src/stm32f7/stm32_pmstandby.c @@ -69,7 +69,7 @@ void stm32_pmstandby(void) { uint32_t regval; - /* Clear the wake-up flags before reseting. */ + /* Clear the wake-up flags before resetting. */ modifyreg32(STM32_PWR_CR1, 0, PWR_CR1_CSBF); modifyreg32(STM32_PWR_CR2, 0, PWR_CR2_CWUPF1 | PWR_CR2_CWUPF2 | diff --git a/arch/arm/src/stm32f7/stm32_pwm.c b/arch/arm/src/stm32f7/stm32_pwm.c index d9db68f51ce..aae9bb44aaa 100644 --- a/arch/arm/src/stm32f7/stm32_pwm.c +++ b/arch/arm/src/stm32f7/stm32_pwm.c @@ -216,7 +216,7 @@ struct stm32_pwmtimer_s uint8_t irq; /* Timer update IRQ */ uint8_t prev; /* The previous value of the RCR (pre-loaded) */ uint8_t curr; /* The current value of the RCR (pre-loaded) */ - uint32_t count; /* Remaining pluse count */ + uint32_t count; /* Remaining pulse count */ #else uint32_t frequency; /* Current frequency setting */ #endif @@ -1115,7 +1115,7 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv, uint16_t ccmr1; uint16_t ccmr2; - /* New timer regiser bit settings */ + /* New timer register bit settings */ uint16_t ccenable; uint16_t ocmode1; @@ -1295,7 +1295,7 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv, if (priv->timtype == TIMTYPE_ADVANCED) { /* If a non-zero repetition count has been selected, then set the - * repitition counter to the count-1 (pwm_start() has already + * repetition counter to the count-1 (pwm_start() has already * assured us that the count value is within range). */ @@ -1752,7 +1752,7 @@ static int pwm_interrupt(struct stm32_pwmtimer_s *priv) regval &= ~ATIM_BDTR_MOE; pwm_putreg(priv, STM32_ATIM_BDTR_OFFSET, regval); - /* Disable first interrtups, stop and reset the timer */ + /* Disable first interrupts, stop and reset the timer */ pwm_stop((FAR struct pwm_lowerhalf_s *)priv); diff --git a/arch/arm/src/stm32f7/stm32_pwr.c b/arch/arm/src/stm32f7/stm32_pwr.c index 573796a7880..2b42172decc 100644 --- a/arch/arm/src/stm32f7/stm32_pwr.c +++ b/arch/arm/src/stm32f7/stm32_pwr.c @@ -198,23 +198,23 @@ void stm32_pwr_enablebkp(bool writable) * into the RAM will be maintained in the Standby and VBAT modes. * * Input Parameters: - * regon - state to set it to + * region - state to set it to * * Returned Value: * None * ************************************************************************************/ -void stm32_pwr_enablebreg(bool regon) +void stm32_pwr_enablebreg(bool region) { uint16_t regval; regval = stm32_pwr_getreg(STM32_PWR_CSR1_OFFSET); regval &= ~PWR_CSR1_BRE; - regval |= regon ? PWR_CSR1_BRE : 0; + regval |= region ? PWR_CSR1_BRE : 0; stm32_pwr_putreg(STM32_PWR_CSR1_OFFSET, regval); - if (regon) + if (region) { while ((stm32_pwr_getreg(STM32_PWR_CSR1_OFFSET) & PWR_CSR1_BRR) == 0); } diff --git a/arch/arm/src/stm32f7/stm32_pwr.h b/arch/arm/src/stm32f7/stm32_pwr.h index 77174a2f65c..ab933fcda7b 100644 --- a/arch/arm/src/stm32f7/stm32_pwr.h +++ b/arch/arm/src/stm32f7/stm32_pwr.h @@ -117,14 +117,14 @@ void stm32_pwr_enablebkp(bool writable); * into the RAM will be maintained in the Standby and VBAT modes. * * Input Parameters: - * regon - state to set it to + * region - state to set it to * * Returned Value: * None * ************************************************************************************/ -void stm32_pwr_enablebreg(bool regon); +void stm32_pwr_enablebreg(bool region); #undef EXTERN #if defined(__cplusplus) diff --git a/arch/arm/src/stm32f7/stm32_qencoder.c b/arch/arm/src/stm32f7/stm32_qencoder.c index b44272fb71b..29f40803313 100644 --- a/arch/arm/src/stm32f7/stm32_qencoder.c +++ b/arch/arm/src/stm32f7/stm32_qencoder.c @@ -1037,7 +1037,7 @@ static int stm32_position(FAR struct qe_lowerhalf_s *lower, FAR int32_t *pos) do { - /* Don't let another task pre-empt us until we get the measurement. The timer + /* Don't let another task preempt us until we get the measurement. The timer * interrupt may still be processed */ diff --git a/arch/arm/src/stm32f7/stm32_qspi.c b/arch/arm/src/stm32f7/stm32_qspi.c index 0605915b493..62460ab3c4d 100644 --- a/arch/arm/src/stm32f7/stm32_qspi.c +++ b/arch/arm/src/stm32f7/stm32_qspi.c @@ -2340,7 +2340,7 @@ static int qspi_memory(struct qspi_dev_s *dev, * buflen - Buffer length to allocate in bytes * * Returned Value: - * Address of tha allocated memory on success; NULL is returned on any + * Address of the allocated memory on success; NULL is returned on any * failure. * ****************************************************************************/ diff --git a/arch/arm/src/stm32f7/stm32_rcc.c b/arch/arm/src/stm32f7/stm32_rcc.c index a094dab1e8c..809e2d16c78 100644 --- a/arch/arm/src/stm32f7/stm32_rcc.c +++ b/arch/arm/src/stm32f7/stm32_rcc.c @@ -160,7 +160,7 @@ void stm32_clockconfig(void) * * This functional performs a subset of the operations performed by * stm32_clockconfig(): It does not reset any devices, and it does not reset the - * currenlty enabled peripheral clocks. + * currently enabled peripheral clocks. * * If CONFIG_STM32F7_CUSTOM_CLOCKCONFIG is defined, then clocking will be enabled * by an externally provided, board-specific function called diff --git a/arch/arm/src/stm32f7/stm32_sai.c b/arch/arm/src/stm32f7/stm32_sai.c index 4d09e353fc4..c75264bf87b 100644 --- a/arch/arm/src/stm32f7/stm32_sai.c +++ b/arch/arm/src/stm32f7/stm32_sai.c @@ -1051,7 +1051,7 @@ static void sai_worker(void *arg) while (sq_peek(&priv->done) != NULL) { /* Remove the buffer container from the done queue. NOTE that - * interupts must be enabled to do this because the done queue is + * interrupts must be enabled to do this because the done queue is * also modified from the interrupt level. */ @@ -1334,7 +1334,7 @@ static int sai_receive(struct i2s_dev_s *dev, struct ap_buffer_s *apb, flags = enter_critical_section(); sq_addlast((sq_entry_t *)bfcontainer, &priv->pend); - /* Then start the next transfer. If there is already a transfer in progess, + /* Then start the next transfer. If there is already a transfer in progress, * then this will do nothing. */ @@ -1434,7 +1434,7 @@ static int sai_send(struct i2s_dev_s *dev, struct ap_buffer_s *apb, flags = enter_critical_section(); sq_addlast((sq_entry_t *)bfcontainer, &priv->pend); - /* Then start the next transfer. If there is already a transfer in progess, + /* Then start the next transfer. If there is already a transfer in progress, * then this will do nothing. */ diff --git a/arch/arm/src/stm32f7/stm32_sdmmc.c b/arch/arm/src/stm32f7/stm32_sdmmc.c index a4ab3811818..de4b83d07ec 100644 --- a/arch/arm/src/stm32f7/stm32_sdmmc.c +++ b/arch/arm/src/stm32f7/stm32_sdmmc.c @@ -848,7 +848,7 @@ static inline void stm32_setclkcr(struct stm32_dev_s *priv, uint32_t clkcr) * Name: stm32_configwaitints * * Description: - * Enable/disable SDIO interrupts needed to suport the wait function + * Enable/disable SDIO interrupts needed to support the wait function * * Input Parameters: * priv - Instance of the SDMMC private state structure. @@ -2916,7 +2916,7 @@ errout: * * Events are automatically disabled once the callback is performed and no * further callback events will occur until they are again enabled by - * calling this methos. + * calling this method. * * Input Parameters: * dev - An instance of the SDIO device interface diff --git a/arch/arm/src/stm32f7/stm32_spi.c b/arch/arm/src/stm32f7/stm32_spi.c index bc8bb0875aa..2a3cc7825a9 100644 --- a/arch/arm/src/stm32f7/stm32_spi.c +++ b/arch/arm/src/stm32f7/stm32_spi.c @@ -1083,12 +1083,12 @@ static void spi_modifycr2(FAR struct stm32_spidev_s *priv, uint16_t setbits, * Name: spi_lock * * Description: - * On SPI busses where there are multiple devices, it will be necessary to - * lock SPI to have exclusive access to the busses for a sequence of + * On SPI buses where there are multiple devices, it will be necessary to + * lock SPI to have exclusive access to the buses for a sequence of * transfers. The bus should be locked before the chip is selected. After * locking the SPI bus, the caller should then also call the setfrequency, * setbits, and setmode methods to make sure that the SPI is properly - * configured for the device. If the SPI buss is being shared, then it + * configured for the device. If the SPI bus is being shared, then it * may have been left in an incompatible state. * * Input Parameters: @@ -1924,7 +1924,7 @@ static void spi_bus_initialize(struct stm32_spidev_s *priv) * Mode 0: CR1.CPHA=0 and CR1.CPOL=0 * Master: CR1.MSTR=1 * 8-bit: CR2.DS=7 - * MSB tranmitted first: CR1.LSBFIRST=0 + * MSB transmitted first: CR1.LSBFIRST=0 * Replace NSS with SSI & SSI=1: CR1.SSI=1 CR1.SSM=1 (prevents MODF error) * Two lines full duplex: CR1.BIDIMODE=0 CR1.BIDIOIE=(Don't care) and CR1.RXONLY=0 */ diff --git a/arch/arm/src/stm32f7/stm32_start.c b/arch/arm/src/stm32f7/stm32_start.c index 51bf248f696..75e2e6b215d 100644 --- a/arch/arm/src/stm32f7/stm32_start.c +++ b/arch/arm/src/stm32f7/stm32_start.c @@ -389,7 +389,7 @@ void __start(void) /* For the case of the separate user-/kernel-space build, perform whatever * platform specific initialization of the user memory is required. * Normally this just means initializing the user space .data and .bss - * segements. + * segments. */ #ifdef CONFIG_BUILD_PROTECTED diff --git a/arch/arm/src/stm32h7/hardware/stm32_mdma.h b/arch/arm/src/stm32h7/hardware/stm32_mdma.h index 7ee7959085d..785f4af3c2c 100644 --- a/arch/arm/src/stm32h7/hardware/stm32_mdma.h +++ b/arch/arm/src/stm32h7/hardware/stm32_mdma.h @@ -530,7 +530,7 @@ /* MDMA channel x control register */ -#define MDMA_CCR_EN (0) /* Bit 0: Channel eanble / flag channel ready */ +#define MDMA_CCR_EN (0) /* Bit 0: Channel enable / flag channel ready */ #define MDMA_CCR_TEIE (1) /* Bit 1: Transfer error interrupt enable */ #define MDMA_CCR_CTCIE (2) /* Bit 2: Channel transfer complete interrupt enable */ #define MDMA_CCR_BRTIE (3) /* Bit 3: Block repeat transfer interrupt enable */ @@ -607,7 +607,7 @@ #define MDMA_CTCR_TLEN_MASK (0x7f << MDMA_CTCR_TLEN_SHIFT) # define MDMA_CTCR_TLEN(len) (((len-1) << MDMA_CTCR_TLEN_SHIFT) & MDMA_CTCR_TLEN_MASK) #define MDMA_CTCR_PKE (25) /* Bit 25: Pack enable */ -#define MDMA_CTCR_PAM_SHIFT (26) /* Bits 26-27: Padding/alignement mode */ +#define MDMA_CTCR_PAM_SHIFT (26) /* Bits 26-27: Padding/alignment mode */ #define MDMA_CTCR_PAM_MASK (3 << MDMA_CTCR_PAM_SHIFT) # define MDMA_CTCR_PAM_RIGHT (0 << MDMA_CTCR_PAM_SHIFT) /* 00: */ # define MDMA_CTCR_PAM_SINRIGHT (1 << MDMA_CTCR_PAM_SHIFT) /* 01: */ diff --git a/arch/arm/src/stm32h7/hardware/stm32_otg.h b/arch/arm/src/stm32h7/hardware/stm32_otg.h index d6b6fbfe185..689571d4e06 100644 --- a/arch/arm/src/stm32h7/hardware/stm32_otg.h +++ b/arch/arm/src/stm32h7/hardware/stm32_otg.h @@ -851,7 +851,7 @@ #define OTG_DOEPCTL_MPSIZ_MASK (0x7ff << OTG_DOEPCTL_MPSIZ_SHIFT) /* Bits 11-14: Reserved */ #define OTG_DOEPCTL_USBAEP (1 << 15) /* Bit 15: USB active endpoint */ -#define OTG_DOEPCTL_DPID (1 << 16) /* Bit 16: Endpoint data PID (interrupt/buld) */ +#define OTG_DOEPCTL_DPID (1 << 16) /* Bit 16: Endpoint data PID (interrupt/bulk) */ # define OTG_DOEPCTL_DATA0 (0) # define OTG_DOEPCTL_DATA1 OTG_DOEPCTL_DPID #define OTG_DOEPCTL_EONUM (1 << 16) /* Bit 16: Even/odd frame (isochronous) */ diff --git a/arch/arm/src/stm32h7/hardware/stm32h7x3xx_flash.h b/arch/arm/src/stm32h7/hardware/stm32h7x3xx_flash.h index 530da8ac2b4..3de570d8d20 100644 --- a/arch/arm/src/stm32h7/hardware/stm32h7x3xx_flash.h +++ b/arch/arm/src/stm32h7/hardware/stm32h7x3xx_flash.h @@ -177,14 +177,14 @@ #define FLASH_CR_PGSERRIE (1 << 18) /* Bit 18: Programming sequence error interrupt enable */ #define FLASH_CR_STRBERRIE (1 << 19) /* Bit 19: Strobe error interrupt enable */ /* Bit 20: Reserved */ -#define FLASH_CR_INCERRIE (1 << 21) /* Bit 21: Inconsistency error interrupt enbale */ +#define FLASH_CR_INCERRIE (1 << 21) /* Bit 21: Inconsistency error interrupt enable */ #define FLASH_CR_OPERRIE (1 << 22) /* Bit 22: Write/erase error interrupt enable */ #define FLASH_CR_RDPERRIE (1 << 23) /* Bit 23: Read protection error interrupt enable */ #define FLASH_CR_RDSERRIE (1 << 24) /* Bit 24: Secure error interrupt enable */ #define FLASH_CR_SNECCERRIE (1 << 25) /* Bit 25: ECC single correction error interrupt enable */ #define FLASH_CR_DBECCERRIE (1 << 26) /* Bit 26: ECC double detection error interrupt enable */ #define FLASH_CR_CRCENDIE (1 << 27) /* Bit 27: CRC end of calculation interrupt enable */ - /* Bits 28-31: Reserverd */ + /* Bits 28-31: Reserved */ /* Flash Status Register (SR) Bank 1 or 2 */ diff --git a/arch/arm/src/stm32h7/hardware/stm32h7x3xx_pinmap.h b/arch/arm/src/stm32h7/hardware/stm32h7x3xx_pinmap.h index a99c2e67c90..ffac46c4473 100644 --- a/arch/arm/src/stm32h7/hardware/stm32h7x3xx_pinmap.h +++ b/arch/arm/src/stm32h7/hardware/stm32h7x3xx_pinmap.h @@ -57,7 +57,7 @@ * Drivers, however, will use the pin selection without the numeric suffix. * Additional definitions are required in the board.h file. For example, if * CAN1_RX connects vis PA11 on some board, then the following definitions should - * appear inthe board.h header file for that board: + * appear in the board.h header file for that board: * * #define GPIO_CAN1_RX GPIO_CAN1_RX_1 * diff --git a/arch/arm/src/stm32h7/hardware/stm32h7x3xx_rcc.h b/arch/arm/src/stm32h7/hardware/stm32h7x3xx_rcc.h index 4ead8f3b663..dacd1edb17c 100644 --- a/arch/arm/src/stm32h7/hardware/stm32h7x3xx_rcc.h +++ b/arch/arm/src/stm32h7/hardware/stm32h7x3xx_rcc.h @@ -494,7 +494,7 @@ #define RCC_PLL3FRACR_FRACN3_MASK (0x1FFFul << RCC_PLL3FRACR_FRACN3_SHIFT) /* 0x0000FFF8 */ #define RCC_PLL3FRACR_FRACN3 RCC_PLL3FRACR_FRACN3_MASK -/* Bit definitions for RCC_D1CCIPR reigster */ +/* Bit definitions for RCC_D1CCIPR register */ #define RCC_D1CCIPR_FMCSEL_SHIFT (0) /* Bits 0-1: */ #define RCC_D1CCIPR_FMCSEL_MASK (3 << RCC_D1CCIPR_FMCSEL_SHIFT) @@ -524,7 +524,7 @@ /* 11: Reserved */ /* Bits 30-31: Reserved */ -/* Bit definitions for RCC_D2CCIP1R reigster */ +/* Bit definitions for RCC_D2CCIP1R register */ #define RCC_D2CCIP1R_SAI1SEL_SHIFT (0) /* Bits 0-2 */ #define RCC_D2CCIP1R_SAI1SEL_MASK (7 << RCC_D2CCIP1R_SAI1SEL_MASK) @@ -822,7 +822,7 @@ #define RCC_APB4RSTR_VREFRST (1 << 15) /* RCC APB4RSTR: VREFRST */ #define RCC_APB4RSTR_SAI4RST (1 << 21) /* RCC APB4RSTR: SAI4RST */ -/* RCC Global Control resgister */ +/* RCC Global Control register */ #define RCC_GCR_WW1RSC (1 << 0) /* Bit 0: WWDG1 reset scope control */ diff --git a/arch/arm/src/stm32h7/stm32_adc.c b/arch/arm/src/stm32h7/stm32_adc.c index 81982cc5282..7f0415e406f 100644 --- a/arch/arm/src/stm32h7/stm32_adc.c +++ b/arch/arm/src/stm32h7/stm32_adc.c @@ -701,7 +701,7 @@ static int adc_timinit(FAR struct stm32_dev_s *priv) modifyreg32(priv->trcc_enr, 0, priv->trcc_en); - /* Caculate optimal values for the timer prescaler and for the timer + /* Calculate optimal values for the timer prescaler and for the timer * reload register. If freq is the desired frequency, then * * reload = timclk / freq diff --git a/arch/arm/src/stm32h7/stm32_bbsram.c b/arch/arm/src/stm32h7/stm32_bbsram.c index 1806f9e7ebd..5438a846e50 100644 --- a/arch/arm/src/stm32h7/stm32_bbsram.c +++ b/arch/arm/src/stm32h7/stm32_bbsram.c @@ -311,7 +311,7 @@ static uint32_t stm32_bbsram_crc(FAR struct bbsramfh_s *pf) * ensures that non uint32 data is committed to SRAM * * Input Parameters: - * pf = ponter to the bbsramfh_s + * pf = pointer to the bbsramfh_s * * Returned Value: * None diff --git a/arch/arm/src/stm32h7/stm32_dma.c b/arch/arm/src/stm32h7/stm32_dma.c index a83430d03ca..9cdb554d308 100644 --- a/arch/arm/src/stm32h7/stm32_dma.c +++ b/arch/arm/src/stm32h7/stm32_dma.c @@ -94,7 +94,7 @@ #define BDMA_FIRST (DMA2_LAST) #define BDMA_LAST (BDMA_FIRST+BDMA_NCHAN) -/* All availalbe DMA channels (streams from standard DMA and +/* All available DMA channels (streams from standard DMA and * channels from BDMA and MDMA) */ @@ -156,7 +156,7 @@ struct stm32_dmach_s typedef FAR struct stm32_dmach_s *DMA_CHANNEL; -/* DMA opertions */ +/* DMA operations */ struct stm32_dma_ops_s { diff --git a/arch/arm/src/stm32h7/stm32_ethernet.c b/arch/arm/src/stm32h7/stm32_ethernet.c index dc356abf601..d9903cf615b 100644 --- a/arch/arm/src/stm32h7/stm32_ethernet.c +++ b/arch/arm/src/stm32h7/stm32_ethernet.c @@ -230,7 +230,7 @@ #define STM32_ETH_NFREEBUFFERS (CONFIG_STM32H7_ETH_NTXDESC+1) -/* Buffers use fro DMA access must begin on an address aligned with the +/* Buffers use for DMA access must begin on an address aligned with the * D-Cache line and must be an even multiple of the D-Cache line size. * These size/alignment requirements are necessary so that D-Cache flush * and invalidate operations will not have any additional effects. @@ -1156,7 +1156,7 @@ static int stm32_transmit(struct stm32_ethmac_s *priv) txdesc->des3 |= ETH_TDES3_RD_LD; - /* This segement is, most likely, of fractional buffersize */ + /* This segment is, most likely, of fractional buffersize */ /* ask for an interrupt when this segment transfer completes. */ @@ -3617,7 +3617,7 @@ static int stm32_phyinit(struct stm32_ethmac_s *priv) } #endif -#else /* Auto-negotion not selected */ +#else /* Auto-negotiation not selected */ phyval = 0; #ifdef CONFIG_STM32H7_ETHFD @@ -3657,7 +3657,7 @@ static int stm32_phyinit(struct stm32_ethmac_s *priv) * Name: stm32_selectmii * * Description: - * Selects the MII inteface. + * Selects the MII interface. * * Input Parameters: * None @@ -3683,7 +3683,7 @@ static inline void stm32_selectmii(void) * Name: stm32_selectrmii * * Description: - * Selects the RMII inteface. + * Selects the RMII interface. * * Input Parameters: * None diff --git a/arch/arm/src/stm32h7/stm32_gpio.h b/arch/arm/src/stm32h7/stm32_gpio.h index 7bdee442d28..3eca1e8f3b7 100644 --- a/arch/arm/src/stm32h7/stm32_gpio.h +++ b/arch/arm/src/stm32h7/stm32_gpio.h @@ -164,7 +164,7 @@ /* If the pin is a GPIO digital output, then this identifies the initial output value. * If the pin is an input, this bit is overloaded to provide the qualifier to - * distinquish input pull-up and -down: + * distinguish input pull-up and -down: * * 1111 1111 1100 0000 0000 * 9876 5432 1098 7654 3210 diff --git a/arch/arm/src/stm32h7/stm32_otgdev.c b/arch/arm/src/stm32h7/stm32_otgdev.c index d6fecb5736e..912be55e190 100644 --- a/arch/arm/src/stm32h7/stm32_otgdev.c +++ b/arch/arm/src/stm32h7/stm32_otgdev.c @@ -330,7 +330,7 @@ #define EP0 (0) -/* The set of all enpoints available to the class implementation (1-7) */ +/* The set of all endpoints available to the class implementation (1-7) */ #define STM32_EP_AVAILABLE (0xfe) /* All available endpoints */ @@ -2589,7 +2589,7 @@ static inline void stm32_ep0out_setup(struct stm32_usbdev_s *priv) stm32_ep0_stall(priv); } - /* Reset state/data associated with thie SETUP request */ + /* Reset state/data associated with the SETUP request */ priv->ep0datlen = 0; } @@ -2723,7 +2723,7 @@ static inline void stm32_epout_interrupt(FAR struct stm32_usbdev_s *priv) doepint = stm32_getreg(STM32_OTG_DOEPINT(epno)); doepint &= stm32_getreg(STM32_OTG_DOEPMSK); - /* Transfer completed interrupt. This interrupt is trigged when + /* Transfer completed interrupt. This interrupt is triggered when * stm32_rxinterrupt() removes the last packet data from the RxFIFO. * In this case, core internally sets the NAK bit for this endpoint to * prevent it from receiving any more packets. @@ -4029,7 +4029,7 @@ static void stm32_ep0_configure(FAR struct stm32_usbdev_s *priv) * Name: stm32_epout_disable * * Description: - * Diable an OUT endpoint will no longer be used + * Disable an OUT endpoint will no longer be used * ****************************************************************************/ diff --git a/arch/arm/src/stm32h7/stm32_otghost.c b/arch/arm/src/stm32h7/stm32_otghost.c index 01cf68ba6c0..dd350194882 100644 --- a/arch/arm/src/stm32h7/stm32_otghost.c +++ b/arch/arm/src/stm32h7/stm32_otghost.c @@ -5045,7 +5045,7 @@ static void stm32_vbusdrive(FAR struct stm32_usbhost_s *priv, bool state) * Description: * Initialize/re-initialize hardware for host mode operation. At present, * this function is called only from stm32_hw_initialize(). But if OTG mode - * were supported, this function would also be called to swtich between + * were supported, this function would also be called to switch between * host and device modes on a connector ID change interrupt. * * Input Parameters: diff --git a/arch/arm/src/stm32h7/stm32_pwm.c b/arch/arm/src/stm32h7/stm32_pwm.c index ded079aa68a..f9d66514060 100644 --- a/arch/arm/src/stm32h7/stm32_pwm.c +++ b/arch/arm/src/stm32h7/stm32_pwm.c @@ -294,7 +294,7 @@ struct stm32_pwmtimer_s uint8_t irq; /* Timer update IRQ */ uint8_t prev; /* The previous value of the RCR (pre-loaded) */ uint8_t curr; /* The current value of the RCR (pre-loaded) */ - uint32_t count; /* Remaining pluse count */ + uint32_t count; /* Remaining pulse count */ #else uint32_t frequency; /* Current frequency setting */ #endif @@ -2029,7 +2029,7 @@ static int pwm_duty_update(FAR struct pwm_lowerhalf_s *dev, uint8_t channel, pwminfo("ccr: %u\n", ccr); - /* Write coresponding CCR register */ + /* Write corresponding CCR register */ pwm_ccr_update(dev, channel, ccr); @@ -3003,7 +3003,7 @@ static int pwm_pulsecount_configure(FAR struct pwm_lowerhalf_s *dev) for (j = 0; j < priv->chan_num; j++) { - /* Skip channle if not in use */ + /* Skip channel if not in use */ if (priv->channels[j].channel != 0) { @@ -3088,7 +3088,7 @@ static int pwm_pulsecount_timer(FAR struct pwm_lowerhalf_s *dev, } /* If a non-zero repetition count has been selected, then set the - * repitition counter to the count-1 (pwm_pulsecount_start() has already + * repetition counter to the count-1 (pwm_pulsecount_start() has already * assured us that the count value is within range). */ @@ -3246,7 +3246,7 @@ static int pwm_configure(FAR struct pwm_lowerhalf_s *dev) for (j = 0; j < priv->chan_num; j++) { - /* Skip channle if not in use */ + /* Skip channel if not in use */ if (priv->channels[j].channel != 0) { @@ -3424,7 +3424,7 @@ static int pwm_timer(FAR struct pwm_lowerhalf_s *dev, priv->timtype == TIMTYPE_COUNTUP16_N) { /* If a non-zero repetition count has been selected, then set the - * repitition counter to the count-1 (pwm_start() has already + * repetition counter to the count-1 (pwm_start() has already * assured us that the count value is within range). */ @@ -3509,7 +3509,7 @@ static int pwm_interrupt(FAR struct pwm_lowerhalf_s *dev) pwm_soft_break(dev, true); - /* Disable first interrtups, stop and reset the timer */ + /* Disable first interrupts, stop and reset the timer */ pwm_stop(dev); diff --git a/arch/arm/src/stm32h7/stm32_pwm.h b/arch/arm/src/stm32h7/stm32_pwm.h index bb6803787ec..a2dc2434c41 100644 --- a/arch/arm/src/stm32h7/stm32_pwm.h +++ b/arch/arm/src/stm32h7/stm32_pwm.h @@ -944,7 +944,7 @@ struct stm32_pwm_dev_s FAR const struct stm32_pwm_ops_s *llops; - /* Require cast-compatibility with private "lower-half" PWM strucutre */ + /* Require cast-compatibility with private "lower-half" PWM structure */ }; /* Low-level operations for PWM */ diff --git a/arch/arm/src/stm32h7/stm32_pwr.c b/arch/arm/src/stm32h7/stm32_pwr.c index 4063d4fd704..71c041cbc2b 100644 --- a/arch/arm/src/stm32h7/stm32_pwr.c +++ b/arch/arm/src/stm32h7/stm32_pwr.c @@ -277,14 +277,14 @@ void stm32_pwr_disablepvd(void) * This function need to be called after stm32_pwr_enablebkp(true) has ben called. * * Input Parameters: - * regon - state to set it to + * region - state to set it to * * Returned Value: * None * ************************************************************************************/ -void stm32_pwr_enablebreg(bool regon) +void stm32_pwr_enablebreg(bool region) { irqstate_t flags; uint32_t regval; @@ -294,7 +294,7 @@ void stm32_pwr_enablebreg(bool regon) regval = stm32_pwr_getreg(STM32_PWR_CR2_OFFSET); - if (regon) + if (region) { /* Request to turn on, if it was off we have wait */ diff --git a/arch/arm/src/stm32h7/stm32_pwr.h b/arch/arm/src/stm32h7/stm32_pwr.h index 9b024297dac..a9b529c678f 100644 --- a/arch/arm/src/stm32h7/stm32_pwr.h +++ b/arch/arm/src/stm32h7/stm32_pwr.h @@ -116,14 +116,14 @@ void stm32_pwr_enablebkp(bool writable); * into the RAM will be maintained in the Standby and VBAT modes. * * Input Parameters: - * regon - state to set it to + * region - state to set it to * * Returned Value: * None * ************************************************************************************/ -void stm32_pwr_enablebreg(bool regon); +void stm32_pwr_enablebreg(bool region); #undef EXTERN #if defined(__cplusplus) diff --git a/arch/arm/src/stm32h7/stm32_qencoder.c b/arch/arm/src/stm32h7/stm32_qencoder.c index e71edbc6944..63bb43f3a16 100644 --- a/arch/arm/src/stm32h7/stm32_qencoder.c +++ b/arch/arm/src/stm32h7/stm32_qencoder.c @@ -1037,7 +1037,7 @@ static int stm32_position(FAR struct qe_lowerhalf_s *lower, FAR int32_t *pos) do { - /* Don't let another task pre-empt us until we get the measurement. The timer + /* Don't let another task preempt us until we get the measurement. The timer * interrupt may still be processed */ diff --git a/arch/arm/src/stm32h7/stm32_qspi.c b/arch/arm/src/stm32h7/stm32_qspi.c index b381a5c76fb..8b828d41d1b 100644 --- a/arch/arm/src/stm32h7/stm32_qspi.c +++ b/arch/arm/src/stm32h7/stm32_qspi.c @@ -2359,7 +2359,7 @@ static int qspi_memory(struct qspi_dev_s *dev, * buflen - Buffer length to allocate in bytes * * Returned Value: - * Address of tha allocated memory on success; NULL is returned on any + * Address of the allocated memory on success; NULL is returned on any * failure. * ****************************************************************************/ diff --git a/arch/arm/src/stm32h7/stm32_sdmmc.c b/arch/arm/src/stm32h7/stm32_sdmmc.c index ee36458cc60..cccc2eb960e 100644 --- a/arch/arm/src/stm32h7/stm32_sdmmc.c +++ b/arch/arm/src/stm32h7/stm32_sdmmc.c @@ -2804,7 +2804,7 @@ errout: * * Events are automatically disabled once the callback is performed and no * further callback events will occur until they are again enabled by - * calling this methos. + * calling this method. * * Input Parameters: * dev - An instance of the SDIO device interface diff --git a/arch/arm/src/stm32h7/stm32_spi.c b/arch/arm/src/stm32h7/stm32_spi.c index b84ed1c72df..df3fc14f85a 100644 --- a/arch/arm/src/stm32h7/stm32_spi.c +++ b/arch/arm/src/stm32h7/stm32_spi.c @@ -1115,12 +1115,12 @@ static void spi_modifyreg(FAR struct stm32_spidev_s *priv, uint32_t offset, * Name: spi_lock * * Description: - * On SPI busses where there are multiple devices, it will be necessary to - * lock SPI to have exclusive access to the busses for a sequence of + * On SPI buses where there are multiple devices, it will be necessary to + * lock SPI to have exclusive access to the buses for a sequence of * transfers. The bus should be locked before the chip is selected. After * locking the SPI bus, the caller should then also call the setfrequency, * setbits, and setmode methods to make sure that the SPI is properly - * configured for the device. If the SPI buss is being shared, then it + * configured for the device. If the SPI bus is being shared, then it * may have been left in an incompatible state. * * Input Parameters: @@ -2018,7 +2018,7 @@ static void spi_bus_initialize(struct stm32_spidev_s *priv) * Mode 0: CFG2.CPHA=0 and CFG2.CPOL=0 * Master: CFG2.MSTR=1 * 8-bit: CFG1.DSIZE=7 - * MSB tranmitted first: CFG2.LSBFRST=0 + * MSB transmitted first: CFG2.LSBFRST=0 * Replace NSS with SSI & SSI=1: CR1.SSI=1 CFG2.SSM=1 (prevents MODF error) * Two lines full duplex: CFG2.COMM=0 */ diff --git a/arch/arm/src/stm32h7/stm32_start.c b/arch/arm/src/stm32h7/stm32_start.c index 6a2f392b7a5..ea8bb77db97 100644 --- a/arch/arm/src/stm32h7/stm32_start.c +++ b/arch/arm/src/stm32h7/stm32_start.c @@ -402,7 +402,7 @@ void __start(void) /* For the case of the separate user-/kernel-space build, perform whatever * platform specific initialization of the user memory is required. * Normally this just means initializing the user space .data and .bss - * segements. + * segments. */ #ifdef CONFIG_BUILD_PROTECTED diff --git a/arch/arm/src/stm32l4/Kconfig b/arch/arm/src/stm32l4/Kconfig index f83f197f606..8ffdefde835 100644 --- a/arch/arm/src/stm32l4/Kconfig +++ b/arch/arm/src/stm32l4/Kconfig @@ -5579,7 +5579,7 @@ config STM32L4_SDMMC1_DMAPRIO hex "SDMMC1 DMA priority" default 0x00001000 ---help--- - Select SDMMC1 DMA prority. + Select SDMMC1 DMA priority. Options are: 0x00000000 low, 0x00001000 medium, 0x00002000 high, 0x00003000 very high. Default: medium. diff --git a/arch/arm/src/stm32l4/hardware/stm32l4x3xx_pinmap.h b/arch/arm/src/stm32l4/hardware/stm32l4x3xx_pinmap.h index 93adb335de6..003f0fa4713 100644 --- a/arch/arm/src/stm32l4/hardware/stm32l4x3xx_pinmap.h +++ b/arch/arm/src/stm32l4/hardware/stm32l4x3xx_pinmap.h @@ -54,7 +54,7 @@ * Drivers, however, will use the pin selection without the numeric suffix. * Additional definitions are required in the board.h file. For example, if * CAN1_RX connects vis PA11 on some board, then the following definitions should - * appear inthe board.h header file for that board: + * appear in the board.h header file for that board: * * #define GPIO_CAN1_RX GPIO_CAN1_RX_1 * diff --git a/arch/arm/src/stm32l4/hardware/stm32l4x5xx_otgfs.h b/arch/arm/src/stm32l4/hardware/stm32l4x5xx_otgfs.h index 19d3990a90d..ce265f82824 100644 --- a/arch/arm/src/stm32l4/hardware/stm32l4x5xx_otgfs.h +++ b/arch/arm/src/stm32l4/hardware/stm32l4x5xx_otgfs.h @@ -873,7 +873,7 @@ #define OTGFS_DOEPCTL_MPSIZ_MASK (0x7ff << OTGFS_DOEPCTL_MPSIZ_SHIFT) /* Bits 11-14: Reserved, must be kept at reset value */ #define OTGFS_DOEPCTL_USBAEP (1 << 15) /* Bit 15: USB active endpoint */ -#define OTGFS_DOEPCTL_DPID (1 << 16) /* Bit 16: Endpoint data PID (interrupt/buld) */ +#define OTGFS_DOEPCTL_DPID (1 << 16) /* Bit 16: Endpoint data PID (interrupt/bulk) */ # define OTGFS_DOEPCTL_DATA0 (0) # define OTGFS_DOEPCTL_DATA1 OTGFS_DOEPCTL_DPID #define OTGFS_DOEPCTL_EONUM (1 << 16) /* Bit 16: Even/odd frame (isochronous) */ diff --git a/arch/arm/src/stm32l4/hardware/stm32l4x5xx_pinmap.h b/arch/arm/src/stm32l4/hardware/stm32l4x5xx_pinmap.h index 77b8c431c25..a84bfc6c2e1 100644 --- a/arch/arm/src/stm32l4/hardware/stm32l4x5xx_pinmap.h +++ b/arch/arm/src/stm32l4/hardware/stm32l4x5xx_pinmap.h @@ -54,7 +54,7 @@ * Drivers, however, will use the pin selection without the numeric suffix. * Additional definitions are required in the board.h file. For example, if * CAN1_RX connects vis PA11 on some board, then the following definitions should - * appear inthe board.h header file for that board: + * appear in the board.h header file for that board: * * #define GPIO_CAN1_RX GPIO_CAN1_RX_1 * diff --git a/arch/arm/src/stm32l4/hardware/stm32l4x6xx_otgfs.h b/arch/arm/src/stm32l4/hardware/stm32l4x6xx_otgfs.h index bc4700734ff..d094d373f79 100644 --- a/arch/arm/src/stm32l4/hardware/stm32l4x6xx_otgfs.h +++ b/arch/arm/src/stm32l4/hardware/stm32l4x6xx_otgfs.h @@ -909,7 +909,7 @@ #define OTGFS_DOEPCTL_MPSIZ_MASK (0x7ff << OTGFS_DOEPCTL_MPSIZ_SHIFT) /* Bits 11-14: Reserved, must be kept at reset value */ #define OTGFS_DOEPCTL_USBAEP (1 << 15) /* Bit 15: USB active endpoint */ -#define OTGFS_DOEPCTL_DPID (1 << 16) /* Bit 16: Endpoint data PID (interrupt/buld) */ +#define OTGFS_DOEPCTL_DPID (1 << 16) /* Bit 16: Endpoint data PID (interrupt/bulk) */ # define OTGFS_DOEPCTL_DATA0 (0) # define OTGFS_DOEPCTL_DATA1 OTGFS_DOEPCTL_DPID #define OTGFS_DOEPCTL_EONUM (1 << 16) /* Bit 16: Even/odd frame (isochronous) */ diff --git a/arch/arm/src/stm32l4/hardware/stm32l4x6xx_pinmap.h b/arch/arm/src/stm32l4/hardware/stm32l4x6xx_pinmap.h index 93cd5b29d1a..f7b83d1b109 100644 --- a/arch/arm/src/stm32l4/hardware/stm32l4x6xx_pinmap.h +++ b/arch/arm/src/stm32l4/hardware/stm32l4x6xx_pinmap.h @@ -53,7 +53,7 @@ * Drivers, however, will use the pin selection without the numeric suffix. * Additional definitions are required in the board.h file. For example, if * CAN1_RX connects vis PA11 on some board, then the following definitions should - * appear inthe board.h header file for that board: + * appear in the board.h header file for that board: * * #define GPIO_CAN1_RX GPIO_CAN1_RX_1 * diff --git a/arch/arm/src/stm32l4/hardware/stm32l4xrxx_pinmap.h b/arch/arm/src/stm32l4/hardware/stm32l4xrxx_pinmap.h index f64565f0cdd..61e1f5f405f 100644 --- a/arch/arm/src/stm32l4/hardware/stm32l4xrxx_pinmap.h +++ b/arch/arm/src/stm32l4/hardware/stm32l4xrxx_pinmap.h @@ -53,7 +53,7 @@ * Drivers, however, will use the pin selection without the numeric suffix. * Additional definitions are required in the board.h file. For example, if * CAN1_RX connects vis PA11 on some board, then the following definitions should - * appear inthe board.h header file for that board: + * appear in the board.h header file for that board: * * #define GPIO_CAN1_RX GPIO_CAN1_RX_1 * diff --git a/arch/arm/src/stm32l4/stm32l4_adc.c b/arch/arm/src/stm32l4/stm32l4_adc.c index 4a2d055bb01..2ec7fbb5f1e 100644 --- a/arch/arm/src/stm32l4/stm32l4_adc.c +++ b/arch/arm/src/stm32l4/stm32l4_adc.c @@ -736,7 +736,7 @@ static int adc_timinit(FAR struct stm32_dev_s *priv) /* Configure the timer channel to drive the ADC */ - /* Caculate optimal values for the timer prescaler and for the timer + /* Calculate optimal values for the timer prescaler and for the timer * reload register. If freq is the desired frequency, then * * reload = timclk / freq diff --git a/arch/arm/src/stm32l4/stm32l4_can.c b/arch/arm/src/stm32l4/stm32l4_can.c index 9372747459d..c40d8c0487c 100644 --- a/arch/arm/src/stm32l4/stm32l4_can.c +++ b/arch/arm/src/stm32l4/stm32l4_can.c @@ -1114,7 +1114,7 @@ static int stm32l4can_remoterequest(FAR struct can_dev_s *dev, uint16_t id) * * Byte 0: Bits 0-7: Bits 3-10 of the 11-bit CAN identifier * Byte 1: Bits 5-7: Bits 0-2 of the 11-bit CAN identifier - * Bit 4: Remote Tranmission Request (RTR) + * Bit 4: Remote Transmission Request (RTR) * Bits 0-3: Data Length Code (DLC) * Bytes 2-10: CAN data * diff --git a/arch/arm/src/stm32l4/stm32l4_dac.c b/arch/arm/src/stm32l4/stm32l4_dac.c index 43dee04238f..bd0fa5b8237 100644 --- a/arch/arm/src/stm32l4/stm32l4_dac.c +++ b/arch/arm/src/stm32l4/stm32l4_dac.c @@ -746,7 +746,7 @@ static int dac_send(FAR struct dac_dev_s *dev, FAR struct dac_msg_s *msg) if (chan->hasdma) { /* Copy the value to circular buffer. Since dmabuffer is initialized to zero, - * writing e.g. monotonously increasing values creates a continuosly repeating + * writing e.g. monotonously increasing values creates a continuously repeating * ramp-effect, alternating with periods of zero output. * * In real use it the dmabuffer should be initialized with a desired pattern diff --git a/arch/arm/src/stm32l4/stm32l4_gpio.c b/arch/arm/src/stm32l4/stm32l4_gpio.c index 8715b905749..81354d8c2b6 100644 --- a/arch/arm/src/stm32l4/stm32l4_gpio.c +++ b/arch/arm/src/stm32l4/stm32l4_gpio.c @@ -112,7 +112,7 @@ const uint32_t g_gpiobase[STM32L4_NPORTS] = * * Assumptions: * This function is called early in the initialization sequence so that - * no mutual exlusion is necessary. + * no mutual exclusion is necessary. * ****************************************************************************/ @@ -131,7 +131,7 @@ void stm32l4_gpioinit(void) * * Returned Value: * OK on success - * A negated errono valu on invalid port, or when pin is locked as ALT + * A negated errono value on invalid port, or when pin is locked as ALT * function. * * To-Do: Auto Power Enable diff --git a/arch/arm/src/stm32l4/stm32l4_gpio.h b/arch/arm/src/stm32l4/stm32l4_gpio.h index f6920e664cf..6a6cf2e4435 100644 --- a/arch/arm/src/stm32l4/stm32l4_gpio.h +++ b/arch/arm/src/stm32l4/stm32l4_gpio.h @@ -173,7 +173,7 @@ /* If the pin is a GPIO digital output, then this identifies the initial output value. * If the pin is an input, this bit is overloaded to provide the qualifier to - * distinquish input pull-up and -down: + * distinguish input pull-up and -down: * * 1111 1111 1100 0000 0000 * 9876 5432 1098 7654 3210 diff --git a/arch/arm/src/stm32l4/stm32l4_irq.c b/arch/arm/src/stm32l4/stm32l4_irq.c index 07cf739758c..3e18f4444e1 100644 --- a/arch/arm/src/stm32l4/stm32l4_irq.c +++ b/arch/arm/src/stm32l4/stm32l4_irq.c @@ -149,7 +149,7 @@ static void stm32l4_dumpnvic(const char *msg, int irq) * stm32l4_dbgmonitor, stm32l4_pendsv, stm32l4_reserved * * Description: - * Handlers for various execptions. None are handled and all are fatal + * Handlers for various exceptions. None are handled and all are fatal * error conditions. The only advantage these provided over the default * unexpected interrupt handler is that they provide a diagnostic output. * diff --git a/arch/arm/src/stm32l4/stm32l4_oneshot_lowerhalf.c b/arch/arm/src/stm32l4/stm32l4_oneshot_lowerhalf.c index 8a73130dc7d..34a19028553 100644 --- a/arch/arm/src/stm32l4/stm32l4_oneshot_lowerhalf.c +++ b/arch/arm/src/stm32l4/stm32l4_oneshot_lowerhalf.c @@ -159,7 +159,7 @@ static void stm32l4_oneshot_handler(void *arg) * lower An instance of the lower-half oneshot state structure. This * structure must have been previously initialized via a call to * oneshot_initialize(); - * ts The location in which to return the maxumum delay. + * ts The location in which to return the maximum delay. * * Returned Value: * Zero (OK) is returned on success; a negated errno value is returned diff --git a/arch/arm/src/stm32l4/stm32l4_otgfsdev.c b/arch/arm/src/stm32l4/stm32l4_otgfsdev.c index a735cc2b1aa..8a2d5fd2728 100644 --- a/arch/arm/src/stm32l4/stm32l4_otgfsdev.c +++ b/arch/arm/src/stm32l4/stm32l4_otgfsdev.c @@ -2638,7 +2638,7 @@ static inline void stm32l4_ep0out_setup(struct stm32l4_usbdev_s *priv) stm32l4_ep0_stall(priv); } - /* Reset state/data associated with thie SETUP request */ + /* Reset state/data associated with the SETUP request */ priv->ep0datlen = 0; } @@ -2773,7 +2773,7 @@ static inline void stm32l4_epout_interrupt(FAR struct stm32l4_usbdev_s *priv) doepint = stm32l4_getreg(STM32L4_OTGFS_DOEPINT(epno)); doepint &= stm32l4_getreg(STM32L4_OTGFS_DOEPMSK); - /* Transfer completed interrupt. This interrupt is trigged when + /* Transfer completed interrupt. This interrupt is triggered when * stm32l4_rxinterrupt() removes the last packet data from the RxFIFO. * In this case, core internally sets the NAK bit for this endpoint to * prevent it from receiving any more packets. @@ -4139,7 +4139,7 @@ static void stm32l4_ep0_configure(FAR struct stm32l4_usbdev_s *priv) * Name: stm32l4_epout_disable * * Description: - * Diable an OUT endpoint will no longer be used + * Disable an OUT endpoint will no longer be used * ****************************************************************************/ diff --git a/arch/arm/src/stm32l4/stm32l4_otgfshost.c b/arch/arm/src/stm32l4/stm32l4_otgfshost.c index 702d2215b45..dcfce65ed01 100644 --- a/arch/arm/src/stm32l4/stm32l4_otgfshost.c +++ b/arch/arm/src/stm32l4/stm32l4_otgfshost.c @@ -5056,7 +5056,7 @@ static void stm32l4_vbusdrive(FAR struct stm32l4_usbhost_s *priv, bool state) * Description: * Initialize/re-initialize hardware for host mode operation. At present, * this function is called only from stm32l4_hw_initialize(). But if OTG mode - * were supported, this function would also be called to swtich between + * were supported, this function would also be called to switch between * host and device modes on a connector ID change interrupt. * * Input Parameters: diff --git a/arch/arm/src/stm32l4/stm32l4_pmstop.c b/arch/arm/src/stm32l4/stm32l4_pmstop.c index 393cf1795d2..3a3446847ef 100644 --- a/arch/arm/src/stm32l4/stm32l4_pmstop.c +++ b/arch/arm/src/stm32l4/stm32l4_pmstop.c @@ -99,7 +99,7 @@ static int do_stop(void) * * Returned Value: * Zero means that the STOP was successfully entered and the system has - * been re-awakened. The internal volatage regulator is back to its + * been re-awakened. The internal voltage regulator is back to its * original state. Otherwise, STOP mode did not occur and a negated * errno value is returned to indicate the cause of the failure. * diff --git a/arch/arm/src/stm32l4/stm32l4_pwm.c b/arch/arm/src/stm32l4/stm32l4_pwm.c index e3a63ae7997..73dbe9a096e 100644 --- a/arch/arm/src/stm32l4/stm32l4_pwm.c +++ b/arch/arm/src/stm32l4/stm32l4_pwm.c @@ -215,7 +215,7 @@ struct stm32l4_pwmtimer_s uint8_t irq; /* Timer update IRQ */ uint8_t prev; /* The previous value of the RCR (pre-loaded) */ uint8_t curr; /* The current value of the RCR (pre-loaded) */ - uint32_t count; /* Remaining pluse count */ + uint32_t count; /* Remaining pulse count */ #else uint32_t frequency; /* Current frequency setting */ #endif @@ -1840,7 +1840,7 @@ static int pwm_duty_update(FAR struct pwm_lowerhalf_s *dev, uint8_t channel, pwminfo("ccr: %u\n", ccr); - /* Write coresponding CCR register */ + /* Write corresponding CCR register */ pwm_ccr_update(dev, channel, ccr); @@ -2874,7 +2874,7 @@ static int pwm_configure(FAR struct pwm_lowerhalf_s *dev) for (j = 0; j < priv->chan_num; j++) { - /* Skip channle if not in use */ + /* Skip channel if not in use */ if (priv->channels[j].channel != 0) { @@ -2988,7 +2988,7 @@ static int pwm_pulsecount_timer(FAR struct pwm_lowerhalf_s *dev, } /* If a non-zero repetition count has been selected, then set the - * repitition counter to the count-1 (pwm_pulsecount_start() has already + * repetition counter to the count-1 (pwm_pulsecount_start() has already * assured us that the count value is within range). */ @@ -3209,7 +3209,7 @@ static int pwm_timer(FAR struct pwm_lowerhalf_s *dev, priv->timtype == TIMTYPE_COUNTUP16_N) { /* If a non-zero repetition count has been selected, then set the - * repitition counter to the count-1 (pwm_start() has already + * repetition counter to the count-1 (pwm_start() has already * assured us that the count value is within range). */ @@ -3376,7 +3376,7 @@ static int pwm_interrupt(FAR struct pwm_lowerhalf_s *dev) regval &= ~ATIM_BDTR_MOE; pwm_putreg(priv, STM32L4_ATIM_BDTR_OFFSET, regval); - /* Disable first interrtups, stop and reset the timer */ + /* Disable first interrupts, stop and reset the timer */ pwm_stop(dev); diff --git a/arch/arm/src/stm32l4/stm32l4_pwm.h b/arch/arm/src/stm32l4/stm32l4_pwm.h index 152f1964561..5f209ef3db4 100644 --- a/arch/arm/src/stm32l4/stm32l4_pwm.h +++ b/arch/arm/src/stm32l4/stm32l4_pwm.h @@ -947,7 +947,7 @@ struct stm32l4_pwm_dev_s FAR const struct stm32l4_pwm_ops_s *llops; - /* Require cast-compatibility with private "lower-half" PWM strucutre */ + /* Require cast-compatibility with private "lower-half" PWM structure */ }; /* Low-level operations for PWM */ diff --git a/arch/arm/src/stm32l4/stm32l4_qencoder.c b/arch/arm/src/stm32l4/stm32l4_qencoder.c index dce2a2a7911..a03bc28f519 100644 --- a/arch/arm/src/stm32l4/stm32l4_qencoder.c +++ b/arch/arm/src/stm32l4/stm32l4_qencoder.c @@ -1017,7 +1017,7 @@ static int stm32l4_position(FAR struct qe_lowerhalf_s *lower, FAR int32_t *pos) do { - /* Don't let another task pre-empt us until we get the measurement. The timer + /* Don't let another task preempt us until we get the measurement. The timer * interrupt may still be processed */ diff --git a/arch/arm/src/stm32l4/stm32l4_qspi.c b/arch/arm/src/stm32l4/stm32l4_qspi.c index ad47d50b4fb..e9775d67f1a 100644 --- a/arch/arm/src/stm32l4/stm32l4_qspi.c +++ b/arch/arm/src/stm32l4/stm32l4_qspi.c @@ -2273,7 +2273,7 @@ static int qspi_memory(struct qspi_dev_s *dev, * buflen - Buffer length to allocate in bytes * * Returned Value: - * Address of tha allocated memory on success; NULL is returned on any + * Address of the allocated memory on success; NULL is returned on any * failure. * ****************************************************************************/ diff --git a/arch/arm/src/stm32l4/stm32l4_rcc.c b/arch/arm/src/stm32l4/stm32l4_rcc.c index 0e37e78ad29..7086e79722e 100644 --- a/arch/arm/src/stm32l4/stm32l4_rcc.c +++ b/arch/arm/src/stm32l4/stm32l4_rcc.c @@ -229,7 +229,7 @@ void stm32l4_clockconfig(void) * * This functional performs a subset of the operations performed by * stm32l4_clockconfig(): It does not reset any devices, and it does not reset the - * currenlty enabled peripheral clocks. + * currently enabled peripheral clocks. * * If CONFIG_ARCH_BOARD_STM32L4_CUSTOM_CLOCKCONFIG is defined, then clocking will * be enabled by an externally provided, board-specific function called diff --git a/arch/arm/src/stm32l4/stm32l4_rcc.h b/arch/arm/src/stm32l4/stm32l4_rcc.h index 360a686da61..2ae25eea28c 100644 --- a/arch/arm/src/stm32l4/stm32l4_rcc.h +++ b/arch/arm/src/stm32l4/stm32l4_rcc.h @@ -151,7 +151,7 @@ void stm32l4_clockconfig(void); * * Description: * Any STM32L4 board may replace the "standard" board clock configuration logic with - * its own, custom clock cofiguration logic. + * its own, custom clock configuration logic. * ************************************************************************************/ @@ -170,7 +170,7 @@ void stm32l4_board_clockconfig(void); * * This functional performs a subset of the operations performed by * stm32l4_clockconfig(): It does not reset any devices, and it does not reset the - * currenlty enabled peripheral clocks. + * currently enabled peripheral clocks. * * If CONFIG_ARCH_BOARD_STM32L4_CUSTOM_CLOCKCONFIG is defined, then clocking will * be enabled by an externally provided, board-specific function called diff --git a/arch/arm/src/stm32l4/stm32l4_sai.c b/arch/arm/src/stm32l4/stm32l4_sai.c index bfa19837dc1..4c1745aaaac 100644 --- a/arch/arm/src/stm32l4/stm32l4_sai.c +++ b/arch/arm/src/stm32l4/stm32l4_sai.c @@ -728,7 +728,7 @@ static void sai_worker(void *arg) while (sq_peek(&priv->done) != NULL) { /* Remove the buffer container from the done queue. NOTE that - * interupts must be enabled to do this because the done queue is + * interrupts must be enabled to do this because the done queue is * also modified from the interrupt level. */ @@ -1011,7 +1011,7 @@ static int sai_receive(struct i2s_dev_s *dev, struct ap_buffer_s *apb, flags = enter_critical_section(); sq_addlast((sq_entry_t *)bfcontainer, &priv->pend); - /* Then start the next transfer. If there is already a transfer in progess, + /* Then start the next transfer. If there is already a transfer in progress, * then this will do nothing. */ @@ -1111,7 +1111,7 @@ static int sai_send(struct i2s_dev_s *dev, struct ap_buffer_s *apb, flags = enter_critical_section(); sq_addlast((sq_entry_t *)bfcontainer, &priv->pend); - /* Then start the next transfer. If there is already a transfer in progess, + /* Then start the next transfer. If there is already a transfer in progress, * then this will do nothing. */ diff --git a/arch/arm/src/stm32l4/stm32l4_sdmmc.c b/arch/arm/src/stm32l4/stm32l4_sdmmc.c index c784aa421ab..6d251b28007 100644 --- a/arch/arm/src/stm32l4/stm32l4_sdmmc.c +++ b/arch/arm/src/stm32l4/stm32l4_sdmmc.c @@ -761,7 +761,7 @@ static inline void stm32_setclkcr(struct stm32_dev_s *priv, uint32_t clkcr) * Name: stm32_configwaitints * * Description: - * Enable/disable SDIO interrupts needed to suport the wait function + * Enable/disable SDIO interrupts needed to support the wait function * * Input Parameters: * priv - Instance of the SDMMC private state structure. @@ -2705,7 +2705,7 @@ errout: * * Events are automatically disabled once the callback is performed and no * further callback events will occur until they are again enabled by - * calling this methos. + * calling this method. * * Input Parameters: * dev - An instance of the SDIO device interface diff --git a/arch/arm/src/stm32l4/stm32l4_serial.c b/arch/arm/src/stm32l4/stm32l4_serial.c index 4d64efe5cb7..e6fefdd10e6 100644 --- a/arch/arm/src/stm32l4/stm32l4_serial.c +++ b/arch/arm/src/stm32l4/stm32l4_serial.c @@ -1698,7 +1698,7 @@ static int up_interrupt(int irq, FAR void *context, FAR void *arg) * " " USART_ISR_ORE Overrun Error Detected * USART_CR3_CTSIE USART_ISR_CTS CTS flag (not used) * - * NOTE: Some of these status bits must be cleared by explicity writing one + * NOTE: Some of these status bits must be cleared by explicitly writing one * to the ICR register: USART_ICR_CTSCF, USART_ICR_LBDCF. Note of those are currently * being used. */ diff --git a/arch/arm/src/stm32l4/stm32l4_spi.c b/arch/arm/src/stm32l4/stm32l4_spi.c index 3c31aa66034..cd0628cada0 100644 --- a/arch/arm/src/stm32l4/stm32l4_spi.c +++ b/arch/arm/src/stm32l4/stm32l4_spi.c @@ -899,12 +899,12 @@ static void spi_modifycr(uint32_t addr, FAR struct stm32l4_spidev_s *priv, * Name: spi_lock * * Description: - * On SPI busses where there are multiple devices, it will be necessary to - * lock SPI to have exclusive access to the busses for a sequence of + * On SPI buses where there are multiple devices, it will be necessary to + * lock SPI to have exclusive access to the buses for a sequence of * transfers. The bus should be locked before the chip is selected. After * locking the SPI bus, the caller should then also call the setfrequency, * setbits, and setmode methods to make sure that the SPI is properly - * configured for the device. If the SPI buss is being shared, then it + * configured for the device. If the SPI bus is being shared, then it * may have been left in an incompatible state. * * Input Parameters: @@ -1683,7 +1683,7 @@ static void spi_bus_initialize(FAR struct stm32l4_spidev_s *priv) * Mode 0: CR1.CPHA=0 and CR1.CPOL=0 * Master: CR1.MSTR=1 * 8-bit: CR2.DS=7 - * MSB tranmitted first: CR1.LSBFIRST=0 + * MSB transmitted first: CR1.LSBFIRST=0 * Replace NSS with SSI & SSI=1: CR1.SSI=1 CR1.SSM=1 (prevents MODF error) * Two lines full duplex: CR1.BIDIMODE=0 CR1.BIDIOIE=(Don't care) and * CR1.RXONLY=0 diff --git a/arch/arm/src/stm32l4/stm32l4_start.h b/arch/arm/src/stm32l4/stm32l4_start.h index 618b5cdcb7c..0b4db7cae1e 100644 --- a/arch/arm/src/stm32l4/stm32l4_start.h +++ b/arch/arm/src/stm32l4/stm32l4_start.h @@ -1,7 +1,7 @@ /************************************************************************************ * arch/arm/src/stm32l4/stm32l4_start.h * - * Copyrigth (C) 2017 Gregory Nutt. All rights reserved. + * Copyright (C) 2017 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without diff --git a/arch/arm/src/stm32l4/stm32l4_usbdev.c b/arch/arm/src/stm32l4/stm32l4_usbdev.c index 2ba67be9ab2..b15ba9e9bc5 100644 --- a/arch/arm/src/stm32l4/stm32l4_usbdev.c +++ b/arch/arm/src/stm32l4/stm32l4_usbdev.c @@ -1416,7 +1416,7 @@ static int stm32l4_wrrequest(struct stm32l4_usbdev_s *priv, * * Description: * This function is called from the stm32l4_ep0out handler when the ep0state - * is EP0STATE_SETUP_OUT and uppon new incoming data is available in the + * is EP0STATE_SETUP_OUT and upon new incoming data is available in the * endpoint 0's buffer. This function will simply copy the OUT data into * ep0data. * @@ -2214,7 +2214,7 @@ static void stm32l4_ep0out(struct stm32l4_usbdev_s *priv) * last set up command with the OUT * data */ - priv->ep0state = EP0STATE_IDLE; /* There is no notion of reciving OUT + priv->ep0state = EP0STATE_IDLE; /* There is no notion of receiving OUT * data greater then the length of * CONFIG_USBDEV_SETUP_MAXDATASIZE * so we are done diff --git a/arch/arm/src/stm32l4/stm32l4x6xx_dma.c b/arch/arm/src/stm32l4/stm32l4x6xx_dma.c index 78a1c0a7d20..ced965babb8 100644 --- a/arch/arm/src/stm32l4/stm32l4x6xx_dma.c +++ b/arch/arm/src/stm32l4/stm32l4x6xx_dma.c @@ -78,7 +78,7 @@ * Private Types ****************************************************************************/ -/* This structure descibes one DMA channel */ +/* This structure describes one DMA channel */ struct stm32l4_dma_s { @@ -529,7 +529,7 @@ void stm32l4_dmastart(DMA_HANDLE handle, dma_callback_t callback, DEBUGASSERT(handle != NULL); - /* Save the callback info. This will be invoked when the DMA commpletes */ + /* Save the callback info. This will be invoked when the DMA completes */ dmach->callback = callback; dmach->arg = arg; diff --git a/arch/arm/src/str71x/str71x_i2c.h b/arch/arm/src/str71x/str71x_i2c.h index 39fb03b1a29..6b0ebc6cdb7 100644 --- a/arch/arm/src/str71x/str71x_i2c.h +++ b/arch/arm/src/str71x/str71x_i2c.h @@ -48,7 +48,7 @@ * Pre-processor Definitions ************************************************************************************/ -/* Register offets ******************************************************************/ +/* Register offsets *****************************************************************/ #define STR71X_I2C_CR_OFFSET (0x0000) /* 8-bits wide */ #define STR71X_I2C_SR1_OFFSET (0x0004) /* 8-bits wide */ diff --git a/arch/arm/src/str71x/str71x_serial.c b/arch/arm/src/str71x/str71x_serial.c index 45769598e4d..035b7158ecb 100644 --- a/arch/arm/src/str71x/str71x_serial.c +++ b/arch/arm/src/str71x/str71x_serial.c @@ -647,7 +647,7 @@ static void up_detach(struct uart_dev_s *dev) * when an interrupt received on the 'irq' It should call * uart_transmitchars or uart_receivechar to perform the * appropriate data transfers. The interrupt handling logic\ - * must be able to map the 'irq' number into the approprite + * must be able to map the 'irq' number into the appropriate * uart_dev_s structure in order to call these functions. * ****************************************************************************/ diff --git a/arch/arm/src/str71x/str71x_xti.c b/arch/arm/src/str71x/str71x_xti.c index 386b01784bb..b0edd339431 100644 --- a/arch/arm/src/str71x/str71x_xti.c +++ b/arch/arm/src/str71x/str71x_xti.c @@ -205,7 +205,7 @@ int str71x_xticonfig(int irq, bool rising) str71x_disable_xtiirq(irq); - /* Decide if we use the lower or upper regiser */ + /* Decide if we use the lower or upper register */ bit = irq - STR71X_IRQ_FIRSTXTI; ndx = 0; @@ -255,7 +255,7 @@ void str71x_enable_xtiirq(int irq) if (irq >= STR71X_IRQ_FIRSTXTI && irq <= NR_IRQS) { - /* Decide if we use the lower or upper regiser */ + /* Decide if we use the lower or upper register */ bit = irq - STR71X_IRQ_FIRSTXTI; ndx = 0; @@ -295,7 +295,7 @@ void str71x_disable_xtiirq(int irq) if (irq >= STR71X_IRQ_FIRSTXTI && irq <= NR_IRQS) { - /* Decide if we use the lower or upper regiser */ + /* Decide if we use the lower or upper register */ bit = irq - STR71X_IRQ_FIRSTXTI; ndx = 0; diff --git a/arch/arm/src/tiva/cc13xx/cc13x0_rom.h b/arch/arm/src/tiva/cc13xx/cc13x0_rom.h index 9c4cf805084..4007dd9fac9 100644 --- a/arch/arm/src/tiva/cc13xx/cc13x0_rom.h +++ b/arch/arm/src/tiva/cc13xx/cc13x0_rom.h @@ -530,7 +530,7 @@ ROM_API_UART_TABLE[0]) #define rom_uart_set_expclk \ - ((void (*)(uint32_t base, uint32_t uartclk, uint32_t buad, uint32_t config)) \ + ((void (*)(uint32_t base, uint32_t uartclk, uint32_t baud, uint32_t config)) \ ROM_API_UART_TABLE[1]) #define rom_uart_get_expclk \ diff --git a/arch/arm/src/tiva/cc13xx/cc13xx_prcm.c b/arch/arm/src/tiva/cc13xx/cc13xx_prcm.c index 4a5050e9b4e..1ab65507209 100644 --- a/arch/arm/src/tiva/cc13xx/cc13xx_prcm.c +++ b/arch/arm/src/tiva/cc13xx/cc13xx_prcm.c @@ -345,7 +345,7 @@ void prcm_audioclock_configure(uint32_t clkconfig, * - SERIAL power domain: * - Power on : Domain is powered on. * - Power off : Domain is powered off. - * - PERIPHERIAL power domain: + * - PERIPHERAL power domain: * - Power on : Domain is powered on. * - Power off : Domain is powered off. * - VIMS power domain: diff --git a/arch/arm/src/tiva/cc13xx/cc13xx_prcm.h b/arch/arm/src/tiva/cc13xx/cc13xx_prcm.h index f271edf208f..707d3b1d94c 100644 --- a/arch/arm/src/tiva/cc13xx/cc13xx_prcm.h +++ b/arch/arm/src/tiva/cc13xx/cc13xx_prcm.h @@ -603,7 +603,7 @@ void prcm_audioclock_configure(uint32_t clkconfig, * - SERIAL power domain: * - Power on : Domain is powered on. * - Power off : Domain is powered off. - * - PERIPHERIAL power domain: + * - PERIPHERAL power domain: * - Power on : Domain is powered on. * - Power off : Domain is powered off. * - VIMS power domain: diff --git a/arch/arm/src/tiva/common/tiva_hciuart.c b/arch/arm/src/tiva/common/tiva_hciuart.c index 837e0c6658d..433d5a98357 100644 --- a/arch/arm/src/tiva/common/tiva_hciuart.c +++ b/arch/arm/src/tiva/common/tiva_hciuart.c @@ -951,7 +951,7 @@ static ssize_t hciuart_copytotxfifo(const struct hciuart_config_s *config) * * Per "Specification of the Bluetooth System, Wireless connections made * easy, Host Controller Interface [Transport Layer]", Volume 4, Revision - * 1.2 or later, 1 January 2006, HCI UART tranport uses these settings: + * 1.2 or later, 1 January 2006, HCI UART transport uses these settings: * * 8 data bits, no parity, 1 stop, RTS/CTS flow control * @@ -999,7 +999,7 @@ static void hciuart_line_configure(const struct hciuart_config_s *config) * * Per "Specification of the Bluetooth System, Wireless connections made * easy, Host Controller Interface [Transport Layer]", Volume 4, Revision - * 1.2 or later, 1 January 2006, HCI UART tranport uses these settings: + * 1.2 or later, 1 January 2006, HCI UART transport uses these settings: * * 8 data bits, no parity, 1 stop, RTS/CTS flow control * diff --git a/arch/arm/src/tiva/common/tiva_irq.c b/arch/arm/src/tiva/common/tiva_irq.c index 7cbbe69933a..31bfd470e2a 100644 --- a/arch/arm/src/tiva/common/tiva_irq.c +++ b/arch/arm/src/tiva/common/tiva_irq.c @@ -206,7 +206,7 @@ static void tiva_dumpnvic(const char *msg, int irq) * tiva_dbgmonitor, tiva_pendsv, tiva_reserved * * Description: - * Handlers for various execptions. None are handled and all are fatal + * Handlers for various exceptions. None are handled and all are fatal * error conditions. The only advantage these provided over the default * unexpected interrupt handler is that they provide a diagnostic output. * diff --git a/arch/arm/src/tiva/common/tiva_serial.c b/arch/arm/src/tiva/common/tiva_serial.c index a6ccc0f34b6..976846be835 100644 --- a/arch/arm/src/tiva/common/tiva_serial.c +++ b/arch/arm/src/tiva/common/tiva_serial.c @@ -970,7 +970,7 @@ static void up_detach(struct uart_dev_s *dev) * when an interrupt received on the 'irq' It should call * uart_transmitchars or uart_receivechar to perform the * appropriate data transfers. The interrupt handling logic - * must be able to map the 'irq' number into the approprite + * must be able to map the 'irq' number into the appropriate * uart_dev_s structure in order to call these functions. * ****************************************************************************/ diff --git a/arch/arm/src/tiva/common/tiva_ssi.c b/arch/arm/src/tiva/common/tiva_ssi.c index 53c360769ab..c17f836b5f2 100644 --- a/arch/arm/src/tiva/common/tiva_ssi.c +++ b/arch/arm/src/tiva/common/tiva_ssi.c @@ -321,7 +321,7 @@ static const struct spi_ops_s g_spiops = #endif }; -/* This supports is up to two SSI busses/ports */ +/* This supports is up to two SSI buses/ports */ static struct tiva_ssidev_s g_ssidev[] = { @@ -552,7 +552,7 @@ static void ssi_txuint8(struct tiva_ssidev_s *priv) * Description: * Discard input, save a uint8_t, or or save a uint16_t from Tx FIFO in the * user rxvbuffer and update the rxbuffer pointer appropriately. The - * selected function dependes on (1) if there is a desination rxbuffer + * selected function dependes on (1) if there is a destination rxbuffer * provided, and (2) if the number of bits per word is <=8 or >8. * * Input Parameters: @@ -1057,12 +1057,12 @@ static int ssi_interrupt(int irq, void *context, FAR void *arg) * Name: ssi_lock * * Description: - * On SPI busses where there are multiple devices, it will be necessary to - * lock SPI to have exclusive access to the busses for a sequence of + * On SPI buses where there are multiple devices, it will be necessary to + * lock SPI to have exclusive access to the buses for a sequence of * transfers. The bus should be locked before the chip is selected. After * locking the SPI bus, the caller should then also call the setfrequency, * setbits, and setmode methods to make sure that the SPI is properly - * configured for the device. If the SPI buss is being shared, then it + * configured for the device. If the SPI bus is being shared, then it * may have been left in an incompatible state. * * Input Parameters: @@ -1190,7 +1190,7 @@ static uint32_t ssi_setfrequencyinternal(struct tiva_ssidev_s *priv, ssi_putreg(priv, TIVA_SSI_CR0_OFFSET, regval); spiinfo("CR0: %08x CPSR: %08x\n", regval, cpsdvsr); - /* Calcluate the actual frequency */ + /* Calculate the actual frequency */ actual = SYSCLK_FREQUENCY / (cpsdvsr * (scr + 1)); diff --git a/arch/arm/src/tiva/hardware/cc13x0/cc13x0_aon_rtc.h b/arch/arm/src/tiva/hardware/cc13x0/cc13x0_aon_rtc.h index 7f51bac6bdc..bd1c7f623b6 100644 --- a/arch/arm/src/tiva/hardware/cc13x0/cc13x0_aon_rtc.h +++ b/arch/arm/src/tiva/hardware/cc13x0/cc13x0_aon_rtc.h @@ -90,7 +90,7 @@ #define AON_RTC_CTL_RTC_UPD_EN (1 << 1) /* Bit 1: Enable 16-KHz RTC_UPD output */ #define AON_RTC_CTL_RTC_4KHZ_EN (1 << 2) /* Bit 2: Enabvle 4KHz reference output */ #define AON_RTC_CTL_RESET (1 << 7) /* Bit 7: RTC counter reset */ -#define AON_RTC_CTL_EV_DELAY_SHIFT (8) /* Bits 8-11: Nubmer SCLK_LF delay for events */ +#define AON_RTC_CTL_EV_DELAY_SHIFT (8) /* Bits 8-11: Number SCLK_LF delay for events */ #define AON_RTC_CTL_EV_DELAY_MASK (15 << AON_RTC_CTL_EV_DELAY_SHIFT) # define AON_RTC_CTL_EV_DELAY_D0 (0 << AON_RTC_CTL_EV_DELAY_SHIFT) /* No delay on event */ # define AON_RTC_CTL_EV_DELAY_D1 (1 << AON_RTC_CTL_EV_DELAY_SHIFT) /* Delay by 1 clock cycle */ diff --git a/arch/arm/src/tiva/hardware/cc13x0/cc13x0_aux_wuc.h b/arch/arm/src/tiva/hardware/cc13x0/cc13x0_aux_wuc.h index 72984527e6d..4dc4cf64ede 100644 --- a/arch/arm/src/tiva/hardware/cc13x0/cc13x0_aux_wuc.h +++ b/arch/arm/src/tiva/hardware/cc13x0/cc13x0_aux_wuc.h @@ -131,7 +131,7 @@ /* AUX_WUC_WUEVFLAGS */ -#define AUX_WUC_WUEVFLAGS_AON_PROG_WU (1 << 0) /* Bit 0: Pending event trigged by sources select in +#define AUX_WUC_WUEVFLAGS_AON_PROG_WU (1 << 0) /* Bit 0: Pending event triggered by sources select in * AON_EVENT:AUXWUSEL.WU0_EV, WU1_EV, and WU2_EV */ #define AUX_WUC_WUEVFLAGS_AON_SW (1 << 1) /* Bit 1: Pending event triggered by write to * ON_WUC:AUXCTL.SWEV */ diff --git a/arch/arm/src/tiva/hardware/cc13x0/cc13x0_i2c.h b/arch/arm/src/tiva/hardware/cc13x0/cc13x0_i2c.h index 27efa59b2a5..4f086104162 100644 --- a/arch/arm/src/tiva/hardware/cc13x0/cc13x0_i2c.h +++ b/arch/arm/src/tiva/hardware/cc13x0/cc13x0_i2c.h @@ -89,7 +89,7 @@ #define TIVA_I2C0_MICR (TIVA_I2C0_BASE + TIVA_I2C_MICR_OFFSET) #define TIVA_I2C0_MCR (TIVA_I2C0_BASE + TIVA_I2C_MCR_OFFSET) -/* I2C bitfield defintions ******************************************************************/ +/* I2C bitfield definitions *****************************************************************/ /* Slave Own Address */ @@ -160,7 +160,7 @@ #define I2C_MCTRL_RUN (1 << 0) /* Bit 0: Enable master transfer */ #define I2C_MCTRL_START (1 << 1) /* Bit 1: Generate [repeated] START */ -#define I2C_MCTRL_STOP (1 << 2) /* Bit 2: STOP at end of data cyle */ +#define I2C_MCTRL_STOP (1 << 2) /* Bit 2: STOP at end of data cycle */ #define I2C_MCTRL_ACK (1 << 3) /* Bit 3: Data acknowledge enable */ /* Master Data */ diff --git a/arch/arm/src/tiva/hardware/cc13x0/cc13x0_prcm.h b/arch/arm/src/tiva/hardware/cc13x0/cc13x0_prcm.h index 44628a93eea..895b04b9aac 100644 --- a/arch/arm/src/tiva/hardware/cc13x0/cc13x0_prcm.h +++ b/arch/arm/src/tiva/hardware/cc13x0/cc13x0_prcm.h @@ -316,7 +316,7 @@ /* I2S Clock Control */ -#define PRCM_I2SCLKCTL_EN (1 << 0) /* Emable MCLK, BCLK, and WCLK */ +#define PRCM_I2SCLKCTL_EN (1 << 0) /* Enable MCLK, BCLK, and WCLK */ #define PRCM_I2SCLKCTL_WCLKPHASE_SHIFT 1 /* Bits 1-2: Wclock division ration mode */ #define PRCM_I2SCLKCTL_WCLKPHASE_MASK (3 << PRCM_I2SCLKCTL_WCLKPHASE_SHIFT) # define PRCM_I2SCLKCTL_WCLKPHASE_SINGLE (0 << PRCM_I2SCLKCTL_WCLKPHASE_SHIFT) /* Single phase */ diff --git a/arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_aon_batmon.h b/arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_aon_batmon.h index b72c7050df4..256395abd01 100644 --- a/arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_aon_batmon.h +++ b/arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_aon_batmon.h @@ -247,7 +247,7 @@ #define AON_BATMON_TEMPUL_FRAC_MASK (3 << AON_BATMON_TEMPUL_FRAC_SHIFT) # define AON_BATMON_TEMPUL_FRAC(n) ((uint32_t)(n) << AON_BATMON_TEMPUL_FRAC_SHIFT) #define AON_BATMON_TEMPUL_INT_SHIFT (8) /* Bits 8-16: Signed integer part - * of tempature upper limit */ + * of temperature upper limit */ #define AON_BATMON_TEMPUL_INT_MASK (0x1ff << AON_BATMON_TEMPUL_INT_SHIFT) # define AON_BATMON_TEMPUL_INT(n) ((uint32_t)(n) << AON_BATMON_TEMPUL_INT_SHIFT) @@ -258,7 +258,7 @@ #define AON_BATMON_TEMPLL_FRAC_MASK (3 << AON_BATMON_TEMPLL_FRAC_SHIFT) # define AON_BATMON_TEMPLL_FRAC(n) ((uint32_t)(n) << AON_BATMON_TEMPLL_FRAC_SHIFT) #define AON_BATMON_TEMPLL_INT_SHIFT (8) /* Bits 8-16: Signed integer part - * of tempature lower limit */ + * of temperature lower limit */ #define AON_BATMON_TEMPLL_INT_MASK (0x1ff << AON_BATMON_TEMPLL_INT_SHIFT) # define AON_BATMON_TEMPLL_INT(n) ((uint32_t)(n) << AON_BATMON_TEMPLL_INT_SHIFT) diff --git a/arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_aon_pmctl.h b/arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_aon_pmctl.h index 7d8d3a0c92d..235065248cb 100644 --- a/arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_aon_pmctl.h +++ b/arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_aon_pmctl.h @@ -96,7 +96,7 @@ /* TIVA_AON_PMCTL_RAMCFG */ #define AON_PMCTL_RAMCFG_BUS_SRAM_RET_EN_SHIFT (0) /* Bits 0-3: Select banks for retention during MCU - * bus doman power off */ + * bus domain power off */ #define AON_PMCTL_RAMCFG_BUS_SRAM_RET_EN_MASK (15 << AON_PMCTL_RAMCFG_BUS_SRAM_RET_EN_SHIFT) # define AON_PMCTL_RAMCFG_BUS_SRAM_RET_EN_RET_NONE (0 << AON_PMCTL_RAMCFG_BUS_SRAM_RET_EN_SHIFT) /* Retention is disabled */ # define AON_PMCTL_RAMCFG_BUS_SRAM_RET_EN_RET_LEVEL1 (1 << AON_PMCTL_RAMCFG_BUS_SRAM_RET_EN_SHIFT) /* Retention on for all banks SRAM:BANK0 diff --git a/arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_aon_rtc.h b/arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_aon_rtc.h index 5a823e6e870..2a028291757 100644 --- a/arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_aon_rtc.h +++ b/arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_aon_rtc.h @@ -94,7 +94,7 @@ #define AON_RTC_CTL_RTC_UPD_EN (1 << 1) /* Bit 1: Enable 16-KHz RTC_UPD output */ #define AON_RTC_CTL_RTC_4KHZ_EN (1 << 2) /* Bit 2: Enabvle 4KHz reference output */ #define AON_RTC_CTL_RESET (1 << 7) /* Bit 7: RTC counter reset */ -#define AON_RTC_CTL_EV_DELAY_SHIFT (8) /* Bits 8-11: Nubmer SCLK_LF delay for events */ +#define AON_RTC_CTL_EV_DELAY_SHIFT (8) /* Bits 8-11: Number SCLK_LF delay for events */ #define AON_RTC_CTL_EV_DELAY_MASK (15 << AON_RTC_CTL_EV_DELAY_SHIFT) # define AON_RTC_CTL_EV_DELAY_D0 (0 << AON_RTC_CTL_EV_DELAY_SHIFT) /* No delay on event */ # define AON_RTC_CTL_EV_DELAY_D1 (1 << AON_RTC_CTL_EV_DELAY_SHIFT) /* Delay by 1 clock cycle */ diff --git a/arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_i2c.h b/arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_i2c.h index 1859faa9df7..f6c40ba9715 100644 --- a/arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_i2c.h +++ b/arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_i2c.h @@ -89,7 +89,7 @@ #define TIVA_I2C0_MICR (TIVA_I2C0_BASE + TIVA_I2C_MICR_OFFSET) #define TIVA_I2C0_MCR (TIVA_I2C0_BASE + TIVA_I2C_MCR_OFFSET) -/* I2C bitfield defintions ******************************************************************/ +/* I2C bitfield definitions *****************************************************************/ /* Slave Own Address */ @@ -160,7 +160,7 @@ #define I2C_MCTRL_RUN (1 << 0) /* Bit 0: Enable master transfer */ #define I2C_MCTRL_START (1 << 1) /* Bit 1: Generate [repeated] START */ -#define I2C_MCTRL_STOP (1 << 2) /* Bit 2: STOP at end of data cyle */ +#define I2C_MCTRL_STOP (1 << 2) /* Bit 2: STOP at end of data cycle */ #define I2C_MCTRL_ACK (1 << 3) /* Bit 3: Data acknowledge enable */ /* Master Data */ diff --git a/arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_prcm.h b/arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_prcm.h index babe5426e1c..b9796c443d2 100644 --- a/arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_prcm.h +++ b/arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_prcm.h @@ -416,7 +416,7 @@ /* I2S Clock Control */ -#define PRCM_I2SCLKCTL_EN (1 << 0) /* Emable MCLK, BCLK, and WCLK */ +#define PRCM_I2SCLKCTL_EN (1 << 0) /* Enable MCLK, BCLK, and WCLK */ #define PRCM_I2SCLKCTL_WCLKPHASE_SHIFT 1 /* Bits 1-2: Wclock division ration mode */ #define PRCM_I2SCLKCTL_WCLKPHASE_MASK (3 << PRCM_I2SCLKCTL_WCLKPHASE_SHIFT) # define PRCM_I2SCLKCTL_WCLKPHASE_SINGLE (0 << PRCM_I2SCLKCTL_WCLKPHASE_SHIFT) /* Single phase */ diff --git a/arch/arm/src/tiva/hardware/lm/lm4f_pinmap.h b/arch/arm/src/tiva/hardware/lm/lm4f_pinmap.h index 622f1ce6a2c..4e9f10bbeb4 100644 --- a/arch/arm/src/tiva/hardware/lm/lm4f_pinmap.h +++ b/arch/arm/src/tiva/hardware/lm/lm4f_pinmap.h @@ -52,7 +52,7 @@ * Drivers, however, will use the pin selection without the numeric suffix. * Additional definitions are required in the board.h file. For example, if * CAN1_RX connects vis PA11 on some board, then the following definitions should - * appear inthe board.h header file for that board: + * appear in the board.h header file for that board: * * #define GPIO_CAN1_RX GPIO_CAN1_RX_1 * diff --git a/arch/arm/src/tiva/lm/lm3s_ethernet.c b/arch/arm/src/tiva/lm/lm3s_ethernet.c index 150897aa89e..e8e09cdb190 100644 --- a/arch/arm/src/tiva/lm/lm3s_ethernet.c +++ b/arch/arm/src/tiva/lm/lm3s_ethernet.c @@ -717,7 +717,7 @@ static void tiva_receive(struct tiva_driver_s *priv) /* Check if the pktlen is valid. It should be large enough to hold * an Ethernet header and small enough to fit entirely in the I/O - * buffer. Six is subtracted to acount for the 2-byte length/type + * buffer. Six is subtracted to account for the 2-byte length/type * and 4 byte FCS that are not copied into the network packet. */ diff --git a/arch/arm/src/tiva/tiva_adc.h b/arch/arm/src/tiva/tiva_adc.h index a717ad72f12..394c095a5e1 100644 --- a/arch/arm/src/tiva/tiva_adc.h +++ b/arch/arm/src/tiva/tiva_adc.h @@ -514,7 +514,7 @@ void tiva_adc_sse_int_enable(uint8_t adc, uint8_t sse, bool state); * Name: tiva_adc_sse_int_status * * Description: - * Returns interrupt status for the specificed SSE + * Returns interrupt status for the specified SSE * * Input Parameters: * adc - which ADC peripherals' interrupt status to retrieve diff --git a/arch/arm/src/tiva/tm4c/tm4c129_sysctrl.c b/arch/arm/src/tiva/tm4c/tm4c129_sysctrl.c index a57f29f26c1..3c94added0f 100644 --- a/arch/arm/src/tiva/tm4c/tm4c129_sysctrl.c +++ b/arch/arm/src/tiva/tm4c/tm4c129_sysctrl.c @@ -371,7 +371,7 @@ uint32_t tiva_clock_reconfigure(uint32_t pllfreq0, uint32_t pllfreq1, } } - /* We get here on a timout, failing to get the PLL lock indication */ + /* We get here on a timeout, failing to get the PLL lock indication */ DEBUGPANIC(); return 0; diff --git a/arch/arm/src/tiva/tm4c/tm4c_ethernet.c b/arch/arm/src/tiva/tm4c/tm4c_ethernet.c index 3e3a05791db..c6b231d5a89 100644 --- a/arch/arm/src/tiva/tm4c/tm4c_ethernet.c +++ b/arch/arm/src/tiva/tm4c/tm4c_ethernet.c @@ -1100,7 +1100,7 @@ static int tiva_transmit(FAR struct tiva_ethmac_s *priv) txdesc->tdes0 |= (EMAC_TDES0_LS | EMAC_TDES0_IC); - /* This segement is, most likely, of fractional buffersize */ + /* This segment is, most likely, of fractional buffersize */ txdesc->tdes1 = lastsize; buffer += lastsize; @@ -1637,7 +1637,7 @@ static int tiva_recvframe(FAR struct tiva_ethmac_s *priv) dev->d_buf = (uint8_t *)rxcurr->rdes2; rxcurr->rdes2 = (uint32_t)buffer; - /* Return success, remebering where we should re-start scanning + /* Return success, remembering where we should re-start scanning * and resetting the segment scanning logic */ @@ -3295,7 +3295,7 @@ static int tiva_phyinit(FAR struct tiva_ethmac_s *priv) } #endif -#else /* Auto-negotion not selected */ +#else /* Auto-negotiation not selected */ phyval = 0; #ifdef CONFIG_TIVA_ETHFD diff --git a/arch/arm/src/tms570/tms570_boot.c b/arch/arm/src/tms570/tms570_boot.c index ba8b552cab8..29935bb74b2 100644 --- a/arch/arm/src/tms570/tms570_boot.c +++ b/arch/arm/src/tms570/tms570_boot.c @@ -177,7 +177,7 @@ static inline void tms570_enable_ramecc(void) * Name: tms570_memory_initialize * * Description: - * Perform memroy initialization of selected RAMs + * Perform memory initialization of selected RAMs * * This function uses the system module's hardware for auto-initialization * of memories and their associated protection schemes. diff --git a/arch/arm/src/tms570/tms570_lowputc.c b/arch/arm/src/tms570/tms570_lowputc.c index 9dfa9349b44..b2631aeb98b 100644 --- a/arch/arm/src/tms570/tms570_lowputc.c +++ b/arch/arm/src/tms570/tms570_lowputc.c @@ -4,7 +4,7 @@ * Copyright (C) 2015, 2018 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * - * Includes some logic from TI sample which has a compatibile three-clause + * Includes some logic from TI sample which has a compatible three-clause * BSD license and: * * Copyright (c) 2012, Texas Instruments Incorporated diff --git a/arch/arm/src/tms570/tms570_selftest.c b/arch/arm/src/tms570/tms570_selftest.c index 2138035c657..cec286046d3 100644 --- a/arch/arm/src/tms570/tms570_selftest.c +++ b/arch/arm/src/tms570/tms570_selftest.c @@ -154,7 +154,7 @@ static void pbist_memtest_start(uint32_t rinfol, uint32_t algomask) * None * * Returned Value: - * true if the PBIST test is compelte + * true if the PBIST test is complete * ****************************************************************************/ diff --git a/arch/arm/src/tms570/tms570_serial.c b/arch/arm/src/tms570/tms570_serial.c index 0d711e98332..d1a08123fa1 100644 --- a/arch/arm/src/tms570/tms570_serial.c +++ b/arch/arm/src/tms570/tms570_serial.c @@ -432,7 +432,7 @@ static int tms570_interrupt(int irq, void *context, FAR void *arg) for (; ; ) { /* Get the next pending interrupt. For most interrupts, reading the - * INVECT0 register clears the corresonding INTFLAG. + * INVECT0 register clears the corresponding INTFLAG. */ intvec = tms570_serialin(priv, TMS570_SCI_INTVECT0_OFFSET) & SCI_INTVECT_MASK; diff --git a/arch/arm/src/xmc4/hardware/xmc4_ethernet.h b/arch/arm/src/xmc4/hardware/xmc4_ethernet.h index 33266463474..87700055c62 100644 --- a/arch/arm/src/xmc4/hardware/xmc4_ethernet.h +++ b/arch/arm/src/xmc4/hardware/xmc4_ethernet.h @@ -96,7 +96,7 @@ #define XMC4_ETH_MMC_CONTROL_OFFSET 0x0100 /* MMC Control Register */ #define XMC4_ETH_MMC_RECEIVE_INTERRUPT_OFFSET 0x0104 /* MMC Receive Interrupt Register */ #define XMC4_ETH_MMC_TRANSMIT_INTERRUPT_OFFSET 0x0108 /* MMC Transmit Interrupt Register */ -#define XMC4_ETH_MMC_RECEIVE_INTERRUPT_MASK_OFFSET 0x010c /* MMC Reveive Interrupt Mask Register */ +#define XMC4_ETH_MMC_RECEIVE_INTERRUPT_MASK_OFFSET 0x010c /* MMC Receive Interrupt Mask Register */ #define XMC4_ETH_MMC_TRANSMIT_INTERRUPT_MASK_OFFSET 0x0110 /* MMC Transmit Interrupt Mask Register */ #define XMC4_ETH_TX_OCTET_OODBAD_COUNT_GOFFSET 0x0114 /* Transmit Octet Count for Good and Bad Frames Register */ #define XMC4_ETH_TX_FRAME_GOODBAD_COUNT_OFFSET 0x0118 /* Transmit Frame Count for Good and Bad Frames Register */ @@ -418,7 +418,7 @@ #define ETH_MMC_RECEIVE_INTERRUPT_ /* MMC Transmit Interrupt Register */ #define ETH_MMC_TRANSMIT_INTERRUPT_ -/* MMC Reveive Interrupt Mask Register */ +/* MMC Receive Interrupt Mask Register */ #define ETH_MMC_RECEIVE_INTERRUPT_MASK_ /* MMC Transmit Interrupt Mask Register */ #define ETH_MMC_TRANSMIT_INTERRUPT_MASK_ diff --git a/arch/arm/src/xmc4/hardware/xmc4_usic.h b/arch/arm/src/xmc4/hardware/xmc4_usic.h index 0e25807f52d..3ae70ee6272 100644 --- a/arch/arm/src/xmc4/hardware/xmc4_usic.h +++ b/arch/arm/src/xmc4/hardware/xmc4_usic.h @@ -118,7 +118,7 @@ /* Register Addresses ****************************************************************/ /* USIC0 Registers */ -/* Kernal Registers */ +/* Kernel Registers */ #define XMC4_USIC0_ID (XMC4_USIC0_BASE+XMC4_USIC_ID_OFFSET) @@ -207,7 +207,7 @@ #define XMC4_USIC01_IN (XMC4_USIC0_CH1_BASE+XMC4_USIC_IN_OFFSET) /* USIC1 Registers */ -/* Kernal Registers */ +/* Kernel Registers */ #define XMC4_USIC1_ID (XMC4_USIC1_BASE+XMC4_USIC_ID_OFFSET) @@ -296,7 +296,7 @@ #define XMC4_USCI11_IN (XMC4_USIC1_CH1_BASE+XMC4_USIC_IN_OFFSET) /* USCI2 Registers */ -/* Kernal Registers */ +/* Kernel Registers */ #define XMC4_USCI2_ID (XMC4_USCI2_BASE+XMC4_USIC_ID_OFFSET) @@ -386,7 +386,7 @@ /* Register Bit-Field Definitions **************************************************/ -/* Kernal Registers */ +/* Kernel Registers */ /* Kernel State Configuration Register */ #define USIC_ID_MOD_REV_SHIFT (0) /* Bits 0-7: Module Revision Number */ diff --git a/arch/arm/src/xmc4/xmc4_gpio.h b/arch/arm/src/xmc4/xmc4_gpio.h index 1c97c60c38e..fec819e92d5 100644 --- a/arch/arm/src/xmc4/xmc4_gpio.h +++ b/arch/arm/src/xmc4/xmc4_gpio.h @@ -203,7 +203,7 @@ * Public Types ****************************************************************************/ -/* This is a type large enought to hold all pin configuration bits. */ +/* This is a type large enough to hold all pin configuration bits. */ typedef uint32_t gpioconfig_t; diff --git a/arch/arm/src/xmc4/xmc4_irq.c b/arch/arm/src/xmc4/xmc4_irq.c index c3580af0388..7dceb913c58 100644 --- a/arch/arm/src/xmc4/xmc4_irq.c +++ b/arch/arm/src/xmc4/xmc4_irq.c @@ -163,7 +163,7 @@ static void xmc4_dump_nvic(const char *msg, int irq) * xmc4_dbgmonitor, xmc4_pendsv, xmc4_reserved * * Description: - * Handlers for various execptions. None are handled and all are fatal + * Handlers for various exceptions. None are handled and all are fatal * error conditions. The only advantage these provided over the default * unexpected interrupt handler is that they provide a diagnostic output. * diff --git a/arch/arm/src/xmc4/xmc4_serial.c b/arch/arm/src/xmc4/xmc4_serial.c index 697c328728e..684db27c344 100644 --- a/arch/arm/src/xmc4/xmc4_serial.c +++ b/arch/arm/src/xmc4/xmc4_serial.c @@ -739,7 +739,7 @@ static void xmc4_detach(struct uart_dev_s *dev) * interrupt received on the 'irq' It should call uart_transmitchars or * uart_receivechar to perform the appropriate data transfers. The * interrupt handling logic must be able to map the 'irq' number into the - * approprite uart_dev_s structure in order to call these functions. + * appropriate uart_dev_s structure in order to call these functions. * ****************************************************************************/ diff --git a/arch/arm/src/xmc4/xmc4_spi.c b/arch/arm/src/xmc4/xmc4_spi.c index b8911624da0..34959983f85 100644 --- a/arch/arm/src/xmc4/xmc4_spi.c +++ b/arch/arm/src/xmc4/xmc4_spi.c @@ -2054,7 +2054,7 @@ struct spi_dev_s *xmc4_spibus_initialize(int channel) USIC_PCR_SSCMODE_FEM | USIC_PCR_SSCMODE_SELINV; spi_putreg(spi, regval, XMC4_USIC_PCR_OFFSET); - /* Define SPI Mode 0 by defaul */ + /* Define SPI Mode 0 by default */ regval = spi_getreg(spi, XMC4_USIC_BRG_OFFSET); regval &= ~(USIC_BRG_SCLKCFG_MASK); diff --git a/arch/avr/src/at32uc3/at32uc3.h b/arch/avr/src/at32uc3/at32uc3.h index 840ca90794f..0f3e7527668 100644 --- a/arch/avr/src/at32uc3/at32uc3.h +++ b/arch/avr/src/at32uc3/at32uc3.h @@ -100,7 +100,7 @@ #define GPIO_HIGH GPIO_VALUE #define GPIO_LOW (0) -/* Input/Ouptut (Valid only if GPIO_ENABLE) +/* Input/Output (Valid only if GPIO_ENABLE) * .... ..O. .... .... */ @@ -179,7 +179,7 @@ extern "C" * Name: up_clkinit * * Description: - * Initialiaze clock/PLL settings per the definitions in the board.h file. + * Initialize clock/PLL settings per the definitions in the board.h file. * ****************************************************************************/ diff --git a/arch/avr/src/at32uc3/at32uc3_clkinit.c b/arch/avr/src/at32uc3/at32uc3_clkinit.c index 69b629fbfaf..e0c48e027ae 100644 --- a/arch/avr/src/at32uc3/at32uc3_clkinit.c +++ b/arch/avr/src/at32uc3/at32uc3_clkinit.c @@ -89,8 +89,8 @@ * Name: up_enableosc32 * * Description: - * Initialiaze the 32KHz oscillaor. This oscillaor is used by the RTC - * logic to provide the sysem timer. + * Initialize the 32KHz oscillaor. This oscillaor is used by the RTC + * logic to provide the system timer. * ****************************************************************************/ @@ -119,7 +119,7 @@ static inline void up_enableosc32(void) * Name: up_enableosc0 * * Description: - * Initialiaze OSC0 settings per the definitions in the board.h file. + * Initialize OSC0 settings per the definitions in the board.h file. * ****************************************************************************/ @@ -168,7 +168,7 @@ static inline void up_enableosc0(void) * Name: up_enableosc1 * * Description: - * Initialiaze OSC0 settings per the definitions in the board.h file. + * Initialize OSC0 settings per the definitions in the board.h file. * ****************************************************************************/ @@ -217,7 +217,7 @@ static inline void up_enableosc1(void) * Name: up_enablepll0 * * Description: - * Initialiaze PLL0 settings per the definitions in the board.h file. + * Initialize PLL0 settings per the definitions in the board.h file. * ****************************************************************************/ @@ -267,7 +267,7 @@ static inline void up_enablepll0(void) * Name: up_enablepll1 * * Description: - * Initialiaze PLL1 settings per the definitions in the board.h file. + * Initialize PLL1 settings per the definitions in the board.h file. * ****************************************************************************/ @@ -437,7 +437,7 @@ static inline void up_usbclock(void) * Name: up_clkinit * * Description: - * Initialiaze clock/PLL settings per the definitions in the board.h + * Initialize clock/PLL settings per the definitions in the board.h * file. * ****************************************************************************/ diff --git a/arch/avr/src/at32uc3/at32uc3_gpio.c b/arch/avr/src/at32uc3/at32uc3_gpio.c index ec726175dc9..9b126bb4b1a 100644 --- a/arch/avr/src/at32uc3/at32uc3_gpio.c +++ b/arch/avr/src/at32uc3/at32uc3_gpio.c @@ -188,7 +188,7 @@ int at32uc3_configgpio(uint16_t cfgset) putreg32(pinmask, base + AVR32_GPIO_GPERC_OFFSET); } - /* Then the "ornaments" tha do not depend on gpio/peripheral mode: + /* Then the "ornaments" that do not depend on gpio/peripheral mode: * Pull-ups and glitch filering. */ diff --git a/arch/avr/src/at32uc3/at32uc3_irq.c b/arch/avr/src/at32uc3/at32uc3_irq.c index 8e025df1ef0..8ac1cb5b154 100644 --- a/arch/avr/src/at32uc3/at32uc3_irq.c +++ b/arch/avr/src/at32uc3/at32uc3_irq.c @@ -170,7 +170,7 @@ static int up_getgrp(unsigned int irq) * Name: avr32_xcptn * * Description: - * Handlers for unexpected execptions. All are fatal error conditions. + * Handlers for unexpected exceptions. All are fatal error conditions. * ****************************************************************************/ diff --git a/arch/avr/src/at32uc3/at32uc3_memorymap.h b/arch/avr/src/at32uc3/at32uc3_memorymap.h index 2a95b571561..38daf370bb7 100644 --- a/arch/avr/src/at32uc3/at32uc3_memorymap.h +++ b/arch/avr/src/at32uc3/at32uc3_memorymap.h @@ -65,7 +65,7 @@ #define AVR32_P3_BASE 0xc0000000 /* 512MB translated space, cacheable */ #define AVR32_P4_BASE 0xe0000000 /* 512MB system space, non-cacheable */ -/* Reset vector addess */ +/* Reset vector address */ #if defined(CONFIG_ARCH_CHIP_AT32UC3A) # define AVR32_VECTOR_BASE AVR32_P1_BASE diff --git a/arch/avr/src/at32uc3/at32uc3_serial.c b/arch/avr/src/at32uc3/at32uc3_serial.c index e2202f15194..9bcff043d38 100644 --- a/arch/avr/src/at32uc3/at32uc3_serial.c +++ b/arch/avr/src/at32uc3/at32uc3_serial.c @@ -435,7 +435,7 @@ static void up_detach(struct uart_dev_s *dev) * interrupt received on the 'irq' It should call uart_transmitchars or * uart_receivechar to perform the appropriate data transfers. The * interrupt handling logic must be able to map the 'irq' number into the - * approprite uart_dev_s structure in order to call these functions. + * appropriate uart_dev_s structure in order to call these functions. * ****************************************************************************/ @@ -478,7 +478,7 @@ static int up_interrupt(int irq, void *context, void *arg) if ((csr & USART_CSR_TXRDY) != 0) { - /* Transmit data regiser empty ... process outgoing bytes */ + /* Transmit data register empty ... process outgoing bytes */ uart_xmitchars(dev); handled = true; diff --git a/arch/avr/src/at90usb/at90usb_exceptions.S b/arch/avr/src/at90usb/at90usb_exceptions.S index 474dd8b261b..325c978119d 100644 --- a/arch/avr/src/at90usb/at90usb_exceptions.S +++ b/arch/avr/src/at90usb/at90usb_exceptions.S @@ -125,7 +125,7 @@ excpt_common: EXCPT_PROLOGUE /* Call up_doirq with r24 = IRQ number, r22-23 = Pointer to the save structure. The stack - * pointer currently points to the save structure (or maybe the save struture -1 since + * pointer currently points to the save structure (or maybe the save structure -1 since * the push operation post-decrements -- need to REVISIT this). */ diff --git a/arch/avr/src/at90usb/at90usb_lowconsole.c b/arch/avr/src/at90usb/at90usb_lowconsole.c index acfc8e92d53..a995b17f291 100644 --- a/arch/avr/src/at90usb/at90usb_lowconsole.c +++ b/arch/avr/src/at90usb/at90usb_lowconsole.c @@ -190,7 +190,7 @@ void usart1_configure(void) UCSR1A = 0; #endif - /* Select baud, parity, nubmer of bits, stop bits, etc. */ + /* Select baud, parity, number of bits, stop bits, etc. */ ucsr1b = ((1 << TXEN1) | (1 << RXEN1)); ucsr1c = 0; diff --git a/arch/avr/src/at90usb/at90usb_serial.c b/arch/avr/src/at90usb/at90usb_serial.c index 414c9614ce6..a7c04708469 100644 --- a/arch/avr/src/at90usb/at90usb_serial.c +++ b/arch/avr/src/at90usb/at90usb_serial.c @@ -319,7 +319,7 @@ static int usart1_txinterrupt(int irq, void *context, FAR void *arg) if ((ucsr1a & (1 << UDRE1)) != 0) { - /* Transmit data regiser empty ... process outgoing bytes */ + /* Transmit data register empty ... process outgoing bytes */ uart_xmitchars(&g_usart1port); } diff --git a/arch/avr/src/at90usb/at90usb_usbdev.c b/arch/avr/src/at90usb/at90usb_usbdev.c index a58b3833ef0..6e482e71012 100644 --- a/arch/avr/src/at90usb/at90usb_usbdev.c +++ b/arch/avr/src/at90usb/at90usb_usbdev.c @@ -182,7 +182,7 @@ #define AVR_EPSIZE_128 (4 << EPSIZE0) #define AVR_EPSIZE_256 (5 << EPSIZE0) -/* General endpoint defintions */ +/* General endpoint definitions */ #define AVR_EP0 (0) #define AVR_NENDPOINTS (7) @@ -480,7 +480,7 @@ static int avr_fifoready(int timeout) return -EAGAIN; } - /* Timeing is driven by the start of frame (SOF) interrupt which we + /* Timing is driven by the start of frame (SOF) interrupt which we * assume here to be at a one millisecond rate. */ @@ -1289,7 +1289,7 @@ static void avr_usbreset(void) * Name: avr_usbshutdown * * Description: - * Shutdown the USB interface and put the hardare in a known state + * Shutdown the USB interface and put the hardware in a known state * ****************************************************************************/ @@ -2476,7 +2476,7 @@ static int avr_epsubmit(FAR struct usbdev_ep_s *ep, usbtrace(TRACE_OUTREQQUEUED(privep->ep.eplog), privreq->req.len); - /* If there is something avaible in the fifo now, then go get it */ + /* If there is something available in the fifo now, then go get it */ if (avr_fifoready(AVR_TIMEOUT_NONE) == OK) { diff --git a/arch/avr/src/atmega/atmega.h b/arch/avr/src/atmega/atmega.h index 4e7bcee354f..9019a69b0db 100644 --- a/arch/avr/src/atmega/atmega.h +++ b/arch/avr/src/atmega/atmega.h @@ -85,7 +85,7 @@ extern "C" * Name: up_clkinit * * Description: - * Initialiaze clock/PLL settings per the definitions in the board.h file. + * Initialize clock/PLL settings per the definitions in the board.h file. * ****************************************************************************/ diff --git a/arch/avr/src/atmega/atmega_exceptions.S b/arch/avr/src/atmega/atmega_exceptions.S index 468ae9ac720..a0421b192fa 100644 --- a/arch/avr/src/atmega/atmega_exceptions.S +++ b/arch/avr/src/atmega/atmega_exceptions.S @@ -214,7 +214,7 @@ excpt_common: EXCPT_PROLOGUE /* Call up_doirq with r24 = IRQ number, r22-23 = Pointer to the save structure. The stack - * pointer currently points to the save structure (or maybe the save struture -1 since + * pointer currently points to the save structure (or maybe the save structure -1 since * the push operation post-decrements -- need to REVISIT this). */ diff --git a/arch/avr/src/atmega/atmega_lowconsole.c b/arch/avr/src/atmega/atmega_lowconsole.c index 2592e28027d..4457f43ebb5 100644 --- a/arch/avr/src/atmega/atmega_lowconsole.c +++ b/arch/avr/src/atmega/atmega_lowconsole.c @@ -280,7 +280,7 @@ void usart0_configure(void) UCSR0A = 0; #endif - /* Select baud, parity, nubmer of bits, stop bits, etc. */ + /* Select baud, parity, number of bits, stop bits, etc. */ ucsr0b = ((1 << TXEN0) | (1 << RXEN0)); ucsr0c = 0; @@ -375,7 +375,7 @@ void usart1_configure(void) UCSR1A = 0; #endif - /* Select baud, parity, nubmer of bits, stop bits, etc. */ + /* Select baud, parity, number of bits, stop bits, etc. */ ucsr1b = ((1 << TXEN1) | (1 << RXEN1)); ucsr1c = 0; diff --git a/arch/avr/src/atmega/atmega_serial.c b/arch/avr/src/atmega/atmega_serial.c index 4e632860a67..47745af2930 100644 --- a/arch/avr/src/atmega/atmega_serial.c +++ b/arch/avr/src/atmega/atmega_serial.c @@ -523,7 +523,7 @@ static int usart0_txinterrupt(int irq, void *context, FAR void *arg) if ((ucsr0a & (1 << UDRE0)) != 0) { - /* Transmit data regiser empty ... process outgoing bytes */ + /* Transmit data register empty ... process outgoing bytes */ uart_xmitchars(&g_usart0port); } @@ -543,7 +543,7 @@ static int usart1_txinterrupt(int irq, void *context, FAR void *arg) if ((ucsr1a & (1 << UDRE1)) != 0) { - /* Transmit data regiser empty ... process outgoing bytes */ + /* Transmit data register empty ... process outgoing bytes */ uart_xmitchars(&g_usart1port); } diff --git a/arch/avr/src/avr/excptmacros.h b/arch/avr/src/avr/excptmacros.h index 2af838560dc..3f397198479 100644 --- a/arch/avr/src/avr/excptmacros.h +++ b/arch/avr/src/avr/excptmacros.h @@ -423,7 +423,7 @@ * * On completion: * All registers restored except for the PC with now resides at the top of the new stack - * so that ret can be used to switch to the new context. (ret, not reti, becaue ret + * so that ret can be used to switch to the new context. (ret, not reti, because ret * will preserve the restored interrupt state). * ********************************************************************************************/ diff --git a/arch/avr/src/avr/up_romgetc.c b/arch/avr/src/avr/up_romgetc.c index d78db9ee5af..02209a1bba7 100644 --- a/arch/avr/src/avr/up_romgetc.c +++ b/arch/avr/src/avr/up_romgetc.c @@ -65,7 +65,7 @@ * * Description: * In Harvard architectures, data accesses and instruction accesses occur - * on different busses, perhaps concurrently. All data accesses are + * on different buses, perhaps concurrently. All data accesses are * performed on the data bus unless special machine instructions are * used to read data from the instruction address space. Also, in the * typical MCU, the available SRAM data memory is much smaller that the diff --git a/arch/avr/src/avr/up_sigdeliver.c b/arch/avr/src/avr/up_sigdeliver.c index c7c4ea48e2e..9a14f11c1ae 100644 --- a/arch/avr/src/avr/up_sigdeliver.c +++ b/arch/avr/src/avr/up_sigdeliver.c @@ -128,7 +128,7 @@ void up_sigdeliver(void) /* Then restore the correct state for this thread of execution. This is an * unusual case that must be handled by up_fullcontextresore. This case is - * unusal in two ways: + * unusual in two ways: * * 1. It is not a context switch between threads. Rather, up_fullcontextrestore * must behave more it more like a longjmp within the same task, using diff --git a/arch/avr/src/avr/up_spi.c b/arch/avr/src/avr/up_spi.c index d9f8a9760e6..bce9f6a0fe9 100644 --- a/arch/avr/src/avr/up_spi.c +++ b/arch/avr/src/avr/up_spi.c @@ -126,12 +126,12 @@ static struct avr_spidev_s g_spidev = * Name: spi_lock * * Description: - * On SPI busses where there are multiple devices, it will be necessary to - * lock SPI to have exclusive access to the busses for a sequence of + * On SPI buses where there are multiple devices, it will be necessary to + * lock SPI to have exclusive access to the buses for a sequence of * transfers. The bus should be locked before the chip is selected. After * locking the SPI bus, the caller should then also call the setfrequency, * setbits, and setmode methods to make sure that the SPI is properly - * configured for the device. If the SPI buss is being shared, then it + * configured for the device. If the SPI bus is being shared, then it * may have been left in an incompatible state. * * Input Parameters: diff --git a/arch/avr/src/avr/up_unblocktask.c b/arch/avr/src/avr/up_unblocktask.c index 0f618c6f431..6455dc7b235 100644 --- a/arch/avr/src/avr/up_unblocktask.c +++ b/arch/avr/src/avr/up_unblocktask.c @@ -64,7 +64,7 @@ * tcb: Refers to the tcb to be unblocked. This tcb is * in one of the waiting tasks lists. It must be moved to * the ready-to-run list and, if it is the highest priority - * ready to run taks, executed. + * ready to run task, executed. * ****************************************************************************/ diff --git a/arch/avr/src/avr32/up_exceptions.S b/arch/avr/src/avr32/up_exceptions.S index 5271160ff3f..a297f2dd350 100644 --- a/arch/avr/src/avr32/up_exceptions.S +++ b/arch/avr/src/avr32/up_exceptions.S @@ -269,14 +269,14 @@ avr32_common: /* Disable interrupts in the current SR. This is necessary because the */ /* AVR32 permits nested interrupts (if they are of higher priority). */ /* We can support nested interrupts without some effort because: */ - /* - The global variable g_current_regs permits only one interrupt, */ + /* - The global variable g_current_regs permits only one interrupt, */ /* - If CONFIG_ARCH_INTERRUPTSTACK is defined, then there is a single */ /* interrupt stack, and */ /* - Probably other things. */ ssrf AVR32_SR_GM_SHIFT - /* Save the SP (as it was before the interrupt) in the conext save */ + /* Save the SP (as it was before the interrupt) in the context save */ /* structure. */ /* xx xx xx xx xx xx xx xx SP SR PC LR 12 11 10 09 08 */ /* ^sp */ @@ -296,7 +296,7 @@ avr32_common: mov r11, sp - /* Switch to the interrupt stack if so configured. Move the current */ + /* Switch to the interrupt stack if so configured. Move the current */ /* stack pointer into a preserved register (r7) and set the interrupt */ /* stack pointer. */ diff --git a/arch/avr/src/avr32/up_sigdeliver.c b/arch/avr/src/avr32/up_sigdeliver.c index 12c7e0799b6..b024e3e7fcf 100644 --- a/arch/avr/src/avr32/up_sigdeliver.c +++ b/arch/avr/src/avr32/up_sigdeliver.c @@ -128,7 +128,7 @@ void up_sigdeliver(void) /* Then restore the correct state for this thread of execution. This is an * unusual case that must be handled by up_fullcontextresore. This case is - * unusal in two ways: + * unusual in two ways: * * 1. It is not a context switch between threads. Rather, up_fullcontextrestore * must behave more it more like a longjmp within the same task, using diff --git a/arch/hc/src/m9s12/m9s12_atd.h b/arch/hc/src/m9s12/m9s12_atd.h index 6df615b31a6..b5bab5010bd 100644 --- a/arch/hc/src/m9s12/m9s12_atd.h +++ b/arch/hc/src/m9s12/m9s12_atd.h @@ -189,7 +189,7 @@ /* ATD control register 2 */ -#define ATD_CTL2_ASCIF (1 << 0) /* Bit 0: ATD Sequence Complete Interrup */ +#define ATD_CTL2_ASCIF (1 << 0) /* Bit 0: ATD Sequence Complete Interrupt */ #define ATD_CTL2_ASCIE (1 << 1) /* Bit 1: ATD Sequence Complete Interrupt Enable */ #define ATD_CTL2_ETRIG (1 << 1) /* Bit 2: External Trigger Mode Enable */ #define ATD_CTL2_ETRIG_SHIFT (3) /* Bits 3-4: External Trigger Mode */ diff --git a/arch/hc/src/m9s12/m9s12_serial.c b/arch/hc/src/m9s12/m9s12_serial.c index ea59b836865..4f7bcad5f4a 100644 --- a/arch/hc/src/m9s12/m9s12_serial.c +++ b/arch/hc/src/m9s12/m9s12_serial.c @@ -460,7 +460,7 @@ static void up_detach(struct uart_dev_s *dev) * when an interrupt received on the 'irq' It should call * uart_transmitchars or uart_receivechar to perform the * appropriate data transfers. The interrupt handling logic\ - * must be able to map the 'irq' number into the approprite + * must be able to map the 'irq' number into the appropriate * uart_dev_s structure in order to call these functions. * ****************************************************************************/ diff --git a/arch/hc/src/m9s12/m9s12_vectors.S b/arch/hc/src/m9s12/m9s12_vectors.S index ec23d504025..cef433ed60f 100644 --- a/arch/hc/src/m9s12/m9s12_vectors.S +++ b/arch/hc/src/m9s12/m9s12_vectors.S @@ -380,7 +380,7 @@ vcommon: ************************************************************************************/ up_fullcontextrestore: - /* Make sure that interrupts are dissabled */ + /* Make sure that interrupts are disabled */ orcc #0x50 diff --git a/arch/mips/include/mips32/cp0.h b/arch/mips/include/mips32/cp0.h index 1cbb520d409..aa6d51cd275 100644 --- a/arch/mips/include/mips32/cp0.h +++ b/arch/mips/include/mips32/cp0.h @@ -128,7 +128,7 @@ * Compliance Level: Required for TLB-based MMUs; Optional otherwise. */ -#define CP0_CONTEXT_BADVPN2_SHIFT (4) /* Bits 4-22: Virtual address that cause an excpetion */ +#define CP0_CONTEXT_BADVPN2_SHIFT (4) /* Bits 4-22: Virtual address that cause an exception */ #define CP0_CONTEXT_BADVPN2_MASK (0x0007ffff << CP0_CONTEXT_BADVPN2_SHIFT) #define CP0_CONTEXT_PTEBASE_SHIFT (23) /* Bits 23-31: Page table base address */ #define CP0_CONTEXT_PTEBASE_MASK (0x000001ff << CP0_CONTEXT_PTEBASE_SHIFT) @@ -491,7 +491,7 @@ #define CP0_WATCHHI_MASK_MASK (0x1ff << CP0_WATCHHI_MASK_SHIFT) #define CP0_WATCHHI_ASID_SHIFT (16) /* Bits 16-23: ASID value which to match that in the EntryHi register */ #define CP0_WATCHHI_ASID_MASK (0xff << CP0_WATCHHI_ASID_SHIFT) -#define CP0_WATCHHI_G (1 << 30) /* Bit 30: Any address matcing the WatchLo addr will cause an exception */ +#define CP0_WATCHHI_G (1 << 30) /* Bit 30: Any address matching the WatchLo addr will cause an exception */ #define CP0_WATCHHI_M (1 << 31) /* Bit 30: Another pair of WatchHi/WatchLo registers at select n+1 */ /* Register Number: 20 Sel: 0 Name: XContext diff --git a/arch/mips/include/mips32/irq.h b/arch/mips/include/mips32/irq.h index 05d4ade6644..542bce4c765 100644 --- a/arch/mips/include/mips32/irq.h +++ b/arch/mips/include/mips32/irq.h @@ -120,7 +120,7 @@ #define REG_R24_NDX 27 #define REG_R25_NDX 28 -/* $26-$27 = ko-k1: Reserved for use in exeption handers. These do not need +/* $26-$27 = ko-k1: Reserved for use in exception handers. These do not need * to be saved. */ diff --git a/arch/mips/include/mips32/syscall.h b/arch/mips/include/mips32/syscall.h index 6044df8621f..68891341668 100644 --- a/arch/mips/include/mips32/syscall.h +++ b/arch/mips/include/mips32/syscall.h @@ -74,7 +74,7 @@ /* sys_call macros **********************************************************/ /* System calls with 3 parameters and fewer are handled by sys_call0 * (sys_call1, sys_call2, and sys_call3 are aliases for sys_call0). - * This is because the parmeters are passed in a0-a3. a0 is reserved for + * This is because the parameters are passed in a0-a3. a0 is reserved for * the syscall number leaving up to three additional parameters that can be * passed in registers. The remainder would have to be pushed onto the stack. * diff --git a/arch/mips/include/pic32mz/cp0.h b/arch/mips/include/pic32mz/cp0.h index 160ac833013..3ba63e65b29 100644 --- a/arch/mips/include/pic32mz/cp0.h +++ b/arch/mips/include/pic32mz/cp0.h @@ -72,7 +72,7 @@ # define PIC32MZ_CP0_VIEWIPL $12,4 /* Priority level access */ # define PIC32MZ_CP0_SRSMAP2 $12,5 /* Vector number to shadow set mapping */ # define PIC32MZ_CP0_CAUSE $13,0 /* Cause of last general exception */ -# define PIC32MZ_CP0_VIEWRIPL $13,4 /* RIPL accesss */ +# define PIC32MZ_CP0_VIEWRIPL $13,4 /* RIPL access */ # define PIC32MZ_CP0_NESTEDEXC $13,5 /* Prior error and exception level */ # define PIC32MZ_CP0_EPC $14,0 /* Program counter at last exception */ # define PIC32MZ_CP0_NESTEDEPC $14,2 /* Prior EPC */ diff --git a/arch/mips/src/mips32/up_doirq.c b/arch/mips/src/mips32/up_doirq.c index d178be8f478..ed05acf85b7 100644 --- a/arch/mips/src/mips32/up_doirq.c +++ b/arch/mips/src/mips32/up_doirq.c @@ -88,7 +88,7 @@ uint32_t *up_doirq(int irq, uint32_t *regs) CURRENT_REGS = regs; /* Disable further occurrences of this interrupt (until the interrupt - * srouce have been cleared by the driver). + * source have been cleared by the driver). */ up_disable_irq(irq); diff --git a/arch/mips/src/mips32/up_vfork.c b/arch/mips/src/mips32/up_vfork.c index 97424ef00a4..375a9065935 100644 --- a/arch/mips/src/mips32/up_vfork.c +++ b/arch/mips/src/mips32/up_vfork.c @@ -89,7 +89,7 @@ * - Allocation of the child task's TCB. * - Initialization of file descriptors and streams * - Configuration of environment variables - * - Setup the intput parameters for the task. + * - Setup the input parameters for the task. * - Initialization of the TCB (including call to up_initial_state() * 4) up_vfork() provides any additional operating context. up_vfork must: * - Allocate and initialize the stack @@ -162,7 +162,7 @@ pid_t up_vfork(const struct vfork_s *context) /* Get the size of the parent task's stack. Due to alignment operations, * the adjusted stack size may be smaller than the stack size originally - * requrested. + * requested. */ stacksize = parent->adj_stack_size + CONFIG_STACK_ALIGNMENT - 1; diff --git a/arch/mips/src/mips32/vfork.S b/arch/mips/src/mips32/vfork.S index 3045367e98a..87509da207d 100644 --- a/arch/mips/src/mips32/vfork.S +++ b/arch/mips/src/mips32/vfork.S @@ -77,7 +77,7 @@ * - Allocation of the child task's TCB. * - Initialization of file descriptors and streams * - Configuration of environment variables - * - Setup the intput parameters for the task. + * - Setup the input parameters for the task. * - Initialization of the TCB (including call to up_initial_state() * 4) up_vfork() provides any additional operating context. up_vfork must: * - Allocate and initialize the stack diff --git a/arch/mips/src/pic32mx/Kconfig b/arch/mips/src/pic32mx/Kconfig index 01ba20d013e..56c480a59f7 100644 --- a/arch/mips/src/pic32mx/Kconfig +++ b/arch/mips/src/pic32mx/Kconfig @@ -1046,11 +1046,11 @@ menu "PIC32MX PHY/Ethernet device driver settings" depends on PIC32MX_ETHERNET config PIC32MX_PHY_AUTONEG - bool "Auto-negotion" + bool "Auto-negotiation" default y depends on PIC32MX_ETHERNET ---help--- - Enable auto-negotion + Enable auto-negotiation config PIC32MX_PHY_SPEED100 bool "100Mbps spped" diff --git a/arch/mips/src/pic32mx/excptmacros.h b/arch/mips/src/pic32mx/excptmacros.h index 4fdc8afaf55..11d3f5678e5 100644 --- a/arch/mips/src/pic32mx/excptmacros.h +++ b/arch/mips/src/pic32mx/excptmacros.h @@ -222,7 +222,7 @@ sw t8, REG_T8(sp) sw t9, REG_T9(sp) - /* $26-$27 = ko-k1: Reserved for use in exeption handers. These do not need to be + /* $26-$27 = ko-k1: Reserved for use in exception handers. These do not need to be * saved. * * $28 = gp: Only needs to be saved under conditions where there are multiple, per- @@ -326,7 +326,7 @@ lw t8, REG_T8(k1) lw t9, REG_T9(k1) - /* $26-$27 = ko-k1: Reserved for use in exeption handers. These do not need to be + /* $26-$27 = ko-k1: Reserved for use in exception handers. These do not need to be * saved. * * $28 = gp: Only needs to be saved under conditions where there are multiple, per- diff --git a/arch/mips/src/pic32mx/pic32mx-adc.h b/arch/mips/src/pic32mx/pic32mx-adc.h index 1a29d3af62f..fc6bde0a450 100644 --- a/arch/mips/src/pic32mx/pic32mx-adc.h +++ b/arch/mips/src/pic32mx/pic32mx-adc.h @@ -175,7 +175,7 @@ #define ADC_CON2_BUFS (1 << 7) /* Bit 7: Buffer fill status */ #define ADC_CON2_CSCNA (1 << 10) /* Bit 10: Scan input selections */ #define ADC_CON2_OFFCAL (1 << 12) /* Bit 12: Input offset calibration mode select */ -#define ADC_CON2_VCFG_SHIFT (13) /* Bits 13-15: Voltage reference configuation */ +#define ADC_CON2_VCFG_SHIFT (13) /* Bits 13-15: Voltage reference configuration */ #define ADC_CON2_VCFG_MASK (15 << ADC_CON2_VCFG_SHIFT) # define ADC_CON2_VCFG_AVDDAVSS (0 << ADC_CON2_VCFG_SHIFT) /* VR+=AVdd VR-=AVss */ # define ADC_CON2_VCFG_VREFAVSS (1 << ADC_CON2_VCFG_SHIFT) /* VR+=VREF+ VR-=AVss */ diff --git a/arch/mips/src/pic32mx/pic32mx-ethernet.c b/arch/mips/src/pic32mx/pic32mx-ethernet.c index 3c2a5a0219f..c60045b6165 100644 --- a/arch/mips/src/pic32mx/pic32mx-ethernet.c +++ b/arch/mips/src/pic32mx/pic32mx-ethernet.c @@ -182,7 +182,7 @@ #define PIC32MX_TXTIMEOUT (60*CLK_TCK) -/* PHY timout = 1 minute */ +/* PHY timeout = 1 minute */ #define PIC32MX_MIITIMEOUT (666666) @@ -2780,7 +2780,7 @@ static inline int pic32mx_phyreset(uint8_t phyaddr) * None * * Assumptions: - * The adverisement regiser has already been configured. + * The adverisement register has already been configured. * ****************************************************************************/ diff --git a/arch/mips/src/pic32mx/pic32mx-gpio.c b/arch/mips/src/pic32mx/pic32mx-gpio.c index 7c3dd0895b2..fbcc6a2fd2e 100644 --- a/arch/mips/src/pic32mx/pic32mx-gpio.c +++ b/arch/mips/src/pic32mx/pic32mx-gpio.c @@ -287,7 +287,7 @@ bool pic32mx_gpioread(uint16_t pinset) base = g_gpiobase[port]; - /* Get ane return the input value */ + /* Get and return the input value */ return (getreg32(base + PIC32MX_IOPORT_PORT_OFFSET) & (1 << pin)) != 0; } diff --git a/arch/mips/src/pic32mx/pic32mx-head.S b/arch/mips/src/pic32mx/pic32mx-head.S index 1845fb130ed..8854b90b9a7 100644 --- a/arch/mips/src/pic32mx/pic32mx-head.S +++ b/arch/mips/src/pic32mx/pic32mx-head.S @@ -442,7 +442,7 @@ __start: * - Preserve soft reset (SR) and non-maskable interrupt (NMI) * - CorExtend enabled based on whether CorExtend User Defined * Instructions have been implemented (CEE = Config(UDI)) - * - Disable any pending interrups (IM7..IM2 = 0, IM1..IM0 = 0) + * - Disable any pending interrupts (IM7..IM2 = 0, IM1..IM0 = 0) * - Disable hardware interrupts (IPL7:IPL2 = 0) * - Base mode is Kernel mode (UM = 0) * - Error level is normal (ERL = 0) diff --git a/arch/mips/src/pic32mx/pic32mx-lowinit.c b/arch/mips/src/pic32mx/pic32mx-lowinit.c index 68df326c674..5df4012da45 100644 --- a/arch/mips/src/pic32mx/pic32mx-lowinit.c +++ b/arch/mips/src/pic32mx/pic32mx-lowinit.c @@ -65,12 +65,12 @@ #define CALC_SYSCLOCK (((BOARD_PLL_INPUT / BOARD_PLL_IDIV) * BOARD_PLL_MULT) / BOARD_PLL_ODIV) #if CALC_SYSCLOCK != BOARD_CPU_CLOCK -# error "Bad BOARD_CPU_CLOCK calculcation in board.h" +# error "Bad BOARD_CPU_CLOCK calculation in board.h" #endif #define CALC_PBCLOCK (CALC_SYSCLOCK / BOARD_PBDIV) #if CALC_PBCLOCK != BOARD_PBCLOCK -# error "Bad BOARD_PBCLOCK calculcation in board.h" +# error "Bad BOARD_PBCLOCK calculation in board.h" #endif #if CALC_PBCLOCK > MAX_PBCLOCK diff --git a/arch/mips/src/pic32mx/pic32mx-serial.c b/arch/mips/src/pic32mx/pic32mx-serial.c index 4956789fe66..f2d06873c1e 100644 --- a/arch/mips/src/pic32mx/pic32mx-serial.c +++ b/arch/mips/src/pic32mx/pic32mx-serial.c @@ -450,7 +450,7 @@ static void up_detach(struct uart_dev_s *dev) * interrupt received on the 'irq' It should call uart_transmitchars or * uart_receivechar to perform the appropriate data transfers. The * interrupt handling logic must be able to map the 'irq' number into the - * approprite uart_dev_s structure in order to call these functions. + * appropriate uart_dev_s structure in order to call these functions. * ****************************************************************************/ diff --git a/arch/mips/src/pic32mx/pic32mx-spi.c b/arch/mips/src/pic32mx/pic32mx-spi.c index 4f8070ddebc..89a22a1d900 100644 --- a/arch/mips/src/pic32mx/pic32mx-spi.c +++ b/arch/mips/src/pic32mx/pic32mx-spi.c @@ -416,12 +416,12 @@ static void spi_putreg(FAR struct pic32mx_dev_s *priv, unsigned int offset, * Name: spi_lock * * Description: - * On SPI busses where there are multiple devices, it will be necessary to - * lock SPI to have exclusive access to the busses for a sequence of + * On SPI buses where there are multiple devices, it will be necessary to + * lock SPI to have exclusive access to the buses for a sequence of * transfers. The bus should be locked before the chip is selected. After * locking the SPI bus, the caller should then also call the setfrequency, * setbits, and setmode methods to make sure that the SPI is properly - * configured for the device. If the SPI buss is being shared, then it + * configured for the device. If the SPI bus is being shared, then it * may have been left in an incompatible state. * * Input Parameters: diff --git a/arch/mips/src/pic32mx/pic32mx-usbdev.c b/arch/mips/src/pic32mx/pic32mx-usbdev.c index 1541f310491..21c0ceb322d 100644 --- a/arch/mips/src/pic32mx/pic32mx-usbdev.c +++ b/arch/mips/src/pic32mx/pic32mx-usbdev.c @@ -1788,7 +1788,7 @@ static void pic32mx_eptransfer(struct pic32mx_usbdev_s *priv, uint8_t epno, * This function is called (1) after successful completion of an EP0 Setup * command, or (2) after receipt of the OUT complete event (for simple * transfers). It simply sets up the single BDT to accept the next - * SETUP commend. + * SETUP command. * ****************************************************************************/ @@ -2389,7 +2389,7 @@ resume_packet_processing: * could stall the endpoint and perhaps speed things up a bit???. */ - /* Set up the BDT to accept the next setup commend. */ + /* Set up the BDT to accept the next setup command. */ pic32mx_ep0nextsetup(priv); priv->ctrlstate = CTRLSTATE_WAITSETUP; @@ -2768,7 +2768,7 @@ static int pic32mx_interrupt(int irq, void *context, FAR void *arg) /* Disable and deactivate HNP */ #warning Missing Logic #endif - /* Acknowlege the reset interrupt */ + /* Acknowledge the reset interrupt */ pic32mx_putreg(USB_INT_URST, PIC32MX_USB_IR); goto interrupt_exit; diff --git a/arch/mips/src/pic32mz/pic32mz-dma.h b/arch/mips/src/pic32mz/pic32mz-dma.h index 30e74295fc6..329684022c5 100644 --- a/arch/mips/src/pic32mz/pic32mz-dma.h +++ b/arch/mips/src/pic32mz/pic32mz-dma.h @@ -101,7 +101,7 @@ typedef void (*dma_callback_t)(DMA_HANDLE handle, uint8_t status, void *arg); enum pic32mz_dma_chmode_e { - PIC32MZ_DMA_MODE_BASIC = 1 << 0U, /* Basic transfert mode */ + PIC32MZ_DMA_MODE_BASIC = 1 << 0U, /* Basic transfer mode */ PIC32MZ_DMA_MODE_AUTOEN = 1 << 1U, /* Channel Auto-Enable mode */ PIC32MZ_DMA_MODE_PMATCH = 1 << 2U, /* Pattern Match termination mode */ PIC32MZ_DMA_MODE_CHCHAIN = 1 << 3U, /* Channel chaining mode */ @@ -117,7 +117,7 @@ enum pic32mz_dma_event_e PIC32MZ_DMA_INT_ABORT = 1 << 1U, /* Transfer abort interrupt */ PIC32MZ_DMA_INT_CELLDONE = 1 << 2U, /* Cell transfer complete interrupt */ PIC32MZ_DMA_INT_BLOCKDONE = 1 << 3U, /* Block transfer complete interrupt */ - PIC32MZ_DMA_INT_DESTHALF = 1 << 4U, /* Destination half full interrup t*/ + PIC32MZ_DMA_INT_DESTHALF = 1 << 4U, /* Destination half full interrupt */ PIC32MZ_DMA_INT_DESTDONE = 1 << 5U, /* Destination done interrupt */ PIC32MZ_DMA_INT_SRCHALF = 1 << 6U, /* Source half full interrupt */ PIC32MZ_DMA_INT_SRCDONE = 1 << 7U /* Source done interrupt */ diff --git a/arch/mips/src/pic32mz/pic32mz-ethernet.c b/arch/mips/src/pic32mz/pic32mz-ethernet.c index d1547a84610..2877b75a7bc 100644 --- a/arch/mips/src/pic32mz/pic32mz-ethernet.c +++ b/arch/mips/src/pic32mz/pic32mz-ethernet.c @@ -2945,7 +2945,7 @@ static inline int pic32mz_phyreset(uint8_t phyaddr) * None * * Assumptions: - * The adverisement regiser has already been configured. + * The adverisement register has already been configured. * ****************************************************************************/ diff --git a/arch/mips/src/pic32mz/pic32mz-excptmacros.h b/arch/mips/src/pic32mz/pic32mz-excptmacros.h index 2ddb5b464f9..8c9b4c075fd 100644 --- a/arch/mips/src/pic32mz/pic32mz-excptmacros.h +++ b/arch/mips/src/pic32mz/pic32mz-excptmacros.h @@ -222,7 +222,7 @@ sw t8, REG_T8(sp) sw t9, REG_T9(sp) - /* $26-$27 = ko-k1: Reserved for use in exeption handers. These do not need to be + /* $26-$27 = ko-k1: Reserved for use in exception handers. These do not need to be * saved. * * $28 = gp: Only needs to be saved under conditions where there are multiple, per- @@ -326,7 +326,7 @@ lw t8, REG_T8(k1) lw t9, REG_T9(k1) - /* $26-$27 = ko-k1: Reserved for use in exeption handers. These do not need to be + /* $26-$27 = ko-k1: Reserved for use in exception handers. These do not need to be * saved. * * $28 = gp: Only needs to be saved under conditions where there are multiple, per- diff --git a/arch/mips/src/pic32mz/pic32mz-gpio.c b/arch/mips/src/pic32mz/pic32mz-gpio.c index 1022a224e96..a19764b8d41 100644 --- a/arch/mips/src/pic32mz/pic32mz-gpio.c +++ b/arch/mips/src/pic32mz/pic32mz-gpio.c @@ -321,7 +321,7 @@ bool pic32mz_gpioread(pinset_t pinset) base = g_gpiobase[port]; - /* Get ane return the input value */ + /* Get and return the input value */ return (getreg32(base + PIC32MZ_IOPORT_PORT_OFFSET) & (1 << pin)) != 0; } diff --git a/arch/mips/src/pic32mz/pic32mz-head.S b/arch/mips/src/pic32mz/pic32mz-head.S index 8fb47c515c5..b67559df7a8 100644 --- a/arch/mips/src/pic32mz/pic32mz-head.S +++ b/arch/mips/src/pic32mz/pic32mz-head.S @@ -523,7 +523,7 @@ __start: #endif /* CONFIG_MIPS32_ICACHE || CONFIG_MIPS32_DCACHE */ /* Set the cache algorithm. - * If the cache was enable, then it has already been initiliazed and + * If the cache was enable, then it has already been initialized and * the cache algorithm will be set to write-back with write allocation. * if not, just set the algorithm to uncached. */ @@ -659,7 +659,7 @@ __start: * - Preserve soft reset (SR) and non-maskable interrupt (NMI) * - CorExtend enabled based on whether CorExtend User Defined * Instructions have been implemented (CEE = Config(UDI)) - * - Disable any pending interrups (IM7..IM2 = 0, IM1..IM0 = 0) + * - Disable any pending interrupts (IM7..IM2 = 0, IM1..IM0 = 0) * - Disable hardware interrupts (IPL7:IPL2 = 0) * - Base mode is Kernel mode (UM = 0) * - Error level is normal (ERL = 0) diff --git a/arch/mips/src/pic32mz/pic32mz-i2c.c b/arch/mips/src/pic32mz/pic32mz-i2c.c index 6371606ef1a..c02df77a660 100644 --- a/arch/mips/src/pic32mz/pic32mz-i2c.c +++ b/arch/mips/src/pic32mz/pic32mz-i2c.c @@ -831,7 +831,7 @@ static inline void { elapsed = clock_systimer() - start; - /* The bus is idle if the five least signifcant bits of I2CxCON + /* The bus is idle if the five least significant bits of I2CxCON * are cleared and the I2CxSTAT flag is cleared. */ @@ -1574,7 +1574,7 @@ static int pic32mz_i2c_deinit(FAR struct pic32mz_i2c_priv_s *priv) pic32mz_i2c_putreg(priv, PIC32MZ_I2C_CONCLR_OFFSET, I2C_CON_ON); - /* Disable and dettach ISRs */ + /* Disable and detach ISRs */ #ifndef CONFIG_I2C_POLLED up_disable_irq(priv->config->ev_irq); @@ -1670,7 +1670,7 @@ static int pic32mz_i2c_transfer(FAR struct i2c_master_s *dev, status = pic32mz_i2c_getstatus(priv); } - /* Check for erros. */ + /* Check for errors. */ if ((status & I2C_STAT_BCL)) { diff --git a/arch/mips/src/pic32mz/pic32mz-lowinit.c b/arch/mips/src/pic32mz/pic32mz-lowinit.c index 056698ff70e..bd0f85cc128 100644 --- a/arch/mips/src/pic32mz/pic32mz-lowinit.c +++ b/arch/mips/src/pic32mz/pic32mz-lowinit.c @@ -83,12 +83,12 @@ #define CALC_SYSCLOCK (((BOARD_PLL_INPUT / BOARD_PLL_IDIV) * BOARD_PLL_MULT) / BOARD_PLL_ODIV) #if CALC_SYSCLOCK != BOARD_CPU_CLOCK -# error "Bad BOARD_CPU_CLOCK calculcation in board.h" +# error "Bad BOARD_CPU_CLOCK calculation in board.h" #endif #define CALC_PBCLK1 (CALC_SYSCLOCK / BOARD_PB1DIV) #if CALC_PBCLK1 != BOARD_PBCLK1 -# error "Bad BOARD_PBCLK1 calculcation in board.h" +# error "Bad BOARD_PBCLK1 calculation in board.h" #endif #if CALC_PBCLK1 > MAX_PBCLK @@ -98,7 +98,7 @@ #ifdef BOARD_PBCLK2_ENABLE # define CALC_PBCLK2 (CALC_SYSCLOCK / BOARD_PB2DIV) # if CALC_PBCLK2 != BOARD_PBCLK2 -# error "Bad BOARD_PBCLK2 calculcation in board.h" +# error "Bad BOARD_PBCLK2 calculation in board.h" # endif # if CALC_PBCLK2 > MAX_PBCLK @@ -109,7 +109,7 @@ #ifdef BOARD_PBCLK3_ENABLE # define CALC_PBCLK3 (CALC_SYSCLOCK / BOARD_PB3DIV) # if CALC_PBCLK3 != BOARD_PBCLK3 -# error "Bad BOARD_PBCLK3 calculcation in board.h" +# error "Bad BOARD_PBCLK3 calculation in board.h" # endif # if CALC_PBCLK3 > MAX_PBCLK @@ -120,7 +120,7 @@ #ifdef BOARD_PBCLK4_ENABLE # define CALC_PBCLK4 (CALC_SYSCLOCK / BOARD_PB4DIV) # if CALC_PBCLK4 != BOARD_PBCLK4 -# error "Bad BOARD_PBCLK4 calculcation in board.h" +# error "Bad BOARD_PBCLK4 calculation in board.h" # endif # if CALC_PBCLK4 > MAX_PBCLK @@ -131,7 +131,7 @@ #ifdef BOARD_PBCLK5_ENABLE # define CALC_PBCLK5 (CALC_SYSCLOCK / BOARD_PB5DIV) # if CALC_PBCLK5 != BOARD_PBCLK5 -# error "Bad BOARD_PBCLK5 calculcation in board.h" +# error "Bad BOARD_PBCLK5 calculation in board.h" # endif # if CALC_PBCLK5 > MAX_PBCLK @@ -142,7 +142,7 @@ #ifdef BOARD_PBCLK6_ENABLE # define CALC_PBCLK6 (CALC_SYSCLOCK / BOARD_PB6DIV) # if CALC_PBCLK6 != BOARD_PBCLK6 -# error "Bad BOARD_PBCLK6 calculcation in board.h" +# error "Bad BOARD_PBCLK6 calculation in board.h" # endif # if CALC_PBCLK6 > MAX_PBCLK @@ -153,7 +153,7 @@ #ifdef BOARD_PBCLK7_ENABLE # define CALC_PBCLK7 (CALC_SYSCLOCK / BOARD_PB7DIV) # if CALC_PBCLK7 != BOARD_PBCLK7 -# error "Bad BOARD_PBCLK7 calculcation in board.h" +# error "Bad BOARD_PBCLK7 calculation in board.h" # endif # if CALC_PBCLK7 > MAX_PBCLK7 @@ -164,7 +164,7 @@ #ifdef BOARD_PBCLK8_ENABLE # define CALC_PBCLK8 (CALC_SYSCLOCK / BOARD_PB8DIV) # if CALC_PBCLK8 != BOARD_PBCLK8 -# error "Bad BOARD_PBCLK8 calculcation in board.h" +# error "Bad BOARD_PBCLK8 calculation in board.h" # endif # if CALC_PBCLK8 > MAX_PBCLK diff --git a/arch/mips/src/pic32mz/pic32mz-oneshot-lowerhalf.c b/arch/mips/src/pic32mz/pic32mz-oneshot-lowerhalf.c index 5f79c40d2ef..98400464044 100644 --- a/arch/mips/src/pic32mz/pic32mz-oneshot-lowerhalf.c +++ b/arch/mips/src/pic32mz/pic32mz-oneshot-lowerhalf.c @@ -163,7 +163,7 @@ static void pic32mz_oneshot_handler(void *arg) * lower An instance of the lower-half oneshot state structure. This * structure must have been previously initialized via a call to * oneshot_initialize(); - * ts The location in which to return the maxumum delay. + * ts The location in which to return the maximum delay. * * Returned Value: * Zero (OK) is returned on success; a negated errno value is returned diff --git a/arch/mips/src/pic32mz/pic32mz-spi.c b/arch/mips/src/pic32mz/pic32mz-spi.c index 14ea8c22c42..ac0d94962a5 100644 --- a/arch/mips/src/pic32mz/pic32mz-spi.c +++ b/arch/mips/src/pic32mz/pic32mz-spi.c @@ -1169,12 +1169,12 @@ static void spi_exchange16(FAR struct pic32mz_dev_s *priv, * Name: spi_lock * * Description: - * On SPI busses where there are multiple devices, it will be necessary to - * lock SPI to have exclusive access to the busses for a sequence of + * On SPI buses where there are multiple devices, it will be necessary to + * lock SPI to have exclusive access to the buses for a sequence of * transfers. The bus should be locked before the chip is selected. After * locking the SPI bus, the caller should then also call the setfrequency, * setbits, and setmode methods to make sure that the SPI is properly - * configured for the device. If the SPI buss is being shared, then it + * configured for the device. If the SPI bus is being shared, then it * may have been left in an incompatible state. * * Input Parameters: diff --git a/arch/mips/src/pic32mz/pic32mz-timer.c b/arch/mips/src/pic32mz/pic32mz-timer.c index 4b0c8d625e0..3e2516812e7 100644 --- a/arch/mips/src/pic32mz/pic32mz-timer.c +++ b/arch/mips/src/pic32mz/pic32mz-timer.c @@ -587,11 +587,11 @@ static inline bool pic32mz_timer_mode32(FAR struct pic32mz_timer_dev_s *dev) static inline uint32_t pic32mz_timer_oddoffset(uint32_t evenoffset) { - /* To access the consecutive odd timer the base needs te be changed. + /* To access the consecutive odd timer the base needs be changed. * PIC32MZ_TIMERn_OFFSET(1) represents the offset between timers' base. * An even timer's base + PIC32MZ_TIMERn_OFFSET(1) gives the base of * the next odd timer. - * This wil allow the access of the odd timer from the dev of its + * This will allow the access of the odd timer from the dev of its * previous even timer. */ diff --git a/arch/misoc/Kconfig b/arch/misoc/Kconfig index cc124f77741..a9f19f869fe 100644 --- a/arch/misoc/Kconfig +++ b/arch/misoc/Kconfig @@ -57,14 +57,14 @@ config MISOC_UART bool config MISOC_UART_RX_BUF_SIZE - int "UART RX Bufer size" + int "UART RX Buffer size" default 64 depends on MISOC_UART ---help--- Size of RX buffers for MISOC UARTs config MISOC_UART_TX_BUF_SIZE - int "UART TX Bufer size" + int "UART TX Buffer size" default 64 depends on MISOC_UART ---help--- diff --git a/arch/misoc/src/common/misoc_net.c b/arch/misoc/src/common/misoc_net.c index 5f9dcb339c6..c0549957def 100644 --- a/arch/misoc/src/common/misoc_net.c +++ b/arch/misoc/src/common/misoc_net.c @@ -139,7 +139,7 @@ struct misoc_net_driver_s static uint8_t g_pktbuf[MAX_NETDEV_PKTSIZE + CONFIG_NET_GUARDSIZE]; -/* Driver state structur */ +/* Driver state structure */ static struct misoc_net_driver_s g_misoc_net[CONFIG_MISOC_NET_NINTERFACES]; diff --git a/arch/misoc/src/common/misoc_serial.c b/arch/misoc/src/common/misoc_serial.c index e23d86defad..f26de1dc14f 100644 --- a/arch/misoc/src/common/misoc_serial.c +++ b/arch/misoc/src/common/misoc_serial.c @@ -344,7 +344,7 @@ static void misoc_detach(struct uart_dev_s *dev) * interrupt received on the 'irq' It should call uart_transmitchars or * uart_receivechar to perform the appropriate data transfers. The * interrupt handling logic must be able to map the 'irq' number into the - * approprite uart_dev_s structure in order to call these functions. + * appropriate uart_dev_s structure in order to call these functions. * ****************************************************************************/ diff --git a/arch/misoc/src/minerva/minerva_vectors.S b/arch/misoc/src/minerva/minerva_vectors.S index defe23323d7..fbfa3b17052 100644 --- a/arch/misoc/src/minerva/minerva_vectors.S +++ b/arch/misoc/src/minerva/minerva_vectors.S @@ -41,7 +41,7 @@ #include /**************************************************************************** - * Pre-processor Defintions + * Pre-processor Definitions ****************************************************************************/ #define MINERVA_STACK_BASE _ebss diff --git a/arch/or1k/include/spr.h b/arch/or1k/include/spr.h index 82a922a8090..a7a33581514 100644 --- a/arch/or1k/include/spr.h +++ b/arch/or1k/include/spr.h @@ -248,7 +248,7 @@ /* IMMU Register Bits */ -/* Data Cache Configurtion Register Bits */ +/* Data Cache Configuration Register Bits */ #define SPR_DCCFGR_NCW_SHIFT (0) #define SPR_DCCFGR_NCW_MASK (0x7 << SPR_DCCFGR_NCW_SHIFT) diff --git a/arch/renesas/include/m16c/limits.h b/arch/renesas/include/m16c/limits.h index 26cb2726f36..def468482ca 100644 --- a/arch/renesas/include/m16c/limits.h +++ b/arch/renesas/include/m16c/limits.h @@ -69,7 +69,7 @@ #define INT_MAX SHRT_MAX #define UINT_MAX USHRT_MAX -/* For M16C, typle 'long int' is 32-bits */ +/* For M16C, tuple 'long int' is 32-bits */ #define LONG_MIN (-LONG_MAX - 1) #define LONG_MAX 2147483647L diff --git a/arch/renesas/include/rx65n/irq.h b/arch/renesas/include/rx65n/irq.h index 48cebb2f6a9..d7089caae56 100644 --- a/arch/renesas/include/rx65n/irq.h +++ b/arch/renesas/include/rx65n/irq.h @@ -603,7 +603,7 @@ /* Saved to the stacked by up_vector */ -/* Vector table offets **************************************************************/ +/* Vector table offsets *************************************************************/ /* Trap instruction */ diff --git a/arch/renesas/include/sh1/irq.h b/arch/renesas/include/sh1/irq.h index 257a6837639..a06d9e9034b 100644 --- a/arch/renesas/include/sh1/irq.h +++ b/arch/renesas/include/sh1/irq.h @@ -256,7 +256,7 @@ #define SH1_SYSTIMER_IRQ SH1_IMIA0_IRQ #endif -/* Vector table offets **************************************************************/ +/* Vector table offsets *************************************************************/ /* The following provides the vector numbers for each IRQ. The IRQ numbers (above) * form the densely packet number space used by the system to identify IRQs. The diff --git a/arch/renesas/src/common/up_initialize.c b/arch/renesas/src/common/up_initialize.c index af513983b09..a964630504d 100644 --- a/arch/renesas/src/common/up_initialize.c +++ b/arch/renesas/src/common/up_initialize.c @@ -134,7 +134,7 @@ void up_initialize(void) /* Initialize the console device driver (if it is other than the standard * serial driver). NOTE that the naming implies that the console is a serial * driver. That is usually the case, however, if no UARTs are enabled, the - * console could als be provided through some other device, such as an LCD. + * console could also be provided through some other device, such as an LCD. * Architecture-specific logic will have to detect that case. */ diff --git a/arch/renesas/src/common/up_internal.h b/arch/renesas/src/common/up_internal.h index ca74ca43192..4a0dab6af4f 100644 --- a/arch/renesas/src/common/up_internal.h +++ b/arch/renesas/src/common/up_internal.h @@ -54,7 +54,7 @@ /* Determine which (if any) console driver to use. NOTE that the naming * implies that the console is a serial driver. That is usually the case, - * however, if no UARTs are enabled, the console could als be provided + * however, if no UARTs are enabled, the console could also be provided * through some other device, such as an LCD. Architecture-specific logic * will have to detect that case. * diff --git a/arch/renesas/src/m16c/m16c_serial.c b/arch/renesas/src/m16c/m16c_serial.c index c26c1816ed5..704800c2a7f 100644 --- a/arch/renesas/src/m16c/m16c_serial.c +++ b/arch/renesas/src/m16c/m16c_serial.c @@ -757,7 +757,7 @@ static void up_detach(struct uart_dev_s *dev) * This is the UART receive interrupt handler. It will be invoked when an * interrupt received on the 'irq' It should call uart_receivechar to * perform the appropriate data transfer. The interrupt handling logic - * must be able to map the 'irq' number into the approprite up_dev_s + * must be able to map the 'irq' number into the appropriate up_dev_s * structure in order to call these functions. * ****************************************************************************/ @@ -900,7 +900,7 @@ static bool up_rxavailable(struct uart_dev_s *dev) * when an interrupt received on the 'irq' It should call * uart_transmitchars or uart_receivechar to perform the * appropriate data transfers. The interrupt handling logic - * must be able to map the 'irq' number into the approprite + * must be able to map the 'irq' number into the appropriate * up_dev_s structure in order to call these functions. * ****************************************************************************/ diff --git a/arch/renesas/src/m16c/m16c_timer.h b/arch/renesas/src/m16c/m16c_timer.h index 5c19ff6ed55..ef3e5d228d8 100644 --- a/arch/renesas/src/m16c/m16c_timer.h +++ b/arch/renesas/src/m16c/m16c_timer.h @@ -160,7 +160,7 @@ #define TAnMR_MR_PMSFLAG 0x00 /* x0x0 : Trigger select one-shot start flag */ #define TAnMR_MR_PMTRIG 0x10 /* x1x0 : Trigger Selected by event/trigger select bits */ #define TAnMR_MR_PM16BIT 0x00 /* 0xx0 : Functions as a 16-bit pulse width modulator */ -#define TAnMR_MR_PM8BIT 0x20 /* 1xx0 : Functions as an 8-bit pulse width modul */ +#define TAnMR_MR_PM8BIT 0x20 /* 1xx0 : Functions as an 8-bit pulse width module */ #define TAnMR_TCK_MASK 0xc0 /* Bits 6-7: Count source select */ /* Timer Mode: */ #define TAnMR_TCK_TMF1 0x00 /* 00: f1 or f2 */ diff --git a/arch/renesas/src/m16c/m16c_vectors.S b/arch/renesas/src/m16c/m16c_vectors.S index b7c6c7c8364..4fdb90e29de 100644 --- a/arch/renesas/src/m16c/m16c_vectors.S +++ b/arch/renesas/src/m16c/m16c_vectors.S @@ -190,7 +190,7 @@ /* Fixed vector section * - * The fixed vector table begins at address ffe00. The firt portion + * The fixed vector table begins at address ffe00. The first portion * of the fixed vector table is the special page table. This table * is not currently used. */ diff --git a/arch/renesas/src/rx65n/Kconfig b/arch/renesas/src/rx65n/Kconfig index 594081ac3a4..e66f89e1562 100644 --- a/arch/renesas/src/rx65n/Kconfig +++ b/arch/renesas/src/rx65n/Kconfig @@ -317,7 +317,7 @@ config RX65N_EMAC0_NRXBUFFERS descriptors that will be allocated The selected value must be an even power of 2. - NOTE that the defaut of 16 correspond to a total of only 2Kb of + NOTE that the default of 16 correspond to a total of only 2Kb of RX buffering. That can easily exceeded on a busy network or with large packet MTUs. You will know if this happens because you will see the "Buffer Not Available (BNA)" receive error. diff --git a/arch/renesas/src/rx65n/rx65n_cmtw0.c b/arch/renesas/src/rx65n/rx65n_cmtw0.c index 1ed3f1a0fff..f0b452c7da2 100644 --- a/arch/renesas/src/rx65n/rx65n_cmtw0.c +++ b/arch/renesas/src/rx65n/rx65n_cmtw0.c @@ -201,7 +201,7 @@ void rx65n_cmtw0_start(uint8_t type, uint32_t timeout) void rx65n_cmtw0_stop(uint8_t type) { - /* STOP OC0I0 fot polling */ + /* STOP OC0I0 for polling */ if (type == rx65n_cmtw0_txpoll) { @@ -214,7 +214,7 @@ void rx65n_cmtw0_stop(uint8_t type) CMTW0.CMWIOR.WORD &= ~(_1000_CMTW_CMWIOR_OC0E_ENABLE); } - /* Stop OC0I1 fot timeout */ + /* Stop OC0I1 for timeout */ if (type == rx65n_cmtw0_timeout) { diff --git a/arch/renesas/src/rx65n/rx65n_eth.c b/arch/renesas/src/rx65n/rx65n_eth.c index 47be0058fa2..c07344cf9c8 100644 --- a/arch/renesas/src/rx65n/rx65n_eth.c +++ b/arch/renesas/src/rx65n/rx65n_eth.c @@ -245,7 +245,7 @@ /* Define the access timing of MII/RMII register */ -#define ETHER_CFG_PHY_MII_WAIT (8) /* Plese define the value of 1 or more */ +#define ETHER_CFG_PHY_MII_WAIT (8) /* Please define the value of 1 or more */ /* Define the waiting time for reset completion of PHY-LSI */ @@ -962,7 +962,7 @@ static int rx65n_transmit(FAR struct rx65n_ethmac_s *priv) txdesc->tdes0 |= (TFP0 | TWBI); - /* This segement is, most likely, of fractional buffersize */ + /* This segment is, most likely, of fractional buffersize */ txdesc->tdes1 = (lastsize << 16); buffer += lastsize; @@ -1492,7 +1492,7 @@ static int rx65n_recvframe(FAR struct rx65n_ethmac_s *priv) (priv->dev.d_statistics.rx_packets)++; #endif - /* Return success, remebering where we should re-start scanning + /* Return success, remembering where we should re-start scanning * and resetting the segment scanning logic */ @@ -1789,7 +1789,7 @@ static void rx65n_freeframe(FAR struct rx65n_ethmac_s *priv) txdesc->tdes2 = 0; - /* Check if this is the last segement of a TX frame */ + /* Check if this is the last segment of a TX frame */ if ((txdesc->tdes0 & TFP0) != 0) { @@ -2452,7 +2452,7 @@ static int rx65n_txavail(struct net_driver_s *dev) ****************************************************************************/ #if defined(CONFIG_NET_MCASTGROUP) || defined(CONFIG_NET_ICMPv6) -/* Currently Not supportted, Need to update this code when support added */ +/* Currently Not supported, Need to update this code when support added */ static uint32_t rx65n_calcethcrc(const uint8_t *data, size_t length) { @@ -2512,7 +2512,7 @@ static int rx65n_addmac(struct net_driver_s *dev, FAR const uint8_t *mac) * ****************************************************************************/ -/* Currently Not supportted, Need to update this code when support added */ +/* Currently Not supported, Need to update this code when support added */ #ifdef CONFIG_NET_MCASTGROUP static int rx65n_rmmac(struct net_driver_s *dev, FAR const uint8_t *mac) @@ -2598,7 +2598,7 @@ static void rx65n_txdescinit(FAR struct rx65n_ethmac_s *priv) } } - /* Set Transmit Desciptor List Address Register */ + /* Set Transmit Descriptor List Address Register */ rx65n_putreg((uint32_t)priv->txtable, RX65N_ETHD_TDLAR); } @@ -4024,7 +4024,7 @@ static void rx65n_macaddress(FAR struct rx65n_ethmac_s *priv) * ****************************************************************************/ -/* Currently Not supportted, Need to update this code when support added */ +/* Currently Not supported, Need to update this code when support added */ #ifdef CONFIG_NET_ICMPv6 static void rx65n_ipv6multicast(FAR struct rx65n_ethmac_s *priv) diff --git a/arch/renesas/src/rx65n/rx65n_head.S b/arch/renesas/src/rx65n/rx65n_head.S index 9a3ffc15e26..2549e9d9b6b 100644 --- a/arch/renesas/src/rx65n/rx65n_head.S +++ b/arch/renesas/src/rx65n/rx65n_head.S @@ -39,7 +39,7 @@ #include /* NuttX configuration settings */ #include /* Board-specific settings */ -#include /* IRQ definitons */ +#include /* IRQ definitions */ #include "chip.h" /* Chip-specific settings */ #include "up_internal.h" #include "up_arch.h" diff --git a/arch/renesas/src/rx65n/rx65n_lowputc.c b/arch/renesas/src/rx65n/rx65n_lowputc.c index 6e9e5956dd8..95acdcce143 100644 --- a/arch/renesas/src/rx65n/rx65n_lowputc.c +++ b/arch/renesas/src/rx65n/rx65n_lowputc.c @@ -203,7 +203,7 @@ void up_lowputc(char ch) #ifdef HAVE_CONSOLE uint8_t ssr; - /* Wait until the TDR is avaible */ + /* Wait until the TDR is available */ while (!up_txready()); diff --git a/arch/renesas/src/rx65n/rx65n_serial.c b/arch/renesas/src/rx65n/rx65n_serial.c index e02b659fdf2..40b22cd220f 100644 --- a/arch/renesas/src/rx65n/rx65n_serial.c +++ b/arch/renesas/src/rx65n/rx65n_serial.c @@ -1245,7 +1245,7 @@ static int up_rcvinterrupt(int irq, void *context, void *arg) * when an interrupt received on the 'irq' It should call * uart_transmitchars or uart_receivechar to perform the * appropriate data transfers. The interrupt handling logic\ - * must be able to map the 'irq' number into the approprite + * must be able to map the 'irq' number into the appropriate * up_dev_s structure in order to call these functions. * ****************************************************************************/ diff --git a/arch/renesas/src/rx65n/rx65n_vector.S b/arch/renesas/src/rx65n/rx65n_vector.S index 607a8d116c1..7ca80e6924a 100644 --- a/arch/renesas/src/rx65n/rx65n_vector.S +++ b/arch/renesas/src/rx65n/rx65n_vector.S @@ -40,7 +40,7 @@ #include /* NuttX configuration settings */ #include /* Board-specific settings */ -#include /* IRQ definitons */ +#include /* IRQ definitions */ #include "up_internal.h" #include "rx65n/iodefine.h" #include "rx65n_definitions.h" @@ -202,7 +202,7 @@ _up_vector: * structures are being accessed. */ - SETPSW I /* Enable Inerrupt */ + SETPSW I /* Enable Interrupt */ MVTIPL RX65N_INTERRUPT_IPL /* configMAX_SYSCALL_INTERRUPT_PRIORITY */ #endif MOV.L #_up_num_irq, R2 @@ -224,7 +224,7 @@ _up_vector: /* Reset the interrupt mask as no more data structure access is required. */ - CLRPSW I /* Disable Inerrupt */ + CLRPSW I /* Disable Interrupt */ MVTIPL #15 /* configKERNEL_INTERRUPT_PRIORITY */ #endif POPREGS diff --git a/arch/renesas/src/sh1/sh1_head.S b/arch/renesas/src/sh1/sh1_head.S index 587aea7887d..8ba6d02b642 100644 --- a/arch/renesas/src/sh1/sh1_head.S +++ b/arch/renesas/src/sh1/sh1_head.S @@ -39,7 +39,7 @@ #include /* NuttX configuration settings */ #include /* Board-specific settings */ -#include /* IRQ definitons */ +#include /* IRQ definitions */ #include "chip.h" /* Chip-specific settings */ #include "up_internal.h" @@ -382,12 +382,12 @@ __start0: bt 1b /* Continue looping until all copied */ nop /* Delay slot */ - /* Update the VBR to show new adddress of vector table */ + /* Update the VBR to show new address of vector table */ mov.l .Lsvect, r0 /* R0: Address of SRAM vector table */ ldc r0, vbr /* Set VBR to start of SRAM vector table */ - /* Initialize data segement */ + /* Initialize data segment */ #ifdef CONFIG_BOOT_RUNFROMFLASH mov.l .Lsdata, r0 /* R0: Start of .data segment */ diff --git a/arch/renesas/src/sh1/sh1_irq.c b/arch/renesas/src/sh1/sh1_irq.c index 8fe7241c607..d0867328338 100644 --- a/arch/renesas/src/sh1/sh1_irq.c +++ b/arch/renesas/src/sh1/sh1_irq.c @@ -56,7 +56,7 @@ volatile uint32_t *g_current_regs; /**************************************************************************** - * Public Funtions + * Public Functions ****************************************************************************/ /**************************************************************************** diff --git a/arch/renesas/src/sh1/sh1_lowputc.c b/arch/renesas/src/sh1/sh1_lowputc.c index b35f1589c08..eb9b9e23f3f 100644 --- a/arch/renesas/src/sh1/sh1_lowputc.c +++ b/arch/renesas/src/sh1/sh1_lowputc.c @@ -199,7 +199,7 @@ void up_lowputc(char ch) #ifdef HAVE_CONSOLE uint8_t ssr; - /* Wait until the TDR is avaible */ + /* Wait until the TDR is available */ while (!up_txready()); diff --git a/arch/renesas/src/sh1/sh1_serial.c b/arch/renesas/src/sh1/sh1_serial.c index 59954dff522..4c38ab4b5c2 100644 --- a/arch/renesas/src/sh1/sh1_serial.c +++ b/arch/renesas/src/sh1/sh1_serial.c @@ -560,7 +560,7 @@ static void up_detach(struct uart_dev_s *dev) * when an interrupt received on the 'irq' It should call * uart_transmitchars or uart_receivechar to perform the * appropriate data transfers. The interrupt handling logic\ - * must be able to map the 'irq' number into the approprite + * must be able to map the 'irq' number into the appropriate * up_dev_s structure in order to call these functions. * ****************************************************************************/ diff --git a/arch/renesas/src/sh1/sh1_vector.S b/arch/renesas/src/sh1/sh1_vector.S index 3702dbcb7ee..2bd43838cf4 100644 --- a/arch/renesas/src/sh1/sh1_vector.S +++ b/arch/renesas/src/sh1/sh1_vector.S @@ -39,7 +39,7 @@ #include /* NuttX configuration settings */ #include /* Board-specific settings */ -#include /* IRQ definitons */ +#include /* IRQ definitions */ #include "chip.h" /* Chip-specific settings */ #include "up_internal.h" @@ -247,7 +247,7 @@ _up_cmi_handler: * Name: _up_vector * * Description: - * Execption entry point. Upon entry: + * Exception entry point. Upon entry: * * R4 : Holds IRQ number * SP -> Saved R4 (REG_R4=19) See irq.h diff --git a/arch/risc-v/include/fe310/irq.h b/arch/risc-v/include/fe310/irq.h index 43c2afa2655..d8e14c34d8a 100644 --- a/arch/risc-v/include/fe310/irq.h +++ b/arch/risc-v/include/fe310/irq.h @@ -79,7 +79,7 @@ #define FE310_IRQ_MTIMER (FE310_IRQ_ASYNC + 7) /* Machine Timer Int */ #define FE310_IRQ_MEXT (FE310_IRQ_ASYNC + 11) /* Machine External Int */ -/* Machine Grobal External Interrupt */ +/* Machine Global External Interrupt */ #define FE310_IRQ_UART0 (FE310_IRQ_MEXT + 3) #define FE310_IRQ_UART1 (FE310_IRQ_MEXT + 4) diff --git a/arch/risc-v/include/k210/irq.h b/arch/risc-v/include/k210/irq.h index 241ad12b003..4c05be2bd33 100644 --- a/arch/risc-v/include/k210/irq.h +++ b/arch/risc-v/include/k210/irq.h @@ -80,7 +80,7 @@ #define K210_IRQ_MTIMER (K210_IRQ_ASYNC + 7) /* Machine Timer Int */ #define K210_IRQ_MEXT (K210_IRQ_ASYNC + 11) /* Machine External Int */ -/* Machine Grobal External Interrupt */ +/* Machine Global External Interrupt */ #ifdef CONFIG_K210_WITH_QEMU #define K210_IRQ_UART0 (K210_IRQ_MEXT + 4) diff --git a/arch/risc-v/src/fe310/fe310_head.S b/arch/risc-v/src/fe310/fe310_head.S index c7169e611a3..b2abe6bb302 100644 --- a/arch/risc-v/src/fe310/fe310_head.S +++ b/arch/risc-v/src/fe310/fe310_head.S @@ -130,7 +130,7 @@ exception_common: addi s0, sp, XCPTCONTEXT_SIZE sw s0, 2*4(sp) /* original SP */ - /* Setup arg0(exeption cause), arg1(context) */ + /* Setup arg0(exception cause), arg1(context) */ csrr a0, mcause /* exception cause */ csrr s0, mepc diff --git a/arch/risc-v/src/fe310/fe310_serial.c b/arch/risc-v/src/fe310/fe310_serial.c index e484c184e71..394dc9493b9 100644 --- a/arch/risc-v/src/fe310/fe310_serial.c +++ b/arch/risc-v/src/fe310/fe310_serial.c @@ -280,7 +280,7 @@ static int up_setup(struct uart_dev_s *dev) up_serialout(priv, UART_RXCTL_OFFSET, 1); - /* Set TX watermark levl to 1 Enable TX */ + /* Set TX watermark level to 1 Enable TX */ up_serialout(priv, UART_TXCTL_OFFSET, 1 << 16 | 1); @@ -374,7 +374,7 @@ static void up_detach(struct uart_dev_s *dev) * interrupt received on the 'irq' It should call uart_transmitchars or * uart_receivechar to perform the appropriate data transfers. The * interrupt handling logic must be able to map the 'irq' number into the - * approprite uart_dev_s structure in order to call these functions. + * appropriate uart_dev_s structure in order to call these functions. * ****************************************************************************/ diff --git a/arch/risc-v/src/gap8/gap8.h b/arch/risc-v/src/gap8/gap8.h index c4fa99dede2..ff8e69ae92d 100644 --- a/arch/risc-v/src/gap8/gap8.h +++ b/arch/risc-v/src/gap8/gap8.h @@ -589,7 +589,7 @@ typedef struct #define SPIM_CMD_WAIT_EVENT_ID_SHIFT (0U) #define SPIM_CMD_WAIT_EVENT_ID(x) (((uint32_t)(x) /*<< SPIM_CMD_WAIT_EVENT_ID_SHIFT*/) & SPIM_CMD_WAIT_EVENT_ID_MASK) -/* CMD_TX_DATA - SPIM send datas */ +/* CMD_TX_DATA - SPIM send data */ #define SPIM_CMD_TX_DATA_SIZE_MASK (0xFFFFU) #define SPIM_CMD_TX_DATA_SIZE_SHIFT (0U) @@ -601,7 +601,7 @@ typedef struct #define SPIM_CMD_TX_DATA_QPI_SHIFT (27U) #define SPIM_CMD_TX_DATA_QPI(x) (((uint32_t)(x) << SPIM_CMD_TX_DATA_QPI_SHIFT) & SPIM_CMD_TX_DATA_QPI_MASK) -/* CMD_RX_DATA - SPIM receive datas */ +/* CMD_RX_DATA - SPIM receive data */ #define SPIM_CMD_RX_DATA_SIZE_MASK (0xFFFFU) #define SPIM_CMD_RX_DATA_SIZE_SHIFT (0U) @@ -652,7 +652,7 @@ typedef struct #define SPIM_CMD_RX_CHECK_BYTE_ALIGN_SHIFT (26U) #define SPIM_CMD_RX_CHECK_BYTE_ALIGN(x) (((uint32_t)(x) << SPIM_CMD_RX_CHECK_BYTE_ALIGN_SHIFT) & SPIM_CMD_RX_CHECK_BYTE_ALIGN_MASK) -/* The check bits trnsfered by QPI or not */ +/* The check bits transferred by QPI or not */ #define SPIM_CMD_RX_CHECK_QPI_MASK (0x8000000U) #define SPIM_CMD_RX_CHECK_QPI_SHIFT (27U) diff --git a/arch/risc-v/src/gap8/gap8_udma.h b/arch/risc-v/src/gap8/gap8_udma.h index 5747cf6962b..35b9d835455 100644 --- a/arch/risc-v/src/gap8/gap8_udma.h +++ b/arch/risc-v/src/gap8/gap8_udma.h @@ -40,8 +40,8 @@ * The only way to send or receive data is using the uDMA. These peripherals share * the same uDMA ISR. * - * uDMA sybsystem drivers are object oriented to some extend. Peripherals inherit - * the udma class, which handels all the data exchange stuff. + * uDMA subsystem drivers are object oriented to some extend. Peripherals inherit + * the udma class, which handles all the data exchange stuff. ************************************************************************************/ #ifndef _ARCH_RISCV_SRC_GAP8_UDMA_H diff --git a/arch/risc-v/src/gap8/startup_gap8.S b/arch/risc-v/src/gap8/startup_gap8.S index da1a358f0ec..3dc06318a63 100644 --- a/arch/risc-v/src/gap8/startup_gap8.S +++ b/arch/risc-v/src/gap8/startup_gap8.S @@ -205,7 +205,7 @@ reset_handler: li a0, 0x1C000000 /* Set MTVEC */ csrw mtvec, a0 - /* Stack initilization */ + /* Stack initialization */ la x2, _idle_stack_end diff --git a/arch/risc-v/src/k210/k210_cpustart.c b/arch/risc-v/src/k210/k210_cpustart.c index 433b12baad7..c611f9b1518 100644 --- a/arch/risc-v/src/k210/k210_cpustart.c +++ b/arch/risc-v/src/k210/k210_cpustart.c @@ -157,7 +157,7 @@ void k210_cpu_boot(int cpu) * * Each CPU is provided the entry point to is IDLE task when started. A * TCB for each CPU's IDLE task has been initialized and placed in the - * CPU's g_assignedtasks[cpu] list. Not stack has been alloced or + * CPU's g_assignedtasks[cpu] list. Not stack has been allocated or * initialized. * * The OS initialization logic calls this function repeatedly until each diff --git a/arch/risc-v/src/k210/k210_head.S b/arch/risc-v/src/k210/k210_head.S index 46ee266f1da..1f7b3dc6b62 100644 --- a/arch/risc-v/src/k210/k210_head.S +++ b/arch/risc-v/src/k210/k210_head.S @@ -147,7 +147,7 @@ normal_irq: addi s0, sp, XCPTCONTEXT_SIZE sd s0, 2*8(sp) /* original SP */ - /* Setup arg0(exeption cause), arg1(context) */ + /* Setup arg0(exception cause), arg1(context) */ csrr a0, mcause /* exception cause */ csrr s0, mepc diff --git a/arch/risc-v/src/k210/k210_serial.c b/arch/risc-v/src/k210/k210_serial.c index 471c410b683..6af8ecc946d 100644 --- a/arch/risc-v/src/k210/k210_serial.c +++ b/arch/risc-v/src/k210/k210_serial.c @@ -374,7 +374,7 @@ static void up_detach(struct uart_dev_s *dev) * interrupt received on the 'irq' It should call uart_transmitchars or * uart_receivechar to perform the appropriate data transfers. The * interrupt handling logic must be able to map the 'irq' number into the - * approprite uart_dev_s structure in order to call these functions. + * appropriate uart_dev_s structure in order to call these functions. * ****************************************************************************/ diff --git a/arch/risc-v/src/nr5m100/Kconfig b/arch/risc-v/src/nr5m100/Kconfig index d0a51d21f80..7be7e7b079d 100644 --- a/arch/risc-v/src/nr5m100/Kconfig +++ b/arch/risc-v/src/nr5m100/Kconfig @@ -106,14 +106,14 @@ config NR5_UART bool config NR5_UART_RX_BUF_SIZE - int "UART RX Bufer size" + int "UART RX Buffer size" default 64 depends on NR5_UART ---help--- Size of RX buffers for NR5 UARTs config NR5_UART_TX_BUF_SIZE - int "UART TX Bufer size" + int "UART TX Buffer size" default 64 depends on NR5_UART ---help--- diff --git a/arch/risc-v/src/nr5m100/hardware/nr5m1xx_timer.h b/arch/risc-v/src/nr5m100/hardware/nr5m1xx_timer.h index 15c1280f220..98e83727a0a 100644 --- a/arch/risc-v/src/nr5m100/hardware/nr5m1xx_timer.h +++ b/arch/risc-v/src/nr5m100/hardware/nr5m1xx_timer.h @@ -167,7 +167,7 @@ # define TIMERA_TACCTL_RESET_SET (7 << TIMERA_TACCTL_OUTMOD_SHIFT) #define TIMERA_TACCTL_CAP (1 << 8) /* Bit 8: Capture mode select */ #define TIMERA_TACCTL_SCCI (1 << 10) /* Bit 10: Synchronized capture input */ -#define TIMERA_TACCTL_SCS (1 << 11) /* Bit 11: Syncronize capture source */ +#define TIMERA_TACCTL_SCS (1 << 11) /* Bit 11: Synchronize capture source */ #define TIMERA_TACCTL_CCIS_SHIFT 12 /* Bits 12-13: Capture Input Select */ # define TIMERA_TACCTL_CCIS_CCIA (0 << TIMERA_TACCTL_CCIS_SHIFT) # define TIMERA_TACCTL_CCIS_CCIB (1 << TIMERA_TACCTL_CCIS_SHIFT) diff --git a/arch/risc-v/src/nr5m100/nr5_head.S b/arch/risc-v/src/nr5m100/nr5_head.S index 6bc69616d59..fbbe65f5d19 100644 --- a/arch/risc-v/src/nr5m100/nr5_head.S +++ b/arch/risc-v/src/nr5m100/nr5_head.S @@ -573,7 +573,7 @@ up_hard_remu: remu a0, a0, a1 ret -/* Calculate number of clock cycles requried for MUL */ +/* Calculate number of clock cycles required for MUL */ up_time_hard_mul: rdcycle a3 diff --git a/arch/risc-v/src/nr5m100/nr5_init.c b/arch/risc-v/src/nr5m100/nr5_init.c index e83fedd2efb..26c15ffab55 100644 --- a/arch/risc-v/src/nr5m100/nr5_init.c +++ b/arch/risc-v/src/nr5m100/nr5_init.c @@ -51,7 +51,7 @@ /************************************************************************************ * Public Function - Initialization * - * Performs low level board initializaiton tasks. + * Performs low level board initialization tasks. ************************************************************************************/ void __nr5_init(void) diff --git a/arch/risc-v/src/nr5m100/nr5_irq.c b/arch/risc-v/src/nr5m100/nr5_irq.c index aaae110f705..addaa6eef80 100644 --- a/arch/risc-v/src/nr5m100/nr5_irq.c +++ b/arch/risc-v/src/nr5m100/nr5_irq.c @@ -103,7 +103,7 @@ void epic_dump(void) * Name: nr5_trap * * Description: - * Handler for execptions. None are handled and all are fatal + * Handler for exceptions. None are handled and all are fatal * error conditions. The only advantage these provided over the default * unexpected interrupt handler is that they provide a diagnostic output. * diff --git a/arch/risc-v/src/nr5m100/nr5_serial.c b/arch/risc-v/src/nr5m100/nr5_serial.c index a33bcf0b0d9..ac4d9919789 100644 --- a/arch/risc-v/src/nr5m100/nr5_serial.c +++ b/arch/risc-v/src/nr5m100/nr5_serial.c @@ -408,7 +408,7 @@ static void up_detach(struct uart_dev_s *dev) * interrupt received on the 'irq' It should call uart_transmitchars or * uart_receivechar to perform the appropriate data transfers. The * interrupt handling logic must be able to map the 'irq' number into the - * approprite uart_dev_s structure in order to call these functions. + * appropriate uart_dev_s structure in order to call these functions. * ****************************************************************************/ diff --git a/arch/risc-v/src/rv32im/up_vfork.c b/arch/risc-v/src/rv32im/up_vfork.c index 8eb8e1b6f33..0eb311deb5d 100644 --- a/arch/risc-v/src/rv32im/up_vfork.c +++ b/arch/risc-v/src/rv32im/up_vfork.c @@ -89,7 +89,7 @@ * - Allocation of the child task's TCB. * - Initialization of file descriptors and streams * - Configuration of environment variables - * - Setup the intput parameters for the task. + * - Setup the input parameters for the task. * - Initialization of the TCB (including call to up_initial_state() * 4) up_vfork() provides any additional operating context. up_vfork must: * - Allocate and initialize the stack @@ -166,7 +166,7 @@ pid_t up_vfork(const struct vfork_s *context) /* Get the size of the parent task's stack. Due to alignment operations, * the adjusted stack size may be smaller than the stack size originally - * requrested. + * requested. */ stacksize = parent->adj_stack_size + CONFIG_STACK_ALIGNMENT - 1; diff --git a/arch/sim/Kconfig b/arch/sim/Kconfig index e2035348551..cf6de378d45 100644 --- a/arch/sim/Kconfig +++ b/arch/sim/Kconfig @@ -39,7 +39,7 @@ config SIM_M32 The workaround on 64-bit machines for now is to build for a 32-bit target on the 64-bit machine. The workaround for this issue has been included in NuttX 6.15 and - beyond. For thoses versions, you must add SIM_M32=y to the .config file in + beyond. For those versions, you must add SIM_M32=y to the .config file in order to enable building a 32-bit image on a 64-bit platform. config SIM_CYGWIN_DECORATED diff --git a/arch/sim/src/sim/up_framebuffer.c b/arch/sim/src/sim/up_framebuffer.c index b81185b4936..2457bcc44a6 100644 --- a/arch/sim/src/sim/up_framebuffer.c +++ b/arch/sim/src/sim/up_framebuffer.c @@ -121,7 +121,7 @@ static int up_putcmap(FAR struct fb_vtable_s *vtable, static int up_getcursor(FAR struct fb_vtable_s *vtable, FAR struct fb_cursorattrib_s *attrib); static int up_setcursor(FAR struct fb_vtable_s *vtable, - FAR struct fb_setcursor_s *setttings); + FAR struct fb_setcursor_s *settings); #endif /**************************************************************************** @@ -326,10 +326,10 @@ static int up_getcursor(FAR struct fb_vtable_s *vtable, #ifdef CONFIG_FB_HWCURSOR static int up_setcursor(FAR struct fb_vtable_s *vtable, - FAR struct fb_setcursor_s *setttings) + FAR struct fb_setcursor_s *settings) { - ginfo("vtable=%p setttings=%p\n", vtable, setttings); - if (vtable && setttings) + ginfo("vtable=%p settings=%p\n", vtable, settings); + if (vtable && settings) { ginfo("flags: %02x\n", settings->flags); if ((flags & FB_CUR_SETPOSITION) != 0) diff --git a/arch/sim/src/sim/up_lcd.c b/arch/sim/src/sim/up_lcd.c index fcfce356586..eb184cdfeff 100644 --- a/arch/sim/src/sim/up_lcd.c +++ b/arch/sim/src/sim/up_lcd.c @@ -404,7 +404,7 @@ FAR struct lcd_dev_s *board_lcd_getdev(int lcddev) * Name: board_lcd_uninitialize * * Description: - * Unitialize the LCD support + * Uninitialize the LCD support * ****************************************************************************/ diff --git a/arch/sim/src/sim/up_oneshot.c b/arch/sim/src/sim/up_oneshot.c index 0e87a37501e..714591136bc 100644 --- a/arch/sim/src/sim/up_oneshot.c +++ b/arch/sim/src/sim/up_oneshot.c @@ -171,7 +171,7 @@ static void sim_process_tick(sq_entry_t *entry) * lower An instance of the lower-half oneshot state structure. This * structure must have been previously initialized via a call to * oneshot_initialize(); - * ts The location in which to return the maxumum delay. + * ts The location in which to return the maximum delay. * * Returned Value: * Zero (OK) is returned on success; a negated errno value is returned diff --git a/arch/sim/src/sim/up_qspiflash.c b/arch/sim/src/sim/up_qspiflash.c index 2d1c1804475..d77ef884948 100644 --- a/arch/sim/src/sim/up_qspiflash.c +++ b/arch/sim/src/sim/up_qspiflash.c @@ -244,7 +244,7 @@ struct sim_qspiflashdev_s g_qspidev = * transfers. The bus should be locked before the chip is selected. After * locking the SPI bus, the caller should then also call the setfrequency, * setbits, and setmode methods to make sure that the SPI is properly - * configured for the device. If the SPI buss is being shared, then it + * configured for the device. If the SPI bus is being shared, then it * may have been left in an incompatible state. * * Input Parameters: diff --git a/arch/sim/src/sim/up_romgetc.c b/arch/sim/src/sim/up_romgetc.c index 3e0a75921f5..6b6b016f7b2 100644 --- a/arch/sim/src/sim/up_romgetc.c +++ b/arch/sim/src/sim/up_romgetc.c @@ -50,7 +50,7 @@ * * Description: * In Harvard architectures, data accesses and instruction accesses occur - * on different busses, perhaps concurrently. All data accesses are + * on different buses, perhaps concurrently. All data accesses are * performed on the data bus unless special machine instructions are * used to read data from the instruction address space. Also, in the * typical MCU, the available SRAM data memory is much smaller that the diff --git a/arch/sim/src/sim/up_simsmp.c b/arch/sim/src/sim/up_simsmp.c index 5b67954233a..aa061261ef4 100644 --- a/arch/sim/src/sim/up_simsmp.c +++ b/arch/sim/src/sim/up_simsmp.c @@ -296,7 +296,7 @@ int up_cpu_index(void) * * Each CPU is provided the entry point to is IDLE task when started. A * TCB for each CPU's IDLE task has been initialized and placed in the - * CPU's g_assignedtasks[cpu] list. Not stack has been alloced or + * CPU's g_assignedtasks[cpu] list. Not stack has been allocated or * initialized. * * The OS initialization logic calls this function repeatedly until each diff --git a/arch/sim/src/sim/up_spiflash.c b/arch/sim/src/sim/up_spiflash.c index 02dc4d34a3c..7eb8ee45342 100644 --- a/arch/sim/src/sim/up_spiflash.c +++ b/arch/sim/src/sim/up_spiflash.c @@ -341,7 +341,7 @@ struct sim_spiflashdev_s *gp_spidev[] = * transfers. The bus should be locked before the chip is selected. After * locking the SPI bus, the caller should then also call the setfrequency, * setbits, and setmode methods to make sure that the SPI is properly - * configured for the device. If the SPI buss is being shared, then it + * configured for the device. If the SPI bus is being shared, then it * may have been left in an incompatible state. * * Input Parameters: diff --git a/arch/sim/src/sim/up_touchscreen.c b/arch/sim/src/sim/up_touchscreen.c index 39e10500eef..c7a014f0a15 100644 --- a/arch/sim/src/sim/up_touchscreen.c +++ b/arch/sim/src/sim/up_touchscreen.c @@ -187,7 +187,7 @@ static void up_notify(FAR struct up_dev_s *priv) if (priv->nwaiters > 0) { /* After posting this semaphore, we need to exit because - * the touchscreen is no longer avaialable. + * the touchscreen is no longer available. */ nxsem_post(&priv->waitsem); diff --git a/arch/sim/src/sim/up_unblocktask.c b/arch/sim/src/sim/up_unblocktask.c index 2bfd2cbcd00..1553fcfc827 100644 --- a/arch/sim/src/sim/up_unblocktask.c +++ b/arch/sim/src/sim/up_unblocktask.c @@ -64,7 +64,7 @@ * tcb: Refers to the tcb to be unblocked. This tcb is * in one of the waiting tasks lists. It must be moved to * the ready-to-run list and, if it is the highest priority - * ready to run taks, executed. + * ready to run task, executed. * ****************************************************************************/ diff --git a/arch/sim/src/sim/up_x11framebuffer.c b/arch/sim/src/sim/up_x11framebuffer.c index 28f4c26fd2f..0ff5d0fbe33 100644 --- a/arch/sim/src/sim/up_x11framebuffer.c +++ b/arch/sim/src/sim/up_x11framebuffer.c @@ -385,7 +385,7 @@ int up_x11initialize(unsigned short width, unsigned short height, &windowAttributes); /* Get the pixel depth. If the depth is 24-bits, use 32 because X expects - * 32-bit aligment anyway. + * 32-bit alignment anyway. */ depth = windowAttributes.depth; diff --git a/arch/x86/include/i486/arch.h b/arch/x86/include/i486/arch.h index 79c357151b9..23fb7921514 100644 --- a/arch/x86/include/i486/arch.h +++ b/arch/x86/include/i486/arch.h @@ -278,7 +278,7 @@ #define PIT_REG_COUNTER2 0x42 #define PIT_REG_COMMAND 0x43 -/* PIT command bit defintions */ +/* PIT command bit definitions */ # define PIT_OCW_BINCOUNT_BCD (1 << 0) /* vs binary */ # define PIT_OCW_MODE_SHIFT (1) diff --git a/arch/x86/src/i486/up_irq.c b/arch/x86/src/i486/up_irq.c index 8689769ead5..9081eeb5ecb 100644 --- a/arch/x86/src/i486/up_irq.c +++ b/arch/x86/src/i486/up_irq.c @@ -291,7 +291,7 @@ void up_disable_irq(int irq) if (irq >= IRQ0) { - /* Map the IRQ IMR regiser to a PIC and a bit number */ + /* Map the IRQ IMR register to a PIC and a bit number */ if (irq <= IRQ7) { @@ -329,7 +329,7 @@ void up_enable_irq(int irq) if (irq >= IRQ0) { - /* Map the IRQ IMR regiser to a PIC and a bit number */ + /* Map the IRQ IMR register to a PIC and a bit number */ if (irq <= IRQ7) { diff --git a/arch/x86/src/i486/up_savestate.c b/arch/x86/src/i486/up_savestate.c index d3c21709ee7..73db03674dc 100644 --- a/arch/x86/src/i486/up_savestate.c +++ b/arch/x86/src/i486/up_savestate.c @@ -67,7 +67,7 @@ * Description: * This function saves the interrupt level context information in the * TCB. This would just be a up_copystate but we have to handle one - * special case. In the case where the privilige level changes, the + * special case. In the case where the privilege level changes, the * value of sp and ss will not be saved on stack by the interrupt handler. * So, in that case, we will have to fudge those values here. * diff --git a/arch/x86/src/qemu/qemu_vectors.S b/arch/x86/src/qemu/qemu_vectors.S index dbc27a5f8f1..bd4412017a8 100644 --- a/arch/x86/src/qemu/qemu_vectors.S +++ b/arch/x86/src/qemu/qemu_vectors.S @@ -239,14 +239,14 @@ irq_common: .Lreturn: add $4, %esp - /* EAX may possibly hold a pointer to a different regiser save area on + /* EAX may possibly hold a pointer to a different register save area on * return. Are we switching to a new context? */ cmp %eax, %esp je .Lnoswitch - /* A context swith will be performed. EAX holds the address of the new + /* A context switch will be performed. EAX holds the address of the new * register save structure. * * Jump to up_fullcontextrestore(). We perform a call here, but that function diff --git a/arch/xtensa/include/spinlock.h b/arch/xtensa/include/spinlock.h index 644253f8543..b4eddc8d7bc 100644 --- a/arch/xtensa/include/spinlock.h +++ b/arch/xtensa/include/spinlock.h @@ -59,7 +59,7 @@ /* The Type of a spinlock. * - * This must be a uint32_ becaue it will be set using S32C1I instruction. + * This must be a uint32_ because it will be set using S32C1I instruction. * That instruction atomically stores to a memory location only if its * current value is the expected one. The state register (SCOMPARE1) is * used to provide the additional comparison operand. Some implementations diff --git a/arch/xtensa/src/common/xtensa_abi.h b/arch/xtensa/src/common/xtensa_abi.h index e135c1fb789..6ea3f98af4c 100644 --- a/arch/xtensa/src/common/xtensa_abi.h +++ b/arch/xtensa/src/common/xtensa_abi.h @@ -107,7 +107,7 @@ */ /**************************************************************************** - * Pre-processor Defintions + * Pre-processor Definitions ****************************************************************************/ /* MACROS TO HANDLE ABI SPECIFICS OF FUNCTION ENTRY AND RETURN diff --git a/arch/xtensa/src/common/xtensa_context.S b/arch/xtensa/src/common/xtensa_context.S index aa0306cb5a2..c32347d3866 100644 --- a/arch/xtensa/src/common/xtensa_context.S +++ b/arch/xtensa/src/common/xtensa_context.S @@ -256,7 +256,7 @@ xtensa_context_save: /* Recover the return address and return zero */ - l32i a0, a2, (4 * REG_A0) /* Recover return addess */ + l32i a0, a2, (4 * REG_A0) /* Recover return address */ movi a2, 0 /* Return zero */ RET(16) @@ -365,7 +365,7 @@ _xtensa_save_hook: * This is the implementation of xtensa_context_save for the case of the * window ABI. In the window ABI configuration, xtensa_context_save is a * thin "trampoline" layer. It performs the ENTRY window operations on - * entry and the exit. A call0 is used to force the retun from the context + * entry and the exit. A call0 is used to force the return from the context * switch to the window return within this trampoline. * * Input State: @@ -497,7 +497,7 @@ _xtensa_context_restore: * Description: * * This functions implements the moral equivalent of longjmp(). It is - * called from user code (with interrupts disabled) to restor the current + * called from user code (with interrupts disabled) to restore the current * state of the running thread. This function always appears to be a * second return from xtensa_context_save except that that it returns the * value 1 (because the saved value of A2 was set to 1 diff --git a/arch/xtensa/src/common/xtensa_createstack.c b/arch/xtensa/src/common/xtensa_createstack.c index 1632ac445fc..5c58528864c 100644 --- a/arch/xtensa/src/common/xtensa_createstack.c +++ b/arch/xtensa/src/common/xtensa_createstack.c @@ -212,7 +212,7 @@ int up_create_stack(FAR struct tcb_s *tcb, size_t stack_size, uint8_t ttype) * stack. * * REVISIT: This is not secure. In secure built configurations it - * be more appropriate to use kmm_memalign() to allocte protected + * be more appropriate to use kmm_memalign() to allocate protected * memory rather than using the stack. */ diff --git a/arch/xtensa/src/common/xtensa_panic.S b/arch/xtensa/src/common/xtensa_panic.S index c526eab6d4f..4df58f8e98b 100644 --- a/arch/xtensa/src/common/xtensa_panic.S +++ b/arch/xtensa/src/common/xtensa_panic.S @@ -116,7 +116,7 @@ _xtensa_panic: rsr a0, EXCVADDR s32i a0, sp, (4 * REG_EXCVADDR) - /* Set up PS for C, reenable hi-pri interrupts, and clear EXCM. */ + /* Set up PS for C, re-enable hi-pri interrupts, and clear EXCM. */ #ifdef __XTENSA_CALL0_ABI__ movi a0, PS_INTLEVEL(XCHAL_EXCM_LEVEL) | PS_UM diff --git a/arch/xtensa/src/common/xtensa_user_handler.S b/arch/xtensa/src/common/xtensa_user_handler.S index 39c9eb1c7f9..065baef3ed0 100644 --- a/arch/xtensa/src/common/xtensa_user_handler.S +++ b/arch/xtensa/src/common/xtensa_user_handler.S @@ -216,7 +216,7 @@ _xtensa_user_handler: rsr a0, EXCVADDR s32i a0, sp, (4 * REG_EXCVADDR) - /* Set up PS for C, reenable hi-pri interrupts, and clear EXCM. */ + /* Set up PS for C, re-enable hi-pri interrupts, and clear EXCM. */ #ifdef __XTENSA_CALL0_ABI__ movi a0, PS_INTLEVEL(XCHAL_EXCM_LEVEL) | PS_UM @@ -454,7 +454,7 @@ _xtensa_coproc_handler: rsr a0, EXCVADDR s32i a0, sp, (4 * REG_EXCVADDR) - /* Set up PS for C, reenable hi-pri interrupts, and clear EXCM. */ + /* Set up PS for C, re-enable hi-pri interrupts, and clear EXCM. */ #ifdef __XTENSA_CALL0_ABI__ movi a0, PS_INTLEVEL(XCHAL_EXCM_LEVEL) | PS_UM diff --git a/arch/xtensa/src/esp32/esp32_cpuint.c b/arch/xtensa/src/esp32/esp32_cpuint.c index f1361fe0f6d..aeae8455712 100644 --- a/arch/xtensa/src/esp32/esp32_cpuint.c +++ b/arch/xtensa/src/esp32/esp32_cpuint.c @@ -242,7 +242,7 @@ int esp32_alloc_cpuint(uint32_t intmask) int cpuint; int ret = -ENOMEM; - /* Check if there are is CPU interrupts with the requrested properties + /* Check if there are is CPU interrupts with the requested properties * available. */ @@ -311,7 +311,7 @@ int esp32_alloc_cpuint(uint32_t intmask) * * Returned Value: * Zero (OK) is returned on success; A negated errno value is returned on - * any failre. + * any failure. * ****************************************************************************/ @@ -366,7 +366,7 @@ int esp32_cpuint_initialize(void) intmap = g_cpu0_intmap; } - /* Indiate that no peripheral interrupts are assigned to CPU interrupts */ + /* Indicate that no peripheral interrupts are assigned to CPU interrupts */ memset(intmap, CPUINT_UNASSIGNED, ESP32_NCPUINTS); diff --git a/arch/xtensa/src/esp32/esp32_cpuint.h b/arch/xtensa/src/esp32/esp32_cpuint.h index 17ea68b0f7f..cd602fc735f 100644 --- a/arch/xtensa/src/esp32/esp32_cpuint.h +++ b/arch/xtensa/src/esp32/esp32_cpuint.h @@ -76,7 +76,7 @@ extern uint8_t g_cpu1_intmap[ESP32_NCPUINTS]; * * Returned Value: * Zero (OK) is returned on success; A negated errno value is returned on - * any failre. + * any failure. * ****************************************************************************/ diff --git a/arch/xtensa/src/esp32/esp32_cpustart.c b/arch/xtensa/src/esp32/esp32_cpustart.c index 9cb64394fc2..f1f20d5fd38 100644 --- a/arch/xtensa/src/esp32/esp32_cpustart.c +++ b/arch/xtensa/src/esp32/esp32_cpustart.c @@ -204,7 +204,7 @@ void xtensa_appcpu_start(void) esp32_cpuint_initialize(); - /* Attach and emable internal interrupts */ + /* Attach and enable internal interrupts */ #ifdef CONFIG_SMP /* Attach and enable the inter-CPU interrupt */ @@ -249,7 +249,7 @@ void xtensa_appcpu_start(void) * * Each CPU is provided the entry point to is IDLE task when started. A * TCB for each CPU's IDLE task has been initialized and placed in the - * CPU's g_assignedtasks[cpu] list. Not stack has been alloced or + * CPU's g_assignedtasks[cpu] list. Not stack has been allocated or * initialized. * * The OS initialization logic calls this function repeatedly until each diff --git a/arch/xtensa/src/esp32/esp32_intdecode.c b/arch/xtensa/src/esp32/esp32_intdecode.c index 0bc40415246..d346eabe4b0 100644 --- a/arch/xtensa/src/esp32/esp32_intdecode.c +++ b/arch/xtensa/src/esp32/esp32_intdecode.c @@ -74,7 +74,7 @@ static inline void xtensa_intclear(uint32_t mask) * Name: xtensa_int_decode * * Description: - * Determine the peripheral that geneated the interrupt and dispatch + * Determine the peripheral that generated the interrupt and dispatch * handling to the registered interrupt handler via xtensa_irq_dispatch(). * * Input Parameters: diff --git a/arch/xtensa/src/esp32/esp32_irq.c b/arch/xtensa/src/esp32/esp32_irq.c index 3f8f2676fff..e135217f4fb 100644 --- a/arch/xtensa/src/esp32/esp32_irq.c +++ b/arch/xtensa/src/esp32/esp32_irq.c @@ -147,7 +147,7 @@ void up_irqinitialize(void) #warning Missing logic #endif - /* Attach and emable internal interrupts */ + /* Attach and enable internal interrupts */ #ifdef CONFIG_SMP /* Attach and enable the inter-CPU interrupt */ diff --git a/arch/xtensa/src/esp32/esp32_timerisr.c b/arch/xtensa/src/esp32/esp32_timerisr.c index 2a1a840fc84..5119ccab814 100644 --- a/arch/xtensa/src/esp32/esp32_timerisr.c +++ b/arch/xtensa/src/esp32/esp32_timerisr.c @@ -69,7 +69,7 @@ static uint32_t g_tick_divisor; * ****************************************************************************/ -/* Return the current value of the cyle count register */ +/* Return the current value of the cycle count register */ static inline uint32_t xtensa_getcount(void) { diff --git a/arch/xtensa/src/esp32/hardware/esp32_soc.h b/arch/xtensa/src/esp32/hardware/esp32_soc.h index a8597c1f807..86536f0e9a0 100644 --- a/arch/xtensa/src/esp32/hardware/esp32_soc.h +++ b/arch/xtensa/src/esp32/hardware/esp32_soc.h @@ -278,7 +278,7 @@ #define ETS_CAN_INTR_SOURCE 45 /* Interrupt of can, level */ #define ETS_RTC_CORE_INTR_SOURCE 46 /* Interrupt of rtc core, level, include rtc watchdog */ #define ETS_RMT_INTR_SOURCE 47 /* Interrupt of remote controller, level */ -#define ETS_PCNT_INTR_SOURCE 48 /* Interrupt of pluse count, level */ +#define ETS_PCNT_INTR_SOURCE 48 /* Interrupt of pulse count, level */ #define ETS_I2C_EXT0_INTR_SOURCE 49 /* Interrupt of I2C controller1, level */ #define ETS_I2C_EXT1_INTR_SOURCE 50 /* Interrupt of I2C controller0, level */ #define ETS_RSA_INTR_SOURCE 51 /* Interrupt of RSA accelerator, level */ @@ -346,7 +346,7 @@ #define ETS_WBB_INUM 4 #define ETS_TG0_T1_INUM 10 /* Use edge interrupt */ -/* CPU0 Intrrupt number used in ROM, should be cancelled in SDK */ +/* CPU0 Interrupt number used in ROM, should be cancelled in SDK */ #define ETS_SLC_INUM 1 #define ETS_UART0_INUM 5 diff --git a/arch/xtensa/src/esp32/hardware/esp32_uart.h b/arch/xtensa/src/esp32/hardware/esp32_uart.h index 8c58c61ee0d..332430ce241 100644 --- a/arch/xtensa/src/esp32/hardware/esp32_uart.h +++ b/arch/xtensa/src/esp32/hardware/esp32_uart.h @@ -115,7 +115,7 @@ /* UART_TX_BRK_DONE_INT_RAW : RO ;bitpos:[12] ;default: 1'b0 ; */ /* Description: This interrupt raw bit turns to high level when transmitter - * completes sending 0 after all the datas in transmitter's fifo are send. + * completes sending 0 after all the data in transmitter's fifo are send. */ #define UART_TX_BRK_DONE_INT_RAW (BIT(12)) @@ -776,7 +776,7 @@ #define UART_AUTOBAUD_REG(i) (REG_UART_BASE(i) + UART_AUTOBAUD_OFFSET) /* UART_GLITCH_FILT : R/W ;bitpos:[15:8] ;default: 8'h10 ; */ -/* Description: when input pulse width is lower then this value igore this +/* Description: when input pulse width is lower then this value ignore this * pulse. This register is used in autobaud detect process. */ @@ -839,7 +839,7 @@ #define UART_ST_UTX_OUT_S 24 /* UART_TXFIFO_CNT : RO ;bitpos:[23:16] ;default: 8'b0 ; */ -/* Description: (tx_mem_cnt txfifo_cnt) stores the byte num of valid datas +/* Description: (tx_mem_cnt txfifo_cnt) stores the byte num of valid data * in transmitter's fifo. tx_mem_cnt stores the 3 most significant bits * txfifo_cnt stores the 8 least significant bits. */ @@ -893,7 +893,7 @@ #define UART_ST_URX_OUT_S 8 /* UART_RXFIFO_CNT : RO ;bitpos:[7:0] ;default: 8'b0 ; */ -/* Description: (rx_mem_cnt rxfifo_cnt) stores the byte num of valid datas +/* Description: (rx_mem_cnt rxfifo_cnt) stores the byte num of valid data * in receiver's fifo. rx_mem_cnt register stores the 3 most significant * bits rxfifo_cnt stores the 8 least significant bits. */ @@ -1069,7 +1069,7 @@ #define UART_IRDA_DPLX_S 9 /* UART_TXD_BRK : R/W ;bitpos:[8] ;default: 1'b0 ; */ -/* Description: Set this bit to enbale transmitter to send 0 when the +/* Description: Set this bit to enable transmitter to send 0 when the * process of sending data is done. */ @@ -1109,7 +1109,7 @@ #define UART_STOP_BIT_NUM_S 4 /* UART_BIT_NUM : R/W ;bitpos:[3:2] ;default: 2'd3 ; */ -/* Description: This registe is used to set the length of data: +/* Description: This register is used to set the length of data: * 0:5bits 1:6bits 2:7bits 3:8bits */ @@ -1140,7 +1140,7 @@ #define UART_CONF1_REG(i) (REG_UART_BASE(i) + UART_CONF1_OFFSET) /* UART_RX_TOUT_EN : R/W ;bitpos:[31] ;default: 1'b0 ; */ -/* Description: This is the enble bit for uart receiver's timeout function.*/ +/* Description: This is the enable bit for uart receiver's timeout function.*/ #define UART_RX_TOUT_EN (BIT(31)) #define UART_RX_TOUT_EN_M (BIT(31)) @@ -1217,7 +1217,7 @@ #define UART_HIGHPULSE_REG(i) (REG_UART_BASE(i) + UART_HIGHPULSE_OFFSET) /* UART_HIGHPULSE_MIN_CNT : RO ;bitpos:[19:0] ;default: 20'hFFFFF ; */ -/* Description: This register stores the value of the maxinum duration time +/* Description: This register stores the value of the maximum duration time * for the high level pulse. it is used in baudrate-detect process. */ @@ -1494,7 +1494,7 @@ /* UART_RX_GAP_TOUT : R/W ;bitpos:[23:0] ;default: 24'h1e00 ; */ /* Description: This register is used to configure the duration time between * the at_cmd chars. when the duration time is less than this register - * value it will not take the datas as continuous at_cmd chars. + * value it will not take the data as continuous at_cmd chars. */ #define UART_RX_GAP_TOUT 0x00FFFFFF diff --git a/arch/xtensa/src/esp32/rom/esp32_gpio.h b/arch/xtensa/src/esp32/rom/esp32_gpio.h index f4f278cb74c..0f93219cb5a 100644 --- a/arch/xtensa/src/esp32/rom/esp32_gpio.h +++ b/arch/xtensa/src/esp32/rom/esp32_gpio.h @@ -106,7 +106,7 @@ void gpio_init(void); * set_mask - the gpios that need high level. * clear_mask - the gpios that need low level. * enable_mask - the gpios that need be changed. - * disable_mask - the gpios that need diable output. + * disable_mask - the gpios that need disable output. * * Returned Value: * None @@ -129,7 +129,7 @@ void gpio_output_set(uint32_t set_mask, uint32_t clear_mask, * set_mask - the gpios that need high level. * clear_mask - the gpios that need low level. * enable_mask - the gpios that need be changed. - * disable_mask - the gpios that need diable output. + * disable_mask - the gpios that need disable output. * * Returned Value: * None diff --git a/arch/z16/src/common/up_createstack.c b/arch/z16/src/common/up_createstack.c index 0ec33206fc2..2e514bae668 100644 --- a/arch/z16/src/common/up_createstack.c +++ b/arch/z16/src/common/up_createstack.c @@ -155,7 +155,7 @@ int up_create_stack(FAR struct tcb_s *tcb, size_t stack_size, uint8_t ttype) top_of_stack = (uint32_t)tcb->stack_alloc_ptr + stack_size - 4; /* Align the stack to word (4 byte) boundaries. This is probably - * a greater alignement than is required. + * a greater alignment than is required. */ top_of_stack &= ~3; diff --git a/arch/z16/src/common/up_stackframe.c b/arch/z16/src/common/up_stackframe.c index 90cfc635a81..6aa003bdafb 100644 --- a/arch/z16/src/common/up_stackframe.c +++ b/arch/z16/src/common/up_stackframe.c @@ -53,7 +53,7 @@ * Pre-processor Macros ****************************************************************************/ /* Align the stack to word (4 byte) boundaries. This is probablya greater - * alignement than is required. + * alignment than is required. */ #define STACK_ALIGNMENT 4 diff --git a/arch/z16/src/common/up_unblocktask.c b/arch/z16/src/common/up_unblocktask.c index ecaae236087..1a92cbf92d0 100644 --- a/arch/z16/src/common/up_unblocktask.c +++ b/arch/z16/src/common/up_unblocktask.c @@ -66,7 +66,7 @@ * tcb: Refers to the tcb to be unblocked. This tcb is * in one of the waiting tasks lists. It must be moved to * the ready-to-run list and, if it is the highest priority - * ready to run taks, executed. + * ready to run task, executed. * ****************************************************************************/ diff --git a/arch/z16/src/common/up_usestack.c b/arch/z16/src/common/up_usestack.c index 044ecdc3474..6ff7c19487f 100644 --- a/arch/z16/src/common/up_usestack.c +++ b/arch/z16/src/common/up_usestack.c @@ -116,7 +116,7 @@ int up_use_stack(struct tcb_s *tcb, void *stack, size_t stack_size) top_of_stack = (uint32_t)tcb->stack_alloc_ptr + stack_size - 4; /* Align the stack to word (4 byte) boundaries. This is probably - * a greater alignement than is required. + * a greater alignment than is required. */ top_of_stack &= ~3; diff --git a/arch/z16/src/z16f/chip.h b/arch/z16/src/z16f/chip.h index b6847f2f5f6..64d05aef56b 100644 --- a/arch/z16/src/z16f/chip.h +++ b/arch/z16/src/z16f/chip.h @@ -456,7 +456,7 @@ #define Z16F_UARTMDSEL_NORMAL _HX8(00) /* Bits 5-7=0: Multiprocessor and Normal Mode */ #define Z16F_UARTMDSEL_FILTER _HX8(20) /* Bits 5-7=1: Noise Filter Control/Status */ -#define Z16F_UARTMDSEL_LINP _HX8(40) /* Bits 5-7=2: LIN protocol Contol/Status */ +#define Z16F_UARTMDSEL_LINP _HX8(40) /* Bits 5-7=2: LIN protocol Control/Status */ #define Z16F_UARTMDSEL_HWREV _HX8(e0) /* Bits 5-7=7: LIN-UART Hardware Revision */ /* Bits 0-4: Mode dependent status */ diff --git a/arch/z16/src/z16f/z16f_espi.c b/arch/z16/src/z16f/z16f_espi.c index db90f6f4740..65c811f21b1 100644 --- a/arch/z16/src/z16f/z16f_espi.c +++ b/arch/z16/src/z16f/z16f_espi.c @@ -353,7 +353,7 @@ static void spi_flush(FAR struct z16f_spi_s *priv) * transfers. The bus should be locked before the chip is selected. After * locking the SPI bus, the caller should then also call the setfrequency, * setbits, and setmode methods to make sure that the SPI is properly - * configured for the device. If the SPI buss is being shared, then it + * configured for the device. If the SPI bus is being shared, then it * may have been left in an incompatible state. * * Input Parameters: diff --git a/arch/z16/src/z16f/z16f_irq.c b/arch/z16/src/z16f/z16f_irq.c index 69a244725bb..4c9b71aa884 100644 --- a/arch/z16/src/z16f/z16f_irq.c +++ b/arch/z16/src/z16f/z16f_irq.c @@ -128,7 +128,7 @@ void up_enable_irq(int irq) { /* Enable the interrupt by setting the corresponding bit in the * appropriate IRQ enable register. The enable low - * register is assumed to be zero, resulting in "nomimal" interrupt + * register is assumed to be zero, resulting in "nominal" interrupt * priority. */ diff --git a/arch/z16/src/z16f/z16f_sysexec.c b/arch/z16/src/z16f/z16f_sysexec.c index c21d9e377ab..afe61689c3c 100644 --- a/arch/z16/src/z16f/z16f_sysexec.c +++ b/arch/z16/src/z16f/z16f_sysexec.c @@ -55,7 +55,7 @@ * Function: z16f_sysexec * * Description: - * Handle a Z16F system execption + * Handle a Z16F system exception * ****************************************************************************/ diff --git a/arch/z80/include/ez80/types.h b/arch/z80/include/ez80/types.h index ef2e8832687..d39c81fe51b 100644 --- a/arch/z80/include/ez80/types.h +++ b/arch/z80/include/ez80/types.h @@ -110,7 +110,7 @@ typedef unsigned int _size_t; #endif /* This is the size of the interrupt state save returned by up_irq_save(). - * It holds the AF regiser pair + a zero pad byte + * It holds the AF register pair + a zero pad byte */ typedef _uint24_t irqstate_t; diff --git a/arch/z80/src/ez80/ez80_emac.c b/arch/z80/src/ez80/ez80_emac.c index 7b0576424da..bfeed35fc23 100644 --- a/arch/z80/src/ez80/ez80_emac.c +++ b/arch/z80/src/ez80/ez80_emac.c @@ -1030,7 +1030,7 @@ static int ez80emac_transmit(struct ez80emac_driver_s *priv) * header plus the size of the data to be transferred, aligned up to the next * packet buffer size. NOTE: that there is no check to see if we have * overran the EMAC buffer -- i.e., if the next txnext has not yet been - * tranmitted. + * transmitted. */ txdesc = priv->txnext; @@ -1085,7 +1085,7 @@ static int ez80emac_transmit(struct ez80emac_driver_s *priv) txdesc->pktsize = priv->dev.d_len; txdesc->stat = EMAC_TXDESC_OWNER; - /* Enable the TX poll timer. The poll timer may alread be running. In that + /* Enable the TX poll timer. The poll timer may already be running. In that * case, this will force the hardware to poll again now */ @@ -1340,8 +1340,8 @@ static int ez80emac_receive(struct ez80emac_driver_s *priv) rwp = ez80emac_rwp(); /* Update the RRP to match our rxnext pointer: "For the hardware flow control - * to function properly, the software must update the hardare RRP (EmacRrp) - * pointer whenever the software version is upated. The RxDMA uses RWP + * to function properly, the software must update the hardware RRP (EmacRrp) + * pointer whenever the software version is updated. The RxDMA uses RWP * and the RRP to determine how many packets remain in the Rx buffer. */ diff --git a/arch/z80/src/ez80/ez80_i2c.c b/arch/z80/src/ez80/ez80_i2c.c index 4ffd19ae84e..e3070e8becd 100644 --- a/arch/z80/src/ez80/ez80_i2c.c +++ b/arch/z80/src/ez80/ez80_i2c.c @@ -61,7 +61,7 @@ ****************************************************************************/ #define EZ80_NOSTOP (1 << 0) /* Bit 0: No STOP on this transfer */ -#define EZ80_NOSTART (1 << 1) /* Bit 1: No address or START on this tranfers */ +#define EZ80_NOSTART (1 << 1) /* Bit 1: No address or START on this transfers */ /**************************************************************************** * Private Types diff --git a/arch/z80/src/ez80/ez80_saveusercontext.asm b/arch/z80/src/ez80/ez80_saveusercontext.asm index 27318032cac..89cc60322ed 100644 --- a/arch/z80/src/ez80/ez80_saveusercontext.asm +++ b/arch/z80/src/ez80/ez80_saveusercontext.asm @@ -135,7 +135,7 @@ _ez80_saveusercontext: ; Save IX at offset 3 - ld hl, (ix + FRAME_IX) ; HL = Saved alue of IX + ld hl, (ix + FRAME_IX) ; HL = Saved value of IX ld (iy + XCPT_IX), hl ; Index 3: IX ; Save IY at index 4 diff --git a/arch/z80/src/ez80/ez80_serial.c b/arch/z80/src/ez80/ez80_serial.c index edd56aa7301..bfa4e78cfbd 100644 --- a/arch/z80/src/ez80/ez80_serial.c +++ b/arch/z80/src/ez80/ez80_serial.c @@ -468,7 +468,7 @@ static void ez80_detach(FAR struct uart_dev_s *dev) * when an interrupt received on the 'irq' It should call * uart_transmitchars or uart_receivechar to perform the * appropriate data transfers. The interrupt handling logic\ - * must be able to map the 'irq' number into the approprite + * must be able to map the 'irq' number into the appropriate * uart_dev_s structure in order to call these functions. * ****************************************************************************/ diff --git a/arch/z80/src/ez80/ez80_spi.c b/arch/z80/src/ez80/ez80_spi.c index 603bcf4ae81..60d56f2e0c1 100644 --- a/arch/z80/src/ez80/ez80_spi.c +++ b/arch/z80/src/ez80/ez80_spi.c @@ -162,7 +162,7 @@ static sem_t g_exclsem = SEM_INITIALIZER(1); * transfers. The bus should be locked before the chip is selected. After * locking the SPI bus, the caller should then also call the setfrequency, * setbits, and setmode methods to make sure that the SPI is properly - * configured for the device. If the SPI buss is being shared, then it + * configured for the device. If the SPI bus is being shared, then it * may have been left in an incompatible state. * * Input Parameters: diff --git a/arch/z80/src/ez80/ez80_startup.asm b/arch/z80/src/ez80/ez80_startup.asm index 7a0d90464c3..696158d8b50 100644 --- a/arch/z80/src/ez80/ez80_startup.asm +++ b/arch/z80/src/ez80/ez80_startup.asm @@ -82,7 +82,7 @@ _ez80_startup: ld sp, __stack - ; Peform chip-specific initialization + ; Perform chip-specific initialization call _ez80_init diff --git a/arch/z80/src/ez80/ez80f91.h b/arch/z80/src/ez80/ez80f91.h index 213add29d7d..5df6fa7f67d 100644 --- a/arch/z80/src/ez80/ez80f91.h +++ b/arch/z80/src/ez80/ez80f91.h @@ -200,7 +200,7 @@ # define EZ80_TMRCLKSEL_RTC 0x20 /* 01: Real time clock input */ # define EZ80_TMRCLKSEL_ECF 0x40 /* 10: Event count input, falling edge */ # define EZ80_TMRCLKSEL_ECR 0x60 /* 11: Event count input, rising edge */ -#define EZ80_TMRCTL_CLKDIV 0x18 /* Bits 3-4: Sysem clock divider */ +#define EZ80_TMRCTL_CLKDIV 0x18 /* Bits 3-4: System clock divider */ # define EZ80_TMRCLKDIV_4 0x00 /* 00: 4 */ # define EZ80_TMRCLKDIV_16 0x08 /* 01: 16 */ # define EZ80_TMRCLKDIV_64 0x10 /* 10: 64 */ diff --git a/arch/z80/src/ez80/ez80f91_emac.h b/arch/z80/src/ez80/ez80f91_emac.h index 720f8470b1f..b3cb1c0456e 100644 --- a/arch/z80/src/ez80/ez80f91_emac.h +++ b/arch/z80/src/ez80/ez80f91_emac.h @@ -79,7 +79,7 @@ #define EMAC_CFG4_TXFC 0x04 /* Bit 2: 1=Transmit pause control frames */ #define EMAC_CFG4_RXFC 0x08 /* Bit 3: 1=Act on receive pause control frames */ #define EMAC_CFG4_PARF 0x10 /* Bit 4: 1=Receive all frames */ -#define EMAC_CFG4_THDF 0x20 /* Bit 5: 1=Asser back-pressure */ +#define EMAC_CFG4_THDF 0x20 /* Bit 5: 1=Assert back-pressure */ #define EMAC_CFG4_TPCF 0x40 /* Bit 6: 1=Transmit pause control frame. */ /* Bit 7: reserved */ @@ -102,7 +102,7 @@ # define EMAC_MDC_DIV20 0x06 /* MDC = SCLK / 20 */ # define EMAC_MDC_DIV28 0x07 /* MDC = SCLK / 28 */ #define EMAC_MIIMGMT_SPRE 0x08 /* Bit 3: 1=Suppress MDO preamble */ -#define EMAC_MIIMGMT_SCAN 0x10 /* Bit 4: 1=Perform continus read cycles */ +#define EMAC_MIIMGMT_SCAN 0x10 /* Bit 4: 1=Perform continuous read cycles */ #define EMAC_MIIMGMT_SCINC 0x20 /* Bit 5: 1=Increment PHY address on scan cycle */ #define EMAC_MIIMGMT_RSTAT 0x40 /* Bit 6: 1=Read status from PHY (via PRSD) */ #define EMAC_MIIMGMT_LCTLD 0x80 /* Bit 7: 1=Send CTLD control data to PHY */ @@ -158,7 +158,7 @@ /* EMAC MII status register bit settings ********************************************/ -#define EMAC_MIISTAT_RDADRMK 0x1f /* Bits 0-4: PHY addressed in current scan cyle */ +#define EMAC_MIISTAT_RDADRMK 0x1f /* Bits 0-4: PHY addressed in current scan cycle */ #define EMAC_MIISTAT_NVALID 0x20 /* Bit 5: 1=PRSD is valid */ #define EMAC_MIISTAT_MIILF 0x40 /* Bit 6: 1=PHY link OK */ #define EMAC_MIISTAT_BUSY 0x80 /* Bit 7: 1=MII management in progress */ diff --git a/arch/z80/src/z180/switch.h b/arch/z80/src/z180/switch.h index 73fbe5e204b..518898fc11f 100644 --- a/arch/z80/src/z180/switch.h +++ b/arch/z80/src/z180/switch.h @@ -81,7 +81,7 @@ * to implement nested interrupts, you would have to change the way that * g_current_regs/cbr is handled. The savestate/savecbr variables would not work * for that purpose as implemented here because only the outermost nested - * interrupt can result in a context switch (they can probabaly be deleted). + * interrupt can result in a context switch (they can probably be deleted). */ #define DECL_SAVESTATE() \ diff --git a/arch/z80/src/z180/z180_iomap.h b/arch/z80/src/z180/z180_iomap.h index f2e9d5915f7..833db4dcca8 100644 --- a/arch/z80/src/z180/z180_iomap.h +++ b/arch/z80/src/z180/z180_iomap.h @@ -277,7 +277,7 @@ /* Write Registers. The SCC contains fifteen write registers that are programmed * to configure the operating modes of the channel. With the exception of WR0, programming * the write registers is a two step operation. The first operation is a pointer written to - * WR0 that points to the selected register. The second operation is the actual contro + * WR0 that points to the selected register. The second operation is the actual control * word that is written into the register to configure the SCC channel */ @@ -669,7 +669,7 @@ /* RR10: Miscellaneous status bits */ #define RR10_1MISS (0x80) /* Bit 7: One Clock Missing */ -#define RR10_2MISS (0x40) /* Bit 6: Two Clocks Mising */ +#define RR10_2MISS (0x40) /* Bit 6: Two Clocks Missing */ #define RR10_SEND (0x10) /* Bit 4: Loop Sending */ #define RR10_ON (0x02) /* Bit 1: On Loop */ diff --git a/arch/z80/src/z180/z180_mmu.c b/arch/z80/src/z180/z180_mmu.c index 1c020416493..f5756d9affb 100644 --- a/arch/z80/src/z180/z180_mmu.c +++ b/arch/z80/src/z180/z180_mmu.c @@ -81,7 +81,7 @@ static struct z180_cbr_s g_cbrs[CONFIG_MAX_TASKS]; * Name: z180_mmu_alloccbr * * Description: - * Find an unused struture in g_cbrs (i.e., one with reference count == 0). + * Find an unused structure in g_cbrs (i.e., one with reference count == 0). * If a structure is found, its reference count is set to one and a pointer * to the structure is returned. * @@ -108,7 +108,7 @@ static inline FAR struct z180_cbr_s *z180_mmu_alloccbr(void) * Name: z180_mmu_freecbr * * Description: - * Free a struture in g_cbrs by setting its reference count to 0; + * Free a structure in g_cbrs by setting its reference count to 0; * ****************************************************************************/ diff --git a/arch/z80/src/z180/z180_mmu.txt b/arch/z80/src/z180/z180_mmu.txt index e12f41e9b76..c336c59af6b 100644 --- a/arch/z80/src/z180/z180_mmu.txt +++ b/arch/z80/src/z180/z180_mmu.txt @@ -19,7 +19,7 @@ to the Bank Area. The Bank Area then runs to the start of Common Area 1. Registers ========= -CBAR (Comman/Bank Area Register) +CBAR (Common/Bank Area Register) CBAR is an 8 bit I/O port that can be accessed by the processor's OUT and IN instructions. The lower 4-bits of CBAR (BA) specify the starting logical diff --git a/arch/z80/src/z180/z180_saveusercontext.asm b/arch/z80/src/z180/z180_saveusercontext.asm index 31c9ef8ce48..2d9d771dd51 100644 --- a/arch/z80/src/z180/z180_saveusercontext.asm +++ b/arch/z80/src/z180/z180_saveusercontext.asm @@ -97,7 +97,7 @@ _z180_saveusercontext: ; Save IX at offset 3 - ld l, FRAME_IX(ix) ; HL = Saved alue of IX + ld l, FRAME_IX(ix) ; HL = Saved value of IX ld h, FRAME_IX+1(ix) ; ld XCPT_IX(iy), l ; Offset 3: IX ld XCPT_IX+1(iy), h ; diff --git a/arch/z80/src/z180/z180_scc.c b/arch/z80/src/z180/z180_scc.c index 22b8207953d..bb78ef62d3a 100644 --- a/arch/z80/src/z180/z180_scc.c +++ b/arch/z80/src/z180/z180_scc.c @@ -443,7 +443,7 @@ static void z180_detach(struct uart_dev_s *dev) * when an interrupt received on the 'irq' It should call * uart_transmitchars or uart_receivechar to perform the * appropriate data transfers. The interrupt handling logic\ - * must be able to map the 'irq' number into the approprite + * must be able to map the 'irq' number into the appropriate * uart_dev_s structure in order to call these functions. * ****************************************************************************/ diff --git a/arch/z80/src/z8/chip.h b/arch/z80/src/z8/chip.h index bc43bbe0cc3..91516971a51 100644 --- a/arch/z80/src/z8/chip.h +++ b/arch/z80/src/z8/chip.h @@ -158,13 +158,13 @@ #define Z8_UARTCTL1_DEPOL _HX(08) /* Bit 3: Driver Enable Polarity */ #define Z8_UARTCTL1_BRGCTL _HX(04) /* Bit 2: Baud Rate Generator Control */ #define Z8_UARTCTL1_RDAIRQ _HX(02) /* Bit 1: Receive Data Interrupt Enable */ -#define Z8_UARTCTL1_IREN _HX(01) /* Bit 0: Infrared Encoder/Decoder Eanble */ +#define Z8_UARTCTL1_IREN _HX(01) /* Bit 0: Infrared Encoder/Decoder Enable */ /* UART0/1 Mode Status/Select Register Bit Definitions ******************************/ #define Z8_UARTMDSEL_NORMAL _HX(00) /* Bits 5-7=0: Multiprocessor and Normal Mode */ #define Z8_UARTMDSEL_FILTER HX(20) /* Bits 5-7=1: Noise Filter Control/Status */ -#define Z8_UARTMDSEL_LINP HX(40) /* Bits 5-7=2: LIN protocol Contol/Status */ +#define Z8_UARTMDSEL_LINP HX(40) /* Bits 5-7=2: LIN protocol Control/Status */ #define Z8_UARTMDSEL_HWREV HX(e0) /* Bits 5-7=7: LIN-UART Hardware Revision */ /* Bits 0-4: Mode dependent status */ diff --git a/arch/z80/src/z8/z8_i2c.c b/arch/z80/src/z8/z8_i2c.c index 3ec07fe43e2..2809c108c5e 100644 --- a/arch/z80/src/z8/z8_i2c.c +++ b/arch/z80/src/z8/z8_i2c.c @@ -59,7 +59,7 @@ ****************************************************************************/ #define Z8_NOSTOP (1 << 0) /* Bit 0: No STOP on this transfer */ -#define Z8_NOSTART (1 << 1) /* Bit 1: No address or START on this tranfers */ +#define Z8_NOSTART (1 << 1) /* Bit 1: No address or START on this transfers */ /**************************************************************************** * Private Types diff --git a/arch/z80/src/z8/z8_irq.c b/arch/z80/src/z8/z8_irq.c index 8385ebd73fd..3e7365862a9 100644 --- a/arch/z80/src/z8/z8_irq.c +++ b/arch/z80/src/z8/z8_irq.c @@ -87,7 +87,7 @@ void up_irqinitialize(void) * * Description: * Disable all interrupts; return previous interrupt state. - * REVISIT: Doen't TDI() do all of this? + * REVISIT: Doesn't TDI() do all of this? * ****************************************************************************/ @@ -207,7 +207,7 @@ void up_enable_irq(int irq) { /* Enable the interrupt by setting the corresponding bit in the * appropriate IRQ enable high register. The enable low - * register is assumed to be zero, resulting in "nomimal" interrupt + * register is assumed to be zero, resulting in "nominal" interrupt * priority. */ diff --git a/arch/z80/src/z8/z8_serial.c b/arch/z80/src/z8/z8_serial.c index 827a3499137..b62b1a942cb 100644 --- a/arch/z80/src/z8/z8_serial.c +++ b/arch/z80/src/z8/z8_serial.c @@ -696,7 +696,7 @@ static bool z8_txempty(FAR struct uart_dev_s *dev) } /**************************************************************************** - * Public Funtions + * Public Functions ****************************************************************************/ /**************************************************************************** @@ -718,7 +718,7 @@ void z80_serial_initialize(void) CONSOLE_DEV.isconsole = true; z8_setup(&CONSOLE_DEV); - /* Reigster console and tty devices */ + /* Register console and tty devices */ uart_register("/dev/console", &CONSOLE_DEV); uart_register("/dev/ttyS0", &TTYS0_DEV); diff --git a/arch/z80/src/z80/z80_saveusercontext.asm b/arch/z80/src/z80/z80_saveusercontext.asm index d53c3c5df2e..20f33a402fc 100644 --- a/arch/z80/src/z80/z80_saveusercontext.asm +++ b/arch/z80/src/z80/z80_saveusercontext.asm @@ -97,7 +97,7 @@ _z80_saveusercontext: ; Save IX at offset 3 - ld l, FRAME_IX(ix) ; HL = Saved alue of IX + ld l, FRAME_IX(ix) ; HL = Saved value of IX ld h, FRAME_IX+1(ix) ; ld XCPT_IX(iy), l ; Offset 3: IX ld XCPT_IX+1(iy), h ; diff --git a/audio/pcm_decode.c b/audio/pcm_decode.c index c35c9b3c82d..916d7bc0721 100644 --- a/audio/pcm_decode.c +++ b/audio/pcm_decode.c @@ -406,7 +406,7 @@ static bool pcm_parsewav(FAR struct pcm_decode_s *priv, uint8_t *data) if (priv->nchannels != 1 && priv->nchannels != 2) { - auderr("ERROR: Cannot support number of channles of %d in this mode\n", + auderr("ERROR: Cannot support number of channels of %d in this mode\n", priv->nchannels); return -EINVAL; } diff --git a/binfmt/binfmt.h b/binfmt/binfmt.h index ab04398d47e..48218a8ff7b 100644 --- a/binfmt/binfmt.h +++ b/binfmt/binfmt.h @@ -97,7 +97,7 @@ int dump_module(FAR const struct binary_s *bin); * * Description: * In the kernel build, the argv list will likely lie in the caller's - * address environment and, hence, by inaccessible when we swith to the + * address environment and, hence, by inaccessible when we switch to the * address environment of the new process address environment. So we * do not have any real option other than to copy the callers argv[] list. * diff --git a/binfmt/binfmt_copyargv.c b/binfmt/binfmt_copyargv.c index 4c7b93acdc6..cb1e91ffcd2 100644 --- a/binfmt/binfmt_copyargv.c +++ b/binfmt/binfmt_copyargv.c @@ -78,7 +78,7 @@ * argv - Argument list * * Returned Value: - * Zero (OK) on success; a negated erro value on failure. + * Zero (OK) on success; a negated error value on failure. * ****************************************************************************/ diff --git a/binfmt/libelf/libelf.h b/binfmt/libelf/libelf.h index 92113269777..419082973e3 100644 --- a/binfmt/libelf/libelf.h +++ b/binfmt/libelf/libelf.h @@ -136,7 +136,7 @@ int elf_findsymtab(FAR struct elf_loadinfo_s *loadinfo); * Name: elf_readsym * * Description: - * Read the ELF symbol structure at the specfied index into memory. + * Read the ELF symbol structure at the specified index into memory. * * Input Parameters: * loadinfo - Load state information diff --git a/binfmt/libelf/libelf_sections.c b/binfmt/libelf/libelf_sections.c index 8dd493045b6..a5fe2f19a9d 100644 --- a/binfmt/libelf/libelf_sections.c +++ b/binfmt/libelf/libelf_sections.c @@ -204,7 +204,7 @@ int elf_loadshdrs(FAR struct elf_loadinfo_s *loadinfo) shdrsize = (size_t)loadinfo->ehdr.e_shentsize * (size_t)loadinfo->ehdr.e_shnum; if (loadinfo->ehdr.e_shoff + shdrsize > loadinfo->filelen) { - berr("Insufficent space in file for section header table\n"); + berr("Insufficient space in file for section header table\n"); return -ESPIPE; } diff --git a/binfmt/libnxflat/libnxflat.h b/binfmt/libnxflat/libnxflat.h index 32d82df7418..9e65f760c52 100644 --- a/binfmt/libnxflat/libnxflat.h +++ b/binfmt/libnxflat/libnxflat.h @@ -79,7 +79,7 @@ int nxflat_addrenv_alloc(FAR struct nxflat_loadinfo_s *loadinfo, size_t envsize) * Name: nxflat_addrenv_select * * Description: - * Temporarity select the task's address environemnt. + * Temporarity select the task's address environment. * * Input Parameters: * loadinfo - Load state information diff --git a/binfmt/nxflat.c b/binfmt/nxflat.c index 5db8369f73a..ab1e6f89bc7 100644 --- a/binfmt/nxflat.c +++ b/binfmt/nxflat.c @@ -198,7 +198,7 @@ static int nxflat_loadbinary(FAR struct binary_s *binp) binp->stacksize = loadinfo.stacksize; /* Add the ELF allocation to the alloc[] only if there is no address - * enironment. If there is an address environment, it will automatically + * environment. If there is an address environment, it will automatically * be freed when the function exits * * REVISIT: If the module is loaded then unloaded, wouldn't this cause diff --git a/boards/README.txt b/boards/README.txt index 167cd89aad6..4eeac5c7e0d 100644 --- a/boards/README.txt +++ b/boards/README.txt @@ -913,7 +913,7 @@ tools/configure.sh tools/configure.sh : There is an alternative Windows batch file that can be used in the - windows native enironment like: + windows native environment like: tools\configure.bat : diff --git a/boards/arm/am335x/beaglebone-black/README.txt b/boards/arm/am335x/beaglebone-black/README.txt index fc6238fd300..326999d73a9 100644 --- a/boards/arm/am335x/beaglebone-black/README.txt +++ b/boards/arm/am335x/beaglebone-black/README.txt @@ -131,7 +131,7 @@ Booting NuttX from an SD card These are the steps to get U-Boot booting from SD Card: 1. Configure and build the NuttX Beaglebone Black configuration. You - should have a file alled nuttx.bin when the build completes. + should have a file called nuttx.bin when the build completes. 2. Insert a FLASH stick into the host PC and format it for FAT32 FS. diff --git a/boards/arm/c5471/c5471evm/src/c5471_leds.c b/boards/arm/c5471/c5471evm/src/c5471_leds.c index e66be0a6347..b66e2299218 100644 --- a/boards/arm/c5471/c5471evm/src/c5471_leds.c +++ b/boards/arm/c5471/c5471evm/src/c5471_leds.c @@ -62,7 +62,7 @@ static uint32_t g_ledstate; ****************************************************************************/ /**************************************************************************** - * Public Funtions + * Public Functions ****************************************************************************/ /**************************************************************************** diff --git a/boards/arm/cxd56xx/common/src/cxd56_ak09912_i2c.c b/boards/arm/cxd56xx/common/src/cxd56_ak09912_i2c.c index fed244c9f6d..e763afea1d7 100644 --- a/boards/arm/cxd56xx/common/src/cxd56_ak09912_i2c.c +++ b/boards/arm/cxd56xx/common/src/cxd56_ak09912_i2c.c @@ -66,7 +66,7 @@ int board_ak09912_initialize(FAR const char *devpath, int bus) sninfo("Initializing AK09912...\n"); - /* Initialize i2c deivce */ + /* Initialize i2c device */ i2c = cxd56_i2cbus_initialize(bus); if (!i2c) diff --git a/boards/arm/cxd56xx/common/src/cxd56_ak09912_scu.c b/boards/arm/cxd56xx/common/src/cxd56_ak09912_scu.c index f065f3274c3..2245eff66c8 100644 --- a/boards/arm/cxd56xx/common/src/cxd56_ak09912_scu.c +++ b/boards/arm/cxd56xx/common/src/cxd56_ak09912_scu.c @@ -74,7 +74,7 @@ int board_ak09912_initialize(FAR const char *devpath, int bus) sninfo("Initializing AK09912...\n"); - /* Initialize i2c deivce */ + /* Initialize i2c device */ i2c = cxd56_i2cbus_initialize(bus); if (!i2c) @@ -92,7 +92,7 @@ int board_ak09912_initialize(FAR const char *devpath, int bus) for (i = 0; i < MAG_NR_SEQS; i++) { - /* register deivce at I2C bus */ + /* register device at I2C bus */ ret = ak09912_register(devpath, i, i2c, bus); if (ret < 0) diff --git a/boards/arm/cxd56xx/common/src/cxd56_altmdm_spi.c b/boards/arm/cxd56xx/common/src/cxd56_altmdm_spi.c index 5e7516ab15f..03b50860261 100644 --- a/boards/arm/cxd56xx/common/src/cxd56_altmdm_spi.c +++ b/boards/arm/cxd56xx/common/src/cxd56_altmdm_spi.c @@ -176,7 +176,7 @@ int board_altmdm_initialize(FAR const char *devpath) if (!g_devhandle) { - /* Initialize spi deivce */ + /* Initialize spi device */ spi = cxd56_spibus_initialize(spi_ch); if (!spi) diff --git a/boards/arm/cxd56xx/common/src/cxd56_apds9930_scu.c b/boards/arm/cxd56xx/common/src/cxd56_apds9930_scu.c index 24a36b3ef12..78c81b0d906 100644 --- a/boards/arm/cxd56xx/common/src/cxd56_apds9930_scu.c +++ b/boards/arm/cxd56xx/common/src/cxd56_apds9930_scu.c @@ -58,7 +58,7 @@ int board_apds9930_initialize(int bus) sninfo("Initializing APDS9930...\n"); - /* Initialize i2c deivce */ + /* Initialize i2c device */ i2c = cxd56_i2cbus_initialize(bus); if (!i2c) diff --git a/boards/arm/cxd56xx/common/src/cxd56_apds9960_i2c.c b/boards/arm/cxd56xx/common/src/cxd56_apds9960_i2c.c index 43d619d5362..4004e72251f 100644 --- a/boards/arm/cxd56xx/common/src/cxd56_apds9960_i2c.c +++ b/boards/arm/cxd56xx/common/src/cxd56_apds9960_i2c.c @@ -58,7 +58,7 @@ int board_apds9960_initialize(FAR const char *devpath, int bus) sninfo("Initializing APDS9960...\n"); - /* Initialize i2c deivce */ + /* Initialize i2c device */ i2c = cxd56_i2cbus_initialize(bus); if (!i2c) diff --git a/boards/arm/cxd56xx/common/src/cxd56_audio.c b/boards/arm/cxd56xx/common/src/cxd56_audio.c index 8d0cbe8555d..58ccb66f1e8 100644 --- a/boards/arm/cxd56xx/common/src/cxd56_audio.c +++ b/boards/arm/cxd56xx/common/src/cxd56_audio.c @@ -386,7 +386,7 @@ void board_audio_i2s_enable(void) * Name: board_audio_i2s_disable * * Description: - * Dsiable I2S on the board. + * Disable I2S on the board. * ****************************************************************************/ diff --git a/boards/arm/cxd56xx/common/src/cxd56_bh1721fvc_scu.c b/boards/arm/cxd56xx/common/src/cxd56_bh1721fvc_scu.c index 19deb78185d..e6802dacceb 100644 --- a/boards/arm/cxd56xx/common/src/cxd56_bh1721fvc_scu.c +++ b/boards/arm/cxd56xx/common/src/cxd56_bh1721fvc_scu.c @@ -58,7 +58,7 @@ int board_bh1721fvc_initialize(FAR const char *devpath, int bus) sninfo("Initializing BH1721FVC...\n"); - /* Initialize i2c deivce */ + /* Initialize i2c device */ i2c = cxd56_i2cbus_initialize(bus); if (!i2c) diff --git a/boards/arm/cxd56xx/common/src/cxd56_bh1745nuc_scu.c b/boards/arm/cxd56xx/common/src/cxd56_bh1745nuc_scu.c index 0acfeed73cd..fa9eefeb8d8 100644 --- a/boards/arm/cxd56xx/common/src/cxd56_bh1745nuc_scu.c +++ b/boards/arm/cxd56xx/common/src/cxd56_bh1745nuc_scu.c @@ -58,7 +58,7 @@ int board_bh1745nuc_initialize(FAR const char *devpath, int bus) sninfo("Initializing BH1745NUC...\n"); - /* Initialize i2c deivce */ + /* Initialize i2c device */ i2c = cxd56_i2cbus_initialize(bus); if (!i2c) diff --git a/boards/arm/cxd56xx/common/src/cxd56_bm1383glv_scu.c b/boards/arm/cxd56xx/common/src/cxd56_bm1383glv_scu.c index a7a7f1df8d8..ac0f272bfd7 100644 --- a/boards/arm/cxd56xx/common/src/cxd56_bm1383glv_scu.c +++ b/boards/arm/cxd56xx/common/src/cxd56_bm1383glv_scu.c @@ -58,7 +58,7 @@ int board_bm1383glv_initialize(FAR const char *devpath, int bus) sninfo("Initializing BM1383GLV...\n"); - /* Initialize i2c deivce */ + /* Initialize i2c device */ i2c = cxd56_i2cbus_initialize(bus); if (!i2c) diff --git a/boards/arm/cxd56xx/common/src/cxd56_bm1422gmv_scu.c b/boards/arm/cxd56xx/common/src/cxd56_bm1422gmv_scu.c index 0e9feb2093b..74ee69720c6 100644 --- a/boards/arm/cxd56xx/common/src/cxd56_bm1422gmv_scu.c +++ b/boards/arm/cxd56xx/common/src/cxd56_bm1422gmv_scu.c @@ -65,7 +65,7 @@ int board_bm1422gmv_initialize(FAR const char *devpath, int bus) sninfo("Initializing BM1422GMV...\n"); - /* Initialize i2c deivce */ + /* Initialize i2c device */ i2c = cxd56_i2cbus_initialize(bus); if (!i2c) diff --git a/boards/arm/cxd56xx/common/src/cxd56_bmi160_i2c.c b/boards/arm/cxd56xx/common/src/cxd56_bmi160_i2c.c index 009aa3e5858..6649c8e2f48 100644 --- a/boards/arm/cxd56xx/common/src/cxd56_bmi160_i2c.c +++ b/boards/arm/cxd56xx/common/src/cxd56_bmi160_i2c.c @@ -67,7 +67,7 @@ int board_bmi160_initialize(int bus) sninfo("Initializing BMI160..\n"); - /* Initialize i2c deivce */ + /* Initialize i2c device */ i2c = cxd56_i2cbus_initialize(bus); if (!i2c) diff --git a/boards/arm/cxd56xx/common/src/cxd56_bmi160_scu.c b/boards/arm/cxd56xx/common/src/cxd56_bmi160_scu.c index 182f3f56e6f..b20aa539404 100644 --- a/boards/arm/cxd56xx/common/src/cxd56_bmi160_scu.c +++ b/boards/arm/cxd56xx/common/src/cxd56_bmi160_scu.c @@ -71,7 +71,7 @@ int board_bmi160_initialize(int bus) sninfo("Initializing BMI160..\n"); - /* Initialize spi deivce */ + /* Initialize spi device */ spi = cxd56_spibus_initialize(bus); if (!spi) diff --git a/boards/arm/cxd56xx/common/src/cxd56_bmi160_spi.c b/boards/arm/cxd56xx/common/src/cxd56_bmi160_spi.c index f0740adf838..8e57be23aee 100644 --- a/boards/arm/cxd56xx/common/src/cxd56_bmi160_spi.c +++ b/boards/arm/cxd56xx/common/src/cxd56_bmi160_spi.c @@ -70,7 +70,7 @@ int board_bmi160_initialize(int bus) sninfo("Initializing BMI160..\n"); - /* Initialize spi deivce */ + /* Initialize spi device */ spi = cxd56_spibus_initialize(bus); if (!spi) diff --git a/boards/arm/cxd56xx/common/src/cxd56_bmp280_i2c.c b/boards/arm/cxd56xx/common/src/cxd56_bmp280_i2c.c index cdc69c31184..eb32f7b25c1 100644 --- a/boards/arm/cxd56xx/common/src/cxd56_bmp280_i2c.c +++ b/boards/arm/cxd56xx/common/src/cxd56_bmp280_i2c.c @@ -57,7 +57,7 @@ int board_bmp280_initialize(int bus) snerr("Initializing BMP280..\n"); - /* Initialize i2c deivce */ + /* Initialize i2c device */ i2c = cxd56_i2cbus_initialize(bus); if (!i2c) diff --git a/boards/arm/cxd56xx/common/src/cxd56_bmp280_scu.c b/boards/arm/cxd56xx/common/src/cxd56_bmp280_scu.c index da14b1693b9..2435baead79 100644 --- a/boards/arm/cxd56xx/common/src/cxd56_bmp280_scu.c +++ b/boards/arm/cxd56xx/common/src/cxd56_bmp280_scu.c @@ -71,7 +71,7 @@ int board_bmp280_initialize(int bus) sninfo("Initializing BMP280..\n"); - /* Initialize i2c deivce */ + /* Initialize i2c device */ i2c = cxd56_i2cbus_initialize(bus); if (!i2c) diff --git a/boards/arm/cxd56xx/common/src/cxd56_gs2200m.c b/boards/arm/cxd56xx/common/src/cxd56_gs2200m.c index d2ed30eb692..25b405bc7f7 100644 --- a/boards/arm/cxd56xx/common/src/cxd56_gs2200m.c +++ b/boards/arm/cxd56xx/common/src/cxd56_gs2200m.c @@ -234,7 +234,7 @@ int board_gs2200m_initialize(FAR const char *devpath, int bus) cxd56_gpio_config(PIN_UART2_CTS, true); cxd56_gpio_config(PIN_UART2_RTS, false); - /* Initialize spi deivce */ + /* Initialize spi device */ spi = cxd56_spibus_initialize(bus); diff --git a/boards/arm/cxd56xx/common/src/cxd56_i2cdev.c b/boards/arm/cxd56xx/common/src/cxd56_i2cdev.c index 4b1f202099d..5c7ff050b58 100644 --- a/boards/arm/cxd56xx/common/src/cxd56_i2cdev.c +++ b/boards/arm/cxd56xx/common/src/cxd56_i2cdev.c @@ -60,7 +60,7 @@ int board_i2cdev_initialize(int port) _info("Initializing /dev/i2c%d..\n", port); - /* Initialize i2c deivce */ + /* Initialize i2c device */ i2c = cxd56_i2cbus_initialize(port); if (!i2c) diff --git a/boards/arm/cxd56xx/common/src/cxd56_isx012.c b/boards/arm/cxd56xx/common/src/cxd56_isx012.c index 9f49870a408..f083b8417bf 100644 --- a/boards/arm/cxd56xx/common/src/cxd56_isx012.c +++ b/boards/arm/cxd56xx/common/src/cxd56_isx012.c @@ -205,7 +205,7 @@ int board_isx012_initialize(int i2c_bus_num) CXD56_PIN_CONFIGS(PINCONFS_IS); - /* Initialize i2c deivce */ + /* Initialize i2c device */ i2c = cxd56_i2cbus_initialize(i2c_bus_num); if (!i2c) @@ -228,7 +228,7 @@ int board_isx012_uninitialize(void) _info("Uninitializing ISX012...\n"); - /* Initialize i2c deivce */ + /* Initialize i2c device */ ret = isx012_unregister(); if (ret < 0) diff --git a/boards/arm/cxd56xx/common/src/cxd56_kx022_scu.c b/boards/arm/cxd56xx/common/src/cxd56_kx022_scu.c index cc36de64dc4..d53da470482 100644 --- a/boards/arm/cxd56xx/common/src/cxd56_kx022_scu.c +++ b/boards/arm/cxd56xx/common/src/cxd56_kx022_scu.c @@ -65,7 +65,7 @@ int board_kx022_initialize(FAR const char *devpath, int bus) sninfo("Initializing KX022...\n"); - /* Initialize i2c deivce */ + /* Initialize i2c device */ i2c = cxd56_i2cbus_initialize(bus); if (!i2c) diff --git a/boards/arm/cxd56xx/common/src/cxd56_lt1pa01_scu.c b/boards/arm/cxd56xx/common/src/cxd56_lt1pa01_scu.c index dc3978b061e..f6430ea5f17 100644 --- a/boards/arm/cxd56xx/common/src/cxd56_lt1pa01_scu.c +++ b/boards/arm/cxd56xx/common/src/cxd56_lt1pa01_scu.c @@ -58,7 +58,7 @@ int board_lt1pa01_initialize(int bus) sninfo("Initializing LT1PA01...\n"); - /* Initialize i2c deivce */ + /* Initialize i2c device */ i2c = cxd56_i2cbus_initialize(bus); if (!i2c) diff --git a/boards/arm/cxd56xx/common/src/cxd56_rpr0521rs_scu.c b/boards/arm/cxd56xx/common/src/cxd56_rpr0521rs_scu.c index 213915b49ec..c20074b5458 100644 --- a/boards/arm/cxd56xx/common/src/cxd56_rpr0521rs_scu.c +++ b/boards/arm/cxd56xx/common/src/cxd56_rpr0521rs_scu.c @@ -58,7 +58,7 @@ int board_rpr0521rs_initialize(int bus) sninfo("Initializing RPR0521RS...\n"); - /* Initialize i2c deivce */ + /* Initialize i2c device */ i2c = cxd56_i2cbus_initialize(bus); if (!i2c) diff --git a/boards/arm/cxd56xx/drivers/audio/Kconfig b/boards/arm/cxd56xx/drivers/audio/Kconfig index 330e43f188a..89f568a3f37 100644 --- a/boards/arm/cxd56xx/drivers/audio/Kconfig +++ b/boards/arm/cxd56xx/drivers/audio/Kconfig @@ -168,7 +168,7 @@ choice prompt "HPADC mic bias selection" default CXD56_AUDIO_HPADC_MIC_BIAS_OFF ---help--- - This setting depends on a circuit board configration. + This setting depends on a circuit board configuration. Set "Microphone bias is enabled" when a microphone connected to HPADC should be applied with voltage from the CXD5247. Otherwise, set "Microphone bias is disabled". diff --git a/boards/arm/cxd56xx/drivers/audio/cxd56_audio_dma.c b/boards/arm/cxd56xx/drivers/audio/cxd56_audio_dma.c index ee734c21b4c..b2f2f6cf12a 100644 --- a/boards/arm/cxd56xx/drivers/audio/cxd56_audio_dma.c +++ b/boards/arm/cxd56xx/drivers/audio/cxd56_audio_dma.c @@ -496,7 +496,7 @@ CXD56_AUDIO_ECODE cxd56_audio_dma_en_dmaint(void) write_int_reg(INT_EN1_REG, int_en); - /* Enalbe bus error interrupt. */ + /* Enable bus error interrupt. */ cxd56_audio_bca_reg_en_bus_err_int(); @@ -516,7 +516,7 @@ CXD56_AUDIO_ECODE cxd56_audio_dma_dis_dmaint(void) write_int_reg(INT_EN1_REG, int_en); - /* Disalbe bus error interrupt. */ + /* Disable bus error interrupt. */ cxd56_audio_bca_reg_dis_bus_err_int(); diff --git a/boards/arm/cxd56xx/drivers/sensors/ak09912_scu.c b/boards/arm/cxd56xx/drivers/sensors/ak09912_scu.c index bb470bcab8d..a2b6477d5c8 100644 --- a/boards/arm/cxd56xx/drivers/sensors/ak09912_scu.c +++ b/boards/arm/cxd56xx/drivers/sensors/ak09912_scu.c @@ -89,7 +89,7 @@ #define AK09912_ASAX 0x60 /* REGISTER: CNTL1 - * Enable or disable temparature measure or enable or disable Noise + * Enable or disable temperature measure or enable or disable Noise * suppression filter. */ diff --git a/boards/arm/cxd56xx/drivers/sensors/apds9930_scu.c b/boards/arm/cxd56xx/drivers/sensors/apds9930_scu.c index 79c5a06bb18..76df4267df9 100644 --- a/boards/arm/cxd56xx/drivers/sensors/apds9930_scu.c +++ b/boards/arm/cxd56xx/drivers/sensors/apds9930_scu.c @@ -359,7 +359,7 @@ static void apds9930_putreg16(FAR struct apds9930_dev_s *priv, * Name: apds9930_intclr * * Description: - * APDS9930 Inerrupt clear + * APDS9930 Interrupt clear * ****************************************************************************/ @@ -845,7 +845,7 @@ static int apds9930_ioctl_ps(FAR struct file *filep, int cmd, ret = seq_ioctl(priv->seq, priv->minor, cmd, arg); #else - snerr("Unregisted SCU sequencer cmd: %d\n", cmd); + snerr("Unregistered SCU sequencer cmd: %d\n", cmd); ret = - ENOTTY; #endif } diff --git a/boards/arm/cxd56xx/drivers/sensors/lt1pa01_scu.c b/boards/arm/cxd56xx/drivers/sensors/lt1pa01_scu.c index 997a5934411..de9adb157f3 100644 --- a/boards/arm/cxd56xx/drivers/sensors/lt1pa01_scu.c +++ b/boards/arm/cxd56xx/drivers/sensors/lt1pa01_scu.c @@ -714,7 +714,7 @@ static int lt1pa01_ioctl_prox(FAR struct file *filep, int cmd, ret = seq_ioctl(priv->seq, priv->minor, cmd, arg); #else - snerr("Unregisted SCU sequencer cmd: %d\n", cmd); + snerr("Unregistered SCU sequencer cmd: %d\n", cmd); ret = - ENOTTY; #endif } diff --git a/boards/arm/cxd56xx/drivers/sensors/rpr0521rs_scu.c b/boards/arm/cxd56xx/drivers/sensors/rpr0521rs_scu.c index bd3d5395c37..d4455f362f5 100644 --- a/boards/arm/cxd56xx/drivers/sensors/rpr0521rs_scu.c +++ b/boards/arm/cxd56xx/drivers/sensors/rpr0521rs_scu.c @@ -805,7 +805,7 @@ static int rpr0521rs_ioctl_ps(FAR struct file *filep, int cmd, ret = seq_ioctl(priv->seq, priv->minor, cmd, arg); #else - snerr("Unregisted SCU sequencer cmd: %d\n", cmd); + snerr("Unregistered SCU sequencer cmd: %d\n", cmd); ret = - ENOTTY; #endif } diff --git a/boards/arm/cxd56xx/spresense/Kconfig b/boards/arm/cxd56xx/spresense/Kconfig index d43655f8e24..ed0fe315d06 100644 --- a/boards/arm/cxd56xx/spresense/Kconfig +++ b/boards/arm/cxd56xx/spresense/Kconfig @@ -79,7 +79,7 @@ config CXD56_IMAGEPROC default n select CXD56_GE2D ---help--- - Enable support for accelerated format convertor, rotation and so on. + Enable support for accelerated format converter, rotation and so on. using the CXD5602 image processing accelerator. comment "LTE Options" diff --git a/boards/arm/cxd56xx/spresense/include/board_pinconfig.h b/boards/arm/cxd56xx/spresense/include/board_pinconfig.h index f79bcae0146..9e74814ffcf 100644 --- a/boards/arm/cxd56xx/spresense/include/board_pinconfig.h +++ b/boards/arm/cxd56xx/spresense/include/board_pinconfig.h @@ -46,7 +46,7 @@ /* Customize from default to the board specific pin configuration * The default pin configurations are defined in - * boards/arm/cxd56xx/spresense/inclue/board_pinconfig.h. + * boards/arm/cxd56xx/spresense/include/board_pinconfig.h. * * Mode: shared pin function mode * ENZI: 1=Input Enable, 0=Input Disable diff --git a/boards/arm/cxd56xx/spresense/include/cxd56_imageproc.h b/boards/arm/cxd56xx/spresense/include/cxd56_imageproc.h index bd868800694..173df778e74 100644 --- a/boards/arm/cxd56xx/spresense/include/cxd56_imageproc.h +++ b/boards/arm/cxd56xx/spresense/include/cxd56_imageproc.h @@ -43,7 +43,7 @@ extern "C" #endif /* Structure of rectangle coordinates from left top point to - * right buttom point. + * right bottom point. */ struct imageproc_rect_s diff --git a/boards/arm/cxd56xx/spresense/src/cxd56_bringup.c b/boards/arm/cxd56xx/spresense/src/cxd56_bringup.c index dbe98d0581b..99049d24f6e 100644 --- a/boards/arm/cxd56xx/spresense/src/cxd56_bringup.c +++ b/boards/arm/cxd56xx/spresense/src/cxd56_bringup.c @@ -315,7 +315,7 @@ int cxd56_bringup(void) ret = board_pwm_setup(); if (ret < 0) { - _err("ERROR: Failed to initialze pwm. \n"); + _err("ERROR: Failed to initialize pwm. \n"); } #endif @@ -323,7 +323,7 @@ int cxd56_bringup(void) ret = cxd56_adcinitialize(); if (ret < 0) { - _err("ERROR: Failed to initialze adc. \n"); + _err("ERROR: Failed to initialize adc. \n"); } #endif @@ -331,7 +331,7 @@ int cxd56_bringup(void) ret = userled_lower_initialize("/dev/userleds"); if (ret < 0) { - _err("ERROR: Failed to initialze led. \n"); + _err("ERROR: Failed to initialize led. \n"); } #endif @@ -339,7 +339,7 @@ int cxd56_bringup(void) ret = board_flash_initialize(); if (ret < 0) { - _err("ERROR: Failed to initialze SPI-Flash. %d\n", errno); + _err("ERROR: Failed to initialize SPI-Flash. %d\n", errno); } #endif @@ -401,7 +401,7 @@ int cxd56_bringup(void) ret = board_altmdm_initialize("/dev/altmdm"); if (ret < 0) { - _err("ERROR: Failed to initialze Altair modem. \n"); + _err("ERROR: Failed to initialize Altair modem. \n"); } #endif @@ -409,7 +409,7 @@ int cxd56_bringup(void) ret = board_gs2200m_initialize("/dev/gs2200m", 5); if (ret < 0) { - _err("ERROR: Failed to initialze GS2200M. \n"); + _err("ERROR: Failed to initialize GS2200M. \n"); } #endif @@ -417,7 +417,7 @@ int cxd56_bringup(void) ret = cxd56_gnssinitialize("/dev/gps"); if (ret < 0) { - _err("ERROR: Failed to initialze gnss. \n"); + _err("ERROR: Failed to initialize gnss. \n"); } #endif @@ -425,7 +425,7 @@ int cxd56_bringup(void) ret = cxd56_geofenceinitialize("/dev/geofence"); if (ret < 0) { - _err("ERROR: Failed to initialze geofence. \n"); + _err("ERROR: Failed to initialize geofence. \n"); } #endif @@ -433,7 +433,7 @@ int cxd56_bringup(void) ret = board_bmi160_initialize(0); if (ret < 0) { - _err("ERROR: Failed to initialze BMI160. \n"); + _err("ERROR: Failed to initialize BMI160. \n"); } #endif diff --git a/boards/arm/dm320/ntosd-dm320/include/board.h b/boards/arm/dm320/ntosd-dm320/include/board.h index 98b6b7f4dd8..7a1108a2f07 100644 --- a/boards/arm/dm320/ntosd-dm320/include/board.h +++ b/boards/arm/dm320/ntosd-dm320/include/board.h @@ -58,7 +58,7 @@ #define CONFIG_DM320_UARTPPLIN 1 -/* Configration for dm9000 network device */ +/* Configuration for dm9000 network device */ #define DM9000_BASE CONFIG_DM9000_BASE diff --git a/boards/arm/dm320/ntosd-dm320/src/dm320_leds.c b/boards/arm/dm320/ntosd-dm320/src/dm320_leds.c index 6c4ff161d16..71a7692fd5c 100644 --- a/boards/arm/dm320/ntosd-dm320/src/dm320_leds.c +++ b/boards/arm/dm320/ntosd-dm320/src/dm320_leds.c @@ -44,7 +44,7 @@ #include "chip.h" /**************************************************************************** - * Public Funtions + * Public Functions ****************************************************************************/ /**************************************************************************** diff --git a/boards/arm/imxrt/imxrt1020-evk/src/imxrt_flexspi_nor_boot.h b/boards/arm/imxrt/imxrt1020-evk/src/imxrt_flexspi_nor_boot.h index 22db7eb594c..9d9a48bc4c8 100644 --- a/boards/arm/imxrt/imxrt1020-evk/src/imxrt_flexspi_nor_boot.h +++ b/boards/arm/imxrt/imxrt1020-evk/src/imxrt_flexspi_nor_boot.h @@ -137,7 +137,7 @@ struct boot_data_s uint32_t start; /* boot start location */ uint32_t size; /* size */ uint32_t plugin; /* plugin flag - 1 if downloaded application is plugin */ - uint32_t placeholder; /* placehoder to make even 0x10 size */ + uint32_t placeholder; /* placeholder to make even 0x10 size */ }; /**************************************************************************** diff --git a/boards/arm/imxrt/imxrt1020-evk/src/imxrt_flexspi_nor_flash.h b/boards/arm/imxrt/imxrt1020-evk/src/imxrt_flexspi_nor_flash.h index 9f4514f4b16..99d8cca2f43 100644 --- a/boards/arm/imxrt/imxrt1020-evk/src/imxrt_flexspi_nor_flash.h +++ b/boards/arm/imxrt/imxrt1020-evk/src/imxrt_flexspi_nor_flash.h @@ -47,7 +47,7 @@ * Pre-processor Definitions ****************************************************************************/ -/* FLEXSPI memory config block related defintions */ +/* FLEXSPI memory config block related definitions */ #define FLEXSPI_CFG_BLK_TAG (0x42464346ul) #define FLEXSPI_CFG_BLK_VERSION (0x56010400ul) @@ -57,7 +57,7 @@ #define FLEXSPI_FEATURE_HAS_PARALLEL_MODE 1 -/* Lookup table related defintions */ +/* Lookup table related definitions */ #define CMD_INDEX_READ 0 #define CMD_INDEX_READSTATUS 1 @@ -255,7 +255,7 @@ enum flash_flash_type_e FLEXSPI_DEVICE_TYPE_SERIAL_NAND = 2, /* Flash devices are Serial NAND */ FLEXSPI_DEVICE_TYPE_SERIAL_RAM = 3, /* Flash devices are Serial RAM/HyperFLASH */ FLEXSPI_DEVICE_TYPE_MCP_NOR_NAND = 0x12, /* Flash device is MCP device, A1 is Serial NOR, A2 is Serial NAND */ - FLEXSPI_DEVICE_TYPE_MCP_NOR_RAM = 0x13, /* Flash deivce is MCP device, A1 is Serial NOR, A2 is Serial RAMs */ + FLEXSPI_DEVICE_TYPE_MCP_NOR_RAM = 0x13, /* Flash device is MCP device, A1 is Serial NOR, A2 is Serial RAMs */ }; /* Flash Pad Definitions */ @@ -350,7 +350,7 @@ struct flexspi_nor_config_s uint8_t serial_nor_type; /* Serial NOR Flash type: 0/1/2/3 */ uint8_t need_exit_nocmdmode; /* Need to exit NoCmd mode before other IP command */ uint8_t halfclk_for_nonreadcmd; /* Half the Serial Clock for non-read command: true/false */ - uint8_t need_restore_nocmdmode; /* Need to Restore NoCmd mode after IP commmand execution */ + uint8_t need_restore_nocmdmode; /* Need to Restore NoCmd mode after IP command execution */ uint32_t blocksize; /* Block size */ uint32_t reserve2[11]; /* Reserved for future use */ }; diff --git a/boards/arm/imxrt/imxrt1020-evk/src/imxrt_usbhost.c b/boards/arm/imxrt/imxrt1020-evk/src/imxrt_usbhost.c index 60e7e48b7e4..af174edff00 100644 --- a/boards/arm/imxrt/imxrt1020-evk/src/imxrt_usbhost.c +++ b/boards/arm/imxrt/imxrt1020-evk/src/imxrt_usbhost.c @@ -151,7 +151,7 @@ int imxrt_usbhost_initialize(void) imxrt_clockall_usboh3(); - /* Make sure we don't accidentially switch on USB bus power */ + /* Make sure we don't accidentally switch on USB bus power */ *((uint32_t *)IMXRT_USBNC_USB_OTG1_CTRL) = USBNC_PWR_POL; *((uint32_t *)0x400d9030) = (1 << 21); diff --git a/boards/arm/imxrt/imxrt1050-evk/src/imxrt_flexspi_nor_boot.h b/boards/arm/imxrt/imxrt1050-evk/src/imxrt_flexspi_nor_boot.h index 5049c08ff30..8944d8ac34e 100644 --- a/boards/arm/imxrt/imxrt1050-evk/src/imxrt_flexspi_nor_boot.h +++ b/boards/arm/imxrt/imxrt1050-evk/src/imxrt_flexspi_nor_boot.h @@ -141,7 +141,7 @@ struct boot_data_s uint32_t start; /* boot start location */ uint32_t size; /* size */ uint32_t plugin; /* plugin flag - 1 if downloaded application is plugin */ - uint32_t placeholder; /* placehoder to make even 0x10 size */ + uint32_t placeholder; /* placeholder to make even 0x10 size */ }; /**************************************************************************** diff --git a/boards/arm/imxrt/imxrt1050-evk/src/imxrt_flexspi_nor_flash.h b/boards/arm/imxrt/imxrt1050-evk/src/imxrt_flexspi_nor_flash.h index 1941c29a560..51e435efc2b 100644 --- a/boards/arm/imxrt/imxrt1050-evk/src/imxrt_flexspi_nor_flash.h +++ b/boards/arm/imxrt/imxrt1050-evk/src/imxrt_flexspi_nor_flash.h @@ -47,7 +47,7 @@ * Pre-processor Definitions ****************************************************************************/ -/* FLEXSPI memory config block related defintions */ +/* FLEXSPI memory config block related definitions */ #define FLEXSPI_CFG_BLK_TAG (0x42464346ul) #define FLEXSPI_CFG_BLK_VERSION (0x56010400ul) @@ -57,7 +57,7 @@ #define FLEXSPI_FEATURE_HAS_PARALLEL_MODE 1 -/* Lookup table related defintions */ +/* Lookup table related definitions */ #define CMD_INDEX_READ 0 #define CMD_INDEX_READSTATUS 1 @@ -253,7 +253,7 @@ enum flash_flash_type_e FLEXSPI_DEVICE_TYPE_SERIAL_NAND = 2, /* Flash devices are Serial NAND */ FLEXSPI_DEVICE_TYPE_SERIAL_RAM = 3, /* Flash devices are Serial RAM/HyperFLASH */ FLEXSPI_DEVICE_TYPE_MCP_NOR_NAND = 0x12, /* Flash device is MCP device, A1 is Serial NOR, A2 is Serial NAND */ - FLEXSPI_DEVICE_TYPE_MCP_NOR_RAM = 0x13, /* Flash deivce is MCP device, A1 is Serial NOR, A2 is Serial RAMs */ + FLEXSPI_DEVICE_TYPE_MCP_NOR_RAM = 0x13, /* Flash device is MCP device, A1 is Serial NOR, A2 is Serial RAMs */ }; /* Flash Pad Definitions */ diff --git a/boards/arm/imxrt/imxrt1060-evk/README.txt b/boards/arm/imxrt/imxrt1060-evk/README.txt index f3d613118a5..c39f7d87651 100644 --- a/boards/arm/imxrt/imxrt1060-evk/README.txt +++ b/boards/arm/imxrt/imxrt1060-evk/README.txt @@ -322,7 +322,7 @@ Configuration sub-directories capacitive touchscreen sensor FT5336GQQ connected to the LPI2C1 bus, address 0x38. Nuttx support such touchscreen device via the driver ft5x06 (drivers/input/ft5x06.c). At the moment only the polling - method is available, the board features an interrupt line connecetd + method is available, the board features an interrupt line connected to the touchscreen sensor IC. IMXRT1062 MCU provides the integrated LCD driver. diff --git a/boards/arm/imxrt/imxrt1060-evk/scripts/memory.ld b/boards/arm/imxrt/imxrt1060-evk/scripts/memory.ld index f4e6927c7ac..221b727437d 100644 --- a/boards/arm/imxrt/imxrt1060-evk/scripts/memory.ld +++ b/boards/arm/imxrt/imxrt1060-evk/scripts/memory.ld @@ -37,7 +37,7 @@ /* The i.MXRT1060-EVK has 8MiB of Hyper FLASH beginning at address, * 0x0060:0000, Up to 512Kb of DTCM RAM beginning at 0x2000:0000, and 1MiB OCRAM * beginning at 0x2020:0000. Neither DTCM or SDRAM are used in this - * configuratin. + * configuration. * * The user and kernel space partitions will be spanned with a single * region of size 2**n bytes. As a consequence, as the partitions increase diff --git a/boards/arm/imxrt/imxrt1060-evk/src/imxrt_flexspi_nor_boot.h b/boards/arm/imxrt/imxrt1060-evk/src/imxrt_flexspi_nor_boot.h index a00cb9d5542..393f284c2fb 100644 --- a/boards/arm/imxrt/imxrt1060-evk/src/imxrt_flexspi_nor_boot.h +++ b/boards/arm/imxrt/imxrt1060-evk/src/imxrt_flexspi_nor_boot.h @@ -137,7 +137,7 @@ struct boot_data_s uint32_t start; /* boot start location */ uint32_t size; /* size */ uint32_t plugin; /* plugin flag - 1 if downloaded application is plugin */ - uint32_t placeholder; /* placehoder to make even 0x10 size */ + uint32_t placeholder; /* placeholder to make even 0x10 size */ }; /**************************************************************************** diff --git a/boards/arm/imxrt/imxrt1060-evk/src/imxrt_flexspi_nor_flash.h b/boards/arm/imxrt/imxrt1060-evk/src/imxrt_flexspi_nor_flash.h index 1534f2facec..58c9ad456c6 100644 --- a/boards/arm/imxrt/imxrt1060-evk/src/imxrt_flexspi_nor_flash.h +++ b/boards/arm/imxrt/imxrt1060-evk/src/imxrt_flexspi_nor_flash.h @@ -48,7 +48,7 @@ * Pre-processor Definitions ****************************************************************************/ -/* FLEXSPI memory config block related defintions */ +/* FLEXSPI memory config block related definitions */ #define FLEXSPI_CFG_BLK_TAG (0x42464346ul) #define FLEXSPI_CFG_BLK_VERSION (0x56010400ul) @@ -58,7 +58,7 @@ #define FLEXSPI_FEATURE_HAS_PARALLEL_MODE 1 -/* Lookup table related defintions */ +/* Lookup table related definitions */ #define CMD_INDEX_READ 0 #define CMD_INDEX_READSTATUS 1 @@ -256,7 +256,7 @@ enum flash_flash_type_e FLEXSPI_DEVICE_TYPE_SERIAL_NAND = 2, /* Flash devices are Serial NAND */ FLEXSPI_DEVICE_TYPE_SERIAL_RAM = 3, /* Flash devices are Serial RAM/HyperFLASH */ FLEXSPI_DEVICE_TYPE_MCP_NOR_NAND = 0x12, /* Flash device is MCP device, A1 is Serial NOR, A2 is Serial NAND */ - FLEXSPI_DEVICE_TYPE_MCP_NOR_RAM = 0x13, /* Flash deivce is MCP device, A1 is Serial NOR, A2 is Serial RAMs */ + FLEXSPI_DEVICE_TYPE_MCP_NOR_RAM = 0x13, /* Flash device is MCP device, A1 is Serial NOR, A2 is Serial RAMs */ }; /* Flash Pad Definitions */ diff --git a/boards/arm/imxrt/imxrt1060-evk/src/imxrt_ft5x06.c b/boards/arm/imxrt/imxrt1060-evk/src/imxrt_ft5x06.c index efefa4f9289..619d6454485 100644 --- a/boards/arm/imxrt/imxrt1060-evk/src/imxrt_ft5x06.c +++ b/boards/arm/imxrt/imxrt1060-evk/src/imxrt_ft5x06.c @@ -61,7 +61,7 @@ #ifdef CONFIG_INPUT_FT5X06 /**************************************************************************** - * Pre-processor Defintions + * Pre-processor Definitions ****************************************************************************/ #define FT5X06_FREQUENCY 400000 diff --git a/boards/arm/imxrt/imxrt1060-evk/src/imxrt_usbhost.c b/boards/arm/imxrt/imxrt1060-evk/src/imxrt_usbhost.c index 94e6996abd8..8f59821763c 100644 --- a/boards/arm/imxrt/imxrt1060-evk/src/imxrt_usbhost.c +++ b/boards/arm/imxrt/imxrt1060-evk/src/imxrt_usbhost.c @@ -151,7 +151,7 @@ int imxrt_usbhost_initialize(void) imxrt_clockall_usboh3(); - /* Make sure we don't accidentially switch on USB bus power */ + /* Make sure we don't accidentally switch on USB bus power */ *((uint32_t *)IMXRT_USBNC_USB_OTG1_CTRL) = USBNC_PWR_POL; *((uint32_t *)0x400d9030) = (1 << 21); diff --git a/boards/arm/kinetis/freedom-k28f/src/k28_bringup.c b/boards/arm/kinetis/freedom-k28f/src/k28_bringup.c index f4c96c81ffb..108e6b08704 100644 --- a/boards/arm/kinetis/freedom-k28f/src/k28_bringup.c +++ b/boards/arm/kinetis/freedom-k28f/src/k28_bringup.c @@ -88,7 +88,7 @@ int k28_bringup(void) #endif #if defined(CONFIG_KINETIS_I2C0) || defined(CONFIG_KINETIS_I2C1) - /* Initialize I2C busses */ + /* Initialize I2C buses */ k28_i2cdev_initialize(); #endif diff --git a/boards/arm/kinetis/freedom-k64f/README.txt b/boards/arm/kinetis/freedom-k64f/README.txt index 9c859ad16d5..99359fbb392 100644 --- a/boards/arm/kinetis/freedom-k64f/README.txt +++ b/boards/arm/kinetis/freedom-k64f/README.txt @@ -2,7 +2,7 @@ README.txt ========== This is the README file for the port of NuttX to the Freescale Freedom-K64F -develoment board. +development board. Contents ======== @@ -71,7 +71,7 @@ Serial Console --------------------- An alternative serial port might use a standard serial shield mounted on the Freedom Board. In this case, Arduino pin D1 provides UART TX and - pin D0 privides UART RX. + pin D0 provides UART RX. The I/O headers on the FRDM-K64F board are arranged to enable compatibility with Arduino shield. The outer rows of pins (even numbered @@ -564,7 +564,7 @@ USB Device Controller Support Device Drivers -> USB Device Driver Support CONFIG_CDCACM=y : USB Modem (CDC ACM) support - CONFIG_CDCACM_EP0MAXPACKET=64 : Enpoint 0 packet size + CONFIG_CDCACM_EP0MAXPACKET=64 : Endpoint 0 packet size CONFIG_CDCACM_EPINTIN=1 : Interrupt IN endpoint number CONFIG_CDCACM_EPINTIN_FSSIZE=64 : Full speed packet size CONFIG_CDCACM_EPINTIN_HSSIZE=64 : High speed packet size diff --git a/boards/arm/kinetis/freedom-k64f/include/board.h b/boards/arm/kinetis/freedom-k64f/include/board.h index 276633aacc4..0d237153c31 100644 --- a/boards/arm/kinetis/freedom-k64f/include/board.h +++ b/boards/arm/kinetis/freedom-k64f/include/board.h @@ -249,7 +249,7 @@ /* An alternative serial port might use a standard serial shield mounted * on the Freedom Board. In this case, Arduino pin D1 provides UART TX and - * pin D0 privides UART RX. + * pin D0 provides UART RX. * * The I/O headers on the FRDM-K64F board are arranged to enable * compatibility with Arduino shield. The outer rows of pins (even numbered diff --git a/boards/arm/kinetis/freedom-k66f/README.txt b/boards/arm/kinetis/freedom-k66f/README.txt index 8c685201291..aea3c278294 100644 --- a/boards/arm/kinetis/freedom-k66f/README.txt +++ b/boards/arm/kinetis/freedom-k66f/README.txt @@ -2,7 +2,7 @@ README.txt ========== This is the README file for the port of NuttX to the Freescale Freedom-K66F -develoment board. +development board. Contents ======== @@ -74,7 +74,7 @@ Serial Console --------------------- An alternative serial port might use a standard serial shield mounted on the Freedom Board. In this case, Arduino pin D1 provides UART TX and - pin D0 privides UART RX. + pin D0 provides UART RX. The I/O headers on the FRDM-K66F board are arranged to enable compatibility with Arduino shield. The outer rows of pins (even numbered @@ -567,7 +567,7 @@ USB Device Controller Support Device Drivers -> USB Device Driver Support CONFIG_CDCACM=y : USB Modem (CDC ACM) support - CONFIG_CDCACM_EP0MAXPACKET=64 : Enpoint 0 packet size + CONFIG_CDCACM_EP0MAXPACKET=64 : Endpoint 0 packet size CONFIG_CDCACM_EPINTIN=1 : Interrupt IN endpoint number CONFIG_CDCACM_EPINTIN_FSSIZE=64 : Full speed packet size CONFIG_CDCACM_EPINTIN_HSSIZE=64 : High speed packet size @@ -958,5 +958,5 @@ Status 2017-02-14: nsh: SDHC DMA is not working yet. Buttons and SDIO with automounter is working. - netnsh:Is building but Ehternet is not working yet. TX is called but + netnsh:Is building but Ethernet is not working yet. TX is called but not IRQ is issued. diff --git a/boards/arm/kinetis/kwikstik-k40/src/k40_lcd.c b/boards/arm/kinetis/kwikstik-k40/src/k40_lcd.c index f87cb028050..575b5545ee6 100644 --- a/boards/arm/kinetis/kwikstik-k40/src/k40_lcd.c +++ b/boards/arm/kinetis/kwikstik-k40/src/k40_lcd.c @@ -91,7 +91,7 @@ FAR struct lcd_dev_s *board_lcd_getdev(int lcddev) * Name: board_lcd_uninitialize * * Description: - * Unitialize the LCD support + * Uninitialize the LCD support * ****************************************************************************/ diff --git a/boards/arm/kinetis/twr-k64f120m/README.txt b/boards/arm/kinetis/twr-k64f120m/README.txt index be1a51c157e..189a0a701ea 100644 --- a/boards/arm/kinetis/twr-k64f120m/README.txt +++ b/boards/arm/kinetis/twr-k64f120m/README.txt @@ -118,12 +118,12 @@ Networking Support U2 is a 25 MHz oscillator (which may be disabled by setting J4), which clock is sent to U1. U1 has two clock output banks: 25MHz (CLKBx) and 50MHz (CLKAx). - J2 (ser board) is used to select the PHY clock source: 50MHz, 25MHz or CLCKOUT0 from K64. Set it to 25MHz. + J2 (set board) is used to select the PHY clock source: 50MHz, 25MHz or CLCKOUT0 from K64. Set it to 25MHz. In order to keep synchornized the PHY clock with the K64 clock, one can set J3 (default is open) to route CLOCKIN0 either from 25MHz or 50Mhz lines. In that case, J33 (main board) will have to be removed - and J32 (main board set) set to disable its 50MHz_OSC and use CLKIN0 provided by ser board. + and J32 (main board set) set to disable its 50MHz_OSC and use CLKIN0 provided by set board. J12 is by default set to RMII mode. In this case J2 should be placed to 50MHz clock - Note that in MII mode, MII0_TXER is required by kinetis driver, but not connected on ser board + Note that in MII mode, MII0_TXER is required by kinetis driver, but not connected on set board Ethernet MAC/KSZ8041NL PHY -------------------------- diff --git a/boards/arm/kinetis/twr-k64f120m/include/board.h b/boards/arm/kinetis/twr-k64f120m/include/board.h index 9968e529130..385768010ed 100644 --- a/boards/arm/kinetis/twr-k64f120m/include/board.h +++ b/boards/arm/kinetis/twr-k64f120m/include/board.h @@ -138,7 +138,7 @@ * 3. D7 / Orange LED PTE8 * 4 D9 / Blue LED PTE9 * - * LED4 is reservered for user. + * LED4 is reserved for user. * The 3 first LEDs are encoded as follows: */ diff --git a/boards/arm/kinetis/twr-k64f120m/src/k64_leds.c b/boards/arm/kinetis/twr-k64f120m/src/k64_leds.c index 794dfba1814..420932366ae 100644 --- a/boards/arm/kinetis/twr-k64f120m/src/k64_leds.c +++ b/boards/arm/kinetis/twr-k64f120m/src/k64_leds.c @@ -57,7 +57,7 @@ * 3. D7 / Orange LED PTE8 * 4 D9 / Blue LED PTE9 * - * LED4 is reservered for user. + * LED4 is reserved for user. */ /* The following definitions map the encoded LED setting to GPIO settings */ diff --git a/boards/arm/kinetis/twr-k64f120m/src/twrk64.h b/boards/arm/kinetis/twr-k64f120m/src/twrk64.h index edb9728ec2c..91f92c0e560 100644 --- a/boards/arm/kinetis/twr-k64f120m/src/twrk64.h +++ b/boards/arm/kinetis/twr-k64f120m/src/twrk64.h @@ -33,7 +33,7 @@ * POSSIBILITY OF SUCH DAMAGE. * * This header file is only accessible from the src directory. - * For /arch/arm/src accessibilty use ../include/board.h instead. + * For /arch/arm/src accessibility use ../include/board.h instead. ****************************************************************************/ #ifndef __BOARDS_ARM_KINETIS_TWR_K64F120M_SRC_TWRK64_H diff --git a/boards/arm/kl/freedom-kl25z/README.txt b/boards/arm/kl/freedom-kl25z/README.txt index 6c2e91211ca..5e47c098b47 100644 --- a/boards/arm/kl/freedom-kl25z/README.txt +++ b/boards/arm/kl/freedom-kl25z/README.txt @@ -354,7 +354,7 @@ Where is one of the following: applications. Most of the memory used at runtime is allocated I/O buffers and the stack for the NSH main thread (1.5KB). - There is probably enough free memroy to support 3 or 4 application + There is probably enough free memory to support 3 or 4 application threads in addition to NSH. 5. This configurations has support for NSH built-in applications. However, diff --git a/boards/arm/kl/freedom-kl26z/README.txt b/boards/arm/kl/freedom-kl26z/README.txt index c083ca7ce5e..b3591870823 100644 --- a/boards/arm/kl/freedom-kl26z/README.txt +++ b/boards/arm/kl/freedom-kl26z/README.txt @@ -332,7 +332,7 @@ Where is one of the following: applications. Most of the memory used at runtime is allocated I/O buffers and the stack for the NSH main thread (1.5KB). - There is probably enough free memroy to support 3 or 4 application + There is probably enough free memory to support 3 or 4 application threads in addition to NSH. 5. This configurations has support for NSH built-in applications. However, diff --git a/boards/arm/lpc17xx_40xx/lincoln60/README.txt b/boards/arm/lpc17xx_40xx/lincoln60/README.txt index 2ecd55280e4..08d111284cd 100644 --- a/boards/arm/lpc17xx_40xx/lincoln60/README.txt +++ b/boards/arm/lpc17xx_40xx/lincoln60/README.txt @@ -181,7 +181,7 @@ Lincoln 60 Configuration Options also require CONFIG_NET and CONFIG_LPC17_40_ETHERNET. CONFIG_ETH0_PHY_KS8721 - Selects Micrel KS8721 PHY - CONFIG_LPC17_40_PHY_AUTONEG - Enable auto-negotion + CONFIG_LPC17_40_PHY_AUTONEG - Enable auto-negotiation CONFIG_LPC17_40_PHY_SPEED100 - Select 100Mbit vs. 10Mbit speed. CONFIG_LPC17_40_PHY_FDUPLEX - Select full (vs. half) duplex diff --git a/boards/arm/lpc17xx_40xx/lincoln60/src/lpc17_40_boot.c b/boards/arm/lpc17xx_40xx/lincoln60/src/lpc17_40_boot.c index ad685647f33..b0ed312d6fd 100644 --- a/boards/arm/lpc17xx_40xx/lincoln60/src/lpc17_40_boot.c +++ b/boards/arm/lpc17xx_40xx/lincoln60/src/lpc17_40_boot.c @@ -66,7 +66,7 @@ * * Description: * All LPC17xx/LPC40xx architectures must provide the following entry point. - * This entry point is called early in the intitialization -- after all + * This entry point is called early in the initialization -- after all * memory has been configured and mapped but before any devices have been * initialized. * diff --git a/boards/arm/lpc17xx_40xx/lpc4088-devkit/README.txt b/boards/arm/lpc17xx_40xx/lpc4088-devkit/README.txt index 8e5b5bf9146..600147573fa 100644 --- a/boards/arm/lpc17xx_40xx/lpc4088-devkit/README.txt +++ b/boards/arm/lpc17xx_40xx/lpc4088-devkit/README.txt @@ -26,7 +26,7 @@ LEDs LED2 : Connected to P2[27] If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in - any way using the defitions provided in the board.h header file. + any way using the definitions provided in the board.h header file. If CONFIG_ARCH_LEDs is defined, then NuttX will control the 2 LEDs on the LPC4088 OEM board. The following definitions describe how NuttX controls @@ -280,7 +280,7 @@ Configuration Directories ---- This is identical to the nsh configuration below except that NuttX is built as a kernel-mode, monolithic module and the user applications - are built separately. Is is recommened to use a special make command; + are built separately. Is is recommended to use a special make command; not just 'make' but make with the following two arguments: make pass1 pass2 diff --git a/boards/arm/lpc17xx_40xx/lpc4088-devkit/scripts/memory.ld b/boards/arm/lpc17xx_40xx/lpc4088-devkit/scripts/memory.ld index a0783caec5a..84daac9c70e 100644 --- a/boards/arm/lpc17xx_40xx/lpc4088-devkit/scripts/memory.ld +++ b/boards/arm/lpc17xx_40xx/lpc4088-devkit/scripts/memory.ld @@ -49,7 +49,7 @@ * Alignment of the user space FLASH partition is a critical factor: The * user space FLASH partition will be spanned with a single region of size * 2**n bytes. The alignment of the user-space region must be the same. As - * a consequence, as the user-space increases in size, the alignmment + * a consequence, as the user-space increases in size, the alignment * requirement also increases. * * This alignment requirement means that the largest user space FLASH region diff --git a/boards/arm/lpc17xx_40xx/lpc4088-devkit/src/lpc17_40_boardinitialize.c b/boards/arm/lpc17xx_40xx/lpc4088-devkit/src/lpc17_40_boardinitialize.c index 11b4717cae2..85b1ffc46fc 100644 --- a/boards/arm/lpc17xx_40xx/lpc4088-devkit/src/lpc17_40_boardinitialize.c +++ b/boards/arm/lpc17xx_40xx/lpc4088-devkit/src/lpc17_40_boardinitialize.c @@ -68,7 +68,7 @@ * * Description: * All LPC17xx/LPC40xx architectures must provide the following entry point. - * This entry point is called early in the intitialization -- after all + * This entry point is called early in the initialization -- after all * memory has been configured and mapped but before any devices have been * initialized. * diff --git a/boards/arm/lpc17xx_40xx/lpc4088-devkit/src/lpc4088-devkit.h b/boards/arm/lpc17xx_40xx/lpc4088-devkit/src/lpc4088-devkit.h index 0f29334ebfe..c12397264ae 100644 --- a/boards/arm/lpc17xx_40xx/lpc4088-devkit/src/lpc4088-devkit.h +++ b/boards/arm/lpc17xx_40xx/lpc4088-devkit/src/lpc4088-devkit.h @@ -64,7 +64,7 @@ * LED3 -- Connected to P1[13] * LED4 -- Connected to P4[27] * - * These LEDs are connecte to ground so a high output value will illuminate + * These LEDs are connected to ground so a high output value will illuminate * them. */ diff --git a/boards/arm/lpc17xx_40xx/lpc4088-quickstart/README.txt b/boards/arm/lpc17xx_40xx/lpc4088-quickstart/README.txt index e19dfb79176..4db4bba4e3b 100644 --- a/boards/arm/lpc17xx_40xx/lpc4088-quickstart/README.txt +++ b/boards/arm/lpc17xx_40xx/lpc4088-quickstart/README.txt @@ -26,7 +26,7 @@ LEDs LED4 : Connected to P2[19] If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in - any way using the defitions provided in the board.h header file. + any way using the definitions provided in the board.h header file. If CONFIG_ARCH_LEDs is defined, then NuttX will control the 4 LEDs on the LPC4088 QuickStart board. The following definitions describe how NuttX @@ -265,7 +265,7 @@ Configuration Directories ---- This is identical to the nsh configuration below except that NuttX is built as a kernel-mode, monolithic module and the user applications - are built separately. Is is recommened to use a special make command; + are built separately. Is is recommended to use a special make command; not just 'make' but make with the following two arguments: make pass1 pass2 @@ -419,7 +419,7 @@ Configuration Directories Library Support: CONFIG_SCHED_WORKQUEUE=y : Work queue support required - Applicaton Configuration: + Application Configuration: CONFIG_EXAMPLES_TOUCHSCREEN=y : Enable the touchscreen built-int test Defaults should be okay for related touchscreen settings. Touchscreen diff --git a/boards/arm/lpc17xx_40xx/lpc4088-quickstart/include/board.h b/boards/arm/lpc17xx_40xx/lpc4088-quickstart/include/board.h index 2db94a34708..fbfc2c5a786 100644 --- a/boards/arm/lpc17xx_40xx/lpc4088-quickstart/include/board.h +++ b/boards/arm/lpc17xx_40xx/lpc4088-quickstart/include/board.h @@ -203,7 +203,7 @@ * LED3 : Connected to P1[13] * LED4 : Connected to P2[19] * - * These LEDs are connecte to ground so a high output value will illuminate + * These LEDs are connected to ground so a high output value will illuminate * them. */ diff --git a/boards/arm/lpc17xx_40xx/lpc4088-quickstart/scripts/memory.ld b/boards/arm/lpc17xx_40xx/lpc4088-quickstart/scripts/memory.ld index 4fbb5c7c9f2..59ad85b4d62 100644 --- a/boards/arm/lpc17xx_40xx/lpc4088-quickstart/scripts/memory.ld +++ b/boards/arm/lpc17xx_40xx/lpc4088-quickstart/scripts/memory.ld @@ -49,7 +49,7 @@ * Alignment of the user space FLASH partition is a critical factor: The * user space FLASH partition will be spanned with a single region of size * 2**n bytes. The alignment of the user-space region must be the same. As - * a consequence, as the user-space increases in size, the alignmment + * a consequence, as the user-space increases in size, the alignment * requirement also increases. * * This alignment requirement means that the largest user space FLASH region diff --git a/boards/arm/lpc17xx_40xx/lpc4088-quickstart/src/lpc17_40_boardinitialize.c b/boards/arm/lpc17xx_40xx/lpc4088-quickstart/src/lpc17_40_boardinitialize.c index fa079885025..2cbac613df0 100644 --- a/boards/arm/lpc17xx_40xx/lpc4088-quickstart/src/lpc17_40_boardinitialize.c +++ b/boards/arm/lpc17xx_40xx/lpc4088-quickstart/src/lpc17_40_boardinitialize.c @@ -68,7 +68,7 @@ * * Description: * All LPC17xx/LPC40xx architectures must provide the following entry point. - * This entry point is called early in the intitialization -- after all + * This entry point is called early in the initialization -- after all * memory has been configured and mapped but before any devices have been * initialized. * diff --git a/boards/arm/lpc17xx_40xx/lpcxpresso-lpc1768/README.txt b/boards/arm/lpc17xx_40xx/lpcxpresso-lpc1768/README.txt index e07efe27321..bdf9ffa1025 100644 --- a/boards/arm/lpc17xx_40xx/lpcxpresso-lpc1768/README.txt +++ b/boards/arm/lpc17xx_40xx/lpcxpresso-lpc1768/README.txt @@ -501,7 +501,7 @@ LPCXpresso Configuration Options also require CONFIG_NET and CONFIG_LPC17_40_ETHERNET. CONFIG_ETH0_PHY_KS8721 - Selects Micrel KS8721 PHY - CONFIG_LPC17_40_PHY_AUTONEG - Enable auto-negotion + CONFIG_LPC17_40_PHY_AUTONEG - Enable auto-negotiation CONFIG_LPC17_40_PHY_SPEED100 - Select 100Mbit vs. 10Mbit speed. CONFIG_LPC17_40_PHY_FDUPLEX - Select full (vs. half) duplex @@ -564,7 +564,7 @@ selected as follow: Where is one of the following: dhcpd: - This builds the DCHP server using the apps/examples/dhcpd application + This builds the DHCP server using the apps/examples/dhcpd application (for execution from FLASH.) See apps/examples/README.txt for information about the dhcpd example. diff --git a/boards/arm/lpc17xx_40xx/lpcxpresso-lpc1768/src/lpc17_40_boot.c b/boards/arm/lpc17xx_40xx/lpcxpresso-lpc1768/src/lpc17_40_boot.c index 51cfdd8ddf7..9fa2e7328ca 100644 --- a/boards/arm/lpc17xx_40xx/lpcxpresso-lpc1768/src/lpc17_40_boot.c +++ b/boards/arm/lpc17xx_40xx/lpcxpresso-lpc1768/src/lpc17_40_boot.c @@ -67,7 +67,7 @@ * * Description: * All LPC17xx/LPC40xx architectures must provide the following entry point. - * This entry point is called early in the intitialization -- after all + * This entry point is called early in the initialization -- after all * memory has been configured and mapped but before any devices have been * initialized. * diff --git a/boards/arm/lpc17xx_40xx/lpcxpresso-lpc1768/src/lpc17_40_oled.c b/boards/arm/lpc17xx_40xx/lpcxpresso-lpc1768/src/lpc17_40_oled.c index bc117c70080..6f2b76fa580 100644 --- a/boards/arm/lpc17xx_40xx/lpcxpresso-lpc1768/src/lpc17_40_oled.c +++ b/boards/arm/lpc17xx_40xx/lpcxpresso-lpc1768/src/lpc17_40_oled.c @@ -183,7 +183,7 @@ int lpc17_40_ssp1cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd) * * Input Parameters: * - * devno - A value in the range of 0 throuh + * devno - A value in the range of 0 through * CONFIG_UG9664HSWAG01_NINTERFACES-1. * This allows support for multiple OLED devices. * on - true:turn power on, false: turn power off. diff --git a/boards/arm/lpc17xx_40xx/lx_cpu/Kconfig b/boards/arm/lpc17xx_40xx/lx_cpu/Kconfig index bb2f256fd95..803951f0282 100644 --- a/boards/arm/lpc17xx_40xx/lx_cpu/Kconfig +++ b/boards/arm/lpc17xx_40xx/lx_cpu/Kconfig @@ -16,7 +16,7 @@ choice FLASH memory and start directly after MCU reset. If there is bool loader then NuttX can be placed into internal FLASH after the loader - "Code in internal FLASH - loader used" (LX_CPU_BOOT_FLASH_APP) - or it can be loaded into extarnal SDRAM and start from there. + or it can be loaded into external SDRAM and start from there. config LX_CPU_BOOT_FLASH_APP bool "Code in internal FLASH - loader used" diff --git a/boards/arm/lpc17xx_40xx/lx_cpu/README.txt b/boards/arm/lpc17xx_40xx/lx_cpu/README.txt index b79b4681740..747163cbff4 100644 --- a/boards/arm/lpc17xx_40xx/lx_cpu/README.txt +++ b/boards/arm/lpc17xx_40xx/lx_cpu/README.txt @@ -24,7 +24,7 @@ LEDs LED2 : Connected to P0[16] GREEN If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in - any way using the defitions provided in the board.h header file. + any way using the definitions provided in the board.h header file. If CONFIG_ARCH_LEDs is defined, then NuttX will control the 2 LEDs on the WaveShare Open1788K. The following definitions describe how NuttX controls @@ -68,7 +68,7 @@ Serial Console In this configuration using UART1, it is necessary to disable LED support on the board. That is because UART1 RXD is set for pin p0.16, but so is LED2. If you do not disable LED support then no incoming serial data will - be recevied. + be received. Common Board Options CONFIG_ARCH_LEDS=n : Disable LED support @@ -78,7 +78,7 @@ Serial Console data receipt). NOTE: If you intend to use LEDs with UART1, then you might want to - redesign some ofthe LED logic in the src/ subdirectory so that it does not + redesign some of the LED logic in the src/ subdirectory so that it does not attempt to use LED2. ETHERNET @@ -315,7 +315,7 @@ CONFIGURATION Library Support: CONFIG_SCHED_WORKQUEUE=y : Work queue support required - Applicaton Configuration: + Application Configuration: CONFIG_EXAMPLES_TOUCHSCREEN=y : Enable the touchscreen built-int test Defaults should be okay for related touchscreen settings. Touchscreen diff --git a/boards/arm/lpc17xx_40xx/lx_cpu/include/board.h b/boards/arm/lpc17xx_40xx/lx_cpu/include/board.h index e7b4976209f..bd508d75b07 100644 --- a/boards/arm/lpc17xx_40xx/lx_cpu/include/board.h +++ b/boards/arm/lpc17xx_40xx/lx_cpu/include/board.h @@ -264,7 +264,7 @@ * LED1 -- Connected to P1[29] RED * LED2 -- Connected to P0[16] GREEN * - * These LEDs are connecte to ground so a high output value will illuminate them. + * These LEDs are connected to ground so a high output value will illuminate them. */ /* LED index values for use with board_userled() */ @@ -352,7 +352,7 @@ /* UART1: * - * All pin options are controlled by older briges on the bottom of the board. There + * All pin options are controlled by older bridges on the bottom of the board. There * are the default settings on my board as it came out of the box: * * RTS --- Connected to P0[22] diff --git a/boards/arm/lpc17xx_40xx/lx_cpu/scripts/memory.ld b/boards/arm/lpc17xx_40xx/lx_cpu/scripts/memory.ld index 06e3b704867..64824a67ac6 100644 --- a/boards/arm/lpc17xx_40xx/lx_cpu/scripts/memory.ld +++ b/boards/arm/lpc17xx_40xx/lx_cpu/scripts/memory.ld @@ -46,7 +46,7 @@ * Alignment of the user space FLASH partition is a critical factor: The * user space FLASH partition will be spanned with a single region of size * 2**n bytes. The alignment of the user-space region must be the same. As - * a consequence, as the user-space increases in size, the alignmment + * a consequence, as the user-space increases in size, the alignment * requirement also increases. * * This alignment requirement means that the largest user space FLASH region diff --git a/boards/arm/lpc17xx_40xx/mbed/README.txt b/boards/arm/lpc17xx_40xx/mbed/README.txt index 8bec411b472..ce18e0528ca 100644 --- a/boards/arm/lpc17xx_40xx/mbed/README.txt +++ b/boards/arm/lpc17xx_40xx/mbed/README.txt @@ -144,7 +144,7 @@ mbed Configuration Options also require CONFIG_NET and CONFIG_LPC17_40_ETHERNET. CONFIG_ETH0_PHY_KS8721 - Selects Micrel KS8721 PHY - CONFIG_LPC17_40_PHY_AUTONEG - Enable auto-negotion + CONFIG_LPC17_40_PHY_AUTONEG - Enable auto-negotiation CONFIG_LPC17_40_PHY_SPEED100 - Select 100Mbit vs. 10Mbit speed. CONFIG_LPC17_40_PHY_FDUPLEX - Select full (vs. half) duplex diff --git a/boards/arm/lpc17xx_40xx/mbed/src/lpc17_40_boot.c b/boards/arm/lpc17xx_40xx/mbed/src/lpc17_40_boot.c index 0c0b730fb84..d9ee1003487 100644 --- a/boards/arm/lpc17xx_40xx/mbed/src/lpc17_40_boot.c +++ b/boards/arm/lpc17xx_40xx/mbed/src/lpc17_40_boot.c @@ -66,7 +66,7 @@ * * Description: * All LPC17xx/LPC40xx architectures must provide the following entry point. - * This entry point is called early in the intitialization -- after all + * This entry point is called early in the initialization -- after all * memory has been configured and mapped but before any devices have been * initialized. * diff --git a/boards/arm/lpc17xx_40xx/mcb1700/README.txt b/boards/arm/lpc17xx_40xx/mcb1700/README.txt index 57166a6b040..76cfad91847 100644 --- a/boards/arm/lpc17xx_40xx/mcb1700/README.txt +++ b/boards/arm/lpc17xx_40xx/mcb1700/README.txt @@ -145,7 +145,7 @@ mcb1700 Configuration Options also require CONFIG_NET and CONFIG_LPC17_40_ETHERNET. CONFIG_ETH0_PHY_KS8721 - Selects Micrel KS8721 PHY - CONFIG_LPC17_40_PHY_AUTONEG - Enable auto-negotion + CONFIG_LPC17_40_PHY_AUTONEG - Enable auto-negotiation CONFIG_LPC17_40_PHY_SPEED100 - Select 100Mbit vs. 10Mbit speed. CONFIG_LPC17_40_PHY_FDUPLEX - Select full (vs. half) duplex diff --git a/boards/arm/lpc17xx_40xx/mcb1700/src/lpc17_40_boot.c b/boards/arm/lpc17xx_40xx/mcb1700/src/lpc17_40_boot.c index c13c37c3983..8fd32568bcd 100644 --- a/boards/arm/lpc17xx_40xx/mcb1700/src/lpc17_40_boot.c +++ b/boards/arm/lpc17xx_40xx/mcb1700/src/lpc17_40_boot.c @@ -58,7 +58,7 @@ * * Description: * All LPC17xx/LPC40xx architectures must provide the following entry point. - * This entry point is called early in the intitialization -- after all + * This entry point is called early in the initialization -- after all * memory has been configured and mapped but before any devices have been * initialized. * diff --git a/boards/arm/lpc17xx_40xx/olimex-lpc1766stk/README.txt b/boards/arm/lpc17xx_40xx/olimex-lpc1766stk/README.txt index 95ff7daff42..6ca8525e759 100644 --- a/boards/arm/lpc17xx_40xx/olimex-lpc1766stk/README.txt +++ b/boards/arm/lpc17xx_40xx/olimex-lpc1766stk/README.txt @@ -101,7 +101,7 @@ Olimex LPC1766-STK development board Simple UART1 is the more flexible UART and since the needs for a serial console are minimal, the more minimal UART0/RS232_0 is used for the NuttX - system console. Of course, this can be changed by editting the NuttX + system console. Of course, this can be changed by editing the NuttX configuration file as discussed below. The serial console is configured as follows (57600 8N1): @@ -158,7 +158,7 @@ Olimex LPC1766-STK development board write only. STATUS: The LCD driver was never properly integrated. It was awkward - to use because it relied on a 9-bit SPI inteface (the 9th bit being + to use because it relied on a 9-bit SPI interface (the 9th bit being the command/data bit which is normally a discrete input). All support for the Nokia 6100 was removed on May 19, 2018. That obsoleted driver can be viewed in the @@ -170,7 +170,7 @@ Olimex LPC1766-STK development board no longer believe that is the correct technical approach. I now believe that the best solution would be to provide custom management of the 9th data bit inside of the low-level MCU driver, the LPC17 SPI driver in thisi - case, via a configration option on the low-level driver. + case, via a configuration option on the low-level driver. LEDs ^^^^ @@ -310,7 +310,7 @@ Using OpenOCD and GDB with an FT2232 JTAG emulator 2. Create a directory /home/OpenOCD. - 3. Get the FT2232 drivr from http://www.ftdichip.com/Drivers/D2XX.htm and + 3. Get the FT2232 driver from http://www.ftdichip.com/Drivers/D2XX.htm and extract it into /home/OpenOCD/ftd2xx $ pwd @@ -379,7 +379,7 @@ Using OpenOCD and GDB with an FT2232 JTAG emulator compare that olimex.cfg file with configuration files in /usr/local/share/openocd/scripts/target (or /home/OpenOCD/openocd/tcl/target). As of this writing, there is no script for the lpc1766, but the - lpc1768 configurtion can be used after changing the flash size to + lpc1768 configuration can be used after changing the flash size to 256Kb. That is, change: flash bank $_FLASHNAME lpc2000 0x0 0x80000 0 0 $_TARGETNAME ... @@ -584,7 +584,7 @@ Olimex LPC1766-STK Configuration Options also require CONFIG_NET and CONFIG_LPC17_40_ETHERNET. CONFIG_ETH0_PHY_KS8721 - Selects Micrel KS8721 PHY - CONFIG_LPC17_40_PHY_AUTONEG - Enable auto-negotion + CONFIG_LPC17_40_PHY_AUTONEG - Enable auto-negotiation CONFIG_LPC17_40_PHY_SPEED100 - Select 100Mbit vs. 10Mbit speed. CONFIG_LPC17_40_PHY_FDUPLEX - Select full (vs. half) duplex @@ -1065,7 +1065,7 @@ Configuration Sub-Directories binary data stream. If you don't have the rz command on your Linux box, the package to - install rzsz (or possibily lrzsz). + install rzsz (or possibly lrzsz). Then on the target: @@ -1126,7 +1126,7 @@ Configuration Sub-Directories rz command. If you don't have the az command on your Linux box, the package to - install rzsz (or possibily lrzsz). + install rzsz (or possibly lrzsz). STATUS 2013-7-15: Testing against the Linux rz/sz commands. @@ -1156,7 +1156,7 @@ Configuration Sub-Directories much better with hardware flow control disabled. At this lower BAUD, RX buffer sizes could probably be reduced; Or - perhaps the BAUD coud be increased. My thought, however, is that + perhaps the BAUD could be increased. My thought, however, is that tuning in such an unhealthy situation is not the approach: The best thing to do would be to use the matching NuttX sz on the Linux host side. diff --git a/boards/arm/lpc17xx_40xx/olimex-lpc1766stk/src/lpc17_40_ssp.c b/boards/arm/lpc17xx_40xx/olimex-lpc1766stk/src/lpc17_40_ssp.c index 63fcc80ad98..a5e1291b31a 100644 --- a/boards/arm/lpc17xx_40xx/olimex-lpc1766stk/src/lpc17_40_ssp.c +++ b/boards/arm/lpc17xx_40xx/olimex-lpc1766stk/src/lpc17_40_ssp.c @@ -321,9 +321,9 @@ uint8_t lpc17_40_ssp1status(FAR struct spi_dev_s *dev, uint32_t devid) * * Description: * If the board supports a card detect callback to inform the SPI-based - * MMC/SD drvier when an SD card is inserted or removed, then + * MMC/SD driver when an SD card is inserted or removed, then * CONFIG_SPI_CALLBACK should be defined and the following function(s) must - * must be implemented. These functiosn implements the registercallback + * must be implemented. These functions implements the registercallback * method of the SPI interface (see include/nuttx/spi/spi.h for details) * * Input Parameters: diff --git a/boards/arm/lpc17xx_40xx/open1788/README.txt b/boards/arm/lpc17xx_40xx/open1788/README.txt index 8085d63056d..2d168f19066 100644 --- a/boards/arm/lpc17xx_40xx/open1788/README.txt +++ b/boards/arm/lpc17xx_40xx/open1788/README.txt @@ -26,7 +26,7 @@ LEDs LED4 : Connected to P4[27] If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in - any way using the defitions provided in the board.h header file. + any way using the definitions provided in the board.h header file. If CONFIG_ARCH_LEDs is defined, then NuttX will control the 3 LEDs on the WaveShare Open1788K. The following definitions describe how NuttX controls @@ -90,7 +90,7 @@ Serial Console In this configuration using UART1, it is necessary to disable LED support on the board. That is because UART1 RXD is set for pin p0.16, but so is LED2. If you do not disable LED support then no incoming serial data will - be recevied. + be received. Common Board Options CONFIG_ARCH_LEDS=n : Disable LED support @@ -100,7 +100,7 @@ Serial Console data receipt). NOTE: If you intend to use LEDs with UART1, then you might want to - redesign some ofthe LED logic in the src/ subdirectory so that it does not + redesign some of the LED logic in the src/ subdirectory so that it does not attempt to use LED2. Using OpenOCD with the Olimex ARM-USB-OCD @@ -301,7 +301,7 @@ Configuration Directories ---- This is identical to the nsh configuration below except that NuttX is built as a kernel-mode, monolithic module and the user applications - are built separately. Is is recommened to use a special make command; + are built separately. Is is recommended to use a special make command; not just 'make' but make with the following two arguments: make pass1 pass2 @@ -471,7 +471,7 @@ Configuration Directories Library Support: CONFIG_SCHED_WORKQUEUE=y : Work queue support required - Applicaton Configuration: + Application Configuration: CONFIG_EXAMPLES_TOUCHSCREEN=y : Enable the touchscreen built-int test Defaults should be okay for related touchscreen settings. Touchscreen @@ -559,8 +559,8 @@ Configuration Directories In NuttX naming that is called a discrete joystick djoystick. There is a well defined djoystick interface in include/nuttx/input/djoystick.h. - Note that there are dscrete joystick buttons on the Open1788 board so - would be a natural interace in this case. + Note that there are discrete joystick buttons on the Open1788 board so + would be a natural interface in this case. A discrete joystick driver was added to pdcurses configuration. It has been verified that the pdcurses demos that require menu diff --git a/boards/arm/lpc17xx_40xx/open1788/include/board.h b/boards/arm/lpc17xx_40xx/open1788/include/board.h index c53ebf53f64..1dfd7471643 100644 --- a/boards/arm/lpc17xx_40xx/open1788/include/board.h +++ b/boards/arm/lpc17xx_40xx/open1788/include/board.h @@ -229,7 +229,7 @@ * LED3 -- Connected to P1[13] * LED4 -- Connected to P4[27] * - * These LEDs are connecte to ground so a high output value will illuminate + * These LEDs are connected to ground so a high output value will illuminate * them. */ @@ -324,7 +324,7 @@ /* UART1: * - * All pin options are controlled by older briges on the bottom of the board. + * All pin options are controlled by older bridges on the bottom of the board. * There are the default settings on my board as it came out of the box: * * RTS --- Connected to P0[22] diff --git a/boards/arm/lpc17xx_40xx/open1788/src/lpc17_40_boardinitialize.c b/boards/arm/lpc17xx_40xx/open1788/src/lpc17_40_boardinitialize.c index c5e3361d75e..e781e4302ce 100644 --- a/boards/arm/lpc17xx_40xx/open1788/src/lpc17_40_boardinitialize.c +++ b/boards/arm/lpc17xx_40xx/open1788/src/lpc17_40_boardinitialize.c @@ -68,7 +68,7 @@ * * Description: * All LPC17xx/LPC40xx architectures must provide the following entry point. - * This entry point is called early in the intitialization -- after all + * This entry point is called early in the initialization -- after all * memory has been configured and mapped but before any devices have been * initialized. * diff --git a/boards/arm/lpc17xx_40xx/open1788/src/open1788.h b/boards/arm/lpc17xx_40xx/open1788/src/open1788.h index 3d27b67d7d7..cb71de7ead1 100644 --- a/boards/arm/lpc17xx_40xx/open1788/src/open1788.h +++ b/boards/arm/lpc17xx_40xx/open1788/src/open1788.h @@ -65,7 +65,7 @@ * LED3 -- Connected to P1[13] * LED4 -- Connected to P4[27] * - * These LEDs are connecte to ground so a high output value will illuminate + * These LEDs are connected to ground so a high output value will illuminate * them. */ diff --git a/boards/arm/lpc17xx_40xx/u-blox-c027/src/lpc17_40_boot.c b/boards/arm/lpc17xx_40xx/u-blox-c027/src/lpc17_40_boot.c index 262b66969d1..383d45847e2 100644 --- a/boards/arm/lpc17xx_40xx/u-blox-c027/src/lpc17_40_boot.c +++ b/boards/arm/lpc17xx_40xx/u-blox-c027/src/lpc17_40_boot.c @@ -60,7 +60,7 @@ * * Description: * All LPC17xx/LPC40xx architectures must provide the following entry point. - * This entry point is called early in the intitialization -- after all + * This entry point is called early in the initialization -- after all * memory has been configured and mapped but before any devices have been * initialized. * diff --git a/boards/arm/lpc17xx_40xx/zkit-arm-1769/README.txt b/boards/arm/lpc17xx_40xx/zkit-arm-1769/README.txt index c0c721fda82..9c05c05ab34 100644 --- a/boards/arm/lpc17xx_40xx/zkit-arm-1769/README.txt +++ b/boards/arm/lpc17xx_40xx/zkit-arm-1769/README.txt @@ -312,7 +312,7 @@ ZKit-ARM Configuration Options also require CONFIG_NET and CONFIG_LPC17_40_ETHERNET. CONFIG_ETH0_PHY_KS8721 - Selects Micrel KS8721 PHY - CONFIG_LPC17_40_PHY_AUTONEG - Enable auto-negotion + CONFIG_LPC17_40_PHY_AUTONEG - Enable auto-negotiation CONFIG_LPC17_40_PHY_SPEED100 - Select 100Mbit vs. 10Mbit speed. CONFIG_LPC17_40_PHY_FDUPLEX - Select full (vs. half) duplex diff --git a/boards/arm/lpc17xx_40xx/zkit-arm-1769/src/lpc17_40_boot.c b/boards/arm/lpc17xx_40xx/zkit-arm-1769/src/lpc17_40_boot.c index 560cf705983..20dc93accd3 100644 --- a/boards/arm/lpc17xx_40xx/zkit-arm-1769/src/lpc17_40_boot.c +++ b/boards/arm/lpc17xx_40xx/zkit-arm-1769/src/lpc17_40_boot.c @@ -71,7 +71,7 @@ * * Description: * All LPC17xx/LPC40xx architectures must provide the following entry point. - * This entry point is called early in the intitialization -- after all + * This entry point is called early in the initialization -- after all * memory has been configured and mapped but before any devices have been * initialized. * diff --git a/boards/arm/lpc214x/mcu123-lpc214x/src/lpc2148_leds.c b/boards/arm/lpc214x/mcu123-lpc214x/src/lpc2148_leds.c index 20d0898f39f..696f2f4eb0b 100644 --- a/boards/arm/lpc214x/mcu123-lpc214x/src/lpc2148_leds.c +++ b/boards/arm/lpc214x/mcu123-lpc214x/src/lpc2148_leds.c @@ -79,7 +79,7 @@ ****************************************************************************/ /**************************************************************************** - * Public Funtions + * Public Functions ****************************************************************************/ /**************************************************************************** diff --git a/boards/arm/lpc214x/mcu123-lpc214x/src/lpc2148_spi1.c b/boards/arm/lpc214x/mcu123-lpc214x/src/lpc2148_spi1.c index 89a70fa3ecb..66a2565f464 100644 --- a/boards/arm/lpc214x/mcu123-lpc214x/src/lpc2148_spi1.c +++ b/boards/arm/lpc214x/mcu123-lpc214x/src/lpc2148_spi1.c @@ -52,7 +52,7 @@ * SSEL1 - pin 55, P0.20/MAT1.3/SSEL1/EINT3 * * SPI0 is available on the mcu123.com board (pins 27, 29, 30, and 31). - * Pin 27 is dedicated to a chip select, pins 30 and 31 connect to keys, nd + * Pin 27 is dedicated to a chip select, pins 30 and 31 connect to keys, and * pin 29 is unconnected. * ****************************************************************************/ @@ -157,12 +157,12 @@ static sem_t g_exclsem = SEM_INITIALIZER(1); /* For mutually exclusive access * * Name: spi_lock * * Description: - * On SPI busses where there are multiple devices, it will be necessary to - * lock SPI to have exclusive access to the busses for a sequence of + * On SPI buses where there are multiple devices, it will be necessary to + * lock SPI to have exclusive access to the buses for a sequence of * transfers. The bus should be locked before the chip is selected. After * locking the SPI bus, the caller should then also call the setfrequency, * setbits, and setmode methods to make sure that the SPI is properly - * configured for the device. If the SPI buss is being shared, then it + * configured for the device. If the SPI bus is being shared, then it * may have been left in an incompatible state. * * Input Parameters: @@ -408,7 +408,7 @@ static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer, FAR const uint8_t *ptr = (FAR const uint8_t *)buffer; uint8_t sr; - /* Loop while thre are bytes remaining to be sent */ + /* Loop while there are bytes remaining to be sent */ spiinfo("nwords: %d\n", nwords); while (nwords > 0) @@ -587,7 +587,7 @@ FAR struct spi_dev_s *lpc214x_spibus_initialize(int port) putreg8(0, LPC214X_SPI1_CR1); putreg8(0, LPC214X_SPI1_IMSC); - /* Set the initial clock frequency for indentification mode < 400kHz */ + /* Set the initial clock frequency for identification mode < 400kHz */ spi_setfrequency(NULL, 400000); diff --git a/boards/arm/lpc214x/zp214xpa/README.txt b/boards/arm/lpc214x/zp214xpa/README.txt index 2fe4f9bcb5f..22b8c3a390b 100644 --- a/boards/arm/lpc214x/zp214xpa/README.txt +++ b/boards/arm/lpc214x/zp214xpa/README.txt @@ -153,7 +153,7 @@ Using OpenOCD and GDB with an FT2232 JTAG emulator 2. Create a directory /home/OpenOCD. - 3. Get the FT2232 drivr from http://www.ftdichip.com/Drivers/D2XX.htm and + 3. Get the FT2232 driver from http://www.ftdichip.com/Drivers/D2XX.htm and extract it into /home/OpenOCD/ftd2xx $ pwd diff --git a/boards/arm/lpc214x/zp214xpa/src/lpc2148_spi1.c b/boards/arm/lpc214x/zp214xpa/src/lpc2148_spi1.c index 7786b593251..29eb82eb7a6 100644 --- a/boards/arm/lpc214x/zp214xpa/src/lpc2148_spi1.c +++ b/boards/arm/lpc214x/zp214xpa/src/lpc2148_spi1.c @@ -160,12 +160,12 @@ static sem_t g_exclsem = SEM_INITIALIZER(1); /* For mutually exclusive access * * Name: spi_lock * * Description: - * On SPI busses where there are multiple devices, it will be necessary to - * lock SPI to have exclusive access to the busses for a sequence of + * On SPI buses where there are multiple devices, it will be necessary to + * lock SPI to have exclusive access to the buses for a sequence of * transfers. The bus should be locked before the chip is selected. After * locking the SPI bus, the caller should then also call the setfrequency, * setbits, and setmode methods to make sure that the SPI is properly - * configured for the device. If the SPI buss is being shared, then it + * configured for the device. If the SPI bus is being shared, then it * may have been left in an incompatible state. * * Input Parameters: @@ -454,7 +454,7 @@ static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer, FAR const uint8_t *ptr = (FAR const uint8_t *)buffer; uint8_t sr; - /* Loop while thre are bytes remaining to be sent */ + /* Loop while there are bytes remaining to be sent */ spiinfo("nwords: %d\n", nwords); while (nwords > 0) @@ -649,7 +649,7 @@ FAR struct spi_dev_s *lpc214x_spibus_initialize(int port) putreg8(0, LPC214X_SPI1_CR1); putreg8(0, LPC214X_SPI1_IMSC); - /* Set the initial clock frequency for indentification mode < 400kHz */ + /* Set the initial clock frequency for identification mode < 400kHz */ spi_setfrequency(NULL, 400000); diff --git a/boards/arm/lpc214x/zp214xpa/src/lpc2148_ug2864ambag01.c b/boards/arm/lpc214x/zp214xpa/src/lpc2148_ug2864ambag01.c index 46dd14e69b9..aa66eb89e75 100644 --- a/boards/arm/lpc214x/zp214xpa/src/lpc2148_ug2864ambag01.c +++ b/boards/arm/lpc214x/zp214xpa/src/lpc2148_ug2864ambag01.c @@ -59,7 +59,7 @@ /* Configuration ************************************************************/ -/* The pin configurations here requires that SPI1 is avaialable */ +/* The pin configurations here requires that SPI1 is available */ /* SPI should be configured with CMD/DATA support (and no transfer methods) */ diff --git a/boards/arm/lpc31xx/ea3131/scripts/pg-ld.script b/boards/arm/lpc31xx/ea3131/scripts/pg-ld.script index ebff9f18033..1c4fb833f99 100644 --- a/boards/arm/lpc31xx/ea3131/scripts/pg-ld.script +++ b/boards/arm/lpc31xx/ea3131/scripts/pg-ld.script @@ -38,7 +38,7 @@ * 0x1102:9000. A 128b header will appear at this address (applied by * lpc313xImgCreator) and the executable code must begin at 0x1102:9080. * - * The .text vitual address space begins at the same location as the physical + * The .text virtual address space begins at the same location as the physical * address space: 0x1102 8000. The virtual space is broken up into three * regions: * diff --git a/boards/arm/lpc31xx/ea3131/src/lpc31_boot.c b/boards/arm/lpc31xx/ea3131/src/lpc31_boot.c index 8c89c9e7fbc..f19f76fbc64 100644 --- a/boards/arm/lpc31xx/ea3131/src/lpc31_boot.c +++ b/boards/arm/lpc31xx/ea3131/src/lpc31_boot.c @@ -66,7 +66,7 @@ * * Description: * All LPC31XX architectures must provide the following entry point. - * This entry point is called early in the intitialization -- after all + * This entry point is called early in the initialization -- after all * memory has been configured and mapped but before any devices have been * initialized. * diff --git a/boards/arm/lpc31xx/ea3131/src/lpc31_mem.c b/boards/arm/lpc31xx/ea3131/src/lpc31_mem.c index d7ff3876f81..f117e4934a0 100644 --- a/boards/arm/lpc31xx/ea3131/src/lpc31_mem.c +++ b/boards/arm/lpc31xx/ea3131/src/lpc31_mem.c @@ -170,7 +170,7 @@ static void lpc31_sdraminitialize(void) #endif /* Check RTL for divide by 2 possible. - * If so change then enable the followng logic + * If so change then enable the following logic */ #if 0 diff --git a/boards/arm/lpc31xx/ea3152/src/lpc31_boot.c b/boards/arm/lpc31xx/ea3152/src/lpc31_boot.c index ebb5f951a29..74632eb0257 100644 --- a/boards/arm/lpc31xx/ea3152/src/lpc31_boot.c +++ b/boards/arm/lpc31xx/ea3152/src/lpc31_boot.c @@ -66,7 +66,7 @@ * * Description: * All LPC31XX architectures must provide the following entry point. - * This entry point is called early in the intitialization -- after all + * This entry point is called early in the initialization -- after all * memory has been configured and mapped but before any devices have been * initialized. * diff --git a/boards/arm/lpc31xx/olimex-lpc-h3131/src/lpc31_boot.c b/boards/arm/lpc31xx/olimex-lpc-h3131/src/lpc31_boot.c index 7811cbfddff..91407c00f61 100644 --- a/boards/arm/lpc31xx/olimex-lpc-h3131/src/lpc31_boot.c +++ b/boards/arm/lpc31xx/olimex-lpc-h3131/src/lpc31_boot.c @@ -66,7 +66,7 @@ * * Description: * All LPC31XX architectures must provide the following entry point. - * This entry point is called early in the intitialization -- after all + * This entry point is called early in the initialization -- after all * memory has been configured and mapped but before any devices have been * initialized. * diff --git a/boards/arm/lpc43xx/bambino-200e/README.txt b/boards/arm/lpc43xx/bambino-200e/README.txt index 6316bc6d9a6..c8c15d28d16 100644 --- a/boards/arm/lpc43xx/bambino-200e/README.txt +++ b/boards/arm/lpc43xx/bambino-200e/README.txt @@ -305,7 +305,7 @@ Bambino-200e Configuration Options also require CONFIG_NET and CONFIG_LPC43_ETHERNET. CONFIG_ETH0_PHY_KS8721 - Selects Micrel KS8721 PHY - CONFIG_LPC43_AUTONEG - Enable auto-negotion + CONFIG_LPC43_AUTONEG - Enable auto-negotiation CONFIG_LPC17_40_EMACRAM_SIZE - Size of EMAC RAM. Default: 16Kb CONFIG_LPC43_ETH_NTXDESC - Configured number of Tx descriptors. Default: 18 @@ -517,7 +517,7 @@ Where is one of the following: CONFIG_SYSLOG_CHAR=y : Use a character device for system logging CONFIG_SYSLOG_DEVPATH="/dev/ttyS0" : UART1 will be /dev/ttyS0 - However, there is nothing to generate SYLOG output in the default + However, there is nothing to generate SYSLOG output in the default configuration so nothing should appear on UART1 unless you enable some debug output or enable the USB monitor. diff --git a/boards/arm/lpc43xx/bambino-200e/scripts/ramconfig.ld b/boards/arm/lpc43xx/bambino-200e/scripts/ramconfig.ld index 1f0250ff243..9de3608bb7a 100644 --- a/boards/arm/lpc43xx/bambino-200e/scripts/ramconfig.ld +++ b/boards/arm/lpc43xx/bambino-200e/scripts/ramconfig.ld @@ -47,7 +47,7 @@ * and the Cortex-M4 starts the boot loader. By default the JTAG access to the * chip is disabled at reset. The boot ROM determines the boot mode based on * the OTP BOOT_SRC value or reset state pins. For flash-based parts, the part - * boots from internal flash by default. Otherwse, the boot ROM copies the + * boots from internal flash by default. Otherwise, the boot ROM copies the * image to internal SRAM at location 0x1000 0000, sets the ARM's shadow * pointer to 0x1000 0000, and jumps to that location. * diff --git a/boards/arm/lpc43xx/bambino-200e/scripts/spificonfig.ld b/boards/arm/lpc43xx/bambino-200e/scripts/spificonfig.ld index b335a37a20d..5489b06897b 100644 --- a/boards/arm/lpc43xx/bambino-200e/scripts/spificonfig.ld +++ b/boards/arm/lpc43xx/bambino-200e/scripts/spificonfig.ld @@ -47,7 +47,7 @@ * and the Cortex-M4 starts the boot loader. By default the JTAG access to the * chip is disabled at reset. The boot ROM determines the boot mode based on * the OTP BOOT_SRC value or reset state pins. For flash-based parts, the part - * boots from internal flash by default. Otherwse, the boot ROM copies the + * boots from internal flash by default. Otherwise, the boot ROM copies the * image to internal SRAM at location 0x1000 0000, sets the ARM's shadow * pointer to 0x1000 0000, and jumps to that location. * diff --git a/boards/arm/lpc43xx/lpc4330-xplorer/README.txt b/boards/arm/lpc43xx/lpc4330-xplorer/README.txt index c34395b5e05..97d4f97b00b 100644 --- a/boards/arm/lpc43xx/lpc4330-xplorer/README.txt +++ b/boards/arm/lpc43xx/lpc4330-xplorer/README.txt @@ -556,7 +556,7 @@ LPC4330-Xplorer Configuration Options also require CONFIG_NET and CONFIG_LPC43_ETHERNET. CONFIG_ETH0_PHY_KS8721 - Selects Micrel KS8721 PHY - CONFIG_LPC43_AUTONEG - Enable auto-negotion + CONFIG_LPC43_AUTONEG - Enable auto-negotiation CONFIG_LPC17_40_EMACRAM_SIZE - Size of EMAC RAM. Default: 16Kb CONFIG_LPC43_ETH_NTXDESC - Configured number of Tx descriptors. Default: 18 diff --git a/boards/arm/lpc43xx/lpc4330-xplorer/scripts/ramconfig.ld b/boards/arm/lpc43xx/lpc4330-xplorer/scripts/ramconfig.ld index 0ce2a289699..165ce39c8c2 100644 --- a/boards/arm/lpc43xx/lpc4330-xplorer/scripts/ramconfig.ld +++ b/boards/arm/lpc43xx/lpc4330-xplorer/scripts/ramconfig.ld @@ -46,7 +46,7 @@ * and the Cortex-M4 starts the boot loader. By default the JTAG access to the * chip is disabled at reset. The boot ROM determines the boot mode based on * the OTP BOOT_SRC value or reset state pins. For flash-based parts, the part - * boots from internal flash by default. Otherwse, the boot ROM copies the + * boots from internal flash by default. Otherwise, the boot ROM copies the * image to internal SRAM at location 0x1000 0000, sets the ARM's shadow * pointer to 0x1000 0000, and jumps to that location. * diff --git a/boards/arm/lpc43xx/lpc4330-xplorer/scripts/spificonfig.ld b/boards/arm/lpc43xx/lpc4330-xplorer/scripts/spificonfig.ld index 324ab673497..dd4c317f3be 100644 --- a/boards/arm/lpc43xx/lpc4330-xplorer/scripts/spificonfig.ld +++ b/boards/arm/lpc43xx/lpc4330-xplorer/scripts/spificonfig.ld @@ -46,7 +46,7 @@ * and the Cortex-M4 starts the boot loader. By default the JTAG access to the * chip is disabled at reset. The boot ROM determines the boot mode based on * the OTP BOOT_SRC value or reset state pins. For flash-based parts, the part - * boots from internal flash by default. Otherwse, the boot ROM copies the + * boots from internal flash by default. Otherwise, the boot ROM copies the * image to internal SRAM at location 0x1000 0000, sets the ARM's shadow * pointer to 0x1000 0000, and jumps to that location. * diff --git a/boards/arm/lpc43xx/lpc4330-xplorer/src/lpc43_boot.c b/boards/arm/lpc43xx/lpc4330-xplorer/src/lpc43_boot.c index cb2934c3de7..e2522eb0941 100644 --- a/boards/arm/lpc43xx/lpc4330-xplorer/src/lpc43_boot.c +++ b/boards/arm/lpc43xx/lpc4330-xplorer/src/lpc43_boot.c @@ -66,7 +66,7 @@ * * Description: * All LPC43xx architectures must provide the following entry point. - * This entry point is called early in the intitialization -- after all + * This entry point is called early in the initialization -- after all * memory has been configured and mapped but before any devices have been * initialized. * diff --git a/boards/arm/lpc43xx/lpc4337-ws/README.txt b/boards/arm/lpc43xx/lpc4337-ws/README.txt index d70e9e07d91..66e5445f94e 100644 --- a/boards/arm/lpc43xx/lpc4337-ws/README.txt +++ b/boards/arm/lpc43xx/lpc4337-ws/README.txt @@ -595,7 +595,7 @@ LPC4337-ws Configuration Options also require CONFIG_NET and CONFIG_LPC43_ETHERNET. CONFIG_ETH0_PHY_KS8721 - Selects Micrel KS8721 PHY - CONFIG_LPC43__AUTONEG - Enable auto-negotion + CONFIG_LPC43__AUTONEG - Enable auto-negotiation CONFIG_LPC17_40_EMACRAM_SIZE - Size of EMAC RAM. Default: 16Kb CONFIG_LPC43_ETH_NTXDESC - Configured number of Tx descriptors. Default: 18 diff --git a/boards/arm/lpc43xx/lpc4337-ws/scripts/flashaconfig.ld b/boards/arm/lpc43xx/lpc4337-ws/scripts/flashaconfig.ld index 6632a319426..c1e84d69d04 100644 --- a/boards/arm/lpc43xx/lpc4337-ws/scripts/flashaconfig.ld +++ b/boards/arm/lpc43xx/lpc4337-ws/scripts/flashaconfig.ld @@ -46,7 +46,7 @@ * and the Cortex-M4 starts the boot loader. By default the JTAG access to the * chip is disabled at reset. The boot ROM determines the boot mode based on * the OTP BOOT_SRC value or reset state pins. For flash-based parts, the part - * boots from internal flash by default. Otherwse, the boot ROM copies the + * boots from internal flash by default. Otherwise, the boot ROM copies the * image to internal SRAM at location 0x1000 0000, sets the ARM's shadow * pointer to 0x1000 0000, and jumps to that location. * diff --git a/boards/arm/lpc43xx/lpc4337-ws/scripts/ramconfig.ld b/boards/arm/lpc43xx/lpc4337-ws/scripts/ramconfig.ld index 8a75f326fea..6b795d7af4a 100644 --- a/boards/arm/lpc43xx/lpc4337-ws/scripts/ramconfig.ld +++ b/boards/arm/lpc43xx/lpc4337-ws/scripts/ramconfig.ld @@ -46,7 +46,7 @@ * and the Cortex-M4 starts the boot loader. By default the JTAG access to the * chip is disabled at reset. The boot ROM determines the boot mode based on * the OTP BOOT_SRC value or reset state pins. For flash-based parts, the part - * boots from internal flash by default. Otherwse, the boot ROM copies the + * boots from internal flash by default. Otherwise, the boot ROM copies the * image to internal SRAM at location 0x1000 0000, sets the ARM's shadow * pointer to 0x1000 0000, and jumps to that location. * diff --git a/boards/arm/lpc43xx/lpc4337-ws/src/lpc43_boot.c b/boards/arm/lpc43xx/lpc4337-ws/src/lpc43_boot.c index 959f78d4885..47ad340a88d 100644 --- a/boards/arm/lpc43xx/lpc4337-ws/src/lpc43_boot.c +++ b/boards/arm/lpc43xx/lpc4337-ws/src/lpc43_boot.c @@ -58,7 +58,7 @@ * * Description: * All LPC43xx architectures must provide the following entry point. - * This entry point is called early in the intitialization -- after all + * This entry point is called early in the initialization -- after all * memory has been configured and mapped but before any devices have been * initialized. * diff --git a/boards/arm/lpc43xx/lpc4357-evb/README.txt b/boards/arm/lpc43xx/lpc4357-evb/README.txt index 108ec44cd06..1456c58a571 100644 --- a/boards/arm/lpc43xx/lpc4357-evb/README.txt +++ b/boards/arm/lpc43xx/lpc4357-evb/README.txt @@ -592,7 +592,7 @@ LPC4357-EVB Configuration Options also require CONFIG_NET and CONFIG_LPC43_ETHERNET. CONFIG_ETH0_PHY_KS8721 - Selects Micrel KS8721 PHY - CONFIG_LPC43_AUTONEG - Enable auto-negotion + CONFIG_LPC43_AUTONEG - Enable auto-negotiation CONFIG_LPC17_40_EMACRAM_SIZE - Size of EMAC RAM. Default: 16Kb CONFIG_LPC43_ETH_NTXDESC - Configured number of Tx descriptors. Default: 18 diff --git a/boards/arm/lpc43xx/lpc4357-evb/scripts/flashaconfig.ld b/boards/arm/lpc43xx/lpc4357-evb/scripts/flashaconfig.ld index 206acbf33ab..0d86cb0c3ed 100644 --- a/boards/arm/lpc43xx/lpc4357-evb/scripts/flashaconfig.ld +++ b/boards/arm/lpc43xx/lpc4357-evb/scripts/flashaconfig.ld @@ -46,7 +46,7 @@ * and the Cortex-M4 starts the boot loader. By default the JTAG access to the * chip is disabled at reset. The boot ROM determines the boot mode based on * the OTP BOOT_SRC value or reset state pins. For flash-based parts, the part - * boots from internal flash by default. Otherwse, the boot ROM copies the + * boots from internal flash by default. Otherwise, the boot ROM copies the * image to internal SRAM at location 0x1000 0000, sets the ARM's shadow * pointer to 0x1000 0000, and jumps to that location. * diff --git a/boards/arm/lpc43xx/lpc4357-evb/scripts/ramconfig.ld b/boards/arm/lpc43xx/lpc4357-evb/scripts/ramconfig.ld index 6fb50acee96..d6263677e54 100644 --- a/boards/arm/lpc43xx/lpc4357-evb/scripts/ramconfig.ld +++ b/boards/arm/lpc43xx/lpc4357-evb/scripts/ramconfig.ld @@ -46,7 +46,7 @@ * and the Cortex-M4 starts the boot loader. By default the JTAG access to the * chip is disabled at reset. The boot ROM determines the boot mode based on * the OTP BOOT_SRC value or reset state pins. For flash-based parts, the part - * boots from internal flash by default. Otherwse, the boot ROM copies the + * boots from internal flash by default. Otherwise, the boot ROM copies the * image to internal SRAM at location 0x1000 0000, sets the ARM's shadow * pointer to 0x1000 0000, and jumps to that location. * diff --git a/boards/arm/lpc43xx/lpc4357-evb/src/lpc43_boot.c b/boards/arm/lpc43xx/lpc4357-evb/src/lpc43_boot.c index 120a5a06513..eeabd9ce9e3 100644 --- a/boards/arm/lpc43xx/lpc4357-evb/src/lpc43_boot.c +++ b/boards/arm/lpc43xx/lpc4357-evb/src/lpc43_boot.c @@ -66,7 +66,7 @@ * * Description: * All LPC43xx architectures must provide the following entry point. - * This entry point is called early in the intitialization -- after all + * This entry point is called early in the initialization -- after all * memory has been configured and mapped but before any devices have been * initialized. * diff --git a/boards/arm/lpc43xx/lpc4370-link2/README.txt b/boards/arm/lpc43xx/lpc4370-link2/README.txt index 42314cabcac..412163b6f4f 100644 --- a/boards/arm/lpc43xx/lpc4370-link2/README.txt +++ b/boards/arm/lpc43xx/lpc4370-link2/README.txt @@ -595,7 +595,7 @@ LPC4370-Link2 Configuration Options also require CONFIG_NET and CONFIG_LPC43_ETHERNET. CONFIG_ETH0_PHY_KS8721 - Selects Micrel KS8721 PHY - CONFIG_LPC43_AUTONEG - Enable auto-negotion + CONFIG_LPC43_AUTONEG - Enable auto-negotiation CONFIG_LPC17_40_EMACRAM_SIZE - Size of EMAC RAM. Default: 16Kb CONFIG_LPC43_ETH_NTXDESC - Configured number of Tx descriptors. Default: 18 diff --git a/boards/arm/lpc43xx/lpc4370-link2/scripts/ramconfig.ld b/boards/arm/lpc43xx/lpc4370-link2/scripts/ramconfig.ld index 45ea870abf2..2afbccedf62 100644 --- a/boards/arm/lpc43xx/lpc4370-link2/scripts/ramconfig.ld +++ b/boards/arm/lpc43xx/lpc4370-link2/scripts/ramconfig.ld @@ -46,7 +46,7 @@ * and the Cortex-M4 starts the boot loader. By default the JTAG access to the * chip is disabled at reset. The boot ROM determines the boot mode based on * the OTP BOOT_SRC value or reset state pins. For flash-based parts, the part - * boots from internal flash by default. Otherwse, the boot ROM copies the + * boots from internal flash by default. Otherwise, the boot ROM copies the * image to internal SRAM at location 0x1000 0000, sets the ARM's shadow * pointer to 0x1000 0000, and jumps to that location. * diff --git a/boards/arm/lpc43xx/lpc4370-link2/scripts/spificonfig.ld b/boards/arm/lpc43xx/lpc4370-link2/scripts/spificonfig.ld index 9918dc27ede..8bea9385fe8 100644 --- a/boards/arm/lpc43xx/lpc4370-link2/scripts/spificonfig.ld +++ b/boards/arm/lpc43xx/lpc4370-link2/scripts/spificonfig.ld @@ -46,7 +46,7 @@ * and the Cortex-M4 starts the boot loader. By default the JTAG access to the * chip is disabled at reset. The boot ROM determines the boot mode based on * the OTP BOOT_SRC value or reset state pins. For flash-based parts, the part - * boots from internal flash by default. Otherwse, the boot ROM copies the + * boots from internal flash by default. Otherwise, the boot ROM copies the * image to internal SRAM at location 0x1000 0000, sets the ARM's shadow * pointer to 0x1000 0000, and jumps to that location. * diff --git a/boards/arm/lpc43xx/lpc4370-link2/src/lpc43_boot.c b/boards/arm/lpc43xx/lpc4370-link2/src/lpc43_boot.c index 833a998cd32..e1d963b419c 100644 --- a/boards/arm/lpc43xx/lpc4370-link2/src/lpc43_boot.c +++ b/boards/arm/lpc43xx/lpc4370-link2/src/lpc43_boot.c @@ -66,7 +66,7 @@ * * Description: * All LPC43xx architectures must provide the following entry point. - * This entry point is called early in the intitialization -- after all + * This entry point is called early in the initialization -- after all * memory has been configured and mapped but before any devices have been * initialized. * diff --git a/boards/arm/lpc54xx/lpcxpresso-lpc54628/include/board.h b/boards/arm/lpc54xx/lpcxpresso-lpc54628/include/board.h index e6db6d08d92..8e5dfa2d9f6 100644 --- a/boards/arm/lpc54xx/lpcxpresso-lpc54628/include/board.h +++ b/boards/arm/lpc54xx/lpcxpresso-lpc54628/include/board.h @@ -292,7 +292,7 @@ #define LED_PANIC 4 /* NC NC ON (2Hz flashing) */ #undef LED_IDLE /* Sleep mode indication not supported */ -/* After booting, LEDs D9 and D11 are avaible for use by the user. If the +/* After booting, LEDs D9 and D11 are available for use by the user. If the * system booted properly, D9 and D11 should be OFF and D12 should be glowing * to indicate that interrupts are occurring. If D12 is flash at 2Hz, then * the system has crashed. diff --git a/boards/arm/lpc54xx/lpcxpresso-lpc54628/src/lpc54_autoleds.c b/boards/arm/lpc54xx/lpcxpresso-lpc54628/src/lpc54_autoleds.c index 3178c6d2226..327b15fe5a9 100644 --- a/boards/arm/lpc54xx/lpcxpresso-lpc54628/src/lpc54_autoleds.c +++ b/boards/arm/lpc54xx/lpcxpresso-lpc54628/src/lpc54_autoleds.c @@ -54,7 +54,7 @@ * LED_PANIC 4 NC NC ON (2Hz flashing) * LED_IDLE Sleep mode indication not supported * - * After booting, LEDs D9 and D11 are avaible for use by the user. If the + * After booting, LEDs D9 and D11 are available for use by the user. If the * system booted properly, D9 and D11 should be OFF and D12 should be glowing * to indicate that interrupts are occurring. If D12 is flash at 2Hz, then * the system has crashed. diff --git a/boards/arm/lpc54xx/lpcxpresso-lpc54628/src/lpc54_ft5x06.c b/boards/arm/lpc54xx/lpcxpresso-lpc54628/src/lpc54_ft5x06.c index 859d865eb21..3a021c97f40 100644 --- a/boards/arm/lpc54xx/lpcxpresso-lpc54628/src/lpc54_ft5x06.c +++ b/boards/arm/lpc54xx/lpcxpresso-lpc54628/src/lpc54_ft5x06.c @@ -53,7 +53,7 @@ #ifdef HAVE_FT5x06 /**************************************************************************** - * Pre-processor Defintions + * Pre-processor Definitions ****************************************************************************/ #define FT5x06_FREQUENCY 400000 /* For now, will boost later */ diff --git a/boards/arm/lpc54xx/lpcxpresso-lpc54628/src/lpc54_lcd.c b/boards/arm/lpc54xx/lpcxpresso-lpc54628/src/lpc54_lcd.c index 97d06cc1a30..eca7c2ef1c6 100644 --- a/boards/arm/lpc54xx/lpcxpresso-lpc54628/src/lpc54_lcd.c +++ b/boards/arm/lpc54xx/lpcxpresso-lpc54628/src/lpc54_lcd.c @@ -82,6 +82,6 @@ void lpc54_lcd_initialize(void) #ifdef CONFIG_LPC54_LCD_BACKLIGHT void lpc54_backlight(bool blon) { - lpc54_gpio_write(GPIO_LCD_BL, blon); /* Hight illuminates */ + lpc54_gpio_write(GPIO_LCD_BL, blon); /* High illuminates */ } #endif diff --git a/boards/arm/nuc1xx/nutiny-nuc120/README.txt b/boards/arm/nuc1xx/nutiny-nuc120/README.txt index bd855a2565a..ee41df3b872 100644 --- a/boards/arm/nuc1xx/nutiny-nuc120/README.txt +++ b/boards/arm/nuc1xx/nutiny-nuc120/README.txt @@ -110,7 +110,7 @@ These pins are available on the NuTiny-SDC-NUC120 JP5. confusing! UART0 is an alternative that can be selected by modifying the default -configuation. UART0 RX (RXD0) is on PB.0, pin 17, and the TX signal (TXD0) +configuration. UART0 RX (RXD0) is on PB.0, pin 17, and the TX signal (TXD0) is on PB.1, pin 18. These pins are available on the NuTiny-SDC-NUC120 JP1. NOTE: PB.0, pin 17, is also used to control the user LED on board (labeled @@ -330,5 +330,5 @@ Where is one of the following: applications. Most of the memory used at runtime is allocated I/O buffers and the stack for the NSH main thread (1.5KB). - There is probably enough free memroy to support 3 or 4 application + There is probably enough free memory to support 3 or 4 application threads in addition to NSH. diff --git a/boards/arm/nuc1xx/nutiny-nuc120/src/nuc_boardinitialize.c b/boards/arm/nuc1xx/nutiny-nuc120/src/nuc_boardinitialize.c index 7896d0865e4..33c9083b4e0 100644 --- a/boards/arm/nuc1xx/nutiny-nuc120/src/nuc_boardinitialize.c +++ b/boards/arm/nuc1xx/nutiny-nuc120/src/nuc_boardinitialize.c @@ -63,7 +63,7 @@ * * Description: * All NUC1XX architectures must provide the following entry point. - * This entry point is called early in the intitialization -- after all + * This entry point is called early in the initialization -- after all * memory has been configured and mapped but before any devices have been * initialized. * diff --git a/boards/arm/s32k1xx/s32k118evb/README.txt b/boards/arm/s32k1xx/s32k118evb/README.txt index 56fc1f7747d..7e1953f7545 100644 --- a/boards/arm/s32k1xx/s32k118evb/README.txt +++ b/boards/arm/s32k1xx/s32k118evb/README.txt @@ -137,5 +137,5 @@ Configurations for builtin applications is enabled, but in the base configuration no builtin applications are selected. - NOTE: This is a very minimal NSH configuration in order to recude + NOTE: This is a very minimal NSH configuration in order to reduce memory usage. Most of the NSH niceties are not available. diff --git a/boards/arm/s32k1xx/s32k148evb/README.txt b/boards/arm/s32k1xx/s32k148evb/README.txt index 3cb84c19171..4052018cd45 100644 --- a/boards/arm/s32k1xx/s32k148evb/README.txt +++ b/boards/arm/s32k1xx/s32k148evb/README.txt @@ -16,7 +16,7 @@ Status ====== 2019-08-20: NSH configuration created but entirely untested. - 2019-08-24: NSH configuratin verified running from FLASH. + 2019-08-24: NSH configuration verified running from FLASH. TODO: Need calibrate the delay loop. The current value of CONFIG_BOARD_LOOPSPERMSEC is a bogus value retained from a copy-paste diff --git a/boards/arm/sam34/arduino-due/README.txt b/boards/arm/sam34/arduino-due/README.txt index e6506b981d9..56049fe7359 100644 --- a/boards/arm/sam34/arduino-due/README.txt +++ b/boards/arm/sam34/arduino-due/README.txt @@ -325,7 +325,7 @@ Serial Consoles The outputs from these pins is 3.3V. You will need to connect RS232 transceiver to get the signals to RS232 levels (or connect to the - USB virual COM port in the case of UART0). + USB virtual COM port in the case of UART0). Loading Code ============ @@ -352,7 +352,7 @@ Loading Code 3. The Windows driver installation should fail. - 4. Open the Device Manger + 4. Open the Device Manager 5. Look for the listing named "Ports (COM & LPT)". You should see an open port named "Arduino Due Prog. Port". Right click and select "Update diff --git a/boards/arm/sam34/flipnclick-sam3x/README.txt b/boards/arm/sam34/flipnclick-sam3x/README.txt index 9845067780c..fa80083c2ca 100644 --- a/boards/arm/sam34/flipnclick-sam3x/README.txt +++ b/boards/arm/sam34/flipnclick-sam3x/README.txt @@ -235,7 +235,7 @@ Loading Code 3. The Windows driver installation should fail. - 4. Open the Device Manger + 4. Open the Device Manager 5. Look for the listing named "Ports (COM & LPT)". You should see an open port named "Arduino Due Prog. Port". Right click and select "Update diff --git a/boards/arm/sam34/sam3u-ek/README.txt b/boards/arm/sam34/sam3u-ek/README.txt index 774b888327a..ede947c4c65 100644 --- a/boards/arm/sam34/sam3u-ek/README.txt +++ b/boards/arm/sam34/sam3u-ek/README.txt @@ -368,7 +368,7 @@ Configurations Binary Formats: CONFIG_BUILTIN=y : Enable support for built-in programs - Applicaton Configuration: + Application Configuration: CONFIG_NSH_BUILTIN_APPS=y : Enable starting apps from NSH command line 2. This configuration has been used for verifying the touchscreen on @@ -400,7 +400,7 @@ Configurations Library Support: CONFIG_SCHED_WORKQUEUE=y : Work queue support required - Applicaton Configuration: + Application Configuration: CONFIG_EXAMPLES_TOUCHSCREEN=y : Enable the touchscreen built-int test Defaults should be okay for related touchscreen settings. Touchscreen @@ -462,7 +462,7 @@ Configurations The NxWM window manager is a tiny window manager tailored for use with smaller LCDs. It supports a toolchain, a start window, and multiple application windows. However, to make the best use of - the visible LCD space, only one application window is visiable at + the visible LCD space, only one application window is visible at at time. The NxWM window manager can be found here: diff --git a/boards/arm/sam34/sam3u-ek/src/sam_boot.c b/boards/arm/sam34/sam3u-ek/src/sam_boot.c index 76ef7a1f703..cbbbf4f7285 100644 --- a/boards/arm/sam34/sam3u-ek/src/sam_boot.c +++ b/boards/arm/sam34/sam3u-ek/src/sam_boot.c @@ -64,7 +64,7 @@ * * Description: * All SAM3U architectures must provide the following entry point. - * This entry point is called early in the intitialization -- after all + * This entry point is called early in the initialization -- after all * memory has been configured and mapped but before any devices have been * initialized. * diff --git a/boards/arm/sam34/sam3u-ek/src/sam_lcd.c b/boards/arm/sam34/sam3u-ek/src/sam_lcd.c index 35d096c3cee..f657bdbcdb4 100644 --- a/boards/arm/sam34/sam3u-ek/src/sam_lcd.c +++ b/boards/arm/sam34/sam3u-ek/src/sam_lcd.c @@ -359,7 +359,7 @@ static int sam_setcontrast(struct lcd_dev_s *dev, unsigned int contrast); /* This is working memory allocated by the LCD driver for each LCD device * and for each color plane. This memory will hold one raster line of data. - * The size of the allocated run buffer must therefor be at least + * The size of the allocated run buffer must therefore be at least * (bpp * xres / 8). Actual alignment of the buffer must conform to the * bitwidth of the underlying pixel type. * @@ -626,7 +626,7 @@ static int sam_putrun(fb_coord_t row, fb_coord_t col, } #else /* Write the run to GRAM. - * Because rows and colums are swapped, we need to reset + * Because rows and columns are swapped, we need to reset * the cursor position for every pixel. We could do this much faster if we * adapted to the strange device aspect ratio. */ @@ -693,7 +693,7 @@ static int sam_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer, *run++ = sam_rdram(); } #else - /* Read the run from GRAM Because rows and colums are swapped, we need to + /* Read the run from GRAM Because rows and columns are swapped, we need to * reset the cursor position for every pixel. * We could do this much faster if we adapted to the strange device aspect * ratio. @@ -1075,7 +1075,7 @@ FAR struct lcd_dev_s *board_lcd_getdev(int lcddev) * Name: board_lcd_uninitialize * * Description: - * Unitialize the framebuffer support. + * Uninitialize the framebuffer support. * ****************************************************************************/ diff --git a/boards/arm/sam34/sam4cmp-db/src/sam_boot.c b/boards/arm/sam34/sam4cmp-db/src/sam_boot.c index 56b5cd8b770..13db4353bf4 100644 --- a/boards/arm/sam34/sam4cmp-db/src/sam_boot.c +++ b/boards/arm/sam34/sam4cmp-db/src/sam_boot.c @@ -54,7 +54,7 @@ * * Description: * All SAM3/4 architectures must provide the following entry point. - * This entry point is called early in the intitialization -- after all + * This entry point is called early in the initialization -- after all * memory has been configured and mapped but before any devices have been * initialized. * diff --git a/boards/arm/sam34/sam4e-ek/README.txt b/boards/arm/sam34/sam4e-ek/README.txt index c3fc3c928ab..a7b0edbc308 100644 --- a/boards/arm/sam34/sam4e-ek/README.txt +++ b/boards/arm/sam34/sam4e-ek/README.txt @@ -1117,7 +1117,7 @@ Configurations Binary Formats: CONFIG_BUILTIN=y : Enable support for built-in programs - Applicaton Configuration: + Application Configuration: CONFIG_NSH_BUILTIN_APPS=y : Enable starting apps from NSH command line 4. This configuration has the network enabled by default. This can be @@ -1345,7 +1345,7 @@ Configurations CONFIG_SYSLOG_CHAR=y : Use a character device for system logging CONFIG_SYSLOG_DEVPATH="/dev/ttyS0" : UART0 will be /dev/ttyS0 - However, there is nothing to generate SYLOG output in the default + However, there is nothing to generate SYSLOG output in the default configuration so nothing should appear on UART0 unless you enable some debug output or enable the USB monitor. diff --git a/boards/arm/sam34/sam4l-xplained/README.txt b/boards/arm/sam34/sam4l-xplained/README.txt index 1fb71b69844..3068d741963 100644 --- a/boards/arm/sam34/sam4l-xplained/README.txt +++ b/boards/arm/sam34/sam4l-xplained/README.txt @@ -48,7 +48,7 @@ Modules ----------------- -------------------- -------------------- ------------------------------------ 1 ID 1 1 2 GND 2 GND 2 - 3 LIGHTSENSOR 3 PA04 ADCIFE/AD0 3 PA07 ADCIFE/AD2 + 3 LIGHT_SENSOR 3 PA04 ADCIFE/AD0 3 PA07 ADCIFE/AD2 4 LP_OUT 4 PA05 ADCIFE/AD1 4 PB02 ADCIFE/AD3 5 GPIO1 5 PB12 GPIO 5 PC08 GPIO PB12 and PC8 on EXT5 6 GPIO2 6 PC02 GPIO 6 PB10 GPIO PB10 on EXT5 @@ -217,7 +217,7 @@ Serial Consoles 19 19 GND 20 20 VCC - If you have a TTL to RS-232 convertor then this is the most convenient + If you have a TTL to RS-232 converter then this is the most convenient serial console to use. It is the default in all of these configurations. An option is to use the virtual COM port. @@ -618,7 +618,7 @@ Configuration sub-directories CONFIG_EXAMPLES_NXHELLO_BPP=1 : One bit per pixel CONFIG_EXAMPLES_NXHELLO_EXTERNINIT=y : Special initialization is required. - * The OLED is monochrome so the only "colors" are blacka nd white. + * The OLED is monochrome so the only "colors" are black and white. The default "colors" will give you while text on a black background. You can override the faults it you want black text on a while background. diff --git a/boards/arm/sam34/sam4l-xplained/src/sam_boot.c b/boards/arm/sam34/sam4l-xplained/src/sam_boot.c index a3ec55f409e..54a5d973490 100644 --- a/boards/arm/sam34/sam4l-xplained/src/sam_boot.c +++ b/boards/arm/sam34/sam4l-xplained/src/sam_boot.c @@ -62,7 +62,7 @@ * * Description: * All SAM3U architectures must provide the following entry point. - * This entry point is called early in the intitialization -- after all + * This entry point is called early in the initialization -- after all * memory has been configured and mapped but before any devices have been * initialized. * diff --git a/boards/arm/sam34/sam4l-xplained/src/sam_slcd.c b/boards/arm/sam34/sam4l-xplained/src/sam_slcd.c index 5d60fde5942..f9ed444d29d 100644 --- a/boards/arm/sam34/sam4l-xplained/src/sam_slcd.c +++ b/boards/arm/sam34/sam4l-xplained/src/sam_slcd.c @@ -538,7 +538,7 @@ static uint8_t slcd_getcontrast(void) uint32_t ucontrast; int32_t scontrast; - /* Get the current contast value */ + /* Get the current contrast value */ regval = getreg32(SAM_LCDCA_CFG); ucontrast = (regval & LCDCA_CFG_FCST_MASK) >> LCDCA_CFG_FCST_SHIFT; @@ -588,7 +588,7 @@ static int slcd_setcontrast(unsigned int contrast) scontrast = (int)contrast - 32; - /* Set the new contast value */ + /* Set the new contrast value */ regval = getreg32(SAM_LCDCA_CFG); regval &= ~LCDCA_CFG_FCST_MASK; @@ -1152,7 +1152,7 @@ static int slcd_poll(FAR struct file *filep, FAR struct pollfd *fds, { if (setup) { - /* Data is always avaialble to be read / Data can always be written */ + /* Data is always available to be read / Data can always be written */ fds->revents |= (fds->events & (POLLIN | POLLOUT)); if (fds->revents != 0) diff --git a/boards/arm/sam34/sam4s-xplained-pro/README.txt b/boards/arm/sam34/sam4s-xplained-pro/README.txt index 192cf157dee..9bd8de27bd6 100644 --- a/boards/arm/sam34/sam4s-xplained-pro/README.txt +++ b/boards/arm/sam34/sam4s-xplained-pro/README.txt @@ -115,7 +115,7 @@ Serial Consoles UART1 ----- - If you have a TTL to RS-232 convertor then this is the most convenient + If you have a TTL to RS-232 converter then this is the most convenient serial console to use. UART1 is the default in all of these configurations. diff --git a/boards/arm/sam34/sam4s-xplained-pro/src/sam_wdt.c b/boards/arm/sam34/sam4s-xplained-pro/src/sam_wdt.c index 757d1e5d70a..d980e9466e4 100644 --- a/boards/arm/sam34/sam4s-xplained-pro/src/sam_wdt.c +++ b/boards/arm/sam34/sam4s-xplained-pro/src/sam_wdt.c @@ -155,7 +155,7 @@ int sam_watchdog_initialize(void) FAR struct file filestruct; int ret; - /* Initialize tha register the watchdog timer device */ + /* Initialize the watchdog timer device */ wdinfo("Initializing Watchdog driver...\n"); diff --git a/boards/arm/sam34/sam4s-xplained/README.txt b/boards/arm/sam34/sam4s-xplained/README.txt index 347c8d5fa13..16939083311 100644 --- a/boards/arm/sam34/sam4s-xplained/README.txt +++ b/boards/arm/sam34/sam4s-xplained/README.txt @@ -114,7 +114,7 @@ Serial Consoles UART1 ----- - If you have a TTL to RS-232 convertor then this is the most convenient + If you have a TTL to RS-232 converter then this is the most convenient serial console to use. UART1 is the default in all of these configurations. diff --git a/boards/arm/sam34/sam4s-xplained/src/sam_boot.c b/boards/arm/sam34/sam4s-xplained/src/sam_boot.c index aab2bfa9300..39918ad3fdb 100644 --- a/boards/arm/sam34/sam4s-xplained/src/sam_boot.c +++ b/boards/arm/sam34/sam4s-xplained/src/sam_boot.c @@ -62,7 +62,7 @@ * * Description: * All SAM3U architectures must provide the following entry point. - * This entry point is called early in the intitialization -- after all + * This entry point is called early in the initialization -- after all * memory has been configured and mapped but before any devices have been * initialized. * diff --git a/boards/arm/sama5/sama5d2-xult/README.txt b/boards/arm/sama5/sama5d2-xult/README.txt index 8b85937cbf8..a171291e8cf 100644 --- a/boards/arm/sama5/sama5d2-xult/README.txt +++ b/boards/arm/sama5/sama5d2-xult/README.txt @@ -144,7 +144,7 @@ REVISIT: Unverified, cloned text from the SAMA5D4-EK README.txt 0x0000:0000 - 0x0003:ffff: AT91BootStrap 0x0004:0000 - 0x000b:ffff: U-Boot 0x000c:0000 - 0x000f:ffff: U-Boot environment - 0x0010:0000 - 0x0017:ffff: U-Boot environement redundant + 0x0010:0000 - 0x0017:ffff: U-Boot environment redundant 0x0018:0000 - 0x001f:ffff: Device tree (DTB) 0x0020:0000 - 0x007f:ffff: NuttX 0x0080:0000 - end: Available for use as a NAND file system diff --git a/boards/arm/sama5/sama5d3-xplained/README.txt b/boards/arm/sama5/sama5d3-xplained/README.txt index c1ca4964d33..ce9c2f3e522 100644 --- a/boards/arm/sama5/sama5d3-xplained/README.txt +++ b/boards/arm/sama5/sama5d3-xplained/README.txt @@ -110,7 +110,7 @@ GNU Toolchain Options CONFIG_ARMV7A_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery under Windows CONFIG_ARMV7A_TOOLCHAIN_CODESOURCERYL=y : CodeSourcery under Linux - CONFIG_ARMV7A_TOOLCHAIN_ATOLLIC=y : Atollic toolchain for Windos + CONFIG_ARMV7A_TOOLCHAIN_ATOLLIC=y : Atollic toolchain for Windows CONFIG_ARMV7A_TOOLCHAIN_DEVKITARM=y : devkitARM under Windows CONFIG_ARMV7A_TOOLCHAIN_BUILDROOT=y : NuttX buildroot under Linux or Cygwin (default) CONFIG_ARMV7A_TOOLCHAIN_GNU_EABIL=y : Generic GCC ARM EABI toolchain for Linux @@ -402,7 +402,7 @@ NAND FLASH Memory Map 0x0000:0000 - 0x0003:ffff: AT91BootStrap 0x0004:0000 - 0x000b:ffff: U-Boot 0x000c:0000 - 0x000f:ffff: U-Boot environment - 0x0010:0000 - 0x0017:ffff: U-Boot environement redundant + 0x0010:0000 - 0x0017:ffff: U-Boot environment redundant 0x0018:0000 - 0x001f:ffff: Device tree (DTB) 0x0020:0000 - 0x007f:ffff: NuttX 0x0080:0000 - end: Available for use as a NAND file system @@ -495,7 +495,7 @@ Programming U-Boot - Press the "Send File" button - Close SAM-BA, remove the USB Device cable. - You should now be able to interrupt with U-Boot vie the DBGU interface. + You should now be able to interrupt with U-Boot via the DBGU interface. Load NuttX with U-Boot on AT91 boards ------------------------------------- @@ -1008,7 +1008,7 @@ Networking - One other thing: UDP support is required (CONFIG_NET_UDP). - Given those prerequisites, the newtork monitor can be selected with these additional settings. + Given those prerequisites, the network monitor can be selected with these additional settings. Networking Support -> Networking Device Support CONFIG_NETDEV_PHY_IOCTL=y : Enable PHY ioctl support @@ -1572,7 +1572,7 @@ file1: CONFIG_USBHOST_ISOC_DISABLE=y Drivers -> USB Host Driver Support CONFIG_USBHOST_HUB=y : Enable the hub class - CONFIG_USBHOST_ASYNCH=y : Asynchonous I/O supported needed for hubs + CONFIG_USBHOST_ASYNCH=y : Asynchronous I/O supported needed for hubs System Type -> USB High Speed Host driver options CONFIG_SAMA5_OHCI_NEDS=12 : You will probably want more pipes @@ -2153,7 +2153,7 @@ I2C Tool Where is one of: Show help : ? - List busses : bus + List buses : bus List devices : dev [OPTIONS] Read register : get [OPTIONS] [] Show help : help @@ -2177,7 +2177,7 @@ I2C Tool o The I2C dev command may have bad side effects on your I2C devices. Use only at your own risk. - As an example, the I2C dev comman can be used to list all devices + As an example, the I2C dev command can be used to list all devices responding on TWI0 (the default) like this: nsh> i2c dev 0x03 0x77 diff --git a/boards/arm/sama5/sama5d3-xplained/src/sam_boot.c b/boards/arm/sama5/sama5d3-xplained/src/sam_boot.c index 7ae4185087b..621a74e7610 100644 --- a/boards/arm/sama5/sama5d3-xplained/src/sam_boot.c +++ b/boards/arm/sama5/sama5d3-xplained/src/sam_boot.c @@ -63,7 +63,7 @@ * * Description: * All SAMA5 architectures must provide the following entry point. - * This entry point is called early in the intitialization -- after all + * This entry point is called early in the initialization -- after all * memory has been configured and mapped but before any devices have been * initialized. * diff --git a/boards/arm/sama5/sama5d3-xplained/src/sam_hsmci.c b/boards/arm/sama5/sama5d3-xplained/src/sam_hsmci.c index f55d9a91105..a28764202b5 100644 --- a/boards/arm/sama5/sama5d3-xplained/src/sam_hsmci.c +++ b/boards/arm/sama5/sama5d3-xplained/src/sam_hsmci.c @@ -97,7 +97,7 @@ struct sam_hsmci_state_s { struct sdio_dev_s *hsmci; /* R/W device handle */ - pio_pinset_t pincfg; /* Card detect PIO pin configuratin */ + pio_pinset_t pincfg; /* Card detect PIO pin configuration */ uint8_t irq; /* Interrupt number (same as pid) */ uint8_t slotno; /* Slot number */ bool cd; /* TRUE: card is inserted */ diff --git a/boards/arm/sama5/sama5d3-xplained/src/sam_sdram.c b/boards/arm/sama5/sama5d3-xplained/src/sam_sdram.c index d8c7ce541f7..0aced382521 100644 --- a/boards/arm/sama5/sama5d3-xplained/src/sam_sdram.c +++ b/boards/arm/sama5/sama5d3-xplained/src/sam_sdram.c @@ -310,7 +310,7 @@ void sam_sdram_config(void) MPDDRC_CR_UNAL; /* upport Unaligned Access */ #else -# error Unknwon SDRAM type +# error Unknown SDRAM type #endif putreg32(regval, SAM_MPDDRC_CR); diff --git a/boards/arm/sama5/sama5d3x-ek/README.txt b/boards/arm/sama5/sama5d3x-ek/README.txt index f6fb4a333f2..6d899bf2dc4 100644 --- a/boards/arm/sama5/sama5d3x-ek/README.txt +++ b/boards/arm/sama5/sama5d3x-ek/README.txt @@ -132,7 +132,7 @@ GNU Toolchain Options CONFIG_ARMV7A_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery under Windows CONFIG_ARMV7A_TOOLCHAIN_CODESOURCERYL=y : CodeSourcery under Linux - CONFIG_ARMV7A_TOOLCHAIN_ATOLLIC=y : Atollic toolchain for Windos + CONFIG_ARMV7A_TOOLCHAIN_ATOLLIC=y : Atollic toolchain for Windows CONFIG_ARMV7A_TOOLCHAIN_DEVKITARM=y : devkitARM under Windows CONFIG_ARMV7A_TOOLCHAIN_BUILDROOT=y : NuttX buildroot under Linux or Cygwin (default) CONFIG_ARMV7A_TOOLCHAIN_GNU_EABIL=y : Generic GCC ARM EABI toolchain for Linux @@ -543,7 +543,7 @@ DRAMBOOT The boards/arm/sama5/sama5d4-ek/README.txt also describes variants AT25BOOT and SRAMBOOT. This have not been ported to the SAMA5D3x-EK, but are available - if they are usefult too you. + if they are useful too you. NAND FLASH Memory Map --------------------- @@ -553,7 +553,7 @@ NAND FLASH Memory Map 0x0000:0000 - 0x0003:ffff: AT91BootStrap 0x0004:0000 - 0x000b:ffff: U-Boot 0x000c:0000 - 0x000f:ffff: U-Boot environment - 0x0010:0000 - 0x0017:ffff: U-Boot environement redundant + 0x0010:0000 - 0x0017:ffff: U-Boot environment redundant 0x0018:0000 - 0x001f:ffff: Device tree (DTB) 0x0020:0000 - 0x007f:ffff: NuttX 0x0080:0000 - end: Available for use as a NAND file system @@ -646,7 +646,7 @@ Programming U-Boot - Press the "Send File" button - Close SAM-BA, remove the USB Device cable. - You should now be able to interrupt with U-Boot vie the DBGU interface. + You should now be able to interrupt with U-Boot via the DBGU interface. Load NuttX with U-Boot on AT91 boards ------------------------------------- @@ -1148,7 +1148,7 @@ Networking - One other thing: UDP support is required (CONFIG_NET_UDP). - Given those prerequisites, the newtork monitor can be selected with these additional settings. + Given those prerequisites, the network monitor can be selected with these additional settings. Networking Support -> Networking Device Support CONFIG_NETDEV_PHY_IOCTL=y : Enable PHY ioctl support @@ -1628,7 +1628,7 @@ USB High-Speed Host Drivers -> USB Host Driver Support CONFIG_USBHOST_HUB=y : Enable the hub class - CONFIG_USBHOST_ASYNCH=y : Asynchonous I/O supported needed for hubs + CONFIG_USBHOST_ASYNCH=y : Asynchronous I/O supported needed for hubs System Type -> USB High Speed Host driver options CONFIG_SAMA5_OHCI_NEDS=12 : You will probably want more pipes @@ -2318,7 +2318,7 @@ I2C Tool Where is one of: Show help : ? - List busses : bus + List buses : bus List devices : dev [OPTIONS] Read register : get [OPTIONS] [] Show help : help @@ -2342,7 +2342,7 @@ I2C Tool o The I2C dev command may have bad side effects on your I2C devices. Use only at your own risk. - As an example, the I2C dev comman can be used to list all devices + As an example, the I2C dev command can be used to list all devices responding on TWI0 (the default) like this: nsh> i2c dev 0x03 0x77 @@ -3651,7 +3651,7 @@ Configurations configuration settings. 15. You can enable the touchscreen and a touchscreen by following the - configuration instrcutions in the section entitled "Touchscreen + configuration instructions in the section entitled "Touchscreen Testing" above. 16. The Real Time Clock/Calendar (RTC) may be enabled by reconfiguring NuttX. diff --git a/boards/arm/sama5/sama5d3x-ek/Using-NxPlayer.txt b/boards/arm/sama5/sama5d3x-ek/Using-NxPlayer.txt index bb71e27c8d6..a8c11319f8e 100644 --- a/boards/arm/sama5/sama5d3x-ek/Using-NxPlayer.txt +++ b/boards/arm/sama5/sama5d3x-ek/Using-NxPlayer.txt @@ -1,7 +1,7 @@ Using the Binaries: ================== -Prequisites: +Prerequisites: =========== 1. SAMA5D3x-EK board and power supply @@ -21,7 +21,7 @@ Procedure: 4. Set the boot jumper to boot from NOR FLASH -5. NSH shouls start +5. NSH should start NuttShell (NSH) NuttX-7.3 nsh> diff --git a/boards/arm/sama5/sama5d3x-ek/scripts/pg-sram.ld b/boards/arm/sama5/sama5d3x-ek/scripts/pg-sram.ld index 8c640146119..d0654334960 100644 --- a/boards/arm/sama5/sama5d3x-ek/scripts/pg-sram.ld +++ b/boards/arm/sama5/sama5d3x-ek/scripts/pg-sram.ld @@ -34,7 +34,7 @@ ****************************************************************************/ /* The SAMA5D3 has 128 KB of ISRAM beginning at virtual address 0x0030:0000. - * The .text vitual address space begins at the same location as the physical + * The .text virtual address space begins at the same location as the physical * address space: 0x0030:0000. The virtual space is broken up into three * regions: * diff --git a/boards/arm/sama5/sama5d3x-ek/src/sam_hsmci.c b/boards/arm/sama5/sama5d3x-ek/src/sam_hsmci.c index 8b1beb4b265..025b298f1e2 100644 --- a/boards/arm/sama5/sama5d3x-ek/src/sam_hsmci.c +++ b/boards/arm/sama5/sama5d3x-ek/src/sam_hsmci.c @@ -98,7 +98,7 @@ struct sam_hsmci_state_s { struct sdio_dev_s *hsmci; /* R/W device handle */ - pio_pinset_t pincfg; /* Card detect PIO pin configuratin */ + pio_pinset_t pincfg; /* Card detect PIO pin configuration */ uint8_t irq; /* Interrupt number (same as pid) */ uint8_t slotno; /* Slot number */ bool cd; /* TRUE: card is inserted */ diff --git a/boards/arm/sama5/sama5d3x-ek/src/sam_norflash.c b/boards/arm/sama5/sama5d3x-ek/src/sam_norflash.c index eca22f692e1..6c425367bdf 100644 --- a/boards/arm/sama5/sama5d3x-ek/src/sam_norflash.c +++ b/boards/arm/sama5/sama5d3x-ek/src/sam_norflash.c @@ -80,7 +80,7 @@ * allows execution of the code contained into the memory connected to * Chip Select 0 of the External Bus Interface. * - * "To achieve that, the following sequence is preformed by the ROM + * "To achieve that, the following sequence is performed by the ROM * Code: * * - The main clock is the on-chip 12 MHz RC oscillator, diff --git a/boards/arm/sama5/sama5d3x-ek/src/sam_sdram.c b/boards/arm/sama5/sama5d3x-ek/src/sam_sdram.c index 6dfd036321c..a0020151a2c 100644 --- a/boards/arm/sama5/sama5d3x-ek/src/sam_sdram.c +++ b/boards/arm/sama5/sama5d3x-ek/src/sam_sdram.c @@ -308,7 +308,7 @@ void sam_sdram_config(void) MPDDRC_CR_UNAL; /* upport Unaligned Access */ #else -# error Unknwon SDRAM type +# error Unknown SDRAM type #endif putreg32(regval, SAM_MPDDRC_CR); diff --git a/boards/arm/sama5/sama5d4-ek/README.txt b/boards/arm/sama5/sama5d4-ek/README.txt index b8fa8e957e2..6843b9c858d 100644 --- a/boards/arm/sama5/sama5d4-ek/README.txt +++ b/boards/arm/sama5/sama5d4-ek/README.txt @@ -126,7 +126,7 @@ GNU Toolchain Options CONFIG_ARMV7A_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery under Windows CONFIG_ARMV7A_TOOLCHAIN_CODESOURCERYL=y : CodeSourcery under Linux - CONFIG_ARMV7A_TOOLCHAIN_ATOLLIC=y : Atollic toolchain for Windos + CONFIG_ARMV7A_TOOLCHAIN_ATOLLIC=y : Atollic toolchain for Windows CONFIG_ARMV7A_TOOLCHAIN_DEVKITARM=y : devkitARM under Windows CONFIG_ARMV7A_TOOLCHAIN_BUILDROOT=y : NuttX buildroot under Linux or Cygwin (default) CONFIG_ARMV7A_TOOLCHAIN_GNU_EABIL=y : Generic GCC ARM EABI toolchain for Linux @@ -600,7 +600,7 @@ Running NuttX from SDRAM 0x0000:0000 - 0x0003:ffff: AT91BootStrap 0x0004:0000 - 0x000b:ffff: U-Boot 0x000c:0000 - 0x000f:ffff: U-Boot environment - 0x0010:0000 - 0x0017:ffff: U-Boot environement redundant + 0x0010:0000 - 0x0017:ffff: U-Boot environment redundant 0x0018:0000 - 0x001f:ffff: Device tree (DTB) 0x0020:0000 - 0x007f:ffff: NuttX 0x0080:0000 - end: Available for use as a NAND file system @@ -659,7 +659,7 @@ Running NuttX from SDRAM http://www.at91.com/linux4sam/bin/view/Linux4SAM/U-Boot#Build_U_Boot_from_sources - A pre-Built binay image is available here: + A pre-Built binary image is available here: ftp://www.at91.com/pub/uboot/u-boot-v2013.07/u-boot-sama5d3_xplained-v2013.07-at91-r1.bin @@ -693,7 +693,7 @@ Running NuttX from SDRAM - Press the "Send File" button - Close SAM-BA, remove the USB Device cable. - You should now be able to interrupt with U-Boot vie the DBGU interface. + You should now be able to interrupt with U-Boot via the DBGU interface. Load NuttX with U-Boot on AT91 boards ------------------------------------- @@ -2001,7 +2001,7 @@ USB High-Speed Host Drivers -> USB Host Driver Support CONFIG_USBHOST_HUB=y : Enable the hub class - CONFIG_USBHOST_ASYNCH=y : Asynchonous I/O supported needed for hubs + CONFIG_USBHOST_ASYNCH=y : Asynchronous I/O supported needed for hubs System Type -> USB High Speed Host driver options CONFIG_SAMA5_OHCI_NEDS=12 : You will probably want more OHCI pipes @@ -2581,7 +2581,7 @@ I2C Tool Where is one of: Show help : ? - List busses : bus + List buses : bus List devices : dev [OPTIONS] Read register : get [OPTIONS] [] Show help : help diff --git a/boards/arm/sama5/sama5d4-ek/RunningNxWM.txt b/boards/arm/sama5/sama5d4-ek/RunningNxWM.txt index e3fb5d23c82..eeb06e5b7fa 100644 --- a/boards/arm/sama5/sama5d4-ek/RunningNxWM.txt +++ b/boards/arm/sama5/sama5d4-ek/RunningNxWM.txt @@ -1,6 +1,6 @@ Simplified instructions for Running the NxWM Demo: -Prequisites: +Prerequisites: =========== 1. SAMA5D4-MB Rev. C board and power supply @@ -86,7 +86,7 @@ each boot. After that the Demo will start. The opening screen will show a taskbar and tray to the left and the background with the NuttX logo. -Touching the triange button in the taskbar will bring up the Start Window. +Touching the triangle button in the taskbar will bring up the Start Window. The start window holds icons for each installed application. For this demo the following icons will be visible: diff --git a/boards/arm/sama5/sama5d4-ek/src/sam_sdram.c b/boards/arm/sama5/sama5d4-ek/src/sam_sdram.c index 868827533f1..49585a23e02 100644 --- a/boards/arm/sama5/sama5d4-ek/src/sam_sdram.c +++ b/boards/arm/sama5/sama5d4-ek/src/sam_sdram.c @@ -437,7 +437,7 @@ void sam_sdram_config(void) MPDDRC_CR_UNAL; /* upport Unaligned Access */ #else -# error Unknwon SDRAM type +# error Unknown SDRAM type #endif putreg32(regval, SAM_MPDDRC_CR); diff --git a/boards/arm/samd2l2/samd20-xplained/README.txt b/boards/arm/samd2l2/samd20-xplained/README.txt index a929b563c64..6dda73550be 100644 --- a/boards/arm/samd2l2/samd20-xplained/README.txt +++ b/boards/arm/samd2l2/samd20-xplained/README.txt @@ -91,7 +91,7 @@ Modules ----------------- ---------------------- ---------------------- ------------------------------------ 2 GND 2 GND 2 GND ----------------- ---------------------- ---------------------- ------------------------------------ - 3 LIGHTSENSOR 3 PB00 AIN[8] 3 PA10 AIN[18] + 3 LIGHT_SENSOR 3 PB00 AIN[8] 3 PA10 AIN[18] ----------------- ---------------------- ---------------------- ------------------------------------ 4 LP_OUT 4 PB01 AIN[9] 4 PA11 AIN[19] ----------------- ---------------------- ---------------------- ------------------------------------ @@ -285,7 +285,7 @@ GNU Toolchain Options CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery under Windows CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y : CodeSourcery under Linux - CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC=y : Atollic toolchain for Windos + CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC=y : Atollic toolchain for Windows CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM=y : devkitARM under Windows CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y : NuttX buildroot under Linux or Cygwin (default) CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y : Generic GCC ARM EABI toolchain for Linux @@ -663,7 +663,7 @@ Configurations Build Setup: CONFIG_HOST_WINDOWS=y : Windows Host - CONFIG_WINDOWS_CYGWIN=y : Cygwin environment on windoes + CONFIG_WINDOWS_CYGWIN=y : Cygwin environment on windows 4. These configurations use the CodeSourcery toolchain. But that is easily reconfigured: diff --git a/boards/arm/samd2l2/samd21-xplained/README.txt b/boards/arm/samd2l2/samd21-xplained/README.txt index d5405b67cc5..1b8b27256b2 100644 --- a/boards/arm/samd2l2/samd21-xplained/README.txt +++ b/boards/arm/samd2l2/samd21-xplained/README.txt @@ -83,7 +83,7 @@ Modules ----------------- ---------------------- ---------------------- ------------------------------------ 2 GND 2 GND 2 GND ----------------- ---------------------- ---------------------- ------------------------------------ - 3 LIGHTSENSOR 3 PB00 AIN[8] 3 PA10 AIN[18] + 3 LIGHT_SENSOR 3 PB00 AIN[8] 3 PA10 AIN[18] ----------------- ---------------------- ---------------------- ------------------------------------ 4 LP_OUT 4 PB01 AIN[9] 4 PA11 AIN[19] ----------------- ---------------------- ---------------------- ------------------------------------ @@ -530,7 +530,7 @@ Configurations Build Setup: CONFIG_HOST_WINDOWS=y : Windows Host - CONFIG_WINDOWS_CYGWIN=y : Cygwin environment on windoes + CONFIG_WINDOWS_CYGWIN=y : Cygwin environment on windows 4. These configurations use the CodeSourcery toolchain. But that is easily reconfigured: diff --git a/boards/arm/samd2l2/saml21-xplained/README.txt b/boards/arm/samd2l2/saml21-xplained/README.txt index 4c65ee50220..016bb8ad9c2 100644 --- a/boards/arm/samd2l2/saml21-xplained/README.txt +++ b/boards/arm/samd2l2/saml21-xplained/README.txt @@ -73,7 +73,7 @@ Modules ----------------- ---------------------- ---------------------- ------------------------------------ 2 GND 2 GND 2 GND ----------------- ---------------------- ---------------------- ------------------------------------ - 3 LIGHTSENSOR 3 PB05 AIN[13] 3 PA10 AIN[18] + 3 LIGHT_SENSOR 3 PB05 AIN[13] 3 PA10 AIN[18] ----------------- ---------------------- ---------------------- ------------------------------------ 4 LP_OUT 4 PA03 AIN[1] 4 PA11 AIN[19] ----------------- ---------------------- ---------------------- ------------------------------------ @@ -266,7 +266,7 @@ GNU Toolchain Options CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery under Windows CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y : CodeSourcery under Linux - CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC=y : Atollic toolchain for Windos + CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC=y : Atollic toolchain for Windows CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM=y : devkitARM under Windows CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y : NuttX buildroot under Linux or Cygwin (default) CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y : Generic GCC ARM EABI toolchain for Linux @@ -692,7 +692,7 @@ Configurations Build Setup: CONFIG_HOST_WINDOWS=y : Windows Host - CONFIG_WINDOWS_CYGWIN=y : Cygwin environment on windoes + CONFIG_WINDOWS_CYGWIN=y : Cygwin environment on windows 4. These configurations use the CodeSourcery toolchain. But that is easily reconfigured: diff --git a/boards/arm/samd2l2/saml21-xplained/include/board.h b/boards/arm/samd2l2/saml21-xplained/include/board.h index d58c6350894..0f3a3458505 100644 --- a/boards/arm/samd2l2/saml21-xplained/include/board.h +++ b/boards/arm/samd2l2/saml21-xplained/include/board.h @@ -181,7 +181,7 @@ # define BOARD_OSC16M_FREQUENCY 16000000 /* 18MHz high-accuracy internal oscillator */ #else -# error OSC16M operating freqency not defined (CONFIG_SAML21_XPLAINED_OSC16M_*MHZ) +# error OSC16M operating frequency not defined (CONFIG_SAML21_XPLAINED_OSC16M_*MHZ) #endif /* OSCULP32K Configuration -- not used. */ diff --git a/boards/arm/samv7/same70-xplained/README.txt b/boards/arm/samv7/same70-xplained/README.txt index 561080aafe5..f5c6794155e 100644 --- a/boards/arm/samv7/same70-xplained/README.txt +++ b/boards/arm/samv7/same70-xplained/README.txt @@ -633,7 +633,7 @@ serial device class: Device Drivers -> USB Device Driver Support CONFIG_CDCACM=y : USB Modem (CDC ACM) support - CONFIG_CDCACM_EP0MAXPACKET=64 : Enpoint 0 packet size + CONFIG_CDCACM_EP0MAXPACKET=64 : Endpoint 0 packet size CONFIG_CDCACM_EPINTIN=1 : Interrupt IN endpoint number CONFIG_CDCACM_EPINTIN_FSSIZE=64 : Full speed packet size CONFIG_CDCACM_EPINTIN_HSSIZE=64 : High speed packet size @@ -1579,7 +1579,7 @@ Configuration sub-directories Where is one of: Show help : ? - List busses : bus + List buses : bus List devices : dev [OPTIONS] Read register : get [OPTIONS] [] Show help : help diff --git a/boards/arm/samv7/same70-xplained/src/same70-xplained.h b/boards/arm/samv7/same70-xplained/src/same70-xplained.h index f5373b33d34..3c180170570 100644 --- a/boards/arm/samv7/same70-xplained/src/same70-xplained.h +++ b/boards/arm/samv7/same70-xplained/src/same70-xplained.h @@ -192,7 +192,7 @@ # undef HAVE_PROGMEM_CHARDEV #endif -/* This is the on-chip progmem memroy driver minor number */ +/* This is the on-chip progmem memory driver minor number */ #define PROGMEM_MTD_MINOR 0 diff --git a/boards/arm/samv7/samv71-xult/README.txt b/boards/arm/samv7/samv71-xult/README.txt index 16153b90b85..3038d37f229 100644 --- a/boards/arm/samv7/samv71-xult/README.txt +++ b/boards/arm/samv7/samv71-xult/README.txt @@ -963,7 +963,7 @@ serial device class: Device Drivers -> USB Device Driver Support CONFIG_CDCACM=y : USB Modem (CDC ACM) support - CONFIG_CDCACM_EP0MAXPACKET=64 : Enpoint 0 packet size + CONFIG_CDCACM_EP0MAXPACKET=64 : Endpoint 0 packet size CONFIG_CDCACM_EPINTIN=1 : Interrupt IN endpoint number CONFIG_CDCACM_EPINTIN_FSSIZE=64 : Full speed packet size CONFIG_CDCACM_EPINTIN_HSSIZE=64 : High speed packet size @@ -1930,7 +1930,7 @@ Configuration sub-directories 2017-07-02: Configurations added. Not yet tested. 2017-07-03: Initial testing, appears to be working, but endpoints - fail to associate; sniffer shows that nothing sent fro the star + fail to associate; sniffer shows that nothing sent from the star hub. I am thinking that there is something wrong with the GPIO interrupt configuration so that no MRF24J40 interrupt are being received. @@ -2276,7 +2276,7 @@ Configuration sub-directories Where is one of: Show help : ? - List busses : bus + List buses : bus List devices : dev [OPTIONS] Read register : get [OPTIONS] [] Show help : help @@ -2408,7 +2408,7 @@ Configuration sub-directories - Other images are horizontally compressed (such as the initial NX logo on the background). - - As mentioned above, reading fromthe LCD is not currently functional. + - As mentioned above, reading from the LCD is not currently functional. There are some special settings work work around this but the bottom line is that transparent operations cannot yet be supported. diff --git a/boards/arm/samv7/samv71-xult/src/sam_ili9488.c b/boards/arm/samv7/samv71-xult/src/sam_ili9488.c index 671cff8e0f0..cc0fbd87691 100644 --- a/boards/arm/samv7/samv71-xult/src/sam_ili9488.c +++ b/boards/arm/samv7/samv71-xult/src/sam_ili9488.c @@ -921,7 +921,7 @@ static void sam_lcd_endwait(struct sam_dev_s *priv, int result) * Name: sam_lcd_dmatimeout * * Description: - * The watchdog timeout setup when the DMA was startd. Indicates a DMA + * The watchdog timeout setup when the DMA was started. Indicates a DMA * timeout failure. * * Input Parameters: diff --git a/boards/arm/samv7/samv71-xult/src/samv71-xult.h b/boards/arm/samv7/samv71-xult/src/samv71-xult.h index d0a588125c5..094e7f419bd 100644 --- a/boards/arm/samv7/samv71-xult/src/samv71-xult.h +++ b/boards/arm/samv7/samv71-xult/src/samv71-xult.h @@ -255,7 +255,7 @@ #define S25FL1_MTD_MINOR 0 -/* This is the on-chip progmem memroy driver minor number */ +/* This is the on-chip progmem memory driver minor number */ #define PROGMEM_MTD_MINOR 1 diff --git a/boards/arm/stm32/axoloti/scripts/memory.ld b/boards/arm/stm32/axoloti/scripts/memory.ld index 1684eebb713..cc94fd3794d 100644 --- a/boards/arm/stm32/axoloti/scripts/memory.ld +++ b/boards/arm/stm32/axoloti/scripts/memory.ld @@ -55,7 +55,7 @@ * Alignment of the user space FLASH partition is also a critical factor: * The user space FLASH partition will be spanned with a single region of * size 2**n bytes. The alignment of the user-space region must be the same. - * As a consequence, as the user-space increases in size, the alignmment + * As a consequence, as the user-space increases in size, the alignment * requirement also increases. * * This alignment requirement means that the largest user space FLASH region diff --git a/boards/arm/stm32/clicker2-stm32/README.txt b/boards/arm/stm32/clicker2-stm32/README.txt index c39ff41878d..b5d4e75e248 100644 --- a/boards/arm/stm32/clicker2-stm32/README.txt +++ b/boards/arm/stm32/clicker2-stm32/README.txt @@ -59,7 +59,7 @@ LEDs Thus is LD1 is illuminated, the Clicker2 has completed boot-up. IF LD2 is glowly softly, then interrupts are being taken; the level of illumination - depends amount of time processing interupts. If LD1 is off and LD2 is + depends amount of time processing interrupts. If LD1 is off and LD2 is blinking at about 2Hz, then the system has crashed. Buttons @@ -122,7 +122,7 @@ Using JTAG Option bytes updated successfully. NOTE: - 1. You can get the ST-Link Utilies here: + 1. You can get the ST-Link Utilities here: http://www.st.com/en/embedded-software/stsw-link004.html 2. The ST-LINK Utility command line interface is located at: [Install_Directory]\STM32 ST-LINK Utility\ST-LINK Utility\ST-LINK_CLI.exe @@ -356,14 +356,14 @@ Configurations sure that you are familiar with the content of that README.txt file. Here is a quick "cheat sheet" for associated to setting up a - coordinator and associating wth the WPAN: + coordinator and associating with the WPAN: 1. Configure the Coordinator. On coordinator device do: nsh> i8 /dev/ieee0 startpan cd:ab nsh> i8 acceptassoc - 2. Assocate an endpoint device with the WPAN. On the endpoint + 2. Associate an endpoint device with the WPAN. On the endpoint device: nsh> i8 /dev/ieee0 assoc @@ -434,7 +434,7 @@ Configurations interface name 'wpan0'. This tells the i8sak app to use a socket instead of a character device to perform the IOCTL operations with the MAC. Additionally, after the PAN has been configured with the i8sak - utility, you must explicity bring the network up on each node: + utility, you must explicitly bring the network up on each node: nsh> ifup wpan0 @@ -502,7 +502,7 @@ Configurations The nsh> dmesg command can be use at any time on any node to see any debug output that you have selected. - 9. The NSH Telnet deamon (server) is enabled. However, it cannot be + 9. The NSH Telnet daemon (server) is enabled. However, it cannot be started automatically. Rather, it must be started AFTER the network has been brought up using the NSH 'telnetd' command. You would want to start the Telent daemon only if you want the node to serve Telent @@ -522,7 +522,7 @@ Configurations nsh> telnet Where is the IP address of the server that you got for - the ifconfig commna on the remote node. Once the telnet session + the ifconfig comma on the remote node. Once the telnet session has been started, you can end the session with: nsh> exit @@ -743,7 +743,7 @@ Configurations CONFIG_SYSLOG_CHAR=y : Use a character device for system logging CONFIG_SYSLOG_DEVPATH="/dev/ttyS0" : USART3 will be /dev/ttyS0 - However, there is nothing to generate SYLOG output in the default + However, there is nothing to generate SYSLOG output in the default configuration so nothing should appear on USART3 unless you enable some debug output or enable the USB monitor. diff --git a/boards/arm/stm32/clicker2-stm32/include/board.h b/boards/arm/stm32/clicker2-stm32/include/board.h index 4e6da6656b5..2c56b5f0f58 100644 --- a/boards/arm/stm32/clicker2-stm32/include/board.h +++ b/boards/arm/stm32/clicker2-stm32/include/board.h @@ -319,7 +319,7 @@ #define GPIO_TIM1_CH1OUT GPIO_TIM1_CH1OUT_2 /* PE9 */ #define GPIO_TIM4_CH1OUT GPIO_TIM4_CH1OUT_2 /* PD12 */ -/* DMA Channl/Stream Selections *********************************************/ +/* DMA Channel/Stream Selections *********************************************/ /* Stream selections are arbitrary for now but might become important in the future * if we set aside more DMA channels/streams. diff --git a/boards/arm/stm32/clicker2-stm32/src/stm32_boot.c b/boards/arm/stm32/clicker2-stm32/src/stm32_boot.c index e70262c727f..d7cdad8ab81 100644 --- a/boards/arm/stm32/clicker2-stm32/src/stm32_boot.c +++ b/boards/arm/stm32/clicker2-stm32/src/stm32_boot.c @@ -56,7 +56,7 @@ * * Description: * All STM32 architectures must provide the following entry point. This entry point - * is called early in the intitialization -- after all memory has been configured + * is called early in the initialization -- after all memory has been configured * and mapped but before any devices have been initialized. * ****************************************************************************/ diff --git a/boards/arm/stm32/cloudctrl/README.txt b/boards/arm/stm32/cloudctrl/README.txt index f283ac63433..a35cf74c840 100644 --- a/boards/arm/stm32/cloudctrl/README.txt +++ b/boards/arm/stm32/cloudctrl/README.txt @@ -361,7 +361,7 @@ Cloudctrl-specific Configuration Options CONFIG_STM32_MII_MCO - Use MCO to clock the MII interface CONFIG_STM32_RMII - Support Ethernet RMII interface CONFIG_STM32_RMII_MCO - Use MCO to clock the RMII interface - CONFIG_STM32_AUTONEG - Use PHY autonegotion to determine speed and mode + CONFIG_STM32_AUTONEG - Use PHY autonegotiation to determine speed and mode CONFIG_STM32_ETHFD - If CONFIG_STM32_AUTONEG is not defined, then this may be defined to select full duplex mode. Default: half-duplex CONFIG_STM32_ETH100MBPS - If CONFIG_STM32_AUTONEG is not defined, then this diff --git a/boards/arm/stm32/cloudctrl/scripts/cloudctrl-dfu.ld b/boards/arm/stm32/cloudctrl/scripts/cloudctrl-dfu.ld index 3f44a77da01..de060e98742 100644 --- a/boards/arm/stm32/cloudctrl/scripts/cloudctrl-dfu.ld +++ b/boards/arm/stm32/cloudctrl/scripts/cloudctrl-dfu.ld @@ -35,7 +35,7 @@ /* The STM32F107VC has 256K of FLASH beginning at address 0x0800:0000 and * 64K of SRAM beginning at address 0x2000:0000. Here we assume that the - * STMicro DFU bootloader is being used. In that case, the corrct load .text + * STMicro DFU bootloader is being used. In that case, the correct load .text * load address is 0x08003000 (leaving 208K). */ diff --git a/boards/arm/stm32/fire-stm32v2/README.txt b/boards/arm/stm32/fire-stm32v2/README.txt index 3c822647122..81da6342e5e 100644 --- a/boards/arm/stm32/fire-stm32v2/README.txt +++ b/boards/arm/stm32/fire-stm32v2/README.txt @@ -144,9 +144,9 @@ PIN NAME SIGNAL NOTES 92 PB6 PB6-I2C1-SCL 2.4" TFT + Touchscreen, AT24C02 93 PB7 PB7-I2C1-SDA 2.4" TFT + Touchscreen, AT24C02 94 BOOT0 SW3 3V3 or DGND -95 PB8 PB8-CAN-RX CAN tranceiver, Header 2H +95 PB8 PB8-CAN-RX CAN transceiver, Header 2H PB8-C-DO_0 Camera (P9) -96 PB9 PB9-CAN-TX CAN tranceiver, Header 2H +96 PB9 PB9-CAN-TX CAN transceiver, Header 2H PB9-C-DO_1 Camera (P9) 97 PE0 PE0-C-RRST Camera (P9) 98 PE1 PE1-FSMC_NBL1 2.4" TFT + Touchscreen @@ -188,7 +188,7 @@ DFU and JTAG 3. Run the DFU SE program to load nuttx.dfu into FLASH. What if the DFU loader is not in FLASH? The loader code is available - inside of the Demo dirctory of the USBLib ZIP file that can be downloaded + inside of the Demo directory of the USBLib ZIP file that can be downloaded from the STMicro Website. You can build it using RIDE (or other toolchains); you will need a JTAG emulator to burn it into FLASH the first time. @@ -280,7 +280,7 @@ RTC CONFIG_RTC_HIRES - The typical RTC keeps time to resolution of 1 second, usually supporting a 32-bit time_t value. In this case, the RTC is used to "seed" the normal NuttX timer and the - NuttX timer provides for higher resoution time. If CONFIG_RTC_HIRES + NuttX timer provides for higher resolution time. If CONFIG_RTC_HIRES is enabled in the NuttX configuration, then the RTC provides higher resolution time and completely replaces the system timer for purpose of date and time. @@ -494,7 +494,7 @@ M3 Wildfire-specific Configuration Options CONFIG_STM32_SDIO_DMA - Support DMA data transfers. Requires CONFIG_STM32_SDIO and CONFIG_STM32_DMA2. - CONFIG_STM32_SDIO_PRI - Select SDIO interrupt prority. Default: 128 + CONFIG_STM32_SDIO_PRI - Select SDIO interrupt priority. Default: 128 CONFIG_STM32_SDIO_DMAPRIO - Select SDIO DMA interrupt priority. Default: Medium CONFIG_STM32_SDIO_WIDTH_D1_ONLY - Select 1-bit transfer mode. Default: diff --git a/boards/arm/stm32/fire-stm32v2/include/board.h b/boards/arm/stm32/fire-stm32v2/include/board.h index 8b2cfe85e86..c7ab927054f 100644 --- a/boards/arm/stm32/fire-stm32v2/include/board.h +++ b/boards/arm/stm32/fire-stm32v2/include/board.h @@ -354,8 +354,8 @@ * PIN NAME SIGNAL NOTES * --- ------ -------------- ------------------------------------------------------------------- * - * 95 PB8 PB8-CAN-RX CAN tranceiver, Header 2H - * 96 PB9 PB9-CAN-TX CAN tranceiver, Header 2H + * 95 PB8 PB8-CAN-RX CAN transceiver, Header 2H + * 96 PB9 PB9-CAN-TX CAN transceiver, Header 2H */ #if defined(CONFIG_STM32_CAN1) && !defined(CONFIG_STM32_CAN1_REMAP1) @@ -388,7 +388,7 @@ extern "C" * This is a non-standard LCD interface just for the M3 Wildfire board. Because * of the various rotations, clearing the display in the normal way by writing a * sequences of runs that covers the entire display can be very slow. Here the - * dispaly is cleared by simply setting all GRAM memory to the specified color. + * display is cleared by simply setting all GRAM memory to the specified color. * ****************************************************************************/ diff --git a/boards/arm/stm32/fire-stm32v2/scripts/fire-stm32v2-dfu.ld b/boards/arm/stm32/fire-stm32v2/scripts/fire-stm32v2-dfu.ld index 002cb8e06d4..342d67a2a99 100644 --- a/boards/arm/stm32/fire-stm32v2/scripts/fire-stm32v2-dfu.ld +++ b/boards/arm/stm32/fire-stm32v2/scripts/fire-stm32v2-dfu.ld @@ -35,7 +35,7 @@ /* The STM32F103VET6 has 512Kb of FLASH beginning at address 0x0800:0000 and * 64Kb of SRAM beginning at address 0x2000:0000. Here we assume that the - * STM3210E-EVAL's DFU bootloader is being used. In that case, the corrct + * STM3210E-EVAL's DFU bootloader is being used. In that case, the correct * load .text load address is 0x08003000 (leaving 464Kb). */ diff --git a/boards/arm/stm32/fire-stm32v2/src/stm32_boot.c b/boards/arm/stm32/fire-stm32v2/src/stm32_boot.c index cd1c904e9c5..00a184d6d72 100644 --- a/boards/arm/stm32/fire-stm32v2/src/stm32_boot.c +++ b/boards/arm/stm32/fire-stm32v2/src/stm32_boot.c @@ -64,7 +64,7 @@ * * Description: * All STM32 architectures must provide the following entry point. This entry point - * is called early in the intitialization -- after all memory has been configured + * is called early in the initialization -- after all memory has been configured * and mapped but before any devices have been initialized. * ****************************************************************************/ diff --git a/boards/arm/stm32/hymini-stm32v/README.txt b/boards/arm/stm32/hymini-stm32v/README.txt index 99b24eb7d3b..4b1262e08d2 100644 --- a/boards/arm/stm32/hymini-stm32v/README.txt +++ b/boards/arm/stm32/hymini-stm32v/README.txt @@ -42,7 +42,7 @@ ST Bootloader LEDs ==== -The HY-MiniSTM32 board provides only two controlable LEDs labeled LED1 and LED2. +The HY-MiniSTM32 board provides only two controllable LEDs labeled LED1 and LED2. Usage of these LEDs is defined in include/board.h and src/up_leds.c. They are encoded as follows: @@ -72,7 +72,7 @@ RTC CONFIG_RTC_HIRES - The typical RTC keeps time to resolution of 1 second, usually supporting a 32-bit time_t value. In this case, the RTC is used to "seed" the normal NuttX timer and the - NuttX timer provides for higher resoution time. If CONFIG_RTC_HIRES + NuttX timer provides for higher resolution time. If CONFIG_RTC_HIRES is enabled in the NuttX configuration, then the RTC provides higher resolution time and completely replaces the system timer for purpose of date and time. @@ -274,7 +274,7 @@ HY-Mini specific Configuration Options CONFIG_SDIO_DMA - Support DMA data transfers. Requires CONFIG_STM32_SDIO and CONFIG_STM32_DMA2. - CONFIG_STM32_SDIO_PRI - Select SDIO interrupt prority. Default: 128 + CONFIG_STM32_SDIO_PRI - Select SDIO interrupt priority. Default: 128 CONFIG_STM32_SDIO_DMAPRIO - Select SDIO DMA interrupt priority. Default: Medium CONFIG_STM32_SDIO_WIDTH_D1_ONLY - Select 1-bit transfer mode. Default: @@ -440,15 +440,15 @@ Where is one of the following: CONFIG_SYSLOG_CHAR=y : Use a character device for system logging CONFIG_SYSLOG_DEVPATH="/dev/ttyS0" : UART2 will be /dev/ttyS0 - However, there is nothing to generate SYLOG output in the default + However, there is nothing to generate SYSLOG output in the default configuration so nothing should appear on UART2 unless you enable some debug output or enable the USB monitor. 2. Enabling USB monitor SYSLOG output. If tracing is enabled, the USB device will save encoded trace output in in-memory buffer; if the USB monitor is enabled, that trace buffer will be periodically - emptied and dumped to the system loggin device (UART2 in this - configuraion): + emptied and dumped to the system logging device (UART2 in this + configuration): CONFIG_USBDEV_TRACE=y : Enable USB trace feature CONFIG_USBDEV_TRACE_NRECORDS=128 : Buffer 128 records in memory diff --git a/boards/arm/stm32/hymini-stm32v/src/stm32_r61505u.c b/boards/arm/stm32/hymini-stm32v/src/stm32_r61505u.c index 99d1bf5b66a..4e4607e4ed2 100644 --- a/boards/arm/stm32/hymini-stm32v/src/stm32_r61505u.c +++ b/boards/arm/stm32/hymini-stm32v/src/stm32_r61505u.c @@ -697,7 +697,7 @@ static inline void lcd_initialize(void) write_reg(0x52,0x0000); write_reg(0x53,0x013F); - /* Pannel Image Control */ + /* Panel Image Control */ write_reg(0x60,0x2700); write_reg(0x61,0x0001); diff --git a/boards/arm/stm32/maple/README.txt b/boards/arm/stm32/maple/README.txt index 5e7ce3052ce..56ae64444e0 100644 --- a/boards/arm/stm32/maple/README.txt +++ b/boards/arm/stm32/maple/README.txt @@ -87,7 +87,7 @@ DFU 3. Run the DFU SE program to load nuttx.bin into FLASH. What if the DFU loader is not in FLASH? The loader code is available - inside of the Demo dirctory of the USBLib ZIP file that can be downloaded + inside of the Demo directory of the USBLib ZIP file that can be downloaded from the STMicro Website. You can build it using RIDE (or other toolchains); you will need a JTAG emulator to burn it into FLASH the first time. diff --git a/boards/arm/stm32/mikroe-stm32f4/README.txt b/boards/arm/stm32/mikroe-stm32f4/README.txt index 0eadff02d69..f0de1ab34f8 100644 --- a/boards/arm/stm32/mikroe-stm32f4/README.txt +++ b/boards/arm/stm32/mikroe-stm32f4/README.txt @@ -428,7 +428,7 @@ Mikroe-STM32F4-specific Configuration Options CONFIG_SDIO_DMA - Support DMA data transfers. Requires CONFIG_STM32_SDIO and CONFIG_STM32_DMA2. - CONFIG_STM32_SDIO_PRI - Select SDIO interrupt prority. Default: 128 + CONFIG_STM32_SDIO_PRI - Select SDIO interrupt priority. Default: 128 CONFIG_STM32_SDIO_DMAPRIO - Select SDIO DMA interrupt priority. Default: Medium CONFIG_STM32_SDIO_WIDTH_D1_ONLY - Select 1-bit transfer mode. Default: @@ -492,7 +492,7 @@ Where is one of the following: This configuration directory, performs a simple OS test using apps/examples/ostest with NuttX build as a kernel-mode monolithic module and the user applications are built separately. Is - is recommened to use a special make command; not just 'make' but + is recommended to use a special make command; not just 'make' but make with the following two arguments: make pass1 pass2 @@ -661,15 +661,15 @@ Where is one of the following: CONFIG_SYSLOG_CHAR=y : Use a character device for system logging CONFIG_SYSLOG_DEVPATH="/dev/ttyS0" : UART2 will be /dev/ttyS0 - However, there is nothing to generate SYLOG output in the default + However, there is nothing to generate SYSLOG output in the default configuration so nothing should appear on UART2 unless you enable some debug output or enable the USB monitor. 4. Enabling USB monitor SYSLOG output. If tracing is enabled, the USB device will save encoded trace output in in-memory buffer; if the USB monitor is enabled, that trace buffer will be periodically - emptied and dumped to the system loggin device (UART2 in this - configuraion): + emptied and dumped to the system logging device (UART2 in this + configuration): CONFIG_USBDEV_TRACE=y : Enable USB trace feature CONFIG_USBDEV_TRACE_NRECORDS=128 : Buffer 128 records in memory diff --git a/boards/arm/stm32/mikroe-stm32f4/src/stm32_boot.c b/boards/arm/stm32/mikroe-stm32f4/src/stm32_boot.c index 74eb9cc404a..7e0967e7188 100644 --- a/boards/arm/stm32/mikroe-stm32f4/src/stm32_boot.c +++ b/boards/arm/stm32/mikroe-stm32f4/src/stm32_boot.c @@ -63,7 +63,7 @@ * * Description: * All STM32 architectures must provide the following entry point. This entry point - * is called early in the intitialization -- after all memory has been configured + * is called early in the initialization -- after all memory has been configured * and mapped but before any devices have been initialized. * ****************************************************************************/ diff --git a/boards/arm/stm32/mikroe-stm32f4/src/stm32_mio283qt2.c b/boards/arm/stm32/mikroe-stm32f4/src/stm32_mio283qt2.c index 824ed443497..6da0277a2d0 100644 --- a/boards/arm/stm32/mikroe-stm32f4/src/stm32_mio283qt2.c +++ b/boards/arm/stm32/mikroe-stm32f4/src/stm32_mio283qt2.c @@ -524,7 +524,7 @@ FAR struct lcd_dev_s *board_lcd_getdev(int lcddev) * Name: board_lcd_uninitialize * * Description: - * Unitialize the LCD support + * Uninitialize the LCD support * ****************************************************************************/ diff --git a/boards/arm/stm32/mikroe-stm32f4/src/stm32_touchscreen.c b/boards/arm/stm32/mikroe-stm32f4/src/stm32_touchscreen.c index 7bd989b3d11..53569b9873a 100644 --- a/boards/arm/stm32/mikroe-stm32f4/src/stm32_touchscreen.c +++ b/boards/arm/stm32/mikroe-stm32f4/src/stm32_touchscreen.c @@ -498,7 +498,7 @@ static void tc_adc_start_sample(int channel) * * Assumptions: * 1) All output pins configured as outputs: - * 2) Approprite pins are driven high and low + * 2) Appropriate pins are driven high and low * ****************************************************************************/ @@ -1406,7 +1406,7 @@ static int tc_poll(FAR struct file *filep, FAR struct pollfd *fds, if (i >= CONFIG_TOUCHSCREEN_NPOLLWAITERS) { - ierr("ERROR: No availabled slot found: %d\n", i); + ierr("ERROR: No available slot found: %d\n", i); fds->priv = NULL; ret = -EBUSY; goto errout; diff --git a/boards/arm/stm32/nucleo-f103rb/src/stm32_boot.c b/boards/arm/stm32/nucleo-f103rb/src/stm32_boot.c index cdc9b67b839..e521acca1c4 100644 --- a/boards/arm/stm32/nucleo-f103rb/src/stm32_boot.c +++ b/boards/arm/stm32/nucleo-f103rb/src/stm32_boot.c @@ -69,7 +69,7 @@ * * Description: * All STM32 architectures must provide the following entry point. This - * entry point is called early in the intitialization -- after all memory + * entry point is called early in the initialization -- after all memory * has been configured and mapped but before any devices have been * initialized. * diff --git a/boards/arm/stm32/nucleo-f302r8/src/stm32_boot.c b/boards/arm/stm32/nucleo-f302r8/src/stm32_boot.c index e55323b3835..f2f9e3325ef 100644 --- a/boards/arm/stm32/nucleo-f302r8/src/stm32_boot.c +++ b/boards/arm/stm32/nucleo-f302r8/src/stm32_boot.c @@ -69,7 +69,7 @@ * * Description: * All STM32 architectures must provide the following entry point. This - * entry point is called early in the intitialization -- after all memory + * entry point is called early in the initialization -- after all memory * has been configured and mapped but before any devices have been * initialized. * diff --git a/boards/arm/stm32/nucleo-f303re/src/stm32_boot.c b/boards/arm/stm32/nucleo-f303re/src/stm32_boot.c index a32ee58faa0..fc632e93bcc 100644 --- a/boards/arm/stm32/nucleo-f303re/src/stm32_boot.c +++ b/boards/arm/stm32/nucleo-f303re/src/stm32_boot.c @@ -71,7 +71,7 @@ * * Description: * All STM32 architectures must provide the following entry point. This - * entry point is called early in the intitialization -- after all memory + * entry point is called early in the initialization -- after all memory * has been configured and mapped but before any devices have been * initialized. * diff --git a/boards/arm/stm32/nucleo-f334r8/src/stm32_boot.c b/boards/arm/stm32/nucleo-f334r8/src/stm32_boot.c index 226d093d24b..6126174f904 100644 --- a/boards/arm/stm32/nucleo-f334r8/src/stm32_boot.c +++ b/boards/arm/stm32/nucleo-f334r8/src/stm32_boot.c @@ -69,7 +69,7 @@ * * Description: * All STM32 architectures must provide the following entry point. This - * entry point is called early in the intitialization -- after all memory + * entry point is called early in the initialization -- after all memory * has been configured and mapped but before any devices have been * initialized. * diff --git a/boards/arm/stm32/nucleo-f446re/README.txt b/boards/arm/stm32/nucleo-f446re/README.txt index 60c2aa15319..2e046e0e369 100644 --- a/boards/arm/stm32/nucleo-f446re/README.txt +++ b/boards/arm/stm32/nucleo-f446re/README.txt @@ -195,7 +195,7 @@ IDEs there is a lot of help on the internet). Using Sourcery CodeBench from http://www.mentor.com/embedded-software/sourcery-tools/sourcery-codebench/overview - Download and install the latest version (as of this writting it was + Download and install the latest version (as of this writing it was sourceryg++-2013.05-64-arm-none-eabi) Import the project from git. diff --git a/boards/arm/stm32/nucleo-f4x1re/README.txt b/boards/arm/stm32/nucleo-f4x1re/README.txt index 127b402eed7..cc4ecdae3e9 100644 --- a/boards/arm/stm32/nucleo-f4x1re/README.txt +++ b/boards/arm/stm32/nucleo-f4x1re/README.txt @@ -218,7 +218,7 @@ IDEs there is a lot of help on the internet). Using Sourcery CodeBench from http://www.mentor.com/embedded-software/sourcery-tools/sourcery-codebench/overview - Download and install the latest version (as of this writting it was + Download and install the latest version (as of this writing it was sourceryg++-2013.05-64-arm-none-eabi) Import the project from git. diff --git a/boards/arm/stm32/nucleo-f4x1re/src/nucleo-f4x1re.h b/boards/arm/stm32/nucleo-f4x1re/src/nucleo-f4x1re.h index a8efc44864d..91bd54e5a9a 100644 --- a/boards/arm/stm32/nucleo-f4x1re/src/nucleo-f4x1re.h +++ b/boards/arm/stm32/nucleo-f4x1re/src/nucleo-f4x1re.h @@ -250,7 +250,7 @@ extern struct sdio_dev_s *g_sdio; * Otherwise CONFIG_BOARD_LATE_INITIALIZE=y: * Called from board_late_initialize(). * - * Otherise, bad news: Never called + * Otherwise, bad news: Never called * ****************************************************************************/ diff --git a/boards/arm/stm32/nucleo-f4x1re/src/stm32_mcp2515.c b/boards/arm/stm32/nucleo-f4x1re/src/stm32_mcp2515.c index f915db26642..034e27b8349 100644 --- a/boards/arm/stm32/nucleo-f4x1re/src/stm32_mcp2515.c +++ b/boards/arm/stm32/nucleo-f4x1re/src/stm32_mcp2515.c @@ -108,10 +108,10 @@ static struct stm32_mcp2515config_s g_mcp2515config = .config = { .spi = NULL, - .baud = 0, /* REVISIT. Proably broken by commit eb7373cedfa */ - .btp = 0, /* REVISIT. Proably broken by commit eb7373cedfa */ + .baud = 0, /* REVISIT. Probably broken by commit eb7373cedfa */ + .btp = 0, /* REVISIT. Probably broken by commit eb7373cedfa */ .devid = 0, - .mode = 0, /* REVISIT. Proably broken by commit eb7373cedfa */ + .mode = 0, /* REVISIT. Probably broken by commit eb7373cedfa */ .nfilters = 6, #ifdef MCP2515_LOOPBACK .loopback = false; diff --git a/boards/arm/stm32/nucleo-l152re/src/stm32_boot.c b/boards/arm/stm32/nucleo-l152re/src/stm32_boot.c index eed22d1b1ac..3a5b7e107cd 100644 --- a/boards/arm/stm32/nucleo-l152re/src/stm32_boot.c +++ b/boards/arm/stm32/nucleo-l152re/src/stm32_boot.c @@ -69,7 +69,7 @@ * * Description: * All STM32 architectures must provide the following entry point. This - * entry point is called early in the intitialization -- after all memory + * entry point is called early in the initialization -- after all memory * has been configured and mapped but before any devices have been * initialized. * diff --git a/boards/arm/stm32/olimex-stm32-e407/README.txt b/boards/arm/stm32/olimex-stm32-e407/README.txt index 2618701dd2e..8d76625e23f 100644 --- a/boards/arm/stm32/olimex-stm32-e407/README.txt +++ b/boards/arm/stm32/olimex-stm32-e407/README.txt @@ -119,7 +119,7 @@ Configurations mrf24j40-mac: ------------ This configuration set the proper configuration to set the 802.15.4 - communication layer with the MRF24J40 radio. This radio works wit + communication layer with the MRF24J40 radio. This radio works with SPI, you need to do the next connections: MRF24J40 VCC -> Board 3.3V diff --git a/boards/arm/stm32/olimex-stm32-e407/src/stm32_boot.c b/boards/arm/stm32/olimex-stm32-e407/src/stm32_boot.c index 42a0b05aff9..c0a2b8a3235 100644 --- a/boards/arm/stm32/olimex-stm32-e407/src/stm32_boot.c +++ b/boards/arm/stm32/olimex-stm32-e407/src/stm32_boot.c @@ -61,7 +61,7 @@ * * Description: * All STM32 architectures must provide the following entry point. This - * entry point is called early in the intitialization -- after all memory + * entry point is called early in the initialization -- after all memory * has been configured and mapped but before any devices have been * initialized. * diff --git a/boards/arm/stm32/olimex-stm32-h405/src/stm32_boot.c b/boards/arm/stm32/olimex-stm32-h405/src/stm32_boot.c index e0ec225599a..2c3a622f992 100644 --- a/boards/arm/stm32/olimex-stm32-h405/src/stm32_boot.c +++ b/boards/arm/stm32/olimex-stm32-h405/src/stm32_boot.c @@ -56,7 +56,7 @@ * * Description: * All STM32 architectures must provide the following entry point. This entry point - * is called early in the intitialization -- after all memory has been configured + * is called early in the initialization -- after all memory has been configured * and mapped but before any devices have been initialized. * ****************************************************************************/ diff --git a/boards/arm/stm32/olimex-stm32-h407/README.txt b/boards/arm/stm32/olimex-stm32-h407/README.txt index 14854c6a18c..38e562d7550 100644 --- a/boards/arm/stm32/olimex-stm32-h407/README.txt +++ b/boards/arm/stm32/olimex-stm32-h407/README.txt @@ -35,7 +35,7 @@ On the H407 board, ?? all uarts are available for pin mappings USART2 can be used for nsh console like on Discovery board, or you can use USART6 exposed via UEXT connector. -Olimex offers MOD-RS232 voltage level convertor for the UEXT so it can be +Olimex offers MOD-RS232 voltage level converter for the UEXT so it can be attached to computer serial port. STM32-H407-specific Configuration Options diff --git a/boards/arm/stm32/olimex-stm32-h407/include/board.h b/boards/arm/stm32/olimex-stm32-h407/include/board.h index 16dcdd04d7c..f0d0cf138ad 100644 --- a/boards/arm/stm32/olimex-stm32-h407/include/board.h +++ b/boards/arm/stm32/olimex-stm32-h407/include/board.h @@ -270,7 +270,7 @@ #define GPIO_CAN2_RX GPIO_CAN1_RX_2 /* PB5 */ #define GPIO_CAN2_TX GPIO_CAN1_TX_2 /* PB6 */ -/* DMA Channl/Stream Selections *****************************************************/ +/* DMA Channel/Stream Selections *****************************************************/ /* Stream selections are arbitrary for now but might become important in the future * if we set aside more DMA channels/streams. * diff --git a/boards/arm/stm32/olimex-stm32-h407/src/olimex-stm32-h407.h b/boards/arm/stm32/olimex-stm32-h407/src/olimex-stm32-h407.h index 34be9567057..b9a7924a354 100644 --- a/boards/arm/stm32/olimex-stm32-h407/src/olimex-stm32-h407.h +++ b/boards/arm/stm32/olimex-stm32-h407/src/olimex-stm32-h407.h @@ -210,7 +210,7 @@ * Otherwise CONFIG_BOARD_LATE_INITIALIZE=y: * Called from board_late_initialize(). * - * Otherise, bad news: Never called + * Otherwise, bad news: Never called * ****************************************************************************/ diff --git a/boards/arm/stm32/olimex-stm32-h407/src/stm32_boot.c b/boards/arm/stm32/olimex-stm32-h407/src/stm32_boot.c index 1f2dcc204b5..9eed69e684e 100644 --- a/boards/arm/stm32/olimex-stm32-h407/src/stm32_boot.c +++ b/boards/arm/stm32/olimex-stm32-h407/src/stm32_boot.c @@ -58,7 +58,7 @@ * * Description: * All STM32 architectures must provide the following entry point. This entry point - * is called early in the intitialization -- after all memory has been configured + * is called early in the initialization -- after all memory has been configured * and mapped but before any devices have been initialized. * ****************************************************************************/ diff --git a/boards/arm/stm32/olimex-stm32-h407/src/stm32_bringup.c b/boards/arm/stm32/olimex-stm32-h407/src/stm32_bringup.c index e8470c8aa58..5259fdbeaf4 100644 --- a/boards/arm/stm32/olimex-stm32-h407/src/stm32_bringup.c +++ b/boards/arm/stm32/olimex-stm32-h407/src/stm32_bringup.c @@ -85,7 +85,7 @@ * Otherwise CONFIG_BOARD_LATE_INITIALIZE=y: * Called from board_late_initialize(). * - * Otherise, bad news: Never called + * Otherwise, bad news: Never called * ****************************************************************************/ diff --git a/boards/arm/stm32/olimex-stm32-p107/src/stm32_boot.c b/boards/arm/stm32/olimex-stm32-p107/src/stm32_boot.c index 0235600723e..722451eabb5 100644 --- a/boards/arm/stm32/olimex-stm32-p107/src/stm32_boot.c +++ b/boards/arm/stm32/olimex-stm32-p107/src/stm32_boot.c @@ -53,7 +53,7 @@ * * Description: * All STM32 architectures must provide the following entry point. This entry point - * is called early in the intitialization -- after all memory has been configured + * is called early in the initialization -- after all memory has been configured * and mapped but before any devices have been initialized. * ****************************************************************************/ diff --git a/boards/arm/stm32/olimex-stm32-p407/src/stm32_boot.c b/boards/arm/stm32/olimex-stm32-p407/src/stm32_boot.c index b679191685d..0dab51e1fbb 100644 --- a/boards/arm/stm32/olimex-stm32-p407/src/stm32_boot.c +++ b/boards/arm/stm32/olimex-stm32-p407/src/stm32_boot.c @@ -56,7 +56,7 @@ * * Description: * All STM32 architectures must provide the following entry point. This entry point - * is called early in the intitialization -- after all memory has been configured + * is called early in the initialization -- after all memory has been configured * and mapped but before any devices have been initialized. * ****************************************************************************/ diff --git a/boards/arm/stm32/olimexino-stm32/src/stm32_composite.c b/boards/arm/stm32/olimexino-stm32/src/stm32_composite.c index 33bf3f8ae40..b5ec10e82f4 100644 --- a/boards/arm/stm32/olimexino-stm32/src/stm32_composite.c +++ b/boards/arm/stm32/olimexino-stm32/src/stm32_composite.c @@ -307,7 +307,7 @@ static FAR void *board_composite0_connect(int port) static FAR void *board_composite1_connect(int port) { /* REVISIT: This configuration currently fails. stm32_epallocpma() fails - * allocate a buffer for the 6th endpoint. Currenlty it supports 7x64 byte + * allocate a buffer for the 6th endpoint. Currently it supports 7x64 byte * buffers, two required for EP0, leaving only buffers for 5 additional * endpoints. */ diff --git a/boards/arm/stm32/photon/Kconfig b/boards/arm/stm32/photon/Kconfig index f76203d6c05..381d9a278fd 100644 --- a/boards/arm/stm32/photon/Kconfig +++ b/boards/arm/stm32/photon/Kconfig @@ -29,7 +29,7 @@ config PHOTON_IWDG_TIMEOUT if PHOTON_WDG config PHOTON_WDG_THREAD - bool "Watchdog Deamon Thread" + bool "Watchdog Daemon Thread" if PHOTON_WDG_THREAD config PHOTON_WDG_THREAD_NAME diff --git a/boards/arm/stm32/photon/README.txt b/boards/arm/stm32/photon/README.txt index 312440ccf53..3c88549110f 100644 --- a/boards/arm/stm32/photon/README.txt +++ b/boards/arm/stm32/photon/README.txt @@ -112,7 +112,7 @@ Flashing NuttX in the Photon board 3) Restore the original firmware If you config to use the stock bootloader of Photon, you may - reload the original firmware with dfu-utils as you like. Otherwize + reload the original firmware with dfu-utils as you like. Otherwise you must have backuped the whole image beforehand, and reload it via SWD debug port. diff --git a/boards/arm/stm32/photon/include/board.h b/boards/arm/stm32/photon/include/board.h index ec54e273d88..999c035e4e8 100644 --- a/boards/arm/stm32/photon/include/board.h +++ b/boards/arm/stm32/photon/include/board.h @@ -283,7 +283,7 @@ # define SDIO_SDXFR_CLKDIV (2 << SDIO_CLKCR_CLKDIV_SHIFT) #endif -/* DMA Channl/Stream Selections *****************************************************/ +/* DMA Channel/Stream Selections *****************************************************/ /* Stream selections are arbitrary for now but might become important in the future * if we set aside more DMA channels/streams. * diff --git a/boards/arm/stm32/shenzhou/README.txt b/boards/arm/stm32/shenzhou/README.txt index 74fc25732cc..3eb6c65d131 100644 --- a/boards/arm/stm32/shenzhou/README.txt +++ b/boards/arm/stm32/shenzhou/README.txt @@ -378,7 +378,7 @@ Shenzhou-specific Configuration Options CONFIG_STM32_MII_MCO - Use MCO to clock the MII interface CONFIG_STM32_RMII - Support Ethernet RMII interface CONFIG_STM32_RMII_MCO - Use MCO to clock the RMII interface - CONFIG_STM32_AUTONEG - Use PHY autonegotion to determine speed and mode + CONFIG_STM32_AUTONEG - Use PHY autonegotiation to determine speed and mode CONFIG_STM32_ETHFD - If CONFIG_STM32_AUTONEG is not defined, then this may be defined to select full duplex mode. Default: half-duplex CONFIG_STM32_ETH100MBPS - If CONFIG_STM32_AUTONEG is not defined, then this diff --git a/boards/arm/stm32/shenzhou/scripts/ld.script.dfu b/boards/arm/stm32/shenzhou/scripts/ld.script.dfu index 1532da09476..6e542298e2b 100644 --- a/boards/arm/stm32/shenzhou/scripts/ld.script.dfu +++ b/boards/arm/stm32/shenzhou/scripts/ld.script.dfu @@ -35,7 +35,7 @@ /* The STM32F107VC has 256K of FLASH beginning at address 0x0800:0000 and * 64K of SRAM beginning at address 0x2000:0000. Here we assume that the - * STMicro DFU bootloader is being used. In that case, the corrct load .text + * STMicro DFU bootloader is being used. In that case, the correct load .text * load address is 0x08003000 (leaving 208K). */ diff --git a/boards/arm/stm32/shenzhou/src/stm32_ili93xx.c b/boards/arm/stm32/shenzhou/src/stm32_ili93xx.c index 51bd5b66283..d8c5ccd425e 100644 --- a/boards/arm/stm32/shenzhou/src/stm32_ili93xx.c +++ b/boards/arm/stm32/shenzhou/src/stm32_ili93xx.c @@ -1907,7 +1907,7 @@ FAR struct lcd_dev_s *board_lcd_getdev(int lcddev) * Name: board_lcd_uninitialize * * Description: - * Unitialize the LCD support + * Uninitialize the LCD support * ****************************************************************************/ diff --git a/boards/arm/stm32/shenzhou/src/stm32_ssd1289.c b/boards/arm/stm32/shenzhou/src/stm32_ssd1289.c index 2bec91d6b8b..a6fe6f11e93 100644 --- a/boards/arm/stm32/shenzhou/src/stm32_ssd1289.c +++ b/boards/arm/stm32/shenzhou/src/stm32_ssd1289.c @@ -558,7 +558,7 @@ int board_lcd_initialize(void) * * Description: * Return a a reference to the LCD object for the specified LCD. This allows - * suport for multiple LCD devices. + * support for multiple LCD devices. * ****************************************************************************/ @@ -573,7 +573,7 @@ FAR struct lcd_dev_s *board_lcd_getdev(int lcddev) * Name: board_lcd_uninitialize * * Description: - * Unitialize the LCD support + * Uninitialize the LCD support * ****************************************************************************/ diff --git a/boards/arm/stm32/stm3210e-eval/README.txt b/boards/arm/stm32/stm3210e-eval/README.txt index c6a0f9db2bd..f4756f18d06 100644 --- a/boards/arm/stm32/stm3210e-eval/README.txt +++ b/boards/arm/stm32/stm3210e-eval/README.txt @@ -51,7 +51,7 @@ DFU and JTAG 3. Run the DFU SE program to load nuttx.dfu into FLASH. What if the DFU loader is not in FLASH? The loader code is available - inside of the Demo dirctory of the USBLib ZIP file that can be downloaded + inside of the Demo directory of the USBLib ZIP file that can be downloaded from the STMicro Website. You can build it using RIDE (or other toolchains); you will need a JTAG emulator to burn it into FLASH the first time. @@ -204,7 +204,7 @@ RTC CONFIG_RTC_HIRES - The typical RTC keeps time to resolution of 1 second, usually supporting a 32-bit time_t value. In this case, the RTC is used to "seed" the normal NuttX timer and the - NuttX timer provides for higher resoution time. If CONFIG_RTC_HIRES + NuttX timer provides for higher resolution time. If CONFIG_RTC_HIRES is enabled in the NuttX configuration, then the RTC provides higher resolution time and completely replaces the system timer for purpose of date and time. @@ -431,7 +431,7 @@ STM3210E-EVAL-specific Configuration Options CONFIG_SDIO_DMA - Support DMA data transfers. Requires CONFIG_STM32_SDIO and CONFIG_STM32_DMA2. - CONFIG_STM32_SDIO_PRI - Select SDIO interrupt prority. Default: 128 + CONFIG_STM32_SDIO_PRI - Select SDIO interrupt priority. Default: 128 CONFIG_STM32_SDIO_DMAPRIO - Select SDIO DMA interrupt priority. Default: Medium CONFIG_STM32_SDIO_WIDTH_D1_ONLY - Select 1-bit transfer mode. Default: @@ -723,7 +723,7 @@ Where is one of the following: CONFIG_INPUT=y # Enable input driver support CONFIG_DJOYSTICK=y # Enable the joystick drivers - # (default parmeters should be okay) + # (default parameters should be okay) Enable the DJoystick Example: CONFIG_EXAMPLES_DJOYSTICK=y # Enable the DJoystick example diff --git a/boards/arm/stm32/stm3210e-eval/include/board.h b/boards/arm/stm32/stm3210e-eval/include/board.h index 09d39243085..0d336728379 100644 --- a/boards/arm/stm32/stm3210e-eval/include/board.h +++ b/boards/arm/stm32/stm3210e-eval/include/board.h @@ -247,7 +247,7 @@ extern "C" * This is a non-standard LCD interface just for the STM3210E-EVAL board. Because * of the various rotations, clearing the display in the normal way by writing a * sequences of runs that covers the entire display can be very slow. Here the - * dispaly is cleared by simply setting all GRAM memory to the specified color. + * display is cleared by simply setting all GRAM memory to the specified color. * ****************************************************************************/ diff --git a/boards/arm/stm32/stm3210e-eval/scripts/ld.script.dfu b/boards/arm/stm32/stm3210e-eval/scripts/ld.script.dfu index 6ad4299d0d5..b7391ac444b 100644 --- a/boards/arm/stm32/stm3210e-eval/scripts/ld.script.dfu +++ b/boards/arm/stm32/stm3210e-eval/scripts/ld.script.dfu @@ -35,7 +35,7 @@ /* The STM32F103ZET6 has 512Kb of FLASH beginning at address 0x0800:0000 and * 64Kb of SRAM beginning at address 0x2000:0000. Here we assume that the - * STM3210E-EVAL's DFU bootloader is being used. In that case, the corrct + * STM3210E-EVAL's DFU bootloader is being used. In that case, the correct * load .text load address is 0x08003000 (leaving 464Kb). */ diff --git a/boards/arm/stm32/stm3210e-eval/src/stm32_boot.c b/boards/arm/stm32/stm3210e-eval/src/stm32_boot.c index be228262078..5ca876a1f78 100644 --- a/boards/arm/stm32/stm3210e-eval/src/stm32_boot.c +++ b/boards/arm/stm32/stm3210e-eval/src/stm32_boot.c @@ -64,7 +64,7 @@ * * Description: * All STM32 architectures must provide the following entry point. This entry point - * is called early in the intitialization -- after all memory has been configured + * is called early in the initialization -- after all memory has been configured * and mapped but before any devices have been initialized. * ****************************************************************************/ diff --git a/boards/arm/stm32/stm3210e-eval/src/stm32_composite.c b/boards/arm/stm32/stm3210e-eval/src/stm32_composite.c index 196a6d6e082..2a85d09d12a 100644 --- a/boards/arm/stm32/stm3210e-eval/src/stm32_composite.c +++ b/boards/arm/stm32/stm3210e-eval/src/stm32_composite.c @@ -303,7 +303,7 @@ static FAR void *board_composite0_connect(int port) static FAR void *board_composite1_connect(int port) { /* REVISIT: This configuration currently fails. stm32_epallocpma() fails - * allocate a buffer for the 6th endpoint. Currenlty it supports 7x64 byte + * allocate a buffer for the 6th endpoint. Currently it supports 7x64 byte * buffers, two required for EP0, leaving only buffers for 5 additional * endpoints. */ diff --git a/boards/arm/stm32/stm3210e-eval/src/stm32_lcd.c b/boards/arm/stm32/stm3210e-eval/src/stm32_lcd.c index 66e2d2b00e5..85bc7da57f8 100644 --- a/boards/arm/stm32/stm3210e-eval/src/stm32_lcd.c +++ b/boards/arm/stm32/stm3210e-eval/src/stm32_lcd.c @@ -1816,7 +1816,7 @@ FAR struct lcd_dev_s *board_lcd_getdev(int lcddev) * Name: board_lcd_uninitialize * * Description: - * Unitialize the LCD support + * Uninitialize the LCD support * ****************************************************************************/ @@ -1833,7 +1833,7 @@ void board_lcd_uninitialize(void) * This is a non-standard LCD interface just for the STM3210E-EVAL board. Because * of the various rotations, clearing the display in the normal way by writing a * sequences of runs that covers the entire display can be very slow. Here the - * dispaly is cleared by simply setting all GRAM memory to the specified color. + * display is cleared by simply setting all GRAM memory to the specified color. * ****************************************************************************/ diff --git a/boards/arm/stm32/stm3220g-eval/README.txt b/boards/arm/stm32/stm3220g-eval/README.txt index 9a10ca4a62d..2b47337bffd 100644 --- a/boards/arm/stm32/stm3220g-eval/README.txt +++ b/boards/arm/stm32/stm3220g-eval/README.txt @@ -422,7 +422,7 @@ STM3220G-EVAL-specific Configuration Options CONFIG_SDIO_DMA - Support DMA data transfers. Requires CONFIG_STM32_SDIO and CONFIG_STM32_DMA2. - CONFIG_STM32_SDIO_PRI - Select SDIO interrupt prority. Default: 128 + CONFIG_STM32_SDIO_PRI - Select SDIO interrupt priority. Default: 128 CONFIG_STM32_SDIO_DMAPRIO - Select SDIO DMA interrupt priority. Default: Medium CONFIG_STM32_SDIO_WIDTH_D1_ONLY - Select 1-bit transfer mode. Default: @@ -433,7 +433,7 @@ STM3220G-EVAL-specific Configuration Options CONFIG_STM32_MII_MCO1 - Use MCO1 to clock the MII interface CONFIG_STM32_MII_MCO2 - Use MCO2 to clock the MII interface CONFIG_STM32_RMII - Support Ethernet RMII interface - CONFIG_STM32_AUTONEG - Use PHY autonegotion to determine speed and mode + CONFIG_STM32_AUTONEG - Use PHY autonegotiation to determine speed and mode CONFIG_STM32_ETHFD - If CONFIG_STM32_AUTONEG is not defined, then this may be defined to select full duplex mode. Default: half-duplex CONFIG_STM32_ETH100MBPS - If CONFIG_STM32_AUTONEG is not defined, then this @@ -512,7 +512,7 @@ Where is one of the following: dhcpd: ----- - This builds the DCHP server using the apps/examples/dhcpd application + This builds the DHCP server using the apps/examples/dhcpd application (for execution from FLASH.) See apps/examples/README.txt for information about the dhcpd example. diff --git a/boards/arm/stm32/stm3220g-eval/include/board.h b/boards/arm/stm32/stm3220g-eval/include/board.h index 6fbd0038497..f2304f5664f 100644 --- a/boards/arm/stm32/stm3220g-eval/include/board.h +++ b/boards/arm/stm32/stm3220g-eval/include/board.h @@ -430,7 +430,7 @@ #define GPIO_I2C1_SCL GPIO_I2C1_SCL_1 #define GPIO_I2C1_SDA GPIO_I2C1_SDA_2 -/* DMA Channl/Stream Selections *****************************************************/ +/* DMA Channel/Stream Selections *****************************************************/ /* Stream selections are arbitrary for now but might become important in the future * is we set aside more DMA channels/streams. * @@ -467,7 +467,7 @@ extern "C" * This is a non-standard LCD interface just for the STM3210E-EVAL board. Because * of the various rotations, clearing the display in the normal way by writing a * sequences of runs that covers the entire display can be very slow. Here the - * dispaly is cleared by simply setting all GRAM memory to the specified color. + * display is cleared by simply setting all GRAM memory to the specified color. * ****************************************************************************/ diff --git a/boards/arm/stm32/stm3220g-eval/src/stm32_boot.c b/boards/arm/stm32/stm3220g-eval/src/stm32_boot.c index f14256ce2dd..9bb69136852 100644 --- a/boards/arm/stm32/stm3220g-eval/src/stm32_boot.c +++ b/boards/arm/stm32/stm3220g-eval/src/stm32_boot.c @@ -64,7 +64,7 @@ * * Description: * All STM32 architectures must provide the following entry point. This entry point - * is called early in the intitialization -- after all memory has been configured + * is called early in the initialization -- after all memory has been configured * and mapped but before any devices have been initialized. * ****************************************************************************/ diff --git a/boards/arm/stm32/stm3220g-eval/src/stm32_lcd.c b/boards/arm/stm32/stm3220g-eval/src/stm32_lcd.c index 3a859e99e7a..668d245946b 100644 --- a/boards/arm/stm32/stm3220g-eval/src/stm32_lcd.c +++ b/boards/arm/stm32/stm3220g-eval/src/stm32_lcd.c @@ -610,7 +610,7 @@ static int stm3220g_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *bu } #elif defined(CONFIG_LCD_PORTRAIT) /* Convert coordinates. In this configuration, the top of the display is to the left - * of the buttons (if the board is held so that the buttons are at the botton of the + * of the buttons (if the board is held so that the buttons are at the bottom of the * board). */ @@ -632,7 +632,7 @@ static int stm3220g_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *bu } #else /* CONFIG_LCD_RPORTRAIT */ /* Convert coordinates. In this configuration, the top of the display is to the right - * of the buttons (if the board is held so that the buttons are at the botton of the + * of the buttons (if the board is held so that the buttons are at the bottom of the * board). */ @@ -746,7 +746,7 @@ static int stm3220g_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer, } #elif defined(CONFIG_LCD_PORTRAIT) /* Convert coordinates. In this configuration, the top of the display is to the left - * of the buttons (if the board is held so that the buttons are at the botton of the + * of the buttons (if the board is held so that the buttons are at the bottom of the * board). */ @@ -769,7 +769,7 @@ static int stm3220g_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer, } #else /* CONFIG_LCD_RPORTRAIT */ /* Convert coordinates. In this configuration, the top of the display is to the right - * of the buttons (if the board is held so that the buttons are at the botton of the + * of the buttons (if the board is held so that the buttons are at the bottom of the * board). */ @@ -1151,7 +1151,7 @@ FAR struct lcd_dev_s *board_lcd_getdev(int lcddev) * Name: board_lcd_uninitialize * * Description: - * Unitialize the LCD support + * Uninitialize the LCD support * ****************************************************************************/ diff --git a/boards/arm/stm32/stm3240g-eval/README.txt b/boards/arm/stm32/stm3240g-eval/README.txt index 65907855bed..2e4cea4e58e 100644 --- a/boards/arm/stm32/stm3240g-eval/README.txt +++ b/boards/arm/stm32/stm3240g-eval/README.txt @@ -514,7 +514,7 @@ STM3240G-EVAL-specific Configuration Options CONFIG_SDIO_DMA - Support DMA data transfers. Requires CONFIG_STM32_SDIO and CONFIG_STM32_DMA2. - CONFIG_STM32_SDIO_PRI - Select SDIO interrupt prority. Default: 128 + CONFIG_STM32_SDIO_PRI - Select SDIO interrupt priority. Default: 128 CONFIG_STM32_SDIO_DMAPRIO - Select SDIO DMA interrupt priority. Default: Medium CONFIG_STM32_SDIO_WIDTH_D1_ONLY - Select 1-bit transfer mode. Default: @@ -589,14 +589,14 @@ STM3240G-EVAL-specific Configuration Options 320x240 "landscape" orientation. In this orientation, the top of the display is to the left of the buttons (if the board is held so that the buttons are at the - botton of the board). + bottom of the board). CONFIG_LCD_RPORTRAIT - Define for 240x320 display "reverse portrait" orientation support. In this orientation, the STM3210E-EVAL's LCD ribbon cable is at the top of the display. Default is 320x240 "landscape" orientation. In this orientation, the top of the display is to the right of the buttons (if the board is held so that the buttons are at the - botton of the board). + bottom of the board). CONFIG_STM3240G_LCD_RDSHIFT - When reading 16-bit gram data, there appears to be a shift in the returned data. This value fixes the offset. Default 5. @@ -646,7 +646,7 @@ Where is one of the following: dhcpd: ----- - This builds the DCHP server using the apps/examples/dhcpd application + This builds the DHCP server using the apps/examples/dhcpd application (for execution from FLASH.) See apps/examples/README.txt for information about the dhcpd example. @@ -673,7 +673,7 @@ Where is one of the following: discover: -------- This configuration exercises netutils/discover utility using - apps/exmaples/discover. This example initializes and starts the UDP + apps/examples/discover. This example initializes and starts the UDP discover daemon. This daemon is useful for discovering devices in local networks, especially with DHCP configured devices. It listens for UDP broadcasts which also can include a device class so that @@ -1017,7 +1017,7 @@ Where is one of the following: a USB host on the STM32F4Discovery, including support for a mass storage class driver: - CONFIG_USBDEV=n : Make sure tht USB device support is disabled + CONFIG_USBDEV=n : Make sure the USB device support is disabled CONFIG_USBHOST=y : Enable USB host support CONFIG_STM32_OTGFS=y : Enable the STM32 USB OTG FS block CONFIG_STM32_SYSCFG=y : Needed for all USB OTF FS support diff --git a/boards/arm/stm32/stm3240g-eval/include/board.h b/boards/arm/stm32/stm3240g-eval/include/board.h index 952878f1df5..6b0b592ea9c 100644 --- a/boards/arm/stm32/stm3240g-eval/include/board.h +++ b/boards/arm/stm32/stm3240g-eval/include/board.h @@ -459,7 +459,7 @@ #define GPIO_I2C1_SCL GPIO_I2C1_SCL_1 #define GPIO_I2C1_SDA GPIO_I2C1_SDA_2 -/* DMA Channl/Stream Selections *****************************************************/ +/* DMA Channel/Stream Selections *****************************************************/ /* Stream selections are arbitrary for now but might become important in the future * if we set aside more DMA channels/streams. * @@ -496,7 +496,7 @@ extern "C" * This is a non-standard LCD interface just for the STM3210E-EVAL board. Because * of the various rotations, clearing the display in the normal way by writing a * sequences of runs that covers the entire display can be very slow. Here the - * dispaly is cleared by simply setting all GRAM memory to the specified color. + * display is cleared by simply setting all GRAM memory to the specified color. * ****************************************************************************/ diff --git a/boards/arm/stm32/stm3240g-eval/src/stm32_lcd.c b/boards/arm/stm32/stm3240g-eval/src/stm32_lcd.c index efcf407600c..5f838ce8ba1 100644 --- a/boards/arm/stm32/stm3240g-eval/src/stm32_lcd.c +++ b/boards/arm/stm32/stm3240g-eval/src/stm32_lcd.c @@ -609,7 +609,7 @@ static int stm3240g_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *bu } #elif defined(CONFIG_LCD_PORTRAIT) /* Convert coordinates. In this configuration, the top of the display is to the left - * of the buttons (if the board is held so that the buttons are at the botton of the + * of the buttons (if the board is held so that the buttons are at the bottom of the * board). */ @@ -631,7 +631,7 @@ static int stm3240g_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *bu } #else /* CONFIG_LCD_RPORTRAIT */ /* Convert coordinates. In this configuration, the top of the display is to the right - * of the buttons (if the board is held so that the buttons are at the botton of the + * of the buttons (if the board is held so that the buttons are at the bottom of the * board). */ @@ -745,7 +745,7 @@ static int stm3240g_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer, } #elif defined(CONFIG_LCD_PORTRAIT) /* Convert coordinates. In this configuration, the top of the display is to the left - * of the buttons (if the board is held so that the buttons are at the botton of the + * of the buttons (if the board is held so that the buttons are at the bottom of the * board). */ @@ -768,7 +768,7 @@ static int stm3240g_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer, } #else /* CONFIG_LCD_RPORTRAIT */ /* Convert coordinates. In this configuration, the top of the display is to the right - * of the buttons (if the board is held so that the buttons are at the botton of the + * of the buttons (if the board is held so that the buttons are at the bottom of the * board). */ @@ -1150,7 +1150,7 @@ FAR struct lcd_dev_s *board_lcd_getdev(int lcddev) * Name: board_lcd_uninitialize * * Description: - * Unitialize the LCD support + * Uninitialize the LCD support * ****************************************************************************/ diff --git a/boards/arm/stm32/stm32_tiny/README.txt b/boards/arm/stm32/stm32_tiny/README.txt index 58092a08d90..4fe131452fd 100644 --- a/boards/arm/stm32/stm32_tiny/README.txt +++ b/boards/arm/stm32/stm32_tiny/README.txt @@ -59,7 +59,7 @@ USART3 RX PB11 TX PB10 -* theses IO lines are intended to be used by the wireless module on the board. +* these IO lines are intended to be used by the wireless module on the board. Default USART/UART Configuration @@ -411,15 +411,15 @@ Where is one of the following: CONFIG_SYSLOG_CHAR=y : Use a character device for system logging CONFIG_SYSLOG_DEVPATH="/dev/ttyS0" : UART2 will be /dev/ttyS0 - However, there is nothing to generate SYLOG output in the default + However, there is nothing to generate SYSLOG output in the default configuration so nothing should appear on UART2 unless you enable some debug output or enable the USB monitor. 4. Enabling USB monitor SYSLOG output. If tracing is enabled, the USB device will save encoded trace output in in-memory buffer; if the USB monitor is enabled, that trace buffer will be periodically - emptied and dumped to the system loggin device (UART2 in this - configuraion): + emptied and dumped to the system logging device (UART2 in this + configuration): CONFIG_USBDEV_TRACE=y : Enable USB trace feature CONFIG_USBDEV_TRACE_NRECORDS=128 : Buffer 128 records in memory diff --git a/boards/arm/stm32/stm32butterfly2/src/stm32_mmcsd.c b/boards/arm/stm32/stm32butterfly2/src/stm32_mmcsd.c index 8b0527dccff..6d5a362ea7b 100644 --- a/boards/arm/stm32/stm32butterfly2/src/stm32_mmcsd.c +++ b/boards/arm/stm32/stm32butterfly2/src/stm32_mmcsd.c @@ -98,7 +98,7 @@ static sem_t g_cdsem; static void *stm32_cd_thread(void *arg) { - spiinfo("INFO: Runnig card detect thread\n"); + spiinfo("INFO: Running card detect thread\n"); while (1) { nxsem_wait(&g_cdsem); @@ -107,7 +107,7 @@ static void *stm32_cd_thread(void *arg) if (g_chmediaclbk) { /* Card doesn't seem to initialize properly without letting it to - * rest for a millsecond or so. + * rest for a millisecond or so. */ nxsig_usleep(1 * 1000); diff --git a/boards/arm/stm32/stm32f103-minimum/README.txt b/boards/arm/stm32/stm32f103-minimum/README.txt index 9fb54dd5d74..c59cb366428 100644 --- a/boards/arm/stm32/stm32f103-minimum/README.txt +++ b/boards/arm/stm32/stm32f103-minimum/README.txt @@ -41,7 +41,7 @@ STM32F103C8T6 Minimum System Development Boards: Good things about the red board: - 1.5k pull up resistor on the PA12 pin (USB D+) which you can - programatically drag down for automated USB reset. + programmatically drag down for automated USB reset. - large power capacitors and LDO power. - User LED on PC13 @@ -768,7 +768,7 @@ Configurations CONFIG_SYSLOG_CHAR=y : Use a character device for system logging CONFIG_SYSLOG_DEVPATH="/dev/ttyS0" : UART2 will be /dev/ttyS0 - However, there is nothing to generate SYLOG output in the default + However, there is nothing to generate SYSLOG output in the default configuration so nothing should appear on UART2 unless you enable some debug output or enable the USB monitor. @@ -776,7 +776,7 @@ Configurations device will save encoded trace output in in-memory buffer; if the USB monitor is enabled, that trace buffer will be periodically emptied and dumped to the system logging device (UART2 in this - configuraion): + configuration): CONFIG_USBDEV_TRACE=y : Enable USB trace feature CONFIG_USBDEV_TRACE_NRECORDS=128 : Buffer 128 records in memory diff --git a/boards/arm/stm32/stm32f103-minimum/src/stm32_hcsr04.c b/boards/arm/stm32/stm32f103-minimum/src/stm32_hcsr04.c index ea808b500ae..964d7234ec6 100644 --- a/boards/arm/stm32/stm32f103-minimum/src/stm32_hcsr04.c +++ b/boards/arm/stm32/stm32f103-minimum/src/stm32_hcsr04.c @@ -58,7 +58,7 @@ #endif /**************************************************************************** - * Pre-processor Defintions + * Pre-processor Definitions ****************************************************************************/ /* Use TIM1 as free running timer for HC-SR04 sensor */ diff --git a/boards/arm/stm32/stm32f103-minimum/src/stm32f103_minimum.h b/boards/arm/stm32/stm32f103-minimum/src/stm32f103_minimum.h index d18a6414867..87a483e0c01 100644 --- a/boards/arm/stm32/stm32f103-minimum/src/stm32f103_minimum.h +++ b/boards/arm/stm32/stm32f103-minimum/src/stm32f103_minimum.h @@ -239,7 +239,7 @@ * Otherwise CONFIG_BOARD_LATE_INITIALIZE=y: * Called from board_late_initialize(). * - * Otherise, bad news: Never called + * Otherwise, bad news: Never called * ****************************************************************************/ diff --git a/boards/arm/stm32/stm32f334-disco/src/stm32_boot.c b/boards/arm/stm32/stm32f334-disco/src/stm32_boot.c index 4084872d6f4..f6a48eb24ab 100644 --- a/boards/arm/stm32/stm32f334-disco/src/stm32_boot.c +++ b/boards/arm/stm32/stm32f334-disco/src/stm32_boot.c @@ -69,7 +69,7 @@ * * Description: * All STM32 architectures must provide the following entry point. This - * entry point is called early in the intitialization -- after all memory + * entry point is called early in the initialization -- after all memory * has been configured and mapped but before any devices have been * initialized. * diff --git a/boards/arm/stm32/stm32f334-disco/src/stm32_powerled.c b/boards/arm/stm32/stm32f334-disco/src/stm32_powerled.c index 3de48f1c79c..7b576ba7431 100644 --- a/boards/arm/stm32/stm32f334-disco/src/stm32_powerled.c +++ b/boards/arm/stm32/stm32f334-disco/src/stm32_powerled.c @@ -304,7 +304,7 @@ static int powerled_start(FAR struct powerled_dev_s *dev) if (powerled->opmode == POWERLED_OPMODE_CONTINUOUS) { - /* Average curent set to max */ + /* Average current set to max */ current_av_mA = (uint16_t)(current_max_mA); @@ -493,7 +493,7 @@ static int powerled_limits_set(FAR struct powerled_dev_s *dev, { limits->current = (float)LED_ABSOLUTE_CURRENT_LIMIT_mA/1000.0; pwrwarn("WARNING: " - "LED current limiit > LED absoulute current limit." + "LED current limiit > LED absolute current limit." " Set current limit to %d.\n", limits->current); } @@ -522,7 +522,7 @@ static int powerled_state_get(FAR struct powerled_dev_s *dev, static int powerled_fault_set(FAR struct powerled_dev_s *dev, uint8_t fault) { - /* Do nothin */ + /* Do nothing */ return -1; } diff --git a/boards/arm/stm32/stm32f334-disco/src/stm32_smps.c b/boards/arm/stm32/stm32f334-disco/src/stm32_smps.c index d4df5dfc15b..e13716f841b 100644 --- a/boards/arm/stm32/stm32f334-disco/src/stm32_smps.c +++ b/boards/arm/stm32/stm32f334-disco/src/stm32_smps.c @@ -145,11 +145,11 @@ # error "Input voltage limit greater than absolute limit!" #endif -/* Maximum output voltage for boost conveter in float */ +/* Maximum output voltage for boost converter in float */ #define BOOST_VOLT_MAX ((float)CONFIG_EXAMPLES_SMPS_OUT_VOLTAGE_LIMIT/1000.0) -/* Current limit table dimmension */ +/* Current limit table dimension */ #define SMPS_CURRENT_LIMIT_TAB_DIM 15 @@ -171,7 +171,7 @@ #define PID_KI ((float)0.1) #define PID_KD ((float)0.0) -/* Converter frequncies: +/* Converter frequencies: * - TIMA_PWM_FREQ - buck converter 250kHz * - TIMB_PWM_FREQ - boost converter 250kHz */ @@ -514,7 +514,7 @@ static int smps_start(FAR struct smps_dev_s *dev) ADC_INT_ENABLE(adc, ADC_INT_JEOS); - /* Enable ADC12 interrups */ + /* Enable ADC12 interrupts */ up_enable_irq(STM32_IRQ_ADC12); @@ -546,7 +546,7 @@ static int smps_stop(FAR struct smps_dev_s *dev) ADC_INT_DISABLE(adc, ADC_INT_JEOS); - /* Disable ADC12 interrups */ + /* Disable ADC12 interrupts */ up_disable_irq(STM32_IRQ_ADC12); @@ -637,7 +637,7 @@ static int smps_limits_set(FAR struct smps_dev_s *dev, { limits->v_out = (float)CONFIG_EXAMPLES_SMPS_OUT_VOLTAGE_LIMIT/1000.0; pwrwarn("WARNING: " - "SMPS output voltage limiit > SMPS absoulute output voltage limit." + "SMPS output voltage limiit > SMPS absolute output voltage limit." " Set output voltage limit to %.2f.\n", limits->v_out); } @@ -646,7 +646,7 @@ static int smps_limits_set(FAR struct smps_dev_s *dev, { limits->v_in = (float)CONFIG_EXAMPLES_SMPS_IN_VOLTAGE_LIMIT/1000.0; pwrwarn("WARNING: " - "SMPS input voltage limiit > SMPS absoulute input voltage limit." + "SMPS input voltage limiit > SMPS absolute input voltage limit." " Set input voltage limit to %.2f.\n", limits->v_in); } @@ -655,7 +655,7 @@ static int smps_limits_set(FAR struct smps_dev_s *dev, { limits->i_out = (float)CONFIG_EXAMPLES_SMPS_OUT_CURRENT_LIMIT/1000.0; pwrwarn("WARNING: " - "SMPS output current limiit > SMPS absoulute output current limit." + "SMPS output current limiit > SMPS absolute output current limit." " Set output current limit to %.2f.\n", limits->i_out); } @@ -966,7 +966,7 @@ static void adc12_handler(void) if (smps->param.v_out > (priv->v_in+SMPS_BUCKBOOST_RANGE)) { - /* Desired output voltage greather than input voltage - set boost converter */ + /* Desired output voltage greater than input voltage - set boost converter */ mode = CONVERTER_MODE_BOOST; } @@ -992,7 +992,7 @@ static void adc12_handler(void) smps_conv_mode_set(priv, lower, mode); } - /* Get regualtor error */ + /* Get regulator error */ err = smps->param.v_out - priv->v_out; diff --git a/boards/arm/stm32/stm32f3discovery/README.txt b/boards/arm/stm32/stm32f3discovery/README.txt index 77c0ede7e19..b22e670e3a9 100644 --- a/boards/arm/stm32/stm32f3discovery/README.txt +++ b/boards/arm/stm32/stm32f3discovery/README.txt @@ -526,7 +526,7 @@ Where is one of the following: CONFIG_SYSLOG_CHAR=y : Use a character device for system logging CONFIG_SYSLOG_DEVPATH="/dev/ttyS0" : USART2 will be /dev/ttyS0 - However, there is nothing to generate SYLOG output in the default + However, there is nothing to generate SYSLOG output in the default configuration so nothing should appear on USART2 unless you enable some debug output or enable the USB monitor. @@ -539,8 +539,8 @@ Where is one of the following: 4. Enabling USB monitor SYSLOG output. If tracing is enabled, the USB device will save encoded trace output in in-memory buffer; if the USB monitor is enabled, that trace buffer will be periodically - emptied and dumped to the system loggin device (USART2 in this - configuraion): + emptied and dumped to the system logging device (USART2 in this + configuration): Device Drivers -> "USB Device Driver Support: CONFIG_USBDEV_TRACE=y : Enable USB trace feature diff --git a/boards/arm/stm32/stm32f3discovery/src/stm32_boot.c b/boards/arm/stm32/stm32f3discovery/src/stm32_boot.c index 81f0ac4c27e..c6de0222041 100644 --- a/boards/arm/stm32/stm32f3discovery/src/stm32_boot.c +++ b/boards/arm/stm32/stm32f3discovery/src/stm32_boot.c @@ -56,7 +56,7 @@ * * Description: * All STM32 architectures must provide the following entry point. This entry point - * is called early in the intitialization -- after all memory has been configured + * is called early in the initialization -- after all memory has been configured * and mapped but before any devices have been initialized. * ****************************************************************************/ diff --git a/boards/arm/stm32/stm32f3discovery/src/stm32_usb.c b/boards/arm/stm32/stm32f3discovery/src/stm32_usb.c index 6c32f4861b2..41e16b81f0d 100644 --- a/boards/arm/stm32/stm32f3discovery/src/stm32_usb.c +++ b/boards/arm/stm32/stm32f3discovery/src/stm32_usb.c @@ -89,7 +89,7 @@ void stm32_usbinitialize(void) { - /* Does the STM32 F3 hava an external soft pull-up? */ + /* Does the STM32 F3 have an external soft pull-up? */ } /**************************************************************************** diff --git a/boards/arm/stm32/stm32f429i-disco/README.txt b/boards/arm/stm32/stm32f429i-disco/README.txt index 5747c534ddf..4b3124539d4 100644 --- a/boards/arm/stm32/stm32f429i-disco/README.txt +++ b/boards/arm/stm32/stm32f429i-disco/README.txt @@ -31,7 +31,7 @@ Refer to the http://www.st.com website for further information about this board (search keyword: 429i-disco) NOTE: This port was based on the original discovery kit, STM32F429I-DISCO. -That board has been superceded by the new STM32F429I-DISC1. +That board has been superseded by the new STM32F429I-DISC1. Contents ======== @@ -603,7 +603,7 @@ STM32F429I-DISCO-specific Configuration Options CONFIG_SDIO_DMA - Support DMA data transfers. Requires CONFIG_STM32_SDIO and CONFIG_STM32_DMA2. - CONFIG_STM32_SDIO_PRI - Select SDIO interrupt prority. Default: 128 + CONFIG_STM32_SDIO_PRI - Select SDIO interrupt priority. Default: 128 CONFIG_STM32_SDIO_DMAPRIO - Select SDIO DMA interrupt priority. Default: Medium CONFIG_STM32_SDIO_WIDTH_D1_ONLY - Select 1-bit transfer mode. Default: @@ -707,7 +707,7 @@ Where is one of the following: STM32F429I-DISCO LittlevGL demo example. The ltdc is initialized during boot up. Interaction with NSH is via - the serial console at 115200 8N1 baud. From the nsh comand line + the serial console at 115200 8N1 baud. From the nsh command line execute the lvgldemo example: nsh> lvgldemo @@ -855,7 +855,7 @@ Where is one of the following: class driver: Device Drivers -> - CONFIG_USBDEV=n : Make sure tht USB device support is disabled + CONFIG_USBDEV=n : Make sure the USB device support is disabled CONFIG_USBHOST=y : Enable USB host support CONFIG_USBHOST_ISOC_DISABLE=y @@ -931,7 +931,7 @@ Where is one of the following: Drivers -> USB Host Driver Support CONFIG_USBHOST_HUB=y : Enable the hub class - CONFIG_USBHOST_ASYNCH=y : Asynchonous I/O supported needed for hubs + CONFIG_USBHOST_ASYNCH=y : Asynchronous I/O supported needed for hubs Board Selection -> CONFIG_STM32F429IDISCO_USBHOST_STACKSIZE=2048 (bigger than it needs to be) diff --git a/boards/arm/stm32/stm32f429i-disco/configs/fb/README.txt b/boards/arm/stm32/stm32f429i-disco/configs/fb/README.txt index b73d1e80835..e20ba5d4992 100644 --- a/boards/arm/stm32/stm32f429i-disco/configs/fb/README.txt +++ b/boards/arm/stm32/stm32f429i-disco/configs/fb/README.txt @@ -12,7 +12,7 @@ cd .. make -Frambuffer calculation +Framebuffer calculation ---------------------- Use the helper script boards/stm32f429i-disco/tools/fbcalc.sh for calculating @@ -34,7 +34,7 @@ Configured at build time - background color - default color (outside visible screen) -Configurable by nuttx frambuffer interface +Configurable by nuttx framebuffer interface - cmap support (color table is shared by both LTDC overlays and DMA2D when enabled) @@ -106,6 +106,6 @@ The test will put a pattern of concentric squares in the framebuffer and terminate. You can also test overlay hardware acceleration functionality by executing the -follwing command (shows a commandline help): +following command (shows a commandline help): nsh> fboverlay diff --git a/boards/arm/stm32/stm32f429i-disco/include/board.h b/boards/arm/stm32/stm32f429i-disco/include/board.h index cdbd5c48a0c..33249609b69 100644 --- a/boards/arm/stm32/stm32f429i-disco/include/board.h +++ b/boards/arm/stm32/stm32f429i-disco/include/board.h @@ -347,7 +347,7 @@ #define BOARD_LTDC_GCR_VSPOL 0 /* !LTDC_GCR_VSPOL */ -/* Horicontal Sync Polarity */ +/* Horizontal Sync Polarity */ #define BOARD_LTDC_GCR_HSPOL 0 /* !LTDC_GCR_HSPOL */ @@ -414,7 +414,7 @@ #define BOARD_LTDC_GCR_VSPOL ??? -/* Horicontal Sync Polarity */ +/* Horizontal Sync Polarity */ #define BOARD_LTDC_GCR_HSPOL ??? diff --git a/boards/arm/stm32/stm32f429i-disco/src/stm32_ili93414ws.c b/boards/arm/stm32/stm32f429i-disco/src/stm32_ili93414ws.c index 61f622b8e11..82f183ff276 100644 --- a/boards/arm/stm32/stm32f429i-disco/src/stm32_ili93414ws.c +++ b/boards/arm/stm32/stm32f429i-disco/src/stm32_ili93414ws.c @@ -956,7 +956,7 @@ static void stm32_ili93414ws_deselect(FAR struct ili9341_lcd_s *lcd) flags = enter_critical_section(); /* Restore cr1 and cr2 register to be sure they will be usable - * by default spi interface structure. (This is an important workarround as + * by default spi interface structure. (This is an important workaround as * long as half duplex mode is not supported by the spi interface in * arch/arm/src/stm32/stm32_spi.c). */ diff --git a/boards/arm/stm32/stm32f429i-disco/src/stm32_lcd.c b/boards/arm/stm32/stm32f429i-disco/src/stm32_lcd.c index 73a8289c263..e5653e1648c 100644 --- a/boards/arm/stm32/stm32f429i-disco/src/stm32_lcd.c +++ b/boards/arm/stm32/stm32f429i-disco/src/stm32_lcd.c @@ -84,7 +84,7 @@ ILI9341_PIXEL_FORMAT_SET_DBI(5)) /* DE Mode RCM = 2, Sync Mode RCM = 3 - * Interface Mode Controle + * Interface Mode Control * * EPL: 0 High enable for RGB interface * DPL: 1 data fetched at the falling time @@ -418,7 +418,7 @@ static int stm32_ili9341_initialize(void) * Name: board_lcd_uninitialize * * Description: - * Unitialize the LCD Device. + * Uninitialize the LCD Device. * * Input Parameters: * diff --git a/boards/arm/stm32/stm32f4discovery/README.txt b/boards/arm/stm32/stm32f4discovery/README.txt index e8daa237808..fd27533a495 100644 --- a/boards/arm/stm32/stm32f4discovery/README.txt +++ b/boards/arm/stm32/stm32f4discovery/README.txt @@ -89,7 +89,7 @@ using PWM output. The external RGB connected this way: B = TIM3 CH3 on PB0 The RGB LED driver that uses PWM to control the red, green, and blue color -components can be enabled with the following configuratin settings: +components can be enabled with the following configuration settings: +CONFIG_RGBLED=y @@ -650,7 +650,7 @@ NiceRF LoRa (2AD66-LoRa V2) It is possible to wire an external LoRa module to STM32F4Discovery board. First connect the GND and VCC (to 3.3V) and then connect the SCK label to PA5, -connnect the MISO to PA6, connect the MOSI to PA7, connect the NSS to PD8, +connect the MISO to PA6, connect the MOSI to PA7, connect the NSS to PD8, connect DIO0 to PD0 and finally connect NRESET to PD4. Ethernet SPI Module ENC28J60 @@ -663,7 +663,7 @@ the Operating Voltage should be between 3.1V to 3.6V, but STM32F4Discover only supply 3.0V. You can modify your board to supply 3.3V: just remove the D3 diode and short-circuit the board pads where it was soldered). -Connect the SCK label to PA5, connnect the SO to PA6, connect the SI to PA7, +Connect the SCK label to PA5, connect the SO to PA6, connect the SI to PA7, connect the CS to PA4, connect RST to PE1 and finally connect INT to PE4. The next step is to enable the ENC28J60 in the menuconfig ("make menuconfig") @@ -1016,7 +1016,7 @@ STM32F4Discovery-specific Configuration Options CONFIG_SDIO_DMA - Support DMA data transfers. Requires CONFIG_STM32_SDIO and CONFIG_STM32_DMA2. - CONFIG_STM32_SDIO_PRI - Select SDIO interrupt prority. Default: 128 + CONFIG_STM32_SDIO_PRI - Select SDIO interrupt priority. Default: 128 CONFIG_STM32_SDIO_DMAPRIO - Select SDIO DMA interrupt priority. Default: Medium CONFIG_STM32_SDIO_WIDTH_D1_ONLY - Select 1-bit transfer mode. Default: @@ -1935,7 +1935,7 @@ Configuration Sub-directories class driver: Device Drivers -> - CONFIG_USBDEV=n : Make sure tht USB device support is disabled + CONFIG_USBDEV=n : Make sure the USB device support is disabled CONFIG_USBHOST=y : Enable USB host support CONFIG_USBHOST_ISOC_DISABLE=y @@ -2011,7 +2011,7 @@ Configuration Sub-directories Drivers -> USB Host Driver Support CONFIG_USBHOST_HUB=y : Enable the hub class - CONFIG_USBHOST_ASYNCH=y : Asynchonous I/O supported needed for hubs + CONFIG_USBHOST_ASYNCH=y : Asynchronous I/O supported needed for hubs System Type -> USB host configuration To be determined @@ -2377,7 +2377,7 @@ Configuration Sub-directories CONFIG_SYSLOG_CHAR=y : Use a character device for system logging CONFIG_SYSLOG_DEVPATH="/dev/ttyS0" : USART2 will be /dev/ttyS0 - However, there is nothing to generate SYLOG output in the default + However, there is nothing to generate SYSLOG output in the default configuration so nothing should appear on USART2 unless you enable some debug output or enable the USB monitor. diff --git a/boards/arm/stm32/stm32f4discovery/include/board.h b/boards/arm/stm32/stm32f4discovery/include/board.h index 8b2efa76c9a..02e348cdcd7 100644 --- a/boards/arm/stm32/stm32f4discovery/include/board.h +++ b/boards/arm/stm32/stm32f4discovery/include/board.h @@ -408,7 +408,7 @@ GPIO_PORTC | GPIO_PIN1) #endif -/* DMA Channl/Stream Selections *****************************************************/ +/* DMA Channel/Stream Selections ****************************************************/ /* Stream selections are arbitrary for now but might become important in the future * if we set aside more DMA channels/streams. diff --git a/boards/arm/stm32/stm32f4discovery/src/stm32_bringup.c b/boards/arm/stm32/stm32f4discovery/src/stm32_bringup.c index 685b3534200..dc29faf32b9 100644 --- a/boards/arm/stm32/stm32f4discovery/src/stm32_bringup.c +++ b/boards/arm/stm32/stm32f4discovery/src/stm32_bringup.c @@ -462,7 +462,7 @@ int stm32_bringup(void) ret = stm32_gs2200m_initialize("/dev/gs2200m", 3); if (ret < 0) { - serr("ERROR: Failed to initialze GS2200M: %d \n", ret); + serr("ERROR: Failed to initialize GS2200M: %d \n", ret); } #endif diff --git a/boards/arm/stm32/stm32f4discovery/src/stm32_gs2200m.c b/boards/arm/stm32/stm32f4discovery/src/stm32_gs2200m.c index 876cbdc7cff..b0c7ae93612 100644 --- a/boards/arm/stm32/stm32f4discovery/src/stm32_gs2200m.c +++ b/boards/arm/stm32/stm32f4discovery/src/stm32_gs2200m.c @@ -105,7 +105,7 @@ static FAR void *g_irq_arg = NULL; static int gs2200m_irq_attach(xcpt_t handler, FAR void *arg) { - /* NOTE: Just save the hander and arg here */ + /* NOTE: Just save the handler and arg here */ g_irq_handler = handler; g_irq_arg = arg; @@ -244,7 +244,7 @@ int stm32_gs2200m_initialize(FAR const char *devpath, int bus) _config_pin(); - /* Initialize spi deivce */ + /* Initialize spi device */ spi = stm32_spibus_initialize(bus); diff --git a/boards/arm/stm32/stm32f4discovery/src/stm32_ssd1289.c b/boards/arm/stm32/stm32f4discovery/src/stm32_ssd1289.c index ce8b1abb47e..51297f16f0a 100644 --- a/boards/arm/stm32/stm32f4discovery/src/stm32_ssd1289.c +++ b/boards/arm/stm32/stm32f4discovery/src/stm32_ssd1289.c @@ -382,7 +382,7 @@ FAR struct lcd_dev_s *board_lcd_getdev(int lcddev) * Name: board_lcd_uninitialize * * Description: - * Unitialize the LCD support + * Uninitialize the LCD support * ****************************************************************************/ diff --git a/boards/arm/stm32/stm32f4discovery/src/stm32f4discovery.h b/boards/arm/stm32/stm32f4discovery/src/stm32f4discovery.h index d4779d79a81..ba30fc00a95 100644 --- a/boards/arm/stm32/stm32f4discovery/src/stm32f4discovery.h +++ b/boards/arm/stm32/stm32f4discovery/src/stm32f4discovery.h @@ -195,7 +195,7 @@ # endif #endif -/* Check if we have the prequisites for an HCI UART */ +/* Check if we have the prerequisites for an HCI UART */ #if !defined(CONFIG_STM32_HCIUART) || !defined(CONFIG_BLUETOOTH_UART) # undef HAVE_HCIUART diff --git a/boards/arm/stm32/stm32ldiscovery/README.txt b/boards/arm/stm32/stm32ldiscovery/README.txt index 974265d9a04..1bcd334e7d5 100644 --- a/boards/arm/stm32/stm32ldiscovery/README.txt +++ b/boards/arm/stm32/stm32ldiscovery/README.txt @@ -34,7 +34,7 @@ Status The basic port is complete. A NuttShell (NSH) configuration exists for the STM32L-Discovery board. A driver has been developed for the segment LCD on - board the STM32L-Discovery. In the NSH configuration discription below, + board the STM32L-Discovery. In the NSH configuration description below, there is information about how the basic NSH extension can be extended to use apps/examples/slcd to exercise the segment LCD. diff --git a/boards/arm/stm32/stm32ldiscovery/src/stm32_boot.c b/boards/arm/stm32/stm32ldiscovery/src/stm32_boot.c index f54b2479e3e..2e7468ccaa8 100644 --- a/boards/arm/stm32/stm32ldiscovery/src/stm32_boot.c +++ b/boards/arm/stm32/stm32ldiscovery/src/stm32_boot.c @@ -64,7 +64,7 @@ * * Description: * All STM32 architectures must provide the following entry point. This entry point - * is called early in the intitialization -- after all memory has been configured + * is called early in the initialization -- after all memory has been configured * and mapped but before any devices have been initialized. * ****************************************************************************/ diff --git a/boards/arm/stm32/stm32ldiscovery/src/stm32_lcd.c b/boards/arm/stm32/stm32ldiscovery/src/stm32_lcd.c index bcb881ddcfa..e7ecaa6eff8 100644 --- a/boards/arm/stm32/stm32ldiscovery/src/stm32_lcd.c +++ b/boards/arm/stm32/stm32ldiscovery/src/stm32_lcd.c @@ -1076,7 +1076,7 @@ static ssize_t slcd_read(FAR struct file *filep, FAR char *buffer, size_t len) *buffer++ = g_slcdstate.buffer[i]; ret++; - /* Check if the character is decorated with a folling period or colon */ + /* Check if the character is decorated with a following period or colon */ if (ret < len && g_slcdstate.buffer[i] != 0) { @@ -1435,7 +1435,7 @@ static int slcd_poll(FAR struct file *filep, FAR struct pollfd *fds, { if (setup) { - /* Data is always avaialble to be read / Data can always be written */ + /* Data is always available to be read / Data can always be written */ fds->revents |= (fds->events & (POLLIN|POLLOUT)); if (fds->revents != 0) diff --git a/boards/arm/stm32/stm32ldiscovery/src/stm32ldiscovery.h b/boards/arm/stm32/stm32ldiscovery/src/stm32ldiscovery.h index e2e1dc4df4a..b9aa2d75720 100644 --- a/boards/arm/stm32/stm32ldiscovery/src/stm32ldiscovery.h +++ b/boards/arm/stm32/stm32ldiscovery/src/stm32ldiscovery.h @@ -249,7 +249,7 @@ * Otherwise CONFIG_BOARD_LATE_INITIALIZE=y: * Called from board_late_initialize(). * - * Otherise, bad news: Never called + * Otherwise, bad news: Never called * ****************************************************************************/ diff --git a/boards/arm/stm32/stm32vldiscovery/README.txt b/boards/arm/stm32/stm32vldiscovery/README.txt index 913dfe14463..469699df491 100644 --- a/boards/arm/stm32/stm32vldiscovery/README.txt +++ b/boards/arm/stm32/stm32vldiscovery/README.txt @@ -15,7 +15,7 @@ Contents LEDs ==== -It is asumed that STMicro STM32F100RB generic board board has one LED on PA0. +It is assumed that STMicro STM32F100RB generic board board has one LED on PA0. You should configure the port and pin number in boards/arm/stm32/stm32vldiscovery/src/stm32vldiscovery.h. This LED is not used by the board port unless CONFIG_ARCH_LEDS is defined. In that case, the usage by diff --git a/boards/arm/stm32/viewtool-stm32f107/README.txt b/boards/arm/stm32/viewtool-stm32f107/README.txt index e1f5bdaec63..730ef6d0746 100644 --- a/boards/arm/stm32/viewtool-stm32f107/README.txt +++ b/boards/arm/stm32/viewtool-stm32f107/README.txt @@ -1059,7 +1059,7 @@ Configurations Library Support: CONFIG_SCHED_WORKQUEUE=y : Work queue support required - Applicaton Configuration: + Application Configuration: CONFIG_EXAMPLES_TOUCHSCREEN=y : Enable the touchscreen built-int test Defaults should be okay for related touchscreen settings. Touchscreen diff --git a/boards/arm/stm32/viewtool-stm32f107/src/stm32_boot.c b/boards/arm/stm32/viewtool-stm32f107/src/stm32_boot.c index 5c4ad350a96..d56782f73e2 100644 --- a/boards/arm/stm32/viewtool-stm32f107/src/stm32_boot.c +++ b/boards/arm/stm32/viewtool-stm32f107/src/stm32_boot.c @@ -53,7 +53,7 @@ * * Description: * All STM32 architectures must provide the following entry point. This entry point - * is called early in the intitialization -- after all memory has been configured + * is called early in the initialization -- after all memory has been configured * and mapped but before any devices have been initialized. * ****************************************************************************/ diff --git a/boards/arm/stm32/viewtool-stm32f107/src/stm32_ssd1289.c b/boards/arm/stm32/viewtool-stm32f107/src/stm32_ssd1289.c index deceb70fc76..781d026c99c 100644 --- a/boards/arm/stm32/viewtool-stm32f107/src/stm32_ssd1289.c +++ b/boards/arm/stm32/viewtool-stm32f107/src/stm32_ssd1289.c @@ -546,7 +546,7 @@ FAR struct lcd_dev_s *board_lcd_getdev(int lcddev) * Name: board_lcd_uninitialize * * Description: - * Unitialize the LCD support + * Uninitialize the LCD support * ****************************************************************************/ diff --git a/boards/arm/stm32f0l0g0/b-l072z-lrwan1/src/stm32_boot.c b/boards/arm/stm32f0l0g0/b-l072z-lrwan1/src/stm32_boot.c index 478c7ab6943..659e1dc9266 100644 --- a/boards/arm/stm32f0l0g0/b-l072z-lrwan1/src/stm32_boot.c +++ b/boards/arm/stm32f0l0g0/b-l072z-lrwan1/src/stm32_boot.c @@ -69,7 +69,7 @@ * * Description: * All STM32 architectures must provide the following entry point. This - * entry point is called early in the intitialization -- after all memory + * entry point is called early in the initialization -- after all memory * has been configured and mapped but before any devices have been * initialized. * diff --git a/boards/arm/stm32f0l0g0/nucleo-f072rb/README.txt b/boards/arm/stm32f0l0g0/nucleo-f072rb/README.txt index d60220e22c8..1ccf07f7ae8 100644 --- a/boards/arm/stm32f0l0g0/nucleo-f072rb/README.txt +++ b/boards/arm/stm32f0l0g0/nucleo-f072rb/README.txt @@ -58,7 +58,7 @@ Nucleo-64 Boards LEDs ==== - The Nucleo-64 board has one user controlable LED, User LD2. This green + The Nucleo-64 board has one user controllable LED, User LD2. This green LED is a user LED connected to Arduino signal D13 corresponding to STM32 I/O PA5 (PB13 on other some other Nucleo-64 boards). diff --git a/boards/arm/stm32f0l0g0/nucleo-f072rb/src/stm32_bringup.c b/boards/arm/stm32f0l0g0/nucleo-f072rb/src/stm32_bringup.c index 0bb9fc964c0..120c0bc4cfd 100644 --- a/boards/arm/stm32f0l0g0/nucleo-f072rb/src/stm32_bringup.c +++ b/boards/arm/stm32f0l0g0/nucleo-f072rb/src/stm32_bringup.c @@ -102,7 +102,7 @@ int stm32_bringup(void) } else { - /* Regiser the I2C character driver */ + /* Register the I2C character driver */ ret = i2c_register(i2c, 1); if (ret < 0) diff --git a/boards/arm/stm32f0l0g0/nucleo-f091rc/README.txt b/boards/arm/stm32f0l0g0/nucleo-f091rc/README.txt index 96482b54ccd..c3b3d7947d6 100644 --- a/boards/arm/stm32f0l0g0/nucleo-f091rc/README.txt +++ b/boards/arm/stm32f0l0g0/nucleo-f091rc/README.txt @@ -44,7 +44,7 @@ Nucleo-64 Boards LEDs ==== - The Nucleo-64 board has one user controlable LED, User LD2. This green + The Nucleo-64 board has one user controllable LED, User LD2. This green LED is a user LED connected to Arduino signal D13 corresponding to STM32 I/O PA5 (PB13 on other some other Nucleo-64 boards). diff --git a/boards/arm/stm32f0l0g0/nucleo-f091rc/include/board.h b/boards/arm/stm32f0l0g0/nucleo-f091rc/include/board.h index b96f90b664e..ca617ace9ff 100644 --- a/boards/arm/stm32f0l0g0/nucleo-f091rc/include/board.h +++ b/boards/arm/stm32f0l0g0/nucleo-f091rc/include/board.h @@ -169,7 +169,7 @@ /* LEDs * - * The Nucleo-64 board has one user controlable LED, User LD2. This green + * The Nucleo-64 board has one user controllable LED, User LD2. This green * LED is a user LED connected to Arduino signal D13 corresponding to STM32 * I/O PA5 (PB13 on other some other Nucleo-64 boards). * diff --git a/boards/arm/stm32f0l0g0/nucleo-f091rc/src/stm32_boot.c b/boards/arm/stm32f0l0g0/nucleo-f091rc/src/stm32_boot.c index 0f41ff7b3c9..8cd4e842199 100644 --- a/boards/arm/stm32f0l0g0/nucleo-f091rc/src/stm32_boot.c +++ b/boards/arm/stm32f0l0g0/nucleo-f091rc/src/stm32_boot.c @@ -57,7 +57,7 @@ * * Description: * All STM32 architectures must provide the following entry point. This entry point - * is called early in the intitialization -- after all memory has been configured + * is called early in the initialization -- after all memory has been configured * and mapped but before any devices have been initialized. * ****************************************************************************/ diff --git a/boards/arm/stm32f0l0g0/nucleo-g071rb/src/stm32_boot.c b/boards/arm/stm32f0l0g0/nucleo-g071rb/src/stm32_boot.c index b14c2100e81..1a5b349ca20 100644 --- a/boards/arm/stm32f0l0g0/nucleo-g071rb/src/stm32_boot.c +++ b/boards/arm/stm32f0l0g0/nucleo-g071rb/src/stm32_boot.c @@ -53,7 +53,7 @@ * * Description: * All STM32 architectures must provide the following entry point. This - * entry point is called early in the intitialization -- after all memory + * entry point is called early in the initialization -- after all memory * has been configured and mapped but before any devices have been * initialized. * diff --git a/boards/arm/stm32f0l0g0/nucleo-l073rz/src/stm32_boot.c b/boards/arm/stm32f0l0g0/nucleo-l073rz/src/stm32_boot.c index e8420145ae9..13d2210420f 100644 --- a/boards/arm/stm32f0l0g0/nucleo-l073rz/src/stm32_boot.c +++ b/boards/arm/stm32f0l0g0/nucleo-l073rz/src/stm32_boot.c @@ -69,7 +69,7 @@ * * Description: * All STM32 architectures must provide the following entry point. This - * entry point is called early in the intitialization -- after all memory + * entry point is called early in the initialization -- after all memory * has been configured and mapped but before any devices have been * initialized. * diff --git a/boards/arm/stm32f0l0g0/stm32f051-discovery/src/stm32_boot.c b/boards/arm/stm32f0l0g0/stm32f051-discovery/src/stm32_boot.c index b2d290dd614..df6a0b64de4 100644 --- a/boards/arm/stm32f0l0g0/stm32f051-discovery/src/stm32_boot.c +++ b/boards/arm/stm32f0l0g0/stm32f051-discovery/src/stm32_boot.c @@ -57,7 +57,7 @@ * * Description: * All STM32 architectures must provide the following entry point. This entry point - * is called early in the intitialization -- after all memory has been configured + * is called early in the initialization -- after all memory has been configured * and mapped but before any devices have been initialized. * ****************************************************************************/ diff --git a/boards/arm/stm32f0l0g0/stm32f072-discovery/src/stm32_boot.c b/boards/arm/stm32f0l0g0/stm32f072-discovery/src/stm32_boot.c index d2d62aa5ef7..7aa4e56bab6 100644 --- a/boards/arm/stm32f0l0g0/stm32f072-discovery/src/stm32_boot.c +++ b/boards/arm/stm32f0l0g0/stm32f072-discovery/src/stm32_boot.c @@ -57,7 +57,7 @@ * * Description: * All STM32 architectures must provide the following entry point. This entry point - * is called early in the intitialization -- after all memory has been configured + * is called early in the initialization -- after all memory has been configured * and mapped but before any devices have been initialized. * ****************************************************************************/ diff --git a/boards/arm/stm32f7/nucleo-144/include/board.h b/boards/arm/stm32f7/nucleo-144/include/board.h index c1394064d89..0d971877c5f 100644 --- a/boards/arm/stm32f7/nucleo-144/include/board.h +++ b/boards/arm/stm32f7/nucleo-144/include/board.h @@ -248,7 +248,7 @@ # define GPIO_SDMMC2_D3 GPIO_SDMMC2_D3_1 #endif -/* DMA Channl/Stream Selections *********************************************/ +/* DMA Channel/Stream Selections *********************************************/ /* Stream selections are arbitrary for now but might become important in the * future if we set aside more DMA channels/streams. diff --git a/boards/arm/stm32f7/stm32f746g-disco/README.txt b/boards/arm/stm32f7/stm32f746g-disco/README.txt index ff3dc8f5616..aa7d53443a5 100644 --- a/boards/arm/stm32f7/stm32f746g-disco/README.txt +++ b/boards/arm/stm32f7/stm32f746g-disco/README.txt @@ -478,7 +478,7 @@ Configurations https://developer.arm.com/open-source/gnu-toolchain/gnu-rm As of this writing (2015-03-11), full support is difficult to find - for the Cortex-M7, but is supported by at least this realease of + for the Cortex-M7, but is supported by at least this release of the ARM GNU tools: https://launchpadlibrarian.net/209776344/release.txt @@ -526,7 +526,7 @@ Configuration Directories This configuration uses USART1 for the serial console. USART1 is connected to the ST-link virtual com inside board.h to remove the need of a extra serial connection to use this board. - From the nsh comand line execute the lvgldemo example: + From the nsh command line execute the lvgldemo example: nsh> lvgldemo diff --git a/boards/arm/stm32l4/b-l475e-iot01a/README.txt b/boards/arm/stm32l4/b-l475e-iot01a/README.txt index f28a72322b4..ae80ad453da 100644 --- a/boards/arm/stm32l4/b-l475e-iot01a/README.txt +++ b/boards/arm/stm32l4/b-l475e-iot01a/README.txt @@ -296,7 +296,7 @@ Configuration sub-directories Where 37 the address is an example. It should be different for each radio, but in the the range 1..ed and ef..fe (ee and ff are the reserved for multicast and broadcast addresses, respectively. - Zero is a valid address but not recommeded). + Zero is a valid address but not recommended). b) Bring each the network up on each board in the WPAN: @@ -340,7 +340,7 @@ Configuration sub-directories NOTE: Unlike the UDP test, there the TCP test will terminate automatically when the packet exchange is complete. - 6. The NSH Telnet deamon (server) is enabled. However, it cannot be + 6. The NSH Telnet daemon (server) is enabled. However, it cannot be started automatically. Rather, it must be started AFTER the network has been brought up using the NSH 'telnetd' command. You would want to start the Telent daemon only if you want the node to serve Telent @@ -360,7 +360,7 @@ Configuration sub-directories nsh> telnet Where is the IP address of the server that you got for - the ifconfig commna on the remote node. Once the telnet session + the ifconfig comma on the remote node. Once the telnet session has been started, you can end the session with: nsh> exit diff --git a/boards/arm/stm32l4/nucleo-l432kc/README.txt b/boards/arm/stm32l4/nucleo-l432kc/README.txt index 9e3e91585aa..9e0ccad5b00 100644 --- a/boards/arm/stm32l4/nucleo-l432kc/README.txt +++ b/boards/arm/stm32l4/nucleo-l432kc/README.txt @@ -188,7 +188,7 @@ IDEs there is a lot of help on the internet). Using Sourcery CodeBench from http://www.mentor.com/embedded-software/sourcery-tools/sourcery-codebench/overview - Download and install the latest version (as of this writting it was + Download and install the latest version (as of this writing it was sourceryg++-2013.05-64-arm-none-eabi) Import the project from git. diff --git a/boards/arm/stm32l4/nucleo-l452re/README.txt b/boards/arm/stm32l4/nucleo-l452re/README.txt index 4b0749db5e3..03dc121890e 100644 --- a/boards/arm/stm32l4/nucleo-l452re/README.txt +++ b/boards/arm/stm32l4/nucleo-l452re/README.txt @@ -50,7 +50,7 @@ Nucleo-64 Boards LEDs ==== - The Nucleo-64 board has one user controlable LED, User LD2. This green + The Nucleo-64 board has one user controllable LED, User LD2. This green LED is a user LED connected to Arduino signal D13 corresponding to STM32 I/O PA5 (PB13 on other some other Nucleo-64 boards). diff --git a/boards/arm/stm32l4/nucleo-l452re/src/stm32_boot.c b/boards/arm/stm32l4/nucleo-l452re/src/stm32_boot.c index 6dbb9d301c3..6cfa382f38f 100644 --- a/boards/arm/stm32l4/nucleo-l452re/src/stm32_boot.c +++ b/boards/arm/stm32l4/nucleo-l452re/src/stm32_boot.c @@ -58,7 +58,7 @@ * * Description: * All STM32 architectures must provide the following entry point. This entry point - * is called early in the intitialization -- after all memory has been configured + * is called early in the initialization -- after all memory has been configured * and mapped but before any devices have been initialized. * ****************************************************************************/ diff --git a/boards/arm/stm32l4/nucleo-l476rg/README.txt b/boards/arm/stm32l4/nucleo-l476rg/README.txt index 12114c1e787..a3f9f0cc244 100644 --- a/boards/arm/stm32l4/nucleo-l476rg/README.txt +++ b/boards/arm/stm32l4/nucleo-l476rg/README.txt @@ -201,7 +201,7 @@ IDEs there is a lot of help on the internet). Using Sourcery CodeBench from http://www.mentor.com/embedded-software/sourcery-tools/sourcery-codebench/overview - Download and install the latest version (as of this writting it was + Download and install the latest version (as of this writing it was sourceryg++-2013.05-64-arm-none-eabi) Import the project from git. diff --git a/boards/arm/stm32l4/nucleo-l476rg/src/nucleo-l476rg.h b/boards/arm/stm32l4/nucleo-l476rg/src/nucleo-l476rg.h index 5af1feb6862..8fedb1535a1 100644 --- a/boards/arm/stm32l4/nucleo-l476rg/src/nucleo-l476rg.h +++ b/boards/arm/stm32l4/nucleo-l476rg/src/nucleo-l476rg.h @@ -258,7 +258,7 @@ #define BOARD_NGPIOINT 1 /* Amount of GPIO Input w/ Interruption pins */ /* This was really something to find out! But the GPIOA Port was causing - * conflicts with the nsh console. So thats why I have chosen GPIOB + * conflicts with the nsh console. So that's why I have chosen GPIOB * * Author: Ben vd Veen (DisruptiveNL) -- www.nuttx.nl * https://www.youtube.com/watch?v=VXsTLzI6idA -- Original video GPIO diff --git a/boards/arm/stm32l4/stm32l476vg-disco/README.txt b/boards/arm/stm32l4/stm32l476vg-disco/README.txt index f6107a4127d..4427dc09614 100644 --- a/boards/arm/stm32l4/stm32l476vg-disco/README.txt +++ b/boards/arm/stm32l4/stm32l476vg-disco/README.txt @@ -346,7 +346,7 @@ Configurations This is identical to the nsh configuration below except that (1) NuttX is built as a PROTECTED mode, monolithic module and the user applications are built separately and, as a consequence, (2) some features that are - only availabled in the FLAT build are disabled. + only available in the FLAT build are disabled. It is recommends to use a special make command; not just 'make' but make with the following two arguments: diff --git a/boards/arm/stm32l4/stm32l476vg-disco/src/stm32_buttons.c b/boards/arm/stm32l4/stm32l476vg-disco/src/stm32_buttons.c index 24e80a526d8..542c45a172c 100644 --- a/boards/arm/stm32l4/stm32l476vg-disco/src/stm32_buttons.c +++ b/boards/arm/stm32l4/stm32l476vg-disco/src/stm32_buttons.c @@ -168,7 +168,7 @@ static void button_pm_notify(struct pm_callback_s *cb, int domain, * for the buttons. On the other hand, it will conflict with things done in * the buttons example, which registers it's own ISR, and warns if it sees * one already there. I don't know if 'buttons' is overstepping it's bounds - * in the interst of providing a compact example, (like the I2C app directly + * in the interest of providing a compact example, (like the I2C app directly * talking to the bus), or if really that should be an expected thing to do. */ diff --git a/boards/arm/stm32l4/stm32l476vg-disco/src/stm32l476vg-disco.h b/boards/arm/stm32l4/stm32l476vg-disco/src/stm32l476vg-disco.h index 202994c4265..dda1c871d3a 100644 --- a/boards/arm/stm32l4/stm32l476vg-disco/src/stm32l476vg-disco.h +++ b/boards/arm/stm32l4/stm32l476vg-disco/src/stm32l476vg-disco.h @@ -125,7 +125,7 @@ #define N25QXXX_MTD_MINOR 0 -/* This is the on-chip progmem memroy driver minor number */ +/* This is the on-chip progmem memory driver minor number */ #define PROGMEM_MTD_MINOR 1 diff --git a/boards/arm/stm32l4/stm32l4r9ai-disco/README.txt b/boards/arm/stm32l4/stm32l4r9ai-disco/README.txt index 37825a5ac1d..fa6ddf1c6b3 100644 --- a/boards/arm/stm32l4/stm32l4r9ai-disco/README.txt +++ b/boards/arm/stm32l4/stm32l4r9ai-disco/README.txt @@ -246,7 +246,7 @@ Configurations This is identical to the nsh configuration below except that (1) NuttX is built as a PROTECTED mode, monolithic module and the user applications are built separately and, as a consequence, (2) some features that are - only availabled in the FLAT build are disabled. + only available in the FLAT build are disabled. It is recommends to use a special make command; not just 'make' but make with the following two arguments: diff --git a/boards/arm/stm32l4/stm32l4r9ai-disco/src/stm32_buttons.c b/boards/arm/stm32l4/stm32l4r9ai-disco/src/stm32_buttons.c index 7574081cc08..083bd050473 100644 --- a/boards/arm/stm32l4/stm32l4r9ai-disco/src/stm32_buttons.c +++ b/boards/arm/stm32l4/stm32l4r9ai-disco/src/stm32_buttons.c @@ -167,7 +167,7 @@ static void button_pm_notify(struct pm_callback_s *cb, int domain, * for the buttons. On the other hand, it will conflict with things done in * the buttons example, which registers it's own ISR, and warns if it sees * one already there. I don't know if 'buttons' is overstepping it's bounds - * in the interst of providing a compact example, (like the I2C app directly + * in the interest of providing a compact example, (like the I2C app directly * talking to the bus), or if really that should be an expected thing to do. */ diff --git a/boards/arm/stm32l4/stm32l4r9ai-disco/src/stm32l4r9ai-disco.h b/boards/arm/stm32l4/stm32l4r9ai-disco/src/stm32l4r9ai-disco.h index c1ee4014447..3981d2b3c3f 100644 --- a/boards/arm/stm32l4/stm32l4r9ai-disco/src/stm32l4r9ai-disco.h +++ b/boards/arm/stm32l4/stm32l4r9ai-disco/src/stm32l4r9ai-disco.h @@ -77,7 +77,7 @@ # undef HAVE_RTC_DRIVER #endif -/* This is the on-chip progmem memroy driver minor number */ +/* This is the on-chip progmem memory driver minor number */ #define PROGMEM_MTD_MINOR 1 diff --git a/boards/arm/str71x/olimex-strp711/README.txt b/boards/arm/str71x/olimex-strp711/README.txt index d1e73e9e8d0..e3c9303ccf4 100644 --- a/boards/arm/str71x/olimex-strp711/README.txt +++ b/boards/arm/str71x/olimex-strp711/README.txt @@ -36,7 +36,7 @@ Olimex STR-P711 - Trimpot connected to ADC - Two status LEDs - Buzzer - - UEXT - 10 pin extension connector for Olimex addon peripherials like MP3, + - UEXT - 10 pin extension connector for Olimex addon peripherals like MP3, RF2.4Ghz, RFID etc. modules - 2x SPI connectors - I2C connector diff --git a/boards/arm/str71x/olimex-strp711/include/board.h b/boards/arm/str71x/olimex-strp711/include/board.h index 568c6c68938..968c9ccfad0 100644 --- a/boards/arm/str71x/olimex-strp711/include/board.h +++ b/boards/arm/str71x/olimex-strp711/include/board.h @@ -48,7 +48,7 @@ * - Trimpot connected to ADC * - Two status LEDs * - Buzzer - * - UEXT - 10 pin extension connector for Olimex addon peripherials like MP3, + * - UEXT - 10 pin extension connector for Olimex addon peripherals like MP3, * RF2.4Ghz, RFID etc. modules * - 2x SPI connectors * - I2C connector diff --git a/boards/arm/str71x/olimex-strp711/src/str71_spi.c b/boards/arm/str71x/olimex-strp711/src/str71_spi.c index 8f4a702fbff..77c7879d28e 100644 --- a/boards/arm/str71x/olimex-strp711/src/str71_spi.c +++ b/boards/arm/str71x/olimex-strp711/src/str71_spi.c @@ -285,7 +285,7 @@ #elif CONFIG_STR714X_BSPI0_RXFIFO_DEPTH == 10 # define STR71X_BSPI0_CSR1RXFIFODEPTH STR71X_BSPICSR1_RFE110 #else -# error "Invaid RX FIFO depth setting" +# error "Invalid RX FIFO depth setting" #endif #define STR71X_BSPI0_CSR1DISABLE STR71X_BSPI0_CSR1RXFIFODEPTH @@ -312,7 +312,7 @@ #elif CONFIG_STR714X_BSPI0_TXFIFO_DEPTH == 10 # define STR71X_BSPI0_CSR1TXFIFODEPTH STR71X_BSPICSR2_TFE110 #else -# error "Invaid TX FIFO depth setting" +# error "Invalid TX FIFO depth setting" #endif #define STR71X_BSPI0_CSR2VALUE STR71X_BSPI0_CSR1TXFIFODEPTH @@ -338,7 +338,7 @@ #elif CONFIG_STR714X_BSPI1_RXFIFO_DEPTH == 10 # define STR71X_BSPI1_CSR1RXFIFODEPTH STR71X_BSPICSR1_RFE110 #else -# error "Invaid RX FIFO depth setting" +# error "Invalid RX FIFO depth setting" #endif #define STR71X_BSPI1_CSR1DISABLE STR71X_BSPI1_CSR1RXFIFODEPTH @@ -365,7 +365,7 @@ #elif CONFIG_STR714X_BSPI1_TXFIFO_DEPTH == 10 # define STR71X_BSPI1_CSR1TXFIFODEPTH STR71X_BSPICSR2_TFE110 #else -# error "Invaid TX FIFO depth setting" +# error "Invalid TX FIFO depth setting" #endif #define STR71X_BSPI1_CSR2VALUE STR71X_BSPI1_CSR1TXFIFODEPTH @@ -559,12 +559,12 @@ static inline void spi_drain(FAR struct str71x_spidev_s *priv) * Name: spi_lock * * Description: - * On SPI busses where there are multiple devices, it will be necessary to - * lock SPI to have exclusive access to the busses for a sequence of + * On SPI buses where there are multiple devices, it will be necessary to + * lock SPI to have exclusive access to the buses for a sequence of * transfers. The bus should be locked before the chip is selected. After * locking the SPI bus, the caller should then also call the setfrequency, * setbits, and setmode methods to make sure that the SPI is properly - * configured for the device. If the SPI buss is being shared, then it + * configured for the device. If the SPI bus is being shared, then it * may have been left in an incompatible state. * * Input Parameters: @@ -672,7 +672,7 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, divisor = (STR71X_PCLK1 + (frequency >> 1)) / frequency; - /* The divisor must be an even number and contrained to the range of + /* The divisor must be an even number and constrained to the range of * 5 (master mode, or 7 for slave mode) and 255. These bits must * be configured BEFORE the BSPE or MSTR bits.. i.e., before the SPI * is put into master mode. @@ -840,7 +840,7 @@ static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer, size DEBUGASSERT(priv && priv->spibase); - /* Loop while thre are bytes remaining to be sent */ + /* Loop while there are bytes remaining to be sent */ while (buflen > 0) { diff --git a/boards/arm/tiva/dk-tm4c129x/README.txt b/boards/arm/tiva/dk-tm4c129x/README.txt index 63fd7f89220..fd6d3b0c6ea 100644 --- a/boards/arm/tiva/dk-tm4c129x/README.txt +++ b/boards/arm/tiva/dk-tm4c129x/README.txt @@ -673,7 +673,7 @@ Where is one of the following: CONFIG_HOST_WINDOWS=y : Windows :CONFIG_WINDOWS_CYGWIN=y : Cygwin under Windows - CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcry fro Windows (arm-none-eabi-gcc) + CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcry for Windows (arm-none-eabi-gcc) CONFIG_RAW_BINARY=y : Output formats: ELF and raw binary 3. Default stack sizes are large and should really be tuned to reduce diff --git a/boards/arm/tiva/eagle100/src/lm_boot.c b/boards/arm/tiva/eagle100/src/lm_boot.c index 9e5aa49bbb6..9ed06194772 100644 --- a/boards/arm/tiva/eagle100/src/lm_boot.c +++ b/boards/arm/tiva/eagle100/src/lm_boot.c @@ -64,7 +64,7 @@ * * Description: * All Stellaris architectures must provide the following entry point. - * This entry point is called early in the intitialization -- after all + * This entry point is called early in the initialization -- after all * memory has been configured and mapped but before any devices have been * initialized. * diff --git a/boards/arm/tiva/ekk-lm3s9b96/src/lm_boot.c b/boards/arm/tiva/ekk-lm3s9b96/src/lm_boot.c index 34dc87f2ad3..0ac43feb4c4 100644 --- a/boards/arm/tiva/ekk-lm3s9b96/src/lm_boot.c +++ b/boards/arm/tiva/ekk-lm3s9b96/src/lm_boot.c @@ -66,7 +66,7 @@ * * Description: * All Stellaris architectures must provide the following entry point. - * This entry point is called early in the intitialization -- after all + * This entry point is called early in the initialization -- after all * memory has been configured and mapped but before any devices have been * initialized. * diff --git a/boards/arm/tiva/launchxl-cc1310/README.txt b/boards/arm/tiva/launchxl-cc1310/README.txt index 9fc06affd0b..fd49cd85204 100644 --- a/boards/arm/tiva/launchxl-cc1310/README.txt +++ b/boards/arm/tiva/launchxl-cc1310/README.txt @@ -28,7 +28,7 @@ Serial Console UART0 (PA0/U0RX and PA1/U0TX). A J-Link debugger is used (see below), then the RXD/TXD jumper pins can - be used to support a serial console through appropriate TTL level adapater + be used to support a serial console through appropriate TTL level adapter (RS-232 or USB serial). LEDs and Buttons diff --git a/boards/arm/tiva/launchxl-cc1312r1/README.txt b/boards/arm/tiva/launchxl-cc1312r1/README.txt index 1fef608ab3e..da69981c7d8 100644 --- a/boards/arm/tiva/launchxl-cc1312r1/README.txt +++ b/boards/arm/tiva/launchxl-cc1312r1/README.txt @@ -43,7 +43,7 @@ Serial Console A J-Link debugger is used (see below), then the RXD/TXD jumper pins can be used to support a serial console through these same pins via an - appropriate TTL level adapater (RS-232 or USB serial). + appropriate TTL level adapter (RS-232 or USB serial). LEDs and Buttons ================ diff --git a/boards/arm/tiva/lm3s6432-s2e/README.txt b/boards/arm/tiva/lm3s6432-s2e/README.txt index d69414fa905..d50082bd238 100644 --- a/boards/arm/tiva/lm3s6432-s2e/README.txt +++ b/boards/arm/tiva/lm3s6432-s2e/README.txt @@ -64,10 +64,10 @@ D12 PB1/U0RTS UART0 RTS M4 PA2/U1RTS/SPISEL UART1 RTS or SPI slave select J11 PF0/LED1 Ethernet LED1 (green) J12 PF1/LED0 Ethernet LED0 (yellow) -C11 PB2 Transciever #INVALID -C12 PB3 Transciever #ENABLE - A6 PB4 Transciever ON - B7 PB5 Transciever #OFF +C11 PB2 Transceiver #INVALID +C12 PB3 Transceiver #ENABLE + A6 PB4 Transceiver ON + B7 PB5 Transceiver #OFF Stellaris MDL-S2E Reference Design Configuration Options ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ diff --git a/boards/arm/tiva/lm3s6432-s2e/src/lm3s6432-s2e.h b/boards/arm/tiva/lm3s6432-s2e/src/lm3s6432-s2e.h index 37635331535..c655a5215a8 100644 --- a/boards/arm/tiva/lm3s6432-s2e/src/lm3s6432-s2e.h +++ b/boards/arm/tiva/lm3s6432-s2e/src/lm3s6432-s2e.h @@ -79,10 +79,10 @@ * M4 PA2/U1RTS/SPISEL Virtual COM port RTS * J11 PF0/LED1 Ethernet LED1 (green) * J12 PF1/LED0 Ethernet LED0 (yellow) - * C11 PB2 Transciever #INVALID - * C12 PB3 Transciever #ENABLE - * A6 PB4 Transciever ON - * B7 PB5 Transciever #OFF + * C11 PB2 Transceiver #INVALID + * C12 PB3 Transceiver #ENABLE + * A6 PB4 Transceiver ON + * B7 PB5 Transceiver #OFF */ /* GPIO for LEDs: @@ -96,8 +96,8 @@ */ #define SSICS_GPIO (GPIO_FUNC_OUTPUT | GPIO_VALUE_ONE | GPIO_PORTA | 3) -/* GPIOs for the RS-232 transciever enable/disable. - * Default state for these enables the transciever. +/* GPIOs for the RS-232 transceiver enable/disable. + * Default state for these enables the transceiver. */ #define XCVR_INV_GPIO (GPIO_FUNC_INPUT | GPIO_PORTB | 2) #define XCVR_ENA_GPIO (GPIO_FUNC_OUTPUT | GPIO_VALUE_ZERO | GPIO_PORTB | 3) diff --git a/boards/arm/tiva/lm3s6432-s2e/src/lm_boot.c b/boards/arm/tiva/lm3s6432-s2e/src/lm_boot.c index 1c49eb0ea4b..22bdefd4213 100644 --- a/boards/arm/tiva/lm3s6432-s2e/src/lm_boot.c +++ b/boards/arm/tiva/lm3s6432-s2e/src/lm_boot.c @@ -71,7 +71,7 @@ * * Description: * All Stellaris architectures must provide the following entry point. - * This entry point is called early in the intitialization -- after all + * This entry point is called early in the initialization -- after all * memory has been configured and mapped but before any devices have been * initialized. * @@ -98,7 +98,7 @@ void tiva_boardinitialize(void) board_autoled_initialize(); #endif - /* Configure serial transciever */ + /* Configure serial transceiver */ tiva_configgpio(XCVR_INV_GPIO); tiva_configgpio(XCVR_ENA_GPIO); diff --git a/boards/arm/tiva/lm3s6965-ek/src/lm_boot.c b/boards/arm/tiva/lm3s6965-ek/src/lm_boot.c index 9e6171cafb2..404190d3053 100644 --- a/boards/arm/tiva/lm3s6965-ek/src/lm_boot.c +++ b/boards/arm/tiva/lm3s6965-ek/src/lm_boot.c @@ -65,7 +65,7 @@ * * Description: * All Stellaris architectures must provide the following entry point. - * This entry point is called early in the intitialization -- after all + * This entry point is called early in the initialization -- after all * memory has been configured and mapped but before any devices have been * initialized. * diff --git a/boards/arm/tiva/lm3s8962-ek/src/lm_boot.c b/boards/arm/tiva/lm3s8962-ek/src/lm_boot.c index e9615eb88ef..9cb2e5bc111 100644 --- a/boards/arm/tiva/lm3s8962-ek/src/lm_boot.c +++ b/boards/arm/tiva/lm3s8962-ek/src/lm_boot.c @@ -65,7 +65,7 @@ * * Description: * All Stellaris architectures must provide the following entry point. - * This entry point is called early in the intitialization -- after all + * This entry point is called early in the initialization -- after all * memory has been configured and mapped but before any devices have been * initialized. * diff --git a/boards/arm/tiva/tm4c123g-launchpad/README.txt b/boards/arm/tiva/tm4c123g-launchpad/README.txt index 95002f462e4..8e40d982f1c 100644 --- a/boards/arm/tiva/tm4c123g-launchpad/README.txt +++ b/boards/arm/tiva/tm4c123g-launchpad/README.txt @@ -184,7 +184,7 @@ I2C Tool Where is one of: Show help : ? - List busses : bus + List buses : bus List devices : dev [OPTIONS] Read register : get [OPTIONS] [] Show help : help @@ -385,7 +385,7 @@ Serial Console UART1_CTS - PF.1 or PC.5 NOTE: board.h currently selects PB.0, PB.1, PF.0 and PF.1 for UART1, but - that can be changed by editting board.h + that can be changed by editing board.h UART2-5, 7 are also available, UART2 is not recommended because it shares some pin usage with USB device mode. UART6 is not available because its diff --git a/boards/arm/tms570/tms570ls31x-usb-kit/src/tms570_initialize.c b/boards/arm/tms570/tms570ls31x-usb-kit/src/tms570_initialize.c index 08105e6a9e4..145c0580f1b 100644 --- a/boards/arm/tms570/tms570ls31x-usb-kit/src/tms570_initialize.c +++ b/boards/arm/tms570/tms570ls31x-usb-kit/src/tms570_initialize.c @@ -87,7 +87,7 @@ void tms570_board_initialize(void) #if 0 putreg32(0x01000001, 0xfff7b800 + 0); - /* - PULL functinality is enabled */ + /* - PULL functionality is enabled */ putreg32(0x00000000, 0xfff7b800 + 0x64); diff --git a/boards/arm/xmc4/xmc4500-relax/README.txt b/boards/arm/xmc4/xmc4500-relax/README.txt index 1b0357ebafb..7f69500cc96 100644 --- a/boards/arm/xmc4/xmc4500-relax/README.txt +++ b/boards/arm/xmc4/xmc4500-relax/README.txt @@ -26,7 +26,7 @@ Serial Console VDD3.3 - Available on pins 37-38 of either connector X1 or X2 VDD5 - Available on pins 39-40 of either connector X1 or X2 - A TTL to RS-232 convertor or a USB TTL-to-USB serial adaptor is required. + A TTL to RS-232 converter or a USB TTL-to-USB serial adaptor is required. The notion of what is TX and what is RX depends on your point of view. With the TTL to RS-232 converter, I connect pin 17 to the pin labeled TX on the converter and pin 16 to the RX pin on the converter. diff --git a/boards/avr/at32uc3/avr32dev1/README.txt b/boards/avr/at32uc3/avr32dev1/README.txt index fe40822951f..685a8cc830c 100644 --- a/boards/avr/at32uc3/avr32dev1/README.txt +++ b/boards/avr/at32uc3/avr32dev1/README.txt @@ -78,7 +78,7 @@ Serial Connection USART1 is the default USART1 used in the configuration files to provide a serial console (of course, that can be easily changed -by editting the configuration file). The AVR32DEV1 board has no +by editing the configuration file). The AVR32DEV1 board has no RS-232 drivers or connectors on board. I use an off-board MAX232 module that I got on eBay (search for MAX232 if you want to find one). I connect the MAX232 board as follows: diff --git a/boards/avr/at32uc3/avr32dev1/include/board.h b/boards/avr/at32uc3/avr32dev1/include/board.h index 66f8bff44a1..b7a35499b2f 100644 --- a/boards/avr/at32uc3/avr32dev1/include/board.h +++ b/boards/avr/at32uc3/avr32dev1/include/board.h @@ -119,7 +119,7 @@ #undef AVR32_CLOCK_USB_OSC1 #define AVR32_CLOCK_USB_DIV 0 -/* Main Clock settup: Select OSC0 as the main clock. +/* Main Clock setup: Select OSC0 as the main clock. * * - A 12Mhz crystal is provided on he board for OSC0. * - The AVR32DEV1 board has no support for OSC1. diff --git a/boards/avr/at90usb/teensy-2.0/README.txt b/boards/avr/at90usb/teensy-2.0/README.txt index 777b04fe756..f4567604d42 100644 --- a/boards/avr/at90usb/teensy-2.0/README.txt +++ b/boards/avr/at90usb/teensy-2.0/README.txt @@ -163,7 +163,7 @@ SD-ADP Pinout / SD Connection -- ---- ----------- ------------------------------------------------------- J2 NAME SD CARD DESCRIPTION -- ---- ----------- ------------------------------------------------------- - 1 VIN (reguator) Input power to the SD card (3.3V to 6.0V) + 1 VIN (regulator)Input power to the SD card (3.3V to 6.0V) 2 GND 3,6,12,13 Common (Connects to the housing of the SD socket) 3 3V3 4 3.3V Output voltage from the on-board 3.3V regulator (250mA) 4 NC 9 NC Connect to pin 9 on the SD card (not used in SPI mode) diff --git a/boards/avr/atmega/arduino-mega2560/src/avr_boot.c b/boards/avr/atmega/arduino-mega2560/src/avr_boot.c index 8f9bff8b64b..414d549a141 100644 --- a/boards/avr/atmega/arduino-mega2560/src/avr_boot.c +++ b/boards/avr/atmega/arduino-mega2560/src/avr_boot.c @@ -66,7 +66,7 @@ * * Description: * All ATMega architectures must provide the following entry point. - * This entry point is called early in the intitialization -- after all + * This entry point is called early in the initialization -- after all * memory has been configured and mapped but before any devices have been * initialized. * diff --git a/boards/boardctl.c b/boards/boardctl.c index 9146b644d3c..c961132de3d 100644 --- a/boards/boardctl.c +++ b/boards/boardctl.c @@ -455,7 +455,7 @@ int boardctl(unsigned int cmd, uintptr_t arg) #ifdef CONFIG_BOARDCTL_ROMDISK /* CMD: BOARDIOC_ROMDISK - * DESCRIPTION: Reigster + * DESCRIPTION: Register * ARG: Pointer to read-only instance of struct boardioc_romdisk_s. * CONFIGURATION: CONFIG_BOARDCTL_ROMDISK * DEPENDENCIES: None diff --git a/boards/hc/m9s12/demo9s12ne64/src/m9s12_boot.c b/boards/hc/m9s12/demo9s12ne64/src/m9s12_boot.c index c93010164d0..7c978c33d05 100644 --- a/boards/hc/m9s12/demo9s12ne64/src/m9s12_boot.c +++ b/boards/hc/m9s12/demo9s12ne64/src/m9s12_boot.c @@ -63,7 +63,7 @@ * * Description: * All HCS12 architectures must provide the following entry point. - * This entry point is called early in the intitialization -- after + * This entry point is called early in the initialization -- after * all memory has been configured and mapped but before any * devices have been initialized. * diff --git a/boards/hc/m9s12/ne64badge/include/board.h b/boards/hc/m9s12/ne64badge/include/board.h index 61181172799..3f674730d2b 100644 --- a/boards/hc/m9s12/ne64badge/include/board.h +++ b/boards/hc/m9s12/ne64badge/include/board.h @@ -94,7 +94,7 @@ /* Button definitions *******************************************************/ /* The NE64 badge has 2 switches, - * one labed SW1 and the other SW2 on the board (but + * one labeled SW1 and the other SW2 on the board (but * referred to as button1 and button2 in some documentation) */ diff --git a/boards/mips/pic32mx/mirtoo/README.txt b/boards/mips/pic32mx/mirtoo/README.txt index e5a24e92376..ef364a53902 100644 --- a/boards/mips/pic32mx/mirtoo/README.txt +++ b/boards/mips/pic32mx/mirtoo/README.txt @@ -387,7 +387,7 @@ Toolchains Another option is the mips-elf toolchain used with the Pinguino project. This is a relatively current mips-elf GCC and should provide free C++ support as - well. This toolchain can be downloded from the Pinguino website: + well. This toolchain can be downloaded from the Pinguino website: http://wiki.pinguino.cc/index.php/Main_Page#Download . Support for the Pinguino mips-elf toolchain has been included in the Mirtoo @@ -479,7 +479,7 @@ Loading NuttX with ICD3 cd tools/pic32mx make - Now you will have an excecutable file call mkpichex (or mkpichex.exe on + Now you will have an executable file call mkpichex (or mkpichex.exe on Cygwin). This program will take the nutt.hex file as an input, it will convert all of the KSEG0 and KSEG1 addresses to physical address, and it will write the modified file, replacing the original nuttx.hex. @@ -837,7 +837,7 @@ Where is one of the following: nsh - This configuration directory holds configuration files tht can + This configuration directory holds configuration files that can be used to support the NuttShell (NSH). This configuration use UART1 which is available on FUNC 4 and 5 on connector X3: diff --git a/boards/mips/pic32mx/mirtoo/include/board.h b/boards/mips/pic32mx/mirtoo/include/board.h index 72015420c8f..7dfb2ec5e44 100644 --- a/boards/mips/pic32mx/mirtoo/include/board.h +++ b/boards/mips/pic32mx/mirtoo/include/board.h @@ -58,7 +58,7 @@ * internal +/- 0.9% FRC clock. That clock has a nomninal frequency of 8MHz. */ -#define BOARD_FRC_FREQ 8000000 /* FRC nomimal frequency(8MHz) */ +#define BOARD_FRC_FREQ 8000000 /* FRC nominal frequency(8MHz) */ /* Oscillator modes */ diff --git a/boards/mips/pic32mx/mirtoo/src/pic32_boot.c b/boards/mips/pic32mx/mirtoo/src/pic32_boot.c index e9c837ac2a5..7acf2a91984 100644 --- a/boards/mips/pic32mx/mirtoo/src/pic32_boot.c +++ b/boards/mips/pic32mx/mirtoo/src/pic32_boot.c @@ -134,7 +134,7 @@ static inline void pic32mx_uartinitialize(void) * * Description: * All PIC32MX architectures must provide the following entry point. - * This entry point is called early in the intitialization -- after all + * This entry point is called early in the initialization -- after all * memory has been configured and mapped but before any devices have been * initialized. * diff --git a/boards/mips/pic32mx/pic32mx-starterkit/README.txt b/boards/mips/pic32mx/pic32mx-starterkit/README.txt index 5b45a8a53a5..5a223b7ded3 100644 --- a/boards/mips/pic32mx/pic32mx-starterkit/README.txt +++ b/boards/mips/pic32mx/pic32mx-starterkit/README.txt @@ -437,7 +437,7 @@ Toolchains Another option is the mips-elf toolchain used with the Pinguino project. This is a relatively current mips-elf GCC and should provide free C++ support as - well. This toolchain can be downloded from the Pinguino website: + well. This toolchain can be downloaded from the Pinguino website: http://wiki.pinguino.cc/index.php/Main_Page#Download . See also boards/mirtoo/README.txt. There is an experimental (untested) @@ -556,7 +556,7 @@ Creating Compatible NuttX HEX files cd tools/pic32mx make - Now you will have an excecutable file call mkpichex (or mkpichex.exe on + Now you will have an executable file call mkpichex (or mkpichex.exe on Cygwin). This program will take the nutt.hex file as an input, it will convert all of the KSEG0 and KSEG1 addresses to physical address, and it will write the modified file, replacing the original nuttx.hex. @@ -973,7 +973,7 @@ PIC32MX specific PHY/Ethernet device driver settings CONFIG_ETH0_PHY_KS8721 - Selects the Micrel KS8721 PHY CONFIG_ETH0_PHY_DP83848C - Selects the National Semiconductor DP83848C PHY CONFIG_ETH0_PHY_LAN8720 - Selects the SMSC LAN8720 PHY - CONFIG_PIC32MX_PHY_AUTONEG - Enable auto-negotion + CONFIG_PIC32MX_PHY_AUTONEG - Enable auto-negotiation CONFIG_PIC32MX_PHY_SPEED100 - Select 100Mbit vs. 10Mbit speed. CONFIG_PIC32MX_PHY_FDUPLEX - Select full (vs. half) duplex CONFIG_PIC32MX_ETH_NTXDESC - Configured number of Tx descriptors. Default: 2 diff --git a/boards/mips/pic32mx/pic32mx7mmb/README.txt b/boards/mips/pic32mx/pic32mx7mmb/README.txt index 24e98022c90..faec7363b8c 100644 --- a/boards/mips/pic32mx/pic32mx7mmb/README.txt +++ b/boards/mips/pic32mx/pic32mx7mmb/README.txt @@ -154,7 +154,7 @@ Toolchains These configurations currently assume the mips-elf toolchain used with the Pinguino project. This is a relatively current mips-elf GCC and should - provide free C++ support as well. This toolchain can be downloded from the + provide free C++ support as well. This toolchain can be downloaded from the Pinguino website: http://wiki.pinguino.cc/index.php/Main_Page#Download . It should be a simple matter to adapt to other toolchains by modifying the @@ -295,7 +295,7 @@ Creating Compatible NuttX HEX files cd tools/pic32mx make - Now you will have an excecutable file call mkpichex (or mkpichex.exe on + Now you will have an executable file call mkpichex (or mkpichex.exe on Cygwin). This program will take the nutt.hex file as an input, it will convert all of the KSEG0 and KSEG1 addresses to physical address, and it will write the modified file, replacing the original nuttx.hex. @@ -555,7 +555,7 @@ PIC32MX specific PHY/Ethernet device driver settings CONFIG_ETH0_PHY_KS8721 - Selects the Micrel KS8721 PHY CONFIG_ETH0_PHY_DP83848C - Selects the National Semiconductor DP83848C PHY CONFIG_ETH0_PHY_LAN8720 - Selects the SMSC LAN8720 PHY - CONFIG_PIC32MX_PHY_AUTONEG - Enable auto-negotion + CONFIG_PIC32MX_PHY_AUTONEG - Enable auto-negotiation CONFIG_PIC32MX_PHY_SPEED100 - Select 100Mbit vs. 10Mbit speed. CONFIG_PIC32MX_PHY_FDUPLEX - Select full (vs. half) duplex CONFIG_PIC32MX_ETH_NTXDESC - Configured number of Tx descriptors. Default: 2 @@ -774,7 +774,7 @@ Where is one of the following: But you will have to enable a specific graphics example application in the NuttX configuration file in order to see anything. - 8. Enabling touch screen support in the nsh configuaration + 8. Enabling touch screen support in the nsh configuration In defconfig (or nuttx/.config), set: diff --git a/boards/mips/pic32mx/pic32mx7mmb/src/pic32_boot.c b/boards/mips/pic32mx/pic32mx7mmb/src/pic32_boot.c index 9af92feaca1..87c65411c5d 100644 --- a/boards/mips/pic32mx/pic32mx7mmb/src/pic32_boot.c +++ b/boards/mips/pic32mx/pic32mx7mmb/src/pic32_boot.c @@ -66,7 +66,7 @@ * * Description: * All PIC32MX architectures must provide the following entry point. - * This entry point is called early in the intitialization -- after all + * This entry point is called early in the initialization -- after all * memory has been configured and mapped but before any devices have been * initialized. * diff --git a/boards/mips/pic32mx/pic32mx7mmb/src/pic32_touchscreen.c b/boards/mips/pic32mx/pic32mx7mmb/src/pic32_touchscreen.c index a47b2b3d606..115b783ff29 100644 --- a/boards/mips/pic32mx/pic32mx7mmb/src/pic32_touchscreen.c +++ b/boards/mips/pic32mx/pic32mx7mmb/src/pic32_touchscreen.c @@ -338,7 +338,7 @@ static void tc_adc_sample(int pin) * * Assumptions: * 1) All output pins configured as outputs: - * 2) Approprite pins are driven high and low + * 2) Appropriate pins are driven high and low * ****************************************************************************/ diff --git a/boards/mips/pic32mx/sure-pic32mx/README.txt b/boards/mips/pic32mx/sure-pic32mx/README.txt index 88edf864fd4..fe5c9c810a6 100644 --- a/boards/mips/pic32mx/sure-pic32mx/README.txt +++ b/boards/mips/pic32mx/sure-pic32mx/README.txt @@ -292,7 +292,7 @@ Toolchains Another option is the mips-elf toolchain used with the Penguino project. This is a relatively current mips-elf GCC and should provide free C++ support as - well. This toolchain can be downloded from the Penguino website: + well. This toolchain can be downloaded from the Penguino website: http://wiki.pinguino.cc/index.php/Main_Page#Download . See also boards/mirtoo/README.txt. There is an experimental (untested) @@ -377,7 +377,7 @@ Loading NuttX with PICkit2 cd tools/pic32mx make - Now you will have an excecutable file call mkpichex (or mkpichex.exe on + Now you will have an executable file call mkpichex (or mkpichex.exe on Cygwin). This program will take the nutt.hex file as an input, it will convert all of the KSEG0 and KSEG1 addresses to physical address, and it will write the modified file, replacing the original nuttx.hex. @@ -659,7 +659,7 @@ Where is one of the following: System Type: CONFIG_MIPS32_TOOLCHAIN_MICROCHIPW_LITE=y : Older C32 toolchain - 2. USB Configuations. + 2. USB Configurations. Several USB device configurations can be enabled and included as NSH built-in built in functions. All require the following @@ -886,7 +886,7 @@ Where is one of the following: output will come the USB console, and 2) all debug output prior to connecting the USB console will be lost: - The second options is to configure a RAM SYLOG device. This is + The second options is to configure a RAM SYSLOG device. This is a circular buffer that accumulated debug output in memory. The contents of the circular buffer can be dumped from the NSH command line using the 'dmesg' command. diff --git a/boards/mips/pic32mx/sure-pic32mx/src/pic32mx_boot.c b/boards/mips/pic32mx/sure-pic32mx/src/pic32mx_boot.c index 41bec88b688..b435ea7ea31 100644 --- a/boards/mips/pic32mx/sure-pic32mx/src/pic32mx_boot.c +++ b/boards/mips/pic32mx/sure-pic32mx/src/pic32mx_boot.c @@ -66,7 +66,7 @@ * * Description: * All PIC32MX architectures must provide the following entry point. - * This entry point is called early in the intitialization -- after all + * This entry point is called early in the initialization -- after all * memory has been configured and mapped but before any devices have been * initialized. * diff --git a/boards/mips/pic32mx/sure-pic32mx/src/pic32mx_lcd1602.c b/boards/mips/pic32mx/sure-pic32mx/src/pic32mx_lcd1602.c index 803a90048bc..f814f747ddd 100644 --- a/boards/mips/pic32mx/sure-pic32mx/src/pic32mx_lcd1602.c +++ b/boards/mips/pic32mx/sure-pic32mx/src/pic32mx_lcd1602.c @@ -365,7 +365,7 @@ static void lcd_wrcommand(uint8_t cmd) putreg16(0, PIC32MX_IOPORTE_TRIS); - /* Set up to write the commond */ + /* Set up to write the command */ pic32mx_gpiowrite(GPIO_LCD_RS, false); /* Select command */ pic32mx_gpiowrite(GPIO_LCD_RW, false); /* Select write */ @@ -1019,7 +1019,7 @@ static int lcd_poll(FAR struct file *filep, FAR struct pollfd *fds, { if (setup) { - /* Data is always avaialble to be read */ + /* Data is always available to be read */ fds->revents |= (fds->events & (POLLIN|POLLOUT)); if (fds->revents != 0) @@ -1056,7 +1056,7 @@ int up_lcd1602_initialize(void) /* Configure GPIO pins */ putreg16(0, PIC32MX_IOPORTE_TRIS); /* Set DB0-15 as outputs */ - pic32mx_configgpio(GPIO_LCD_RS); /* RS: Selects commnand or data */ + pic32mx_configgpio(GPIO_LCD_RS); /* RS: Selects command or data */ pic32mx_configgpio(GPIO_LCD_RW); /* RW: Selects read or write */ pic32mx_configgpio(GPIO_LCD_E); /* E: Starts transfer */ @@ -1065,7 +1065,7 @@ int up_lcd1602_initialize(void) pic32mx_configgpio(GPIO_LCD_LIGHT); /* K */ pic32mx_configgpio(GPIO_LCD_COMP); /* Vo */ pic32mx_configgpio(GPIO_LCD_PWR); /* Vbuson/AN5/RB5 controls +5V USB */ - g_lcd1602.brightness = 0; /* Remember tht the light is off */ + g_lcd1602.brightness = 0; /* Remember the light is off */ /* A small delay is necessary between when GPIO_LCD_E was set up as an * output with initial value of 0 and this operation. That delay should diff --git a/boards/mips/pic32mx/ubw32/README.txt b/boards/mips/pic32mx/ubw32/README.txt index 448399abae9..8af6caefb13 100644 --- a/boards/mips/pic32mx/ubw32/README.txt +++ b/boards/mips/pic32mx/ubw32/README.txt @@ -230,7 +230,7 @@ Toolchains Another option is the mips-elf toolchain used with the Pinguino project. This is a relatively current mips-elf GCC and should provide free C++ support as - well. This toolchain can be downloded from the Pinguino website: + well. This toolchain can be downloaded from the Pinguino website: http://wiki.pinguino.cc/index.php/Main_Page#Download . See also boards/mirtoo/README.txt. There is an experimental (untested) @@ -316,7 +316,7 @@ Loading NuttX with PICkit2 cd tools/pic32mx make - Now you will have an excecutable file call mkpichex (or mkpichex.exe on + Now you will have an executable file call mkpichex (or mkpichex.exe on Cygwin). This program will take the nutt.hex file as an input, it will convert all of the KSEG0 and KSEG1 addresses to physical address, and it will write the modified file, replacing the original nuttx.hex. @@ -585,7 +585,7 @@ Where is one of the following: GND -- J4 pin 40: GND Vcc -- J4 pin 39: 5V - 3. USB Configuations + 3. USB Configurations Several USB device configurations can be enabled and included as NSH built-in built in functions. diff --git a/boards/mips/pic32mx/ubw32/src/pic32_boot.c b/boards/mips/pic32mx/ubw32/src/pic32_boot.c index 061fe2b05f1..7ac4fc7f1c9 100644 --- a/boards/mips/pic32mx/ubw32/src/pic32_boot.c +++ b/boards/mips/pic32mx/ubw32/src/pic32_boot.c @@ -66,7 +66,7 @@ * * Description: * All PIC32MX architectures must provide the following entry point. This - * entry point is called early in the intitialization - after all memory has + * entry point is called early in the initialization - after all memory has * been configured and mapped but before any devices have been initialized. * ****************************************************************************/ diff --git a/boards/mips/pic32mz/pic32mz-starterkit/README.txt b/boards/mips/pic32mz/pic32mz-starterkit/README.txt index e68110e3c98..932ea42e179 100644 --- a/boards/mips/pic32mz/pic32mz-starterkit/README.txt +++ b/boards/mips/pic32mz/pic32mz-starterkit/README.txt @@ -114,7 +114,7 @@ Creating Compatible NuttX HEX files cd tools/pic32mx make - Now you will have an excecutable file call mkpichex (or mkpichex.exe on + Now you will have an executable file call mkpichex (or mkpichex.exe on Cygwin). This program will take the nutt.hex file as an input, it will convert all of the KSEG0 and KSEG1 addresses to physical address, and it will write the modified file, replacing the original nuttx.hex. @@ -204,7 +204,7 @@ Serial Console ------------------------------------------ If the MEB-II UART configuration when used with the I/O Expansion board (with the adapter), then UART will be on J11 with Pin 35 being U1RX (into - MZ) and Pin 37 being TU1X (out od MZ). + MZ) and Pin 37 being TU1X (out of MZ). Directly from the Adapter Board ------------------------------- diff --git a/boards/misoc/lm32/misoc/README.txt b/boards/misoc/lm32/misoc/README.txt index e4d850b8bc5..9b9ed13aa07 100644 --- a/boards/misoc/lm32/misoc/README.txt +++ b/boards/misoc/lm32/misoc/README.txt @@ -65,7 +65,7 @@ boards/misoc/lm32/misoc/include/generated In order to build this configuration, you must provide the boards/misoc/lm32/misoc/include/generated directory. It contains the generated - Misoc files and may be a symbolic link. The base configurtion will NOT + Misoc files and may be a symbolic link. The base configuration will NOT build without this directory! There is a sample generated directory at boards/misoc/include/generated-sample. diff --git a/boards/renesas/m16c/skp16c26/README.txt b/boards/renesas/m16c/skp16c26/README.txt index 40774e85c07..b30b3d407ba 100644 --- a/boards/renesas/m16c/skp16c26/README.txt +++ b/boards/renesas/m16c/skp16c26/README.txt @@ -102,7 +102,7 @@ Cygwin GCC BUILD NOTES cd - # Back to the buildroot make directory make # Restart the build - GCC is built twice. First a initial, "bootstap" GCC is produced in + GCC is built twice. First a initial, "bootstrap" GCC is produced in toolchain_build_m32c/gcc-4.2.4-initial, then the final GCC is produced in toolchain_build_m32c/gcc-4.2.4-final. The above error will occur twice: Once for the initial GCC build (see above) and once for the final GCC build. For the final GCC diff --git a/boards/renesas/m16c/skp16c26/include/board.h b/boards/renesas/m16c/skp16c26/include/board.h index 654bc476e28..ce6b6cd4520 100644 --- a/boards/renesas/m16c/skp16c26/include/board.h +++ b/boards/renesas/m16c/skp16c26/include/board.h @@ -46,7 +46,7 @@ /* User configuration checks ************************************************/ -/* According to SKP16C26 documention, "SIO/UART1 pins are used for +/* According to SKP16C26 documentation, "SIO/UART1 pins are used for * communication between the SKP16C26 board kernel and KD30 Debugger through * the ICD. Do not connect these pins to any other circuit, as UART1 cannot * be used in the user program. diff --git a/boards/renesas/rx65n/rx65n-grrose/README.txt b/boards/renesas/rx65n/rx65n-grrose/README.txt index 36850403dd3..2942d1d732a 100644 --- a/boards/renesas/rx65n/rx65n-grrose/README.txt +++ b/boards/renesas/rx65n/rx65n-grrose/README.txt @@ -238,7 +238,7 @@ CONFIG_DEBUG_SYMBOLS = y (Set this option, using menuconfig only, DO NOT Enable Flashing NuttX =============== -Alternativly, NuttX binary can be flashed using Renesas flash programmer tool without using e2 studio/Cygwin +Alternatively, NuttX binary can be flashed using Renesas flash programmer tool without using e2 studio/Cygwin Below are the steps mentioned to flash NuttX binary using Renesas flash programmer tool(RFP). diff --git a/boards/renesas/rx65n/rx65n-grrose/include/board.h b/boards/renesas/rx65n/rx65n-grrose/include/board.h index f239eb2f440..2c40898f4b6 100644 --- a/boards/renesas/rx65n/rx65n-grrose/include/board.h +++ b/boards/renesas/rx65n/rx65n-grrose/include/board.h @@ -110,7 +110,7 @@ PORTA.PDR.BIT.BT0 = PORTA.PDR.BIT.B1 = 1; \ } #else -#errror "LEDs are not defined." +#error "LEDs are not defined." #endif #define LED_STARTED 1 /* ON OFF NC NC */ diff --git a/boards/renesas/rx65n/rx65n-rsk1mb/include/board.h b/boards/renesas/rx65n/rx65n-rsk1mb/include/board.h index 5ca16915e6e..13e6706090c 100644 --- a/boards/renesas/rx65n/rx65n-rsk1mb/include/board.h +++ b/boards/renesas/rx65n/rx65n-rsk1mb/include/board.h @@ -110,7 +110,7 @@ PORTA.PDR.BIT.BT0 = PORTA.PDR.BIT.B1 = 1; \ } #else -#errror "LEDs are not defined." +#error "LEDs are not defined." #endif #define LED_STARTED 1 /* ON OFF NC NC */ diff --git a/boards/renesas/rx65n/rx65n-rsk2mb/README.txt b/boards/renesas/rx65n/rx65n-rsk2mb/README.txt index 705f3c41225..e811b603492 100644 --- a/boards/renesas/rx65n/rx65n-rsk2mb/README.txt +++ b/boards/renesas/rx65n/rx65n-rsk2mb/README.txt @@ -196,7 +196,7 @@ CONFIG_DEBUG_SYMBOLS = y (Set this option, using menuconfig only, DO NOT Enable Flashing NuttX =============== -Alternativly, NuttX binary can be flashed using Renesas flash programmer tool without using e2 studio/Cygwin +Alternatively, NuttX binary can be flashed using Renesas flash programmer tool without using e2 studio/Cygwin Below are the steps mentioned to flash NuttX binary using Renesas flash programmer tool(RFP). diff --git a/boards/renesas/rx65n/rx65n-rsk2mb/include/board.h b/boards/renesas/rx65n/rx65n-rsk2mb/include/board.h index 70107c62343..fca2d70f429 100644 --- a/boards/renesas/rx65n/rx65n-rsk2mb/include/board.h +++ b/boards/renesas/rx65n/rx65n-rsk2mb/include/board.h @@ -110,7 +110,7 @@ PORTA.PDR.BIT.BT0 = PORTA.PDR.BIT.B1 = 1; \ } #else -#errror "LEDs are not defined." +#error "LEDs are not defined." #endif #define LED_STARTED 1 /* ON OFF NC NC */ diff --git a/boards/renesas/rx65n/rx65n/include/board.h b/boards/renesas/rx65n/rx65n/include/board.h index 338edd4aed2..b36d98cd865 100644 --- a/boards/renesas/rx65n/rx65n/include/board.h +++ b/boards/renesas/rx65n/rx65n/include/board.h @@ -110,7 +110,7 @@ PORTA.PDR.BIT.BT0 = PORTA.PDR.BIT.B1 = 1; \ } #else -#errror "LEDs are not defined." +#error "LEDs are not defined." #endif #define LED_STARTED 1 /* ON OFF NC NC */ diff --git a/boards/renesas/sh1/us7032evb1/configs/ostest/ld.script b/boards/renesas/sh1/us7032evb1/configs/ostest/ld.script index 314189bc488..31af655aced 100644 --- a/boards/renesas/sh1/us7032evb1/configs/ostest/ld.script +++ b/boards/renesas/sh1/us7032evb1/configs/ostest/ld.script @@ -39,7 +39,7 @@ SECTIONS { /* The us7032evb1 has CMON in PROM beginning at address 0x00000000 and * either 64Kb or 256Kb of SRAM beginning at 0x0a000000. Neither the - * PROM nor the first 8Kb of SRAM are avaible to the devoleper as these + * PROM nor the first 8Kb of SRAM are available to the devoleper as these * are used by CMON. The next 1Kb of SRAM is dedicated to relocated * interrupt vectors. */ diff --git a/boards/renesas/sh1/us7032evb1/scripts/sram.ld b/boards/renesas/sh1/us7032evb1/scripts/sram.ld index 0eaaf761806..0eab9cc3460 100644 --- a/boards/renesas/sh1/us7032evb1/scripts/sram.ld +++ b/boards/renesas/sh1/us7032evb1/scripts/sram.ld @@ -39,7 +39,7 @@ SECTIONS { /* The us7032evb1 has CMON in PROM beginning at address 0x00000000 and * either 64Kb or 256Kb of SRAM beginning at 0x0a000000. Neither the - * PROM nor the first 8Kb of SRAM are avaible to the devoleper as these + * PROM nor the first 8Kb of SRAM are available to the devoleper as these * are used by CMON. The next 1Kb of SRAM is dedicated to relocated * interrupt vectors. */ diff --git a/boards/risc-v/fe310/hifive1-revb/src/fe310_boot.c b/boards/risc-v/fe310/hifive1-revb/src/fe310_boot.c index 9a73784d724..1c25b0f0683 100644 --- a/boards/risc-v/fe310/hifive1-revb/src/fe310_boot.c +++ b/boards/risc-v/fe310/hifive1-revb/src/fe310_boot.c @@ -61,7 +61,7 @@ * * Description: * All FE310 architectures must provide the following entry point. - * This entry point is called early in the intitialization -- after all + * This entry point is called early in the initialization -- after all * memory has been configured and mapped but before any devices have been * initialized. * diff --git a/boards/risc-v/gap8/gapuino/README.txt b/boards/risc-v/gap8/gapuino/README.txt index f9fa02c25e5..ee27958eae2 100644 --- a/boards/risc-v/gap8/gapuino/README.txt +++ b/boards/risc-v/gap8/gapuino/README.txt @@ -59,7 +59,7 @@ Execute ======= You may download the ELF to the board by `plpbridge` in gap_sdk. Remember to first `cd` to the gap_sdk/ and `source sourceme.sh`, so - that you have the $GAP_SDK_HOME environment varible. + that you have the $GAP_SDK_HOME environment variable. Use the following command to download and run the ELF through JTAG: diff --git a/boards/risc-v/gap8/gapuino/scripts/ld.script b/boards/risc-v/gap8/gapuino/scripts/ld.script index df6bfcaa8ea..10c7906f6c7 100644 --- a/boards/risc-v/gap8/gapuino/scripts/ld.script +++ b/boards/risc-v/gap8/gapuino/scripts/ld.script @@ -124,7 +124,7 @@ SECTIONS } > L2 /*--------------------------------------------------------------------*/ - /* Global constructor/destructor segement */ + /* Global constructor/destructor segment */ /*--------------------------------------------------------------------*/ .preinit_array : diff --git a/boards/risc-v/k210/maix-bit/src/k210_boot.c b/boards/risc-v/k210/maix-bit/src/k210_boot.c index 9622361457d..fe084188606 100644 --- a/boards/risc-v/k210/maix-bit/src/k210_boot.c +++ b/boards/risc-v/k210/maix-bit/src/k210_boot.c @@ -60,7 +60,7 @@ * * Description: * All K210 architectures must provide the following entry point. - * This entry point is called early in the intitialization -- after all + * This entry point is called early in the initialization -- after all * memory has been configured and mapped but before any devices have been * initialized. * diff --git a/boards/risc-v/nr5m100/nr5m100-nexys4/README.txt b/boards/risc-v/nr5m100/nr5m100-nexys4/README.txt index f18aef7fafb..ffacaeb4644 100644 --- a/boards/risc-v/nr5m100/nr5m100-nexys4/README.txt +++ b/boards/risc-v/nr5m100/nr5m100-nexys4/README.txt @@ -60,7 +60,7 @@ Development Environment The reason NR5M100 is "low performance" is that it is a state machine based core (like the picorv32) and not a multi-stage pipeline core. This means that it requires an average of - 4.5 clock cycles to execute each instruction. On a multi-stage pipeline architecure, this + 4.5 clock cycles to execute each instruction. On a multi-stage pipeline architecture, this average would be closer to 1 clock cycle per instruction (though a bit higher due to pipeline branch misses). The tradeoff for lower performance is a simpler design. There is a single memory bus interface for both instructions and data. Multi-stage pipeline @@ -140,7 +140,7 @@ Debugger git clone --recursive https://github.com/sifive/openocd.git 3. Configure and build OpenOCD. The x86_64 GCC compilers will give errors because of - shadowed variable warnings, so diable the -Werror flag also: + shadowed variable warnings, so disable the -Werror flag also: cd openocd sed -i 's/ -Werror//g' configure.ac diff --git a/boards/risc-v/nr5m100/nr5m100-nexys4/scripts/ld.script b/boards/risc-v/nr5m100/nr5m100-nexys4/scripts/ld.script index decde423dc5..989804a929f 100644 --- a/boards/risc-v/nr5m100/nr5m100-nexys4/scripts/ld.script +++ b/boards/risc-v/nr5m100/nr5m100-nexys4/scripts/ld.script @@ -45,7 +45,7 @@ /* The OUTPUT_ARCH command specifies the machine architecture where the * argument is one of the names used in the BFD library. More - * specifically one of the entires in bfd/cpu-mips.c + * specifically one of the entries in bfd/cpu-mips.c */ OUTPUT_ARCH( "riscv" ) @@ -107,7 +107,7 @@ GROUP( -lc ) * PROVIDE( etext = . ); * * This will set the global symbol _ftext to the current location. If we - * wrap this in a PROVIDE commad, the symbol will only be set if it is + * wrap this in a PROVIDE command, the symbol will only be set if it is * not defined. We do this with symbols which don't begin with an * underscore since technically in ansi C someone might have a function * with the same name (eg. etext). @@ -195,7 +195,7 @@ SECTIONS _etext = .; /*--------------------------------------------------------------------*/ - /* Global constructor/destructor segement */ + /* Global constructor/destructor segment */ /*--------------------------------------------------------------------*/ .preinit_array : diff --git a/boards/risc-v/nr5m100/nr5m100-nexys4/src/nr5_autoleds.c b/boards/risc-v/nr5m100/nr5m100-nexys4/src/nr5_autoleds.c index 3a28cf6b66e..30b26ee5836 100644 --- a/boards/risc-v/nr5m100/nr5m100-nexys4/src/nr5_autoleds.c +++ b/boards/risc-v/nr5m100/nr5m100-nexys4/src/nr5_autoleds.c @@ -60,7 +60,7 @@ * * Description: * All NR5 architectures must provide the following entry point. - * This entry point is called early in the intitialization -- after all + * This entry point is called early in the initialization -- after all * memory has been configured and mapped but before any devices have been * initialized. * diff --git a/boards/risc-v/nr5m100/nr5m100-nexys4/src/nr5_boot.c b/boards/risc-v/nr5m100/nr5m100-nexys4/src/nr5_boot.c index f53b4da7e5e..7da7f04485f 100644 --- a/boards/risc-v/nr5m100/nr5m100-nexys4/src/nr5_boot.c +++ b/boards/risc-v/nr5m100/nr5m100-nexys4/src/nr5_boot.c @@ -60,7 +60,7 @@ * * Description: * All NR5 architectures must provide the following entry point. - * This entry point is called early in the intitialization -- after all + * This entry point is called early in the initialization -- after all * memory has been configured and mapped but before any devices have been * initialized. * diff --git a/boards/sim/sim/sim/README.txt b/boards/sim/sim/sim/README.txt index c79f8b4c40d..21021cf2b25 100644 --- a/boards/sim/sim/sim/README.txt +++ b/boards/sim/sim/sim/README.txt @@ -205,9 +205,9 @@ Update: Please issue these commands to setup the reliable network on Ubuntu: sudo nuttx/tools/simbridge.sh eth0 on Here is some tips you may need: - 1.Must launch the exectuable with the root permission + 1.Must launch the executable with the root permission 2.Have to use virtual machine if host is in corporation network - 3.Configure the network adpater in NAT mode if virtual machine is used + 3.Configure the network adapter in NAT mode if virtual machine is used X11 Issues ---------- @@ -303,7 +303,7 @@ SMP http://www.open-std.org/jtc1/sc22/wg14/www/docs/n1318.htm Update: The dead lock is due to up_testset call pthread API for synchronization - inside the signal handler. After swiching to atomic API, the problem get resolved. + inside the signal handler. After switching to atomic API, the problem get resolved. You can enable SMP for ostest configuration by enabling: @@ -1162,7 +1162,7 @@ udgram unionfs This is a version of NSH dedicated to performing the simple test of the - Union File System at apps/exmaples/uniofs. The command 'unionfs' will mount + Union File System at apps/examples/uniofs. The command 'unionfs' will mount the Union File System at /mnt/unionfs. You can than compare what you see at /mnt/unionfs with the content of the ROMFS file systems at apps/examples/unionfs/atestdir and btestdir. diff --git a/boards/xtensa/esp32/esp32-core/README.txt b/boards/xtensa/esp32/esp32-core/README.txt index 2795365c8da..3fb5b9972f6 100644 --- a/boards/xtensa/esp32/esp32-core/README.txt +++ b/boards/xtensa/esp32/esp32-core/README.txt @@ -748,7 +748,7 @@ Things to Do CONFIG_SUPPRESS_UART_CONFIG=y I have not debugged this in detail, but this appears to be an issue with the - impelentation of esp32_configgpio() and/or gpio_matrix_out() when called from + implementation of esp32_configgpio() and/or gpio_matrix_out() when called from the setup logic in arch/xtensa/src/esp32/esp32_serial.c. I am not inclined to invest a lot in driver debug until the clock configuration is finalized. diff --git a/boards/z80/ez80/ez80f910200zco/README.txt b/boards/z80/ez80/ez80f910200zco/README.txt index 79febb9c641..022a26cd11d 100644 --- a/boards/z80/ez80/ez80f910200zco/README.txt +++ b/boards/z80/ez80/ez80f910200zco/README.txt @@ -116,7 +116,7 @@ Configuration Subdirectories ---------------------------- dhcpd: - This builds the DCHP server using the examples/dhcpd application + This builds the DHCP server using the examples/dhcpd application (for execution from FLASH.) See apps/examples/README.txt for information about the dhcpd example. diff --git a/boards/z80/ez80/ez80f910200zco/src/ez80_buttons.c b/boards/z80/ez80/ez80f910200zco/src/ez80_buttons.c index 6f2be97317e..e125d2181bc 100644 --- a/boards/z80/ez80/ez80f910200zco/src/ez80_buttons.c +++ b/boards/z80/ez80/ez80f910200zco/src/ez80_buttons.c @@ -64,7 +64,7 @@ * Name: up_PB/1/2interrupt * * Description: - * These could be exteneded to provide interrupt driven button input + * These could be extended to provide interrupt driven button input * ****************************************************************************/ diff --git a/boards/z80/ez80/ez80f910200zco/src/ez80f910200zco.h b/boards/z80/ez80/ez80f910200zco/src/ez80f910200zco.h index cc64301975c..659d7fd62f1 100644 --- a/boards/z80/ez80/ez80f910200zco/src/ez80f910200zco.h +++ b/boards/z80/ez80/ez80f910200zco/src/ez80f910200zco.h @@ -115,7 +115,7 @@ * The Data Terminal Ready (DTR) signal at D3 informs the modem that the PC * is ready. * TX: - * The TX signal at D4 indicates that data is tranmitted to the modem. + * The TX signal at D4 indicates that data is transmitted to the modem. */ /* Push buttons: diff --git a/boards/z80/ez80/scripts/eZ80_Config.mk b/boards/z80/ez80/scripts/eZ80_Config.mk index 931c2e6aae6..64bc6459a9f 100644 --- a/boards/z80/ez80/scripts/eZ80_Config.mk +++ b/boards/z80/ez80/scripts/eZ80_Config.mk @@ -109,7 +109,7 @@ endef # 2. Normally, the library file is in the current directory, but other # times, the library is an absolute path such as # D:\Spuda\Documents\projects\nuttx\master\apps-fork\libapps.lib. In -# this case, the base library name is extact as the ARCHIVE logic CD's +# this case, the base library name is extract as the ARCHIVE logic CD's # to the directory containing the library. ifeq ($(CONFIG_WINDOWS_NATIVE),y) diff --git a/boards/z80/z8/z8encore000zco/src/z8_leds.c b/boards/z80/z8/z8encore000zco/src/z8_leds.c index 217e5cba0f7..82d30aa2493 100644 --- a/boards/z80/z8/z8encore000zco/src/z8_leds.c +++ b/boards/z80/z8/z8encore000zco/src/z8_leds.c @@ -69,7 +69,7 @@ #define Z8_PORTG_ANODE_ROW5 0x20 #define Z8_PORTG_ANODE_ROW6 0x40 -/* Port E: Cathode Bit Assignements (0 enables) */ +/* Port E: Cathode Bit Assignments (0 enables) */ #define Z8_PORTE_CATHODE_MASK 0x1f #define Z8_PORTE_CATHODE_COLUMN0 0x01 diff --git a/boards/z80/z80/z80sim/README.txt b/boards/z80/z80/z80sim/README.txt index e31f23ddd68..c2a47d0fe57 100644 --- a/boards/z80/z80/z80sim/README.txt +++ b/boards/z80/z80/z80sim/README.txt @@ -119,7 +119,7 @@ All of the z80 configurations in this this directory are set up to build under Linux. That configuration can be converted to run natively in a Windows CMD.exe shell. That configuration requires the MinGW host compiler and several GNUWin32 tools (see discussion in the top-level NuttX/README.txt -file) and the following changes to the configuation file: +file) and the following changes to the configuration file: -CONFIG_HOST_LINUX=y +CONFIG_HOST_WINDOWS=y diff --git a/drivers/audio/Kconfig b/drivers/audio/Kconfig index e305551aa4e..f632ff00427 100644 --- a/drivers/audio/Kconfig +++ b/drivers/audio/Kconfig @@ -132,7 +132,7 @@ config CS43L22_CLKDEBUG bool "CS43L22 clock analysis" default n ---help--- - Enable logic to analyze CS43L22 clock configuation. + Enable logic to analyze CS43L22 clock configuration. endif # AUDIO_CS43L22 @@ -221,7 +221,7 @@ config WM8904_CLKDEBUG bool "WM8904 clock analysis" default n ---help--- - Enable logic to analyze WM8904 clock configuation. + Enable logic to analyze WM8904 clock configuration. endif # AUDIO_WM8904 diff --git a/drivers/audio/vs1053.c b/drivers/audio/vs1053.c index 03ebc5bfa9e..99387970850 100644 --- a/drivers/audio/vs1053.c +++ b/drivers/audio/vs1053.c @@ -221,7 +221,7 @@ static const struct audio_ops_s g_audioops = /* Volume control log table. This table is in increments of 2% of * requested volume level and is the register value that should be - * programmed to the VS1053 to achieve that volume pecentage. + * programmed to the VS1053 to achieve that volume percentage. */ #ifndef CONFIG_AUDIO_EXCLUDE_VOLUME @@ -251,19 +251,19 @@ static const uint8_t g_logtable [] = static void vs1053_spi_lock(FAR struct spi_dev_s *dev, unsigned long freq_mhz) { - /* On SPI busses where there are multiple devices, it will be necessary to - * lock SPI to have exclusive access to the busses for a sequence of + /* On SPI buses where there are multiple devices, it will be necessary to + * lock SPI to have exclusive access to the buses for a sequence of * transfers. The bus should be locked before the chip is selected. * - * This is a blocking call and will not return until we have exclusiv access to - * the SPI buss. We will retain that exclusive access until the bus is unlocked. + * This is a blocking call and will not return until we have exclusive access to + * the SPI bus. We will retain that exclusive access until the bus is unlocked. */ SPI_LOCK(dev, true); /* After locking the SPI bus, the we also need call the setfrequency, setbits, and * setmode methods to make sure that the SPI is properly configured for the device. - * If the SPI buss is being shared, then it may have been left in an incompatible + * If the SPI bus is being shared, then it may have been left in an incompatible * state. */ diff --git a/drivers/bch/bchdev_driver.c b/drivers/bch/bchdev_driver.c index a337a1524cb..0cea8a6cddd 100644 --- a/drivers/bch/bchdev_driver.c +++ b/drivers/bch/bchdev_driver.c @@ -458,7 +458,7 @@ static int bch_unlink(FAR struct inode *inode) bch->unlinked = true; - /* If there are no open references to the drvier then teardown the BCH + /* If there are no open references to the driver then teardown the BCH * device now. */ diff --git a/drivers/can/Kconfig b/drivers/can/Kconfig index 7e1510e7e50..d5298d77e73 100644 --- a/drivers/can/Kconfig +++ b/drivers/can/Kconfig @@ -56,7 +56,7 @@ config CAN_TXREADY default n ---help--- This selection enables the can_txready() interface. This interface - is needed only for CAN hardware that supports queing of outgoing + is needed only for CAN hardware that supports queueing of outgoing messages in a H/W FIFO. The CAN upper half driver also supports a queue of output messages diff --git a/drivers/can/can.c b/drivers/can/can.c index f6018c4aa75..51e8afe8267 100644 --- a/drivers/can/can.c +++ b/drivers/can/can.c @@ -331,7 +331,7 @@ static uint8_t can_bytes2dlc(FAR struct sam_can_s *priv, uint8_t nbytes) * * Description: * This function performs deferred processing from can_txready. See the - * discription of can_txready below for additionla information. + * description of can_txready below for additionla information. * ****************************************************************************/ @@ -1497,7 +1497,7 @@ int can_txdone(FAR struct can_dev_s *dev) * Description: * Called from the CAN interrupt handler at the completion of a send * operation. This interface is needed only for CAN hardware that - * supports queing of outgoing messages in a H/W FIFO. + * supports queueing of outgoing messages in a H/W FIFO. * * The CAN upper half driver also supports a queue of output messages in a * S/W FIFO. Messages are added to that queue when when can_write() is diff --git a/drivers/can/mcp2515.c b/drivers/can/mcp2515.c index c58fcc45509..d42335ae10f 100644 --- a/drivers/can/mcp2515.c +++ b/drivers/can/mcp2515.c @@ -4,7 +4,7 @@ * Copyright (C) 2017, 2019 Gregory Nutt. All rights reserved. * Copyright (C) 2017 Alan Carvalho de Assis. All rights reserved. * Author: Alan Carvalho de Assis - * Modfied: Ben + * Modified: Ben * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -168,9 +168,9 @@ /* TXn buffer interrupts * - * MCP2515_INT_TX0 - Transmmit Buffer 0 Empty Interrupt - * MCP2515_INT_TX1 - Transmmit Buffer 1 Empty Interrupt - * MCP2515_INT_TX2 - Transmmit Buffer 2 Empty Interrupt + * MCP2515_INT_TX0 - Transmit Buffer 0 Empty Interrupt + * MCP2515_INT_TX1 - Transmit Buffer 1 Empty Interrupt + * MCP2515_INT_TX2 - Transmit Buffer 2 Empty Interrupt */ #define MCP2515_TXBUFFER_INTS (MCP2515_INT_TX0 | MCP2515_INT_TX1 | MCP2515_INT_TX2) diff --git a/drivers/contactless/mfrc522.c b/drivers/contactless/mfrc522.c index 134459c5cee..9c2d92f5b21 100644 --- a/drivers/contactless/mfrc522.c +++ b/drivers/contactless/mfrc522.c @@ -472,7 +472,7 @@ int mfrc522_comm_picc(FAR struct mfrc522_dev_s *dev, uint8_t command, tstart.tv_nsec -= 1000 * 1000 * 1000; } - /* If it is a Transceive command, then start transmittion */ + /* If it is a Transceive command, then start transmission */ if (command == MFRC522_TRANSCV_CMD) { diff --git a/drivers/contactless/mfrc522.h b/drivers/contactless/mfrc522.h index be30edf420f..9f3228b05d7 100644 --- a/drivers/contactless/mfrc522.h +++ b/drivers/contactless/mfrc522.h @@ -369,7 +369,7 @@ /* Section 9.3.2.14 MfRxReg register */ -#define MFRC522_MF_RX_PARITY_DIS (1 << 4 ) /* disable parity bit to transmittion and reception */ +#define MFRC522_MF_RX_PARITY_DIS (1 << 4 ) /* disable parity bit to transmission and reception */ /* Section 9.3.2.16: SerialSpeedReg register */ diff --git a/drivers/contactless/pn532.h b/drivers/contactless/pn532.h index 443aef76709..65dcb196359 100644 --- a/drivers/contactless/pn532.h +++ b/drivers/contactless/pn532.h @@ -127,7 +127,7 @@ begin_packed_struct struct pn532_frame * the data field */ uint8_t lcs; /* 1 Packet Length Checksum LCS byte that satisfies * the relation: Lower byte of [LEN + LCS] = 00h */ - uint8_t tfi; /* Frame idenfifier 0xD4, 0xD5 */ + uint8_t tfi; /* Frame identifier 0xD4, 0xD5 */ uint8_t data[]; /* LEN-1 bytes of Packet Data Information. * The first byte PD0 is the Command Code */ } end_packed_struct; diff --git a/drivers/i2c/i2c_driver.c b/drivers/i2c/i2c_driver.c index e46313c74ae..6031ec73e81 100644 --- a/drivers/i2c/i2c_driver.c +++ b/drivers/i2c/i2c_driver.c @@ -340,7 +340,7 @@ static int i2cdrvr_unlink(FAR struct inode *inode) return OK; } - /* No... just mark the driver as unlinked and free the resouces when the + /* No... just mark the driver as unlinked and free the resources when the * last client closes their reference to the driver. */ diff --git a/drivers/input/Kconfig b/drivers/input/Kconfig index 3060753f704..64994c1b9f6 100644 --- a/drivers/input/Kconfig +++ b/drivers/input/Kconfig @@ -145,7 +145,7 @@ config INPUT_ADS7843E select SPI ---help--- Enable support for the TI/Burr-Brown ADS7842 touchscreen controller. I believe - that driver should be compatibile with the TI/Burr-Brown TSC2046 and XPT2046 + that driver should be compatible with the TI/Burr-Brown TSC2046 and XPT2046 touchscreen controllers as well. if INPUT_ADS7843E diff --git a/drivers/input/ajoystick.c b/drivers/input/ajoystick.c index cc68c586491..384ef40909f 100644 --- a/drivers/input/ajoystick.c +++ b/drivers/input/ajoystick.c @@ -382,7 +382,7 @@ static int ajoy_open(FAR struct file *filep) opriv = (FAR struct ajoy_open_s *)kmm_zalloc(sizeof(struct ajoy_open_s)); if (!opriv) { - ierr("ERROR: Failled to allocate open structure\n"); + ierr("ERROR: Failed to allocate open structure\n"); ret = -ENOMEM; goto errout_with_sem; } diff --git a/drivers/input/button_upper.c b/drivers/input/button_upper.c index b756e3595d3..8f4020db208 100644 --- a/drivers/input/button_upper.c +++ b/drivers/input/button_upper.c @@ -366,7 +366,7 @@ static int btn_open(FAR struct file *filep) opriv = (FAR struct btn_open_s *)kmm_zalloc(sizeof(struct btn_open_s)); if (!opriv) { - ierr("ERROR: Failled to allocate open structure\n"); + ierr("ERROR: Failed to allocate open structure\n"); ret = -ENOMEM; goto errout_with_sem; } diff --git a/drivers/input/djoystick.c b/drivers/input/djoystick.c index 0e28acc5838..b658efed7c9 100644 --- a/drivers/input/djoystick.c +++ b/drivers/input/djoystick.c @@ -382,7 +382,7 @@ static int djoy_open(FAR struct file *filep) opriv = (FAR struct djoy_open_s *)kmm_zalloc(sizeof(struct djoy_open_s)); if (!opriv) { - ierr("ERROR: Failled to allocate open structure\n"); + ierr("ERROR: Failed to allocate open structure\n"); ret = -ENOMEM; goto errout_with_sem; } diff --git a/drivers/input/ft5x06.c b/drivers/input/ft5x06.c index 753a55b6c09..3118f619182 100644 --- a/drivers/input/ft5x06.c +++ b/drivers/input/ft5x06.c @@ -681,7 +681,7 @@ static ssize_t ft5x06_waitsample(FAR struct ft5x06_dev_s *priv, /* Now sample the data. * * REVISIT: Is it safe to assume that priv->valid will always be - * true? I think that sched_lock() whould protect the setting. + * true? I think that sched_lock() would protect the setting. */ ret = ft5x06_sample(priv, buffer, len); diff --git a/drivers/input/ft5x06.h b/drivers/input/ft5x06.h index 1593b43b3d8..4e75bc2128e 100644 --- a/drivers/input/ft5x06.h +++ b/drivers/input/ft5x06.h @@ -86,7 +86,7 @@ #define FT5x06_PERIODACTIVE_REG (0x88) /* Report rate in Active mode */ #define FT5x06_PERIODMONITOR_REG (0x89) /* Report rate in Monitor mode */ #define FT5x06_RADIAN_VALUE_REG (0x91) /* Minimum allowing angle */ -#define FT5x06_OFFSET_LEFT_RIGHT_REG (0x92) /* Mimimum offset */ +#define FT5x06_OFFSET_LEFT_RIGHT_REG (0x92) /* Minimum offset */ #define FT5x06_OFFSET_UP_DOWN_REG (0x93) /* Maximum offset */ #define FT5x06_DISTANCE_LEFT_RIGHT_REG (0x94) /* Minimum distance */ #define FT5x06_DISTANCE_UP_DOWN_REG (0x95) /* Minimum distance */ diff --git a/drivers/input/mxt.c b/drivers/input/mxt.c index df421050377..d15a5d569fe 100644 --- a/drivers/input/mxt.c +++ b/drivers/input/mxt.c @@ -1356,7 +1356,7 @@ static ssize_t mxt_read(FAR struct file *filep, FAR char *buffer, size_t len) { FAR struct touch_sample_s *report = (FAR struct touch_sample_s *)buffer; - /* Yes, copy the sample data into the user bufer */ + /* Yes, copy the sample data into the user buffer */ memset(report, 0, SIZEOF_TOUCH_SAMPLE_S(ncontacts)); report->npoints = ncontacts; @@ -1581,7 +1581,7 @@ static int mxt_poll(FAR struct file *filep, FAR struct pollfd *fds, if (i >= CONFIG_MXT_NPOLLWAITERS) { - ierr("ERROR: No availabled slot found: %d\n", i); + ierr("ERROR: No available slot found: %d\n", i); fds->priv = NULL; ret = -EBUSY; goto errout; diff --git a/drivers/input/nunchuck.c b/drivers/input/nunchuck.c index 9b135609b13..f949660a2da 100644 --- a/drivers/input/nunchuck.c +++ b/drivers/input/nunchuck.c @@ -322,7 +322,7 @@ static int nunchuck_open(FAR struct file *filep) opriv = (FAR struct nunchuck_open_s *)kmm_zalloc(sizeof(struct nunchuck_open_s)); if (!opriv) { - ierr("ERROR: Failled to allocate open structure\n"); + ierr("ERROR: Failed to allocate open structure\n"); ret = -ENOMEM; goto errout_with_sem; } diff --git a/drivers/input/stmpe811_gpio.c b/drivers/input/stmpe811_gpio.c index 6662e833341..55c1f92a501 100644 --- a/drivers/input/stmpe811_gpio.c +++ b/drivers/input/stmpe811_gpio.c @@ -179,7 +179,7 @@ int stmpe811_gpioconfig(STMPE811_HANDLE handle, uint8_t pinconfig) /* Set its initial output value */ if ((pinconfig & STMPE811_GPIO_VALUE) != STMPE811_GPIO_ZERO) { - /* Set the output valu(s)e by writing to the SET register */ + /* Set the output value(s)e by writing to the SET register */ stmpe811_putreg8(priv, STMPE811_GPIO_SETPIN, (1 << pin)); } else @@ -273,7 +273,7 @@ void stmpe811_gpiowrite(STMPE811_HANDLE handle, uint8_t pinconfig, bool value) if (value) { - /* Set the output valu(s)e by writing to the SET register */ + /* Set the output value(s)e by writing to the SET register */ stmpe811_putreg8(priv, STMPE811_GPIO_SETPIN, (1 << pin)); } diff --git a/drivers/input/stmpe811_temp.c b/drivers/input/stmpe811_temp.c index 05d65f65c69..5dbb055a66d 100644 --- a/drivers/input/stmpe811_temp.c +++ b/drivers/input/stmpe811_temp.c @@ -166,7 +166,7 @@ uint16_t stmpe811_tempread(STMPE811_HANDLE handle) * threshold value; False: Generate an interrupt if the * temperature falls below the threshold value. * callback - The client callback function that will be called when - * the termperature crosses the threshold. + * the temperature crosses the threshold. * * Returned Value: * Zero is returned on success. Otherwise, a negated errno value is diff --git a/drivers/input/tsc2007.h b/drivers/input/tsc2007.h index f02df95cd49..35f414b2e07 100644 --- a/drivers/input/tsc2007.h +++ b/drivers/input/tsc2007.h @@ -77,7 +77,7 @@ # define TSC2007_CMD_FUNC_XPOS (12 << TSC2007_CMD_FUNC_SHIFT) /* Measure X position */ # define TSC2007_CMD_FUNC_YPOS (13 << TSC2007_CMD_FUNC_SHIFT) /* Measure Y position */ # define TSC2007_CMD_FUNC_Z1POS (14 << TSC2007_CMD_FUNC_SHIFT) /* Measure Z1 position */ -# define TSC2007_CMD_FUNC_Z2POS (15 << TSC2007_CMD_FUNC_SHIFT) /* Measure Z2 positionn */ +# define TSC2007_CMD_FUNC_Z2POS (15 << TSC2007_CMD_FUNC_SHIFT) /* Measure Z2 position */ #define TSC2007_CMD_PWRDN_SHIFT (2) /* Bits 2-3: Power-down bits */ #define TSC2007_CMD_PWRDN_MASK (3 << TSC2007_CMD_PWRDN_SHIFT) # define TSC2007_CMD_PWRDN_IRQEN (0 << TSC2007_CMD_PWRDN_SHIFT) /* 00: Power down between cycles; PENIRQ enabled */ diff --git a/drivers/ioexpander/Make.defs b/drivers/ioexpander/Make.defs index 7c421b188af..3d2b1f02cbf 100644 --- a/drivers/ioexpander/Make.defs +++ b/drivers/ioexpander/Make.defs @@ -67,7 +67,7 @@ ifeq ($(CONFIG_GPIO_LOWER_HALF),y) endif endif -# The folling implements an awkward OR +# The following implements an awkward OR ifeq ($(CONFIG_IOEXPANDER),y) diff --git a/drivers/ioexpander/pcf8574.h b/drivers/ioexpander/pcf8574.h index 0963032cf7a..e1d23a5e079 100644 --- a/drivers/ioexpander/pcf8574.h +++ b/drivers/ioexpander/pcf8574.h @@ -152,7 +152,7 @@ struct pcf8574_dev_s WDOG_ID wdog; /* Timer used to poll for missed interrupts */ #endif - uint8_t input; /* Last input registeres */ + uint8_t input; /* Last input registers */ uint8_t intstat; /* Pending interrupts */ uint8_t trigger; /* Bit encoded: 0=level 1=edge */ uint8_t level[2]; /* Bit encoded: 01=high/rising, 10 low/falling, 11 both */ diff --git a/drivers/ioexpander/skeleton.c b/drivers/ioexpander/skeleton.c index 56e0dd44bb7..00dfc4cb255 100644 --- a/drivers/ioexpander/skeleton.c +++ b/drivers/ioexpander/skeleton.c @@ -713,9 +713,9 @@ static void skel_interrupt(FAR void *arg) * Initialize a I/O Expander device. * * NOTE: There are no arguments to the initialization function this - * skelton example. Typical implementations take two arguments: + * skeleton example. Typical implementations take two arguments: * - * 1) A reference to an I2C or SPI interface used to interace with the + * 1) A reference to an I2C or SPI interface used to interactive with the * device, and * 2) A read-only configuration structure that provides things like: I2C * or SPI characteristics and callbacks to attache, enable, and disable diff --git a/drivers/ioexpander/tca64xx.h b/drivers/ioexpander/tca64xx.h index 28c59e5c62f..6f4e999e317 100644 --- a/drivers/ioexpander/tca64xx.h +++ b/drivers/ioexpander/tca64xx.h @@ -224,7 +224,7 @@ struct tca64_dev_s WDOG_ID wdog; /* Timer used to poll for missed interrupts */ #endif - ioe_pinset_t input; /* Last input registeres */ + ioe_pinset_t input; /* Last input registers */ ioe_pinset_t intstat; /* Pending interrupts */ ioe_pinset_t trigger; /* Bit encoded: 0=level 1=edge */ ioe_pinset_t level[2]; /* Bit encoded: 01=high/rising, 10 low/falling, 11 both */ diff --git a/drivers/lcd/Kconfig b/drivers/lcd/Kconfig index 1683fb92fd8..55014ec9f8b 100644 --- a/drivers/lcd/Kconfig +++ b/drivers/lcd/Kconfig @@ -94,7 +94,7 @@ config LCD_MAXPOWER range 1 255 ---help--- Maximum value of LCD power setting. This normally equates to brightness: - The brighter the screen, the hight the power usage. + The brighter the screen, the high the power usage. On LCDs that have a backlight, this value corresponds directly to that backlight setting. Board-specific logic may place restrictions on this @@ -145,7 +145,7 @@ config P14201_FRAMEBUFFER Reading graphics memory cannot be supported, and All pixel writes must be aligned to byte boundaries. - The latter limitation effectively reduces the 128x96 disply to 64x96. + The latter limitation effectively reduces the 128x96 display to 64x96. NOTE: This option should not be used if CONFIG_LCD_FRAMBEBUFFER is enabled. That options provides for a more generalized, external @@ -1300,7 +1300,7 @@ menuconfig SLCD bool "Alphanumeric/Segment LCD Devices" default n ---help--- - Drivers for Alphanumeric ans Segment LCDs (SLCDs). These + Drivers for Alphanumeric and Segment LCDs (SLCDs). These drivers support interfaces as defined in include/nuttx/lcd/slcd_ioctl.h amd slcd_codec.h diff --git a/drivers/lcd/Make.defs b/drivers/lcd/Make.defs index b40aca2b339..f5a4c166d6b 100644 --- a/drivers/lcd/Make.defs +++ b/drivers/lcd/Make.defs @@ -35,7 +35,7 @@ ifeq ($(CONFIG_LCD),y) -# Support for the generic LCD framebufer front-end +# Support for the generic LCD framebuffer front-end ifeq ($(CONFIG_LCD_FRAMEBUFFER),y) CSRCS += lcd_framebuffer.c diff --git a/drivers/lcd/ft80x.c b/drivers/lcd/ft80x.c index 78ffd71d481..0978fd8b190 100644 --- a/drivers/lcd/ft80x.c +++ b/drivers/lcd/ft80x.c @@ -1081,7 +1081,7 @@ static int ft80x_ioctl(FAR struct file *filep, int cmd, unsigned long arg) break; /* FT80X_IOC_AUDIO: - * Description: Enable/disable an external audio amplifer. + * Description: Enable/disable an external audio amplifier. * Argument: 0=disable; 1=enable. * Returns: None. */ diff --git a/drivers/lcd/ili9340.c b/drivers/lcd/ili9340.c index 788ce13c1f9..41b9202d00b 100644 --- a/drivers/lcd/ili9340.c +++ b/drivers/lcd/ili9340.c @@ -522,7 +522,7 @@ static struct ili9340_dev_s g_lcddev[CONFIG_LCD_ILI9340_NINTERFACES] = * Name: ili9340_getxres * * Description: - * Get horicontal resolution of the connected LCD driver depending on the + * Get horizontal resolution of the connected LCD driver depending on the * configured display orientation. * * Parameters: @@ -530,7 +530,7 @@ static struct ili9340_dev_s g_lcddev[CONFIG_LCD_ILI9340_NINTERFACES] = * * Return Value: * - * Horicontal resolution + * Horizontal resolution * ****************************************************************************/ @@ -1162,7 +1162,7 @@ FAR struct lcd_dev_s *ili9340_initialize( dev->setcontrast = ili9340_setcontrast; priv->lcd = lcd; - /* Initialze the LCD driver */ + /* Initialize the LCD driver */ ret = ili9340_hwinitialize(priv); diff --git a/drivers/lcd/ili9341.c b/drivers/lcd/ili9341.c index 2850bfcd090..90c09c2d26e 100644 --- a/drivers/lcd/ili9341.c +++ b/drivers/lcd/ili9341.c @@ -526,7 +526,7 @@ static struct ili9341_dev_s g_lcddev[CONFIG_LCD_ILI9341_NINTERFACES] = * Name: ili9341_getxres * * Description: - * Get horicontal resolution of the connected LCD driver depending on the + * Get horizontal resolution of the connected LCD driver depending on the * configured display orientation. * * Input Parameters: @@ -534,7 +534,7 @@ static struct ili9341_dev_s g_lcddev[CONFIG_LCD_ILI9341_NINTERFACES] = * * Returned Value: * - * Horicontal resolution + * Horizontal resolution * ****************************************************************************/ @@ -1167,7 +1167,7 @@ FAR struct lcd_dev_s * dev->setcontrast = ili9341_setcontrast; priv->lcd = lcd; - /* Initialze the LCD driver */ + /* Initialize the LCD driver */ ret = ili9341_hwinitialize(priv); diff --git a/drivers/lcd/lcd_framebuffer.c b/drivers/lcd/lcd_framebuffer.c index 31c8557d6ac..90d4d6fc08c 100644 --- a/drivers/lcd/lcd_framebuffer.c +++ b/drivers/lcd/lcd_framebuffer.c @@ -66,7 +66,7 @@ * Private Types ****************************************************************************/ -/* This structure describes the LCD frambuffer */ +/* This structure describes the LCD framebuffer */ struct lcdfb_dev_s { @@ -232,7 +232,7 @@ static int lcdfb_update(FAR struct lcdfb_dev_s *priv, for (row = starty; row <= endy; row++) { - /* REVISIT: Some LCD hardware certain aligment requirements on DMA + /* REVISIT: Some LCD hardware certain alignment requirements on DMA * memory. */ diff --git a/drivers/lcd/lpm013m091a.c b/drivers/lcd/lpm013m091a.c index b0240f55772..8ea33737074 100644 --- a/drivers/lcd/lpm013m091a.c +++ b/drivers/lcd/lpm013m091a.c @@ -598,7 +598,7 @@ FAR struct lcd_dev_s * dev->setcontrast = lpm013m091a_setcontrast; priv->lcd = lcd; - /* Initialze the LCD driver */ + /* Initialize the LCD driver */ ret = lpm013m091a_hwinitialize(priv); diff --git a/drivers/lcd/p14201.c b/drivers/lcd/p14201.c index 6b21cdf2e33..8575d595027 100644 --- a/drivers/lcd/p14201.c +++ b/drivers/lcd/p14201.c @@ -78,7 +78,7 @@ * - Reading graphics memory cannot be supported, and * - All pixel writes must be aligned to byte boundaries. * - * The latter limitation effectively reduces the 128x96 disply to 64x96. + * The latter limitation effectively reduces the 128x96 display to 64x96. * * Required LCD driver settings: * CONFIG_LCD_P14201 - Enable P14201 support @@ -1142,7 +1142,7 @@ static int rit_setcontrast(struct lcd_dev_s *dev, unsigned int contrast) * * Input Parameters: * spi - A reference to the SPI driver instance. - * devno - A value in the range of 0 throuh CONFIG_P14201_NINTERFACES-1. This allows + * devno - A value in the range of 0 through CONFIG_P14201_NINTERFACES-1. This allows * support for multiple OLED devices. * * Returned Value: diff --git a/drivers/lcd/pcf8574_lcd_backpack.c b/drivers/lcd/pcf8574_lcd_backpack.c index 043a914b24d..1299af504a7 100644 --- a/drivers/lcd/pcf8574_lcd_backpack.c +++ b/drivers/lcd/pcf8574_lcd_backpack.c @@ -256,7 +256,7 @@ static inline uint8_t rc2addr(FAR struct pcf8574_lcd_dev_s *priv, } else { - /* 4 line displays are intersting; third line really is a continuation + /* 4 line displays are interesting; third line really is a continuation * of first line, and fourth line is a continuation of second. */ diff --git a/drivers/lcd/pcf8574_lcd_backpack_readme.txt b/drivers/lcd/pcf8574_lcd_backpack_readme.txt index 737472b231f..2f13cf7afd1 100644 --- a/drivers/lcd/pcf8574_lcd_backpack_readme.txt +++ b/drivers/lcd/pcf8574_lcd_backpack_readme.txt @@ -248,5 +248,5 @@ Troubleshooting is is dependent on the physics of the attached LCD module. The useful range of voltages at this pin for any given LCD is quite narrow, and outside that range there will be nothing visible on the display, so most - of the turn range of the pot is non-useful. It's less 'contrast' and + of the turn range of the pot is useless. It's less 'contrast' and more 'LCD segment drive bias'. diff --git a/drivers/lcd/ra8875.c b/drivers/lcd/ra8875.c index b9d7a30d4d2..c977f963537 100644 --- a/drivers/lcd/ra8875.c +++ b/drivers/lcd/ra8875.c @@ -522,7 +522,7 @@ static void ra8875_clearmem(FAR struct ra8875_lcd_s *lcd) * Name: ra8875_showrun * * Description: - * When LCD debug is enabled, try to reduce then amount of ouptut data generated by + * When LCD debug is enabled, try to reduce then amount of output data generated by * ra8875_putrun and ra8875_getrun * **************************************************************************************/ diff --git a/drivers/lcd/s1d15g10.h b/drivers/lcd/s1d15g10.h index 01df8b0bc35..b68b91a9138 100644 --- a/drivers/lcd/s1d15g10.h +++ b/drivers/lcd/s1d15g10.h @@ -81,7 +81,7 @@ #define S1D15G10_EPMWR 0xfc /* Write into EEPROM; Data: none */ #define S1D15G10_EPMRD 0xfd /* Read from EEPROM; Data: none */ #define S1D15G10_EPSRRD1 0x7c /* Read register 1; Data: none */ -#define S1D15G10_EPSRRD2 0x7d /* Read regiser 2; Data: none */ +#define S1D15G10_EPSRRD2 0x7d /* Read register 2; Data: none */ #define S1D15G10_NOP 0x25 /* NOP instruction (0x45?); Data: none */ #define S1D15G10_STREAD 0x20 /* Status read; Data: none */ diff --git a/drivers/lcd/ssd1289.c b/drivers/lcd/ssd1289.c index 2fe47b7d595..fc7ad0801d0 100644 --- a/drivers/lcd/ssd1289.c +++ b/drivers/lcd/ssd1289.c @@ -491,7 +491,7 @@ static void ssd1289_dumprun(FAR const char *msg, FAR uint16_t *run, size_t npixe * Name: ssd1289_showrun * * Description: - * When LCD debug is enabled, try to reduce then amount of ouptut data generated by + * When LCD debug is enabled, try to reduce then amount of output data generated by * ssd1289_putrun and ssd1289_getrun * **************************************************************************************/ @@ -622,7 +622,7 @@ static int ssd1289_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *buf } #elif defined(CONFIG_LCD_PORTRAIT) /* Convert coordinates. In this configuration, the top of the display is to the left - * of the buttons (if the board is held so that the buttons are at the botton of the + * of the buttons (if the board is held so that the buttons are at the bottom of the * board). */ @@ -645,7 +645,7 @@ static int ssd1289_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *buf } #else /* CONFIG_LCD_RPORTRAIT */ /* Convert coordinates. In this configuration, the top of the display is to the right - * of the buttons (if the board is held so that the buttons are at the botton of the + * of the buttons (if the board is held so that the buttons are at the bottom of the * board). */ @@ -755,7 +755,7 @@ static int ssd1289_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer, } #elif defined(CONFIG_LCD_PORTRAIT) /* Convert coordinates. In this configuration, the top of the display is to the left - * of the buttons (if the board is held so that the buttons are at the botton of the + * of the buttons (if the board is held so that the buttons are at the bottom of the * board). */ @@ -778,7 +778,7 @@ static int ssd1289_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer, } #else /* CONFIG_LCD_RPORTRAIT */ /* Convert coordinates. In this configuration, the top of the display is to the right - * of the buttons (if the board is held so that the buttons are at the botton of the + * of the buttons (if the board is held so that the buttons are at the bottom of the * board). */ diff --git a/drivers/lcd/ssd1305.h b/drivers/lcd/ssd1305.h index 34678fa80d6..1378e4f1772 100644 --- a/drivers/lcd/ssd1305.h +++ b/drivers/lcd/ssd1305.h @@ -63,7 +63,7 @@ # define SSD1305_COLH_MASK 0x0f #define SSD1305_ADDRMODE 0x20 /* 0x20: Set memory address mode */ # define SSD1305_ADDRMODE_HOR 0x00 /* Data 1: Set horizontal address mode */ -# define SSD1305_ADDRMODE_VIRT 0x01 /* Data 1: Set virtal address mode */ +# define SSD1305_ADDRMODE_VIRT 0x01 /* Data 1: Set virtual address mode */ # define SSD1305_ADDRMODE_PAGE 0x02 /* Data 1: Set page address mode */ #define SSD1305_SETCOLADDR 0x21 /* 0x21: Set column address */ /* Data 1: Column start address: 0-131 */ @@ -127,7 +127,7 @@ #define SSD1305_SETMUX 0xa8 /* 0xa8: Set Multiplex Ratio*/ /* Data 1: MUX ratio -1: 15-63 */ #define SSD1305_DIMMODE 0xab /* 0xab: Dim mode setting */ - /* Data 1: Reserverd, must be zero */ + /* Data 1: Reserved, must be zero */ /* Data 2: Contrast for bank1: 0-255 */ /* Data 3: Brightness for color bank: 0-255 */ #define SSD1305_MSTRCONFIG 0xad /* 0xad: Master configuration */ diff --git a/drivers/lcd/ssd1351.c b/drivers/lcd/ssd1351.c index 9622c0f5d51..95ef0dfdb8c 100644 --- a/drivers/lcd/ssd1351.c +++ b/drivers/lcd/ssd1351.c @@ -75,7 +75,7 @@ * CONFIG_SSD1351_VDDEXT - external VDD * CONFIG_SSD1351_TRST - reset period * CONFIG_SSD1351_TPRECHG1 - first pre-charge period - * CONFIG_SSD1351_PERFENHANCE - enhace display performance + * CONFIG_SSD1351_PERFENHANCE - enhance display performance * CONFIG_SSD1351_CLKDIV - clock divider * CONFIG_SSD1351_OSCFREQ - oscillator frequency * CONFIG_SSD1351_TPRECHG2 - second pre-charge period diff --git a/drivers/lcd/st7032.c b/drivers/lcd/st7032.c index d73afcb3135..c8ffb3bd96f 100644 --- a/drivers/lcd/st7032.c +++ b/drivers/lcd/st7032.c @@ -800,7 +800,7 @@ static ssize_t st7032_write(FAR struct file *filep, FAR const char *buffer, if (ch == ASCII_TAB) { - /* Blink Cursor? Shouln't it be just 4 spaces to indicate TAB? */ + /* Blink Cursor? Shouldn't it be just 4 spaces to indicate TAB? */ st7032_write_inst(priv, ST7032_DISPLAY_ON_OFF | DISPLAY_ON_OFF_D | DISPLAY_ON_OFF_C | diff --git a/drivers/lcd/st7565.c b/drivers/lcd/st7565.c index 6e0f0023a20..ed0cda0951c 100644 --- a/drivers/lcd/st7565.c +++ b/drivers/lcd/st7565.c @@ -995,7 +995,7 @@ FAR struct lcd_dev_s *st7565_initialize(FAR struct st7565_lcd_s *lcd, st7565_cmddata(priv, true); - /* Reset by command in case of st7565_reset not implemeted */ + /* Reset by command in case of st7565_reset not implemented */ st7565_send_one_data(priv, ST7565_EXIT_SOFTRST); diff --git a/drivers/lcd/st7567.c b/drivers/lcd/st7567.c index 32e19aa2bb0..c89b1db6c19 100644 --- a/drivers/lcd/st7567.c +++ b/drivers/lcd/st7567.c @@ -78,7 +78,7 @@ * must be undefined or defined to be 1. * CONFIG_ST7567_POWER * If the hardware supports a controllable OLED a power supply, this - * configuration shold be defined. (See st7567_power() below). + * configuration should be defined. (See st7567_power() below). * CONFIG_LCD_ST7567DEBUG - Enable detailed ST7567 debst7567 output * (CONFIG_DEBUG_FEATURES and CONFIG_VERBOSE must also be enabled). * diff --git a/drivers/lcd/tda19988.c b/drivers/lcd/tda19988.c index db8fa2cd7da..3da00c916c2 100644 --- a/drivers/lcd/tda19988.c +++ b/drivers/lcd/tda19988.c @@ -1480,7 +1480,7 @@ static int tda19988_hdmi_putreg(priv, HDMI_AUDIO_ENC_CTRL_REG, HDMI_AUDIO_ENC_CNTRL_DVI_MODE); - /* No pre-filter or interpretor */ + /* No pre-filter or interpreter */ tda19988_hdmi_putreg(priv, HDMI_CTRL_HVF_CNTRL_0_REG, HDMI_CTRL_HVF_CNTRL_0_INTPOL_BYPASS | diff --git a/drivers/lcd/ug-9664hswag01.c b/drivers/lcd/ug-9664hswag01.c index 2db18154950..ad040a992ac 100644 --- a/drivers/lcd/ug-9664hswag01.c +++ b/drivers/lcd/ug-9664hswag01.c @@ -72,7 +72,7 @@ * must be undefined or defined to be 1. * CONFIG_UG9664HSWAG01_POWER * If the hardware supports a controllable OLED a power supply, this - * configuration shold be defined. (See ug_power() below). + * configuration should be defined. (See ug_power() below). * * Required LCD driver settings: * CONFIG_LCD_UG9664HSWAG01 - Enable UG-9664HSWAG01 support diff --git a/drivers/leds/pca9635pw.c b/drivers/leds/pca9635pw.c index af88a26ed40..6b8d472acae 100644 --- a/drivers/leds/pca9635pw.c +++ b/drivers/leds/pca9635pw.c @@ -217,7 +217,7 @@ static int pca9635pw_open(FAR struct file *filep) nxsig_usleep(500); /* Turn all led drivers to mode 2 in which the led brightness is controlled - * by the indiviual pwm registers. + * by the individual pwm registers. */ ret = pca9635pw_set_led_mode(priv, PCA9635PW_LED_OUT_x_MODE_2); @@ -286,7 +286,7 @@ static int pca9635pw_ioctl(FAR struct file *filep, int cmd, unsigned long arg) switch (cmd) { - /* Set the brightness of an indivual LED. Arg: pca9635pw_led_brightness_s + /* Set the brightness of an individual LED. Arg: pca9635pw_led_brightness_s * pointer. */ diff --git a/drivers/leds/userled_upper.c b/drivers/leds/userled_upper.c index 1f531f9eb8d..bd69bf118f3 100644 --- a/drivers/leds/userled_upper.c +++ b/drivers/leds/userled_upper.c @@ -172,7 +172,7 @@ static int userled_open(FAR struct file *filep) opriv = (FAR struct userled_open_s *)kmm_zalloc(sizeof(struct userled_open_s)); if (!opriv) { - lederr("ERROR: Failled to allocate open structure\n"); + lederr("ERROR: Failed to allocate open structure\n"); ret = -ENOMEM; goto errout_with_sem; } diff --git a/drivers/mmcsd/mmcsd_sdio.c b/drivers/mmcsd/mmcsd_sdio.c index dd8a81af60d..f30dc028019 100644 --- a/drivers/mmcsd/mmcsd_sdio.c +++ b/drivers/mmcsd/mmcsd_sdio.c @@ -2193,7 +2193,7 @@ static int mmcsd_close(FAR struct inode *inode) * Name: mmcsd_read * * Description: - * Read the specified numer of sectors from the read-ahead buffer or from + * Read the specified number of sectors from the read-ahead buffer or from * the physical device. * ****************************************************************************/ diff --git a/drivers/mmcsd/mmcsd_spi.c b/drivers/mmcsd/mmcsd_spi.c index 947d437c4a4..48553e85659 100644 --- a/drivers/mmcsd/mmcsd_spi.c +++ b/drivers/mmcsd/mmcsd_spi.c @@ -1108,7 +1108,7 @@ static int mmcsd_close(FAR struct inode *inode) /**************************************************************************** * Name: mmcsd_read * - * Description: Read the specified numer of sectors + * Description: Read the specified number of sectors * ****************************************************************************/ @@ -1912,7 +1912,7 @@ static void mmcsd_mediachanged(void *arg) * architectures that support multiple MMC/SD slots. This value must be * in the range {0, ..., CONFIG_MMCSD_NSLOTS}. * spi - And instance of an SPI interface obtained by called the - * approprite xyz_spibus_initialize() function for the MCU "xyz" with + * appropriate xyz_spibus_initialize() function for the MCU "xyz" with * the appropriate port number. * ****************************************************************************/ diff --git a/drivers/mmcsd/mmcsd_spi.h b/drivers/mmcsd/mmcsd_spi.h index 31a888e7076..b952f357c49 100644 --- a/drivers/mmcsd/mmcsd_spi.h +++ b/drivers/mmcsd/mmcsd_spi.h @@ -107,7 +107,7 @@ #define MMCSD_SPIR2_ERROR 0x0004 /* Error */ #define MMCSD_SPIR2_CCERROR 0x0008 /* CC error */ #define MMCSD_SPIR2_CARDECCFAIL 0x0010 /* Card ECC failed */ -#define MMCSD_SPIR2_WPVIOLATION 0x0020 /* WP violoation */ +#define MMCSD_SPIR2_WPVIOLATION 0x0020 /* WP violation */ #define MMCSD_SPIR2_ERASEPARAM 0x0040 /* Erase parameter */ #define MMCSD_SPIR2_OUTOFRANGE 0x0080 /* Out of range */ #define MMCSD_SPIR2_CSDOVERWRITE 0x0080 /* CSD overwrite */ diff --git a/drivers/modem/altair/altmdm.c b/drivers/modem/altair/altmdm.c index 39d2081f44e..bc05de4d36f 100644 --- a/drivers/modem/altair/altmdm.c +++ b/drivers/modem/altair/altmdm.c @@ -126,7 +126,7 @@ static int altmdm_initialize(FAR struct altmdm_dev_s *priv) priv->poweron = 0; - /* Intialize ALTMDM SPI driver. */ + /* Initialize ALTMDM SPI driver. */ ret = altmdm_spi_init(priv); @@ -336,7 +336,7 @@ static int altmdm_ioctl(FAR struct file *filep, int cmd, unsigned long arg) } break; - case MODEM_IOC_PM_INITWAKELOCK: /* Initialze wakelock resource. */ + case MODEM_IOC_PM_INITWAKELOCK: /* Initialize wakelock resource. */ { ret = altmdm_pm_initwakelock((struct altmdm_pm_wakelock_s *)arg); } diff --git a/drivers/modem/altair/altmdm_spi.c b/drivers/modem/altair/altmdm_spi.c index d91fff2ffd4..6b2f4a3c8d4 100644 --- a/drivers/modem/altair/altmdm_spi.c +++ b/drivers/modem/altair/altmdm_spi.c @@ -1886,7 +1886,7 @@ int altmdm_spi_init(FAR struct altmdm_dev_s *priv) g_privdata = priv; - /* Initalize modem power management driver */ + /* Initialize modem power management driver */ altmdm_pm_init(priv); diff --git a/drivers/modem/altair/altmdm_sys.c b/drivers/modem/altair/altmdm_sys.c index f4cb8e4e940..3540941f8f9 100644 --- a/drivers/modem/altair/altmdm_sys.c +++ b/drivers/modem/altair/altmdm_sys.c @@ -151,7 +151,7 @@ int altmdm_sys_lock(FAR struct altmdm_sys_lock_s *handle) * Name: altmdm_sys_unlock * * Description: - * Relese lock. + * Release lock. * ****************************************************************************/ diff --git a/drivers/modem/altair/altmdm_sys.h b/drivers/modem/altair/altmdm_sys.h index 33b5a4e9a3d..9176c1dca9b 100644 --- a/drivers/modem/altair/altmdm_sys.h +++ b/drivers/modem/altair/altmdm_sys.h @@ -116,7 +116,7 @@ int altmdm_sys_lock(FAR struct altmdm_sys_lock_s *handle); * Name: altmdm_sys_unlock * * Description: - * Relese lock. + * Release lock. * ****************************************************************************/ diff --git a/drivers/mtd/at25.c b/drivers/mtd/at25.c index a35c3a8d01c..ac920716760 100644 --- a/drivers/mtd/at25.c +++ b/drivers/mtd/at25.c @@ -183,19 +183,19 @@ static int at25_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg); static void at25_lock(FAR struct spi_dev_s *dev) { - /* On SPI busses where there are multiple devices, it will be necessary to - * lock SPI to have exclusive access to the busses for a sequence of + /* On SPI buses where there are multiple devices, it will be necessary to + * lock SPI to have exclusive access to the buses for a sequence of * transfers. The bus should be locked before the chip is selected. * - * This is a blocking call and will not return until we have exclusiv access to - * the SPI buss. We will retain that exclusive access until the bus is unlocked. + * This is a blocking call and will not return until we have exclusive access to + * the SPI bus. We will retain that exclusive access until the bus is unlocked. */ SPI_LOCK(dev, true); /* After locking the SPI bus, the we also need call the setfrequency, setbits, and * setmode methods to make sure that the SPI is properly configured for the device. - * If the SPI buss is being shared, then it may have been left in an incompatible + * If the SPI bus is being shared, then it may have been left in an incompatible * state. */ diff --git a/drivers/mtd/ftl.c b/drivers/mtd/ftl.c index fc2c39b464f..c1df2e721ec 100644 --- a/drivers/mtd/ftl.c +++ b/drivers/mtd/ftl.c @@ -195,7 +195,7 @@ static int ftl_close(FAR struct inode *inode) /**************************************************************************** * Name: ftl_reload * - * Description: Read the specified numer of sectors + * Description: Read the specified number of sectors * ****************************************************************************/ @@ -220,7 +220,7 @@ static ssize_t ftl_reload(FAR void *priv, FAR uint8_t *buffer, /**************************************************************************** * Name: ftl_read * - * Description: Read the specified numer of sectors + * Description: Read the specified number of sectors * ****************************************************************************/ @@ -555,7 +555,7 @@ static int ftl_ioctl(FAR struct inode *inode, int cmd, unsigned long arg) } #endif - /* No other block driver ioctl commmands are not recognized by this + /* No other block driver ioctl commands are not recognized by this * driver. Other possible MTD driver ioctl commands are passed through * to the MTD driver (unchanged). */ diff --git a/drivers/mtd/hamming.c b/drivers/mtd/hamming.c index 7628e9d4d01..394cdd2d7e8 100644 --- a/drivers/mtd/hamming.c +++ b/drivers/mtd/hamming.c @@ -180,7 +180,7 @@ static void hamming_compute256(FAR const uint8_t *data, FAR uint8_t *code) } /* At this point, we have the line parities, and the column sum. First, We - * must caculate the parity group values on the column sum. + * must calculate the parity group values on the column sum. */ for (i = 0; i < 8; i++) diff --git a/drivers/mtd/is25xp.c b/drivers/mtd/is25xp.c index 245cacf6117..eac6871dad0 100644 --- a/drivers/mtd/is25xp.c +++ b/drivers/mtd/is25xp.c @@ -81,7 +81,7 @@ #endif /* IS25 Registers *******************************************************************/ -/* Indentification register values */ +/* Identification register values */ #define IS25_MANUFACTURER 0x9d #define IS25_MEMORY_TYPE 0x60 @@ -208,19 +208,19 @@ static int is25xp_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg); static void is25xp_lock(FAR struct spi_dev_s *dev) { - /* On SPI busses where there are multiple devices, it will be necessary to - * lock SPI to have exclusive access to the busses for a sequence of + /* On SPI buses where there are multiple devices, it will be necessary to + * lock SPI to have exclusive access to the buses for a sequence of * transfers. The bus should be locked before the chip is selected. * - * This is a blocking call and will not return until we have exclusiv access to - * the SPI buss. We will retain that exclusive access until the bus is unlocked. + * This is a blocking call and will not return until we have exclusive access to + * the SPI bus. We will retain that exclusive access until the bus is unlocked. */ SPI_LOCK(dev, true); /* After locking the SPI bus, the we also need call the setfrequency, setbits, and * setmode methods to make sure that the SPI is properly configured for the device. - * If the SPI buss is being shared, then it may have been left in an incompatible + * If the SPI bus is being shared, then it may have been left in an incompatible * state. */ diff --git a/drivers/mtd/m25px.c b/drivers/mtd/m25px.c index 083b030aa98..42ffeeaf4c3 100644 --- a/drivers/mtd/m25px.c +++ b/drivers/mtd/m25px.c @@ -92,7 +92,7 @@ #endif /* M25P Registers *******************************************************************/ -/* Indentification register values */ +/* Identification register values */ #define M25P_MANUFACTURER CONFIG_M25P_MANUFACTURER #define M25P_MEMORY_TYPE CONFIG_M25P_MEMORY_TYPE @@ -289,19 +289,19 @@ static int m25p_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg); static void m25p_lock(FAR struct spi_dev_s *dev) { - /* On SPI busses where there are multiple devices, it will be necessary to - * lock SPI to have exclusive access to the busses for a sequence of + /* On SPI buses where there are multiple devices, it will be necessary to + * lock SPI to have exclusive access to the buses for a sequence of * transfers. The bus should be locked before the chip is selected. * - * This is a blocking call and will not return until we have exclusiv access to - * the SPI buss. We will retain that exclusive access until the bus is unlocked. + * This is a blocking call and will not return until we have exclusive access to + * the SPI bus. We will retain that exclusive access until the bus is unlocked. */ SPI_LOCK(dev, true); /* After locking the SPI bus, the we also need call the setfrequency, setbits, and * setmode methods to make sure that the SPI is properly configured for the device. - * If the SPI buss is being shared, then it may have been left in an incompatible + * If the SPI bus is being shared, then it may have been left in an incompatible * state. */ diff --git a/drivers/mtd/mtd_nand.c b/drivers/mtd/mtd_nand.c index 55ec2a24249..01d87b1870e 100644 --- a/drivers/mtd/mtd_nand.c +++ b/drivers/mtd/mtd_nand.c @@ -223,7 +223,7 @@ static int nand_checkblock(FAR struct nand_dev_s *nand, off_t block) * Description: * Scans the device to retrieve or create block status information. * - * Currently, this functin does nothing but scan the NAND and eat up time. + * Currently, this function does nothing but scan the NAND and eat up time. * This is a goot thing to do if you are debugging NAND, but otherwise, * just a waste of time. This logic could, however, be integrated into * some bad block checking logic at sometime in the future. diff --git a/drivers/mtd/mtd_nandecc.c b/drivers/mtd/mtd_nandecc.c index 47fb3b31be2..1cf98acc061 100644 --- a/drivers/mtd/mtd_nandecc.c +++ b/drivers/mtd/mtd_nandecc.c @@ -170,7 +170,7 @@ int nandecc_readpage(FAR struct nand_dev_s *nand, off_t block, * nand - Upper-half, NAND FLASH interface * block - Number of the block where the page to write resides. * page - Number of the page to write inside the given block. - * data - Buffer containing the data to be writting + * data - Buffer containing the data to be writing * spare - Buffer containing the spare data to be written. * * Returned Value: diff --git a/drivers/mtd/mtd_partition.c b/drivers/mtd/mtd_partition.c index cca13d44b83..359de88a063 100644 --- a/drivers/mtd/mtd_partition.c +++ b/drivers/mtd/mtd_partition.c @@ -432,13 +432,13 @@ static int part_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg) if (ppv) { - /* Get hte XIP base of the entire FLASH */ + /* Get the XIP base of the entire FLASH */ ret = priv->parent->ioctl(priv->parent, MTDIOC_XIPBASE, (unsigned long)((uintptr_t)&base)); if (ret == OK) { - /* Add the offset of this partion to the XIP base and + /* Add the offset of this partition to the XIP base and * return the sum to the caller. */ @@ -693,7 +693,7 @@ static int part_procfs_dup(FAR const struct file *oldp, FAR struct file *newp) return -ENOMEM; } - /* The copy the file attribtes from the old attributes to the new */ + /* The copy the file attribute from the old attributes to the new */ memcpy(newattr, oldattr, sizeof(struct part_procfs_file_s)); diff --git a/drivers/mtd/mx25lx.c b/drivers/mtd/mx25lx.c index 128cb28ef75..ec2bc29429f 100644 --- a/drivers/mtd/mx25lx.c +++ b/drivers/mtd/mx25lx.c @@ -298,19 +298,19 @@ static int mx25l_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg); static void mx25l_lock(FAR struct spi_dev_s *dev) { - /* On SPI busses where there are multiple devices, it will be necessary to - * lock SPI to have exclusive access to the busses for a sequence of + /* On SPI buses where there are multiple devices, it will be necessary to + * lock SPI to have exclusive access to the buses for a sequence of * transfers. The bus should be locked before the chip is selected. * - * This is a blocking call and will not return until we have exclusiv access to - * the SPI buss. We will retain that exclusive access until the bus is unlocked. + * This is a blocking call and will not return until we have exclusive access to + * the SPI bus. We will retain that exclusive access until the bus is unlocked. */ SPI_LOCK(dev, true); /* After locking the SPI bus, the we also need call the setfrequency, setbits, and * setmode methods to make sure that the SPI is properly configured for the device. - * If the SPI buss is being shared, then it may have been left in an incompatible + * If the SPI bus is being shared, then it may have been left in an incompatible * state. */ diff --git a/drivers/mtd/mx25rxx.c b/drivers/mtd/mx25rxx.c index 9a84b12c23c..b95f3a0eb96 100644 --- a/drivers/mtd/mx25rxx.c +++ b/drivers/mtd/mx25rxx.c @@ -252,12 +252,12 @@ static int mx25rxx_write_cache(FAR struct mx25rxx_dev_s *priv, void mx25rxx_lock(FAR struct qspi_dev_s *qspi, bool read) { - /* On SPI busses where there are multiple devices, it will be necessary to - * lock SPI to have exclusive access to the busses for a sequence of + /* On SPI buses where there are multiple devices, it will be necessary to + * lock SPI to have exclusive access to the buses for a sequence of * transfers. The bus should be locked before the chip is selected. * - * This is a blocking call and will not return until we have exclusiv access - * to the SPI buss. We will retain that exclusive access until the bus is + * This is a blocking call and will not return until we have exclusive access + * to the SPI bus. We will retain that exclusive access until the bus is * unlocked. */ @@ -265,7 +265,7 @@ void mx25rxx_lock(FAR struct qspi_dev_s *qspi, bool read) /* After locking the SPI bus, the we also need call the setfrequency, setbits * and setmode methods to make sure that the SPI is properly configured for - * the device. If the SPI buss is being shared, then it may have been left + * the device. If the SPI bus is being shared, then it may have been left * in an incompatible state. */ @@ -359,7 +359,7 @@ int mx25rxx_read_byte(FAR struct mx25rxx_dev_s *dev, FAR uint8_t *buffer, meminfo.flags = QSPIMEM_READ | QSPIMEM_QUADIO; meminfo.addrlen = 3; - /* Ignore performace enhanced mode => 2+4 dummies */ + /* Ignore performance enhanced mode => 2+4 dummies */ meminfo.dummies = 6; meminfo.buflen = buflen; diff --git a/drivers/mtd/mx35.c b/drivers/mtd/mx35.c index b118ab02aea..fd4d8719f02 100644 --- a/drivers/mtd/mx35.c +++ b/drivers/mtd/mx35.c @@ -90,7 +90,7 @@ # define mx35info(x...) #endif -/* Indentification register values **************************************************/ +/* Identification register values **************************************************/ #define MX35_MANUFACTURER CONFIG_MX35_MANUFACTURER #define MX35_MX35LF1GE4AB_CAPACITY 0x12 /* 1 Gb */ @@ -256,19 +256,19 @@ static inline void mx35_unlockblocks(struct mx35_dev_s *priv); static inline void mx35_lock(FAR struct spi_dev_s *dev) { - /* On SPI busses where there are multiple devices, it will be necessary to - * lock SPI to have exclusive access to the busses for a sequence of + /* On SPI buses where there are multiple devices, it will be necessary to + * lock SPI to have exclusive access to the buses for a sequence of * transfers. The bus should be locked before the chip is selected. * * This is a blocking call and will not return until we have exclusive access to - * the SPI buss. We will retain that exclusive access until the bus is unlocked. + * the SPI bus. We will retain that exclusive access until the bus is unlocked. */ SPI_LOCK(dev, true); /* After locking the SPI bus, the we also need call the setfrequency, setbits, and * setmode methods to make sure that the SPI is properly configured for the device. - * If the SPI buss is being shared, then it may have been left in an incompatible + * If the SPI bus is being shared, then it may have been left in an incompatible * state. */ diff --git a/drivers/mtd/n25qxxx.c b/drivers/mtd/n25qxxx.c index 166c1c3e2a4..a6371387f0d 100644 --- a/drivers/mtd/n25qxxx.c +++ b/drivers/mtd/n25qxxx.c @@ -357,7 +357,7 @@ static void n25qxxx_lock(FAR struct qspi_dev_s *qspi) * transfers. The bus should be locked before the chip is selected. * * This is a blocking call and will not return until we have exclusive access to - * the QuadSPI buss. We will retain that exclusive access until the bus is + * the QuadSPI bus. We will retain that exclusive access until the bus is * unlocked. */ @@ -365,7 +365,7 @@ static void n25qxxx_lock(FAR struct qspi_dev_s *qspi) /* After locking the QuadSPI bus, the we also need call the setfrequency, setbits, * and setmode methods to make sure that the QuadSPI is properly configured for - * the device. If the QuadSPI buss is being shared, then it may have been left in + * the device. If the QuadSPI bus is being shared, then it may have been left in * an incompatible state. */ diff --git a/drivers/mtd/ramtron.c b/drivers/mtd/ramtron.c index ba66f833f2f..83bb1d6fdee 100644 --- a/drivers/mtd/ramtron.c +++ b/drivers/mtd/ramtron.c @@ -418,7 +418,7 @@ static void ramtron_lock(FAR struct ramtron_dev_s *priv) * transfers. The bus should be locked before the chip is selected. * * This is a blocking call and will not return until we have exclusive access to - * the SPI buss. We will retain that exclusive access until the bus is unlocked. + * the SPI bus. We will retain that exclusive access until the bus is unlocked. */ SPI_LOCK(dev, true); diff --git a/drivers/mtd/s25fl1.c b/drivers/mtd/s25fl1.c index 60321ea903e..51684ca6993 100644 --- a/drivers/mtd/s25fl1.c +++ b/drivers/mtd/s25fl1.c @@ -206,7 +206,7 @@ /* S25FL1 JEDIC IDs */ -#define S25FL1_JEDEC_DEVICE_TYPE 0x40 /* S25FL1 memory devuce type */ +#define S25FL1_JEDEC_DEVICE_TYPE 0x40 /* S25FL1 memory device type */ #define S25FL116K_JEDEC_CAPACITY 0x15 /* S25FL116K memory capacity */ #define S25FL132K_JEDEC_CAPACITY 0x16 /* S25FL132K memory capacity */ #define S25FL164K_JEDEC_CAPACITY 0x17 /* S25FL164K memory capacity */ @@ -406,19 +406,19 @@ static int s25fl1_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg); static void s25fl1_lock(FAR struct qspi_dev_s *qspi) { - /* On QuadSPI busses where there are multiple devices, it will be necessary to - * lock QuadSPI to have exclusive access to the busses for a sequence of + /* On QuadSPI buses where there are multiple devices, it will be necessary to + * lock QuadSPI to have exclusive access to the buses for a sequence of * transfers. The bus should be locked before the chip is selected. * - * This is a blocking call and will not return until we have exclusiv access to - * the QuadSPI buss. We will retain that exclusive access until the bus is unlocked. + * This is a blocking call and will not return until we have exclusive access to + * the QuadSPI bus. We will retain that exclusive access until the bus is unlocked. */ QSPI_LOCK(qspi, true); /* After locking the QuadSPI bus, the we also need call the setfrequency, setbits, and * setmode methods to make sure that the QuadSPI is properly configured for the device. - * If the QuadSPI buss is being shared, then it may have been left in an incompatible + * If the QuadSPI bus is being shared, then it may have been left in an incompatible * state. */ diff --git a/drivers/mtd/smart.c b/drivers/mtd/smart.c index 6c2411b3fc3..52cdf442e72 100644 --- a/drivers/mtd/smart.c +++ b/drivers/mtd/smart.c @@ -798,7 +798,7 @@ int smart_checkfree(FAR struct smart_struct_s *dev, int lineno) } } - /* Modifiy the freesector count to reflect the actual calculated freecount + /* Modify the freesector count to reflect the actual calculated freecount * to get us back in line. */ @@ -845,7 +845,7 @@ int smart_checkfree(FAR struct smart_struct_s *dev, int lineno) /**************************************************************************** * Name: smart_reload * - * Description: Read the specified numer of sectors + * Description: Read the specified number of sectors * ****************************************************************************/ @@ -880,7 +880,7 @@ static ssize_t smart_reload(struct smart_struct_s *dev, FAR uint8_t *buffer, /**************************************************************************** * Name: smart_read * - * Description: Read the specified numer of sectors + * Description: Read the specified number of sectors * ****************************************************************************/ @@ -2764,7 +2764,7 @@ static int smart_relocate_static_data(FAR struct smart_struct_s *dev, uint16_t b if (smart_get_wear_level(dev, block) >= SMART_WEAR_FULL_RELOCATE_THRESHOLD) { /* Okay, this block is getting too worn. Move a minimum wear level - * block to it in it's entirity. + * block to it in it's entirety. */ /* Scan all erase blocks (or until we find a minimum wear level block @@ -4497,7 +4497,7 @@ static int smart_writesector(FAR struct smart_struct_s *dev, header = (FAR struct smart_sect_header_s *)dev->rwbuffer; #ifdef CONFIG_MTD_SMART_WEAR_LEVEL - /* Test if an adjustement to the wear levels is needed */ + /* Test if an adjustment to the wear levels is needed */ if (dev->minwearlevel >= SMART_WEAR_MIN_LEVEL || (dev->minwearlevel > 0 && dev->maxwearlevel >= SMART_WEAR_REORG_THRESHOLD)) diff --git a/drivers/mtd/sst25.c b/drivers/mtd/sst25.c index c499a5001c0..82b0365b458 100644 --- a/drivers/mtd/sst25.c +++ b/drivers/mtd/sst25.c @@ -269,19 +269,19 @@ static int sst25_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg); static void sst25_lock(FAR struct spi_dev_s *dev) { - /* On SPI busses where there are multiple devices, it will be necessary to - * lock SPI to have exclusive access to the busses for a sequence of + /* On SPI buses where there are multiple devices, it will be necessary to + * lock SPI to have exclusive access to the buses for a sequence of * transfers. The bus should be locked before the chip is selected. * - * This is a blocking call and will not return until we have exclusiv access to - * the SPI buss. We will retain that exclusive access until the bus is unlocked. + * This is a blocking call and will not return until we have exclusive access to + * the SPI bus. We will retain that exclusive access until the bus is unlocked. */ SPI_LOCK(dev, true); /* After locking the SPI bus, the we also need call the setfrequency, setbits, and * setmode methods to make sure that the SPI is properly configured for the device. - * If the SPI buss is being shared, then it may have been left in an incompatible + * If the SPI bus is being shared, then it may have been left in an incompatible * state. */ diff --git a/drivers/mtd/sst25xx.c b/drivers/mtd/sst25xx.c index 626b479f441..68cd6ed0fb6 100644 --- a/drivers/mtd/sst25xx.c +++ b/drivers/mtd/sst25xx.c @@ -94,7 +94,7 @@ #endif /* SST25 Registers *******************************************************************/ -/* Indentification register values */ +/* Identification register values */ #define SST25_MANUFACTURER CONFIG_SST25XX_MANUFACTURER #define SST25_MEMORY_TYPE CONFIG_SST25XX_MEMORY_TYPE @@ -219,19 +219,19 @@ static int sst25xx_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg); static void sst25xx_lock(FAR struct spi_dev_s *dev) { - /* On SPI busses where there are multiple devices, it will be necessary to - * lock SPI to have exclusive access to the busses for a sequence of + /* On SPI buses where there are multiple devices, it will be necessary to + * lock SPI to have exclusive access to the buses for a sequence of * transfers. The bus should be locked before the chip is selected. * - * This is a blocking call and will not return until we have exclusiv access to - * the SPI buss. We will retain that exclusive access until the bus is unlocked. + * This is a blocking call and will not return until we have exclusive access to + * the SPI bus. We will retain that exclusive access until the bus is unlocked. */ SPI_LOCK(dev, true); /* After locking the SPI bus, the we also need call the setfrequency, setbits, and * setmode methods to make sure that the SPI is properly configured for the device. - * If the SPI buss is being shared, then it may have been left in an incompatible + * If the SPI bus is being shared, then it may have been left in an incompatible * state. */ diff --git a/drivers/mtd/sst26.c b/drivers/mtd/sst26.c index 5ff4461977c..85a1b967a42 100644 --- a/drivers/mtd/sst26.c +++ b/drivers/mtd/sst26.c @@ -283,12 +283,12 @@ static int sst26_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg); static void sst26_lock(FAR struct spi_dev_s *dev) { - /* On SPI busses where there are multiple devices, it will be necessary to - * lock SPI to have exclusive access to the busses for a sequence of + /* On SPI buses where there are multiple devices, it will be necessary to + * lock SPI to have exclusive access to the buses for a sequence of * transfers. The bus should be locked before the chip is selected. * - * This is a blocking call and will not return until we have exclusiv access to - * the SPI buss. We will retain that exclusive access until the bus is unlocked. + * This is a blocking call and will not return until we have exclusive access to + * the SPI bus. We will retain that exclusive access until the bus is unlocked. */ SPI_LOCK(dev, true); diff --git a/drivers/mtd/sst39vf.c b/drivers/mtd/sst39vf.c index b814aaf944c..f50a1b1a545 100644 --- a/drivers/mtd/sst39vf.c +++ b/drivers/mtd/sst39vf.c @@ -818,7 +818,7 @@ FAR struct mtd_dev_s *sst39vf_initialize(void) sst39vf_writeseq(g_swid_exit, 3); up_udelay(10); - /* Now see if we can suport the part */ + /* Now see if we can support the part */ finfo("Manufacturer: %02x\n", manufacturer); finfo("Chip ID: %04x\n", chipid); diff --git a/drivers/mtd/w25.c b/drivers/mtd/w25.c index 67dc122f999..e192b86d0d1 100644 --- a/drivers/mtd/w25.c +++ b/drivers/mtd/w25.c @@ -299,19 +299,19 @@ static ssize_t w25_write(FAR struct mtd_dev_s *dev, off_t offset, size_t nbytes, static void w25_lock(FAR struct spi_dev_s *spi) { - /* On SPI busses where there are multiple devices, it will be necessary to - * lock SPI to have exclusive access to the busses for a sequence of + /* On SPI buses where there are multiple devices, it will be necessary to + * lock SPI to have exclusive access to the buses for a sequence of * transfers. The bus should be locked before the chip is selected. * - * This is a blocking call and will not return until we have exclusiv access to - * the SPI buss. We will retain that exclusive access until the bus is unlocked. + * This is a blocking call and will not return until we have exclusive access to + * the SPI bus. We will retain that exclusive access until the bus is unlocked. */ SPI_LOCK(spi, true); /* After locking the SPI bus, the we also need call the setfrequency, setbits, and * setmode methods to make sure that the SPI is properly configured for the device. - * If the SPI buss is being shared, then it may have been left in an incompatible + * If the SPI bus is being shared, then it may have been left in an incompatible * state. */ diff --git a/drivers/mtd/w25qxxxjv.c b/drivers/mtd/w25qxxxjv.c index 8cbae460a6a..2ab9fa9c492 100644 --- a/drivers/mtd/w25qxxxjv.c +++ b/drivers/mtd/w25qxxxjv.c @@ -391,7 +391,7 @@ static void w25qxxxjv_lock(FAR struct qspi_dev_s *qspi) * transfers. The bus should be locked before the chip is selected. * * This is a blocking call and will not return until we have exclusive access to - * the QuadSPI buss. We will retain that exclusive access until the bus is + * the QuadSPI bus. We will retain that exclusive access until the bus is * unlocked. */ @@ -399,7 +399,7 @@ static void w25qxxxjv_lock(FAR struct qspi_dev_s *qspi) /* After locking the QuadSPI bus, the we also need call the setfrequency, setbits, * and setmode methods to make sure that the QuadSPI is properly configured for - * the device. If the QuadSPI buss is being shared, then it may have been left in + * the device. If the QuadSPI bus is being shared, then it may have been left in * an incompatible state. */ diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index 980dc4f8e7b..eccf59efcc3 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig @@ -291,7 +291,7 @@ config ENCX24J600_NRXDESCR Defines how many descriptors are preallocated for the transmission and reception queues. The ENC has a relative large packet buffer of 24kB which can - be used to buffer multiple packets simutaneously + be used to buffer multiple packets simultaneously config ENCX24J600_DUMPPACKET bool "Dump Packets" diff --git a/drivers/net/dm90x0.c b/drivers/net/dm90x0.c index 39f633c3e7c..9381b59ff60 100644 --- a/drivers/net/dm90x0.c +++ b/drivers/net/dm90x0.c @@ -219,7 +219,7 @@ #define DM9X_IMRRXDISABLE (DM9X_INT_PT | DM9X_INT_LNKCHG | DM9X_IMR_PAR) #define DM9X_IMRDISABLE (DM9X_IMR_PAR) -/* EEPROM/PHY control regiser bits */ +/* EEPROM/PHY control register bits */ #define DM9X_EEPHYC_ERRE (1 << 0) /* EEPROM (vs PHY) access status */ #define DM9X_EEPHYC_ERPRW (1 << 1) /* EEPROM/PHY write access */ @@ -259,7 +259,7 @@ #define DM9X_CRXTHRES 10 -/* All access is via an index register and a data regist. Select accecss +/* All access is via an index register and a data register. Select accecss * according to user supplied base address and bus width. */ @@ -1221,7 +1221,7 @@ static void dm9x_interrupt_work(FAR void *arg) if (priv->ncrxpackets >= DM9X_CRXTHRES) { - /* Eanble all DM90x0 interrupts EXCEPT for RX */ + /* Enable all DM90x0 interrupts EXCEPT for RX */ putreg(DM9X_IMR, DM9X_IMRRXDISABLE); } diff --git a/drivers/net/enc28j60.h b/drivers/net/enc28j60.h index 463bcb87f22..beb404bb3ff 100644 --- a/drivers/net/enc28j60.h +++ b/drivers/net/enc28j60.h @@ -396,12 +396,12 @@ #define PHIE_PGEIE (1 << 1) /* Bit 1: PHY Global Interrupt Enable */ #define PHIE_PLNKIE (1 << 4) /* Bit 4: PHY Link Change Interrupt Enable */ -/* PHIR Regiser Bit Definitions */ +/* PHIR Register Bit Definitions */ #define PHIR_PGIF (1 << 2) /* Bit 2: PHY Global Interrupt */ #define PHIR_PLNKIF (1 << 4) /* Bit 4: PHY Link Change Interrupt */ -/* PHLCON Regiser Bit Definitions */ +/* PHLCON Register Bit Definitions */ /* Bit 0: Reserved */ #define PHLCON_STRCH (1 << 1) /* Bit 1: LED Pulse Stretching Enable */ #define PHLCON_LFRQ0 (1 << 2) /* Bit 2: LED Pulse Stretch Time Configuration */ diff --git a/drivers/net/encx24j600.c b/drivers/net/encx24j600.c index aba503efee3..93a0b814d4b 100644 --- a/drivers/net/encx24j600.c +++ b/drivers/net/encx24j600.c @@ -259,7 +259,7 @@ struct enc_driver_s sq_queue_t txfreedescr; /* Free inititialized TX descriptors */ sq_queue_t rxfreedescr; /* Free RX descriptors */ - sq_queue_t txqueue; /* Enqueued descriptors waiting for transmition */ + sq_queue_t txqueue; /* Enqueued descriptors waiting for transmission */ sq_queue_t rxqueue; /* Unhandled incoming packets waiting for reception */ /* This is the contained SPI driver intstance */ @@ -1408,7 +1408,7 @@ static void enc_rxrmpkt(FAR struct enc_driver_s *priv, ninfo("free descr: %p\n", descr); /* If it is the last descriptor in the queue, advance ERXTAIL. - * This way it is possible that gaps occcur. Maybe pending packets + * This way it is possible that gaps occur. Maybe pending packets * can be reordered th enc's DMA to free RX space? */ @@ -2098,7 +2098,7 @@ static void enc_txtimeout(int argc, uint32_t arg, ...) FAR struct enc_driver_s *priv = (FAR struct enc_driver_s *)arg; int ret; - /* In complex environments, we cannot do SPI transfers from the timout + /* In complex environments, we cannot do SPI transfers from the timeout * handler because semaphores are probably used to lock the SPI bus. In * this case, we will defer processing to the worker thread. This is also * much kinder in the use of system resources and is, therefore, probably @@ -2192,7 +2192,7 @@ static void enc_polltimer(int argc, uint32_t arg, ...) FAR struct enc_driver_s *priv = (FAR struct enc_driver_s *)arg; int ret; - /* In complex environments, we cannot do SPI transfers from the timout + /* In complex environments, we cannot do SPI transfers from the timeout * handler because semaphores are probably used to lock the SPI bus. In * this case, we will defer processing to the worker thread. This is also * much kinder in the use of system resources and is, therefore, probably @@ -2663,7 +2663,7 @@ static void enc_resetbuffers(FAR struct enc_driver_s *priv) sq_init(&priv->txqueue); sq_init(&priv->rxqueue); - /* For transmition we preinitialize the descriptors to aligned NET_BUFFSIZE */ + /* For transmission we preinitialize the descriptors to aligned NET_BUFFSIZE */ for (i = 0; i < ENC_NTXDESCR; i++) { @@ -2769,7 +2769,7 @@ static int enc_reset(FAR struct enc_driver_s *priv) } while ((regval & PHSTAT1_ANDONE) != 0); - ninfo("Auto-negotation completed\n"); + ninfo("Auto-negotiation completed\n"); #endif diff --git a/drivers/net/encx24j600.h b/drivers/net/encx24j600.h index 66f996387e2..05659553d10 100644 --- a/drivers/net/encx24j600.h +++ b/drivers/net/encx24j600.h @@ -151,7 +151,7 @@ /* Registers are described by 16 bit values. The high byte describes the bank * by the appropriate bank selection command. - * For registers which are available on all banks the comnmand is set to 0. + * For registers which are available on all banks the command is set to 0. * Unbanked registers are identified by 0x01. */ @@ -178,7 +178,7 @@ #define ENC_ETXSTAT REGADDR(0x12, ENC_B0SEL) #define ENC_ETXWIRE REGADDR(0x14, ENC_B0SEL) -/* Bank 1 Contro Register Addresses */ +/* Bank 1 Control Register Addresses */ #define ENC_EHT1 REGADDR(0x00, ENC_B1SEL) #define ENC_EHT2 REGADDR(0x02, ENC_B1SEL) diff --git a/drivers/net/lan91c111.c b/drivers/net/lan91c111.c index 80ccd2fcc41..521cc6e1854 100644 --- a/drivers/net/lan91c111.c +++ b/drivers/net/lan91c111.c @@ -1584,7 +1584,7 @@ int lan91c111_initialize(uintptr_t base, int irq) if ((macrev >> 4 & 0x0f) != CHIP_91111FD || phyid != PHY_LAN83C183) { - nerr("ERROR: Unsupport LAN91C111's MAC/PHY\n"); + nerr("ERROR: Unsupported LAN91C111's MAC/PHY\n"); ret = -ENODEV; goto err; } diff --git a/drivers/net/lan91c111.h b/drivers/net/lan91c111.h index a69d107dd1e..8985d32fca0 100644 --- a/drivers/net/lan91c111.h +++ b/drivers/net/lan91c111.h @@ -103,7 +103,7 @@ #define RCR_RX_ABORT 0x0001 /* Set if a rx frame was aborted */ #define RCR_PRMS 0x0002 /* Enable promiscuous mode */ #define RCR_ALMUL 0x0004 /* When set accepts all multicast frames */ -#define RCR_RXEN 0x0100 /* IFF this is set, we can receive packets */ +#define RCR_RXEN 0x0100 /* IF this is set, we can receive packets */ #define RCR_STRIP_CRC 0x0200 /* When set strips CRC from rx packets */ #define RCR_ABORT_ENB 0x2000 /* When set will abort rx on collision */ #define RCR_FILT_CAR 0x4000 /* When set filters leading 12 bit s of carrier */ diff --git a/drivers/net/skeleton.c b/drivers/net/skeleton.c index abec3609e3d..904adbcf2da 100644 --- a/drivers/net/skeleton.c +++ b/drivers/net/skeleton.c @@ -301,7 +301,7 @@ static int skel_txpoll(FAR struct net_driver_s *dev) /* Check if the network is sending this packet to the IP address of * this device. If so, just loop the packet back into the network but - * don't attmpt to put it on the wire. + * don't attempt to put it on the wire. */ if (!devif_loopback(&priv->sk_dev)) diff --git a/drivers/net/telnet.c b/drivers/net/telnet.c index 715e5da2639..a1c998eed99 100644 --- a/drivers/net/telnet.c +++ b/drivers/net/telnet.c @@ -5,7 +5,7 @@ * rights reserved. * Author: Gregory Nutt * - * This dervies remotely from some Telnet logic from uIP which has a + * This derives remotely from some Telnet logic from uIP which has a * compatible BSD license: * * Author: Adam Dunkels @@ -1029,7 +1029,7 @@ static int telnet_session(FAR struct telnet_session_s *session) goto errout_with_dev; } - /* Allocate a unique minor device number of the telnet drvier. + /* Allocate a unique minor device number of the telnet driver. * Get exclusive access to the minor counter. */ diff --git a/drivers/power/Make.defs b/drivers/power/Make.defs index 9e315274c27..25cd82483af 100644 --- a/drivers/power/Make.defs +++ b/drivers/power/Make.defs @@ -158,7 +158,7 @@ endif endif -# Include battery suport in the build +# Include battery support in the build POWER_DEPPATH := --dep-path power POWER_VPATH := :power diff --git a/drivers/power/battery_gauge.c b/drivers/power/battery_gauge.c index a0813680d15..27a0241b1bc 100644 --- a/drivers/power/battery_gauge.c +++ b/drivers/power/battery_gauge.c @@ -157,7 +157,7 @@ static int bat_gauge_ioctl(FAR struct file *filep, int cmd, unsigned long arg) FAR struct battery_gauge_dev_s *dev = inode->i_private; int ret; - /* Inforce mutually exclusive access to the battery driver */ + /* Enforce mutually exclusive access to the battery driver */ ret = nxsem_wait(&dev->batsem); if (ret < 0) diff --git a/drivers/power/bq2429x.c b/drivers/power/bq2429x.c index dbfbb0d5841..1492e5e97e2 100644 --- a/drivers/power/bq2429x.c +++ b/drivers/power/bq2429x.c @@ -1158,9 +1158,9 @@ static int bq2429x_input_current(FAR struct battery_charger_dev_s *dev, * REG00[4] VINDPM 3.88-5.08V Default:4.36V * REG01[3] Min Sys Voltage Range3.0-3.7V * REG04[6] Charge Voltage Limit 3504-4400mV Default: 4208mV - * REG04[1] Battery Recharge Threhold 100/300mV Default 100mV + * REG04[1] Battery Recharge Threshold 100/300mV Default 100mV * REG06[4] BOOSTV - Boost Voltage 4550-5510mV Default 4998mV - * REG06[2] BHOT Boost Mode Termperature Monitor + * REG06[2] BHOT Boost Mode Temperature Monitor * ****************************************************************************/ diff --git a/drivers/power/motor.c b/drivers/power/motor.c index 8fc04e5e887..e376b92774c 100644 --- a/drivers/power/motor.c +++ b/drivers/power/motor.c @@ -227,7 +227,7 @@ static int motor_ioctl(FAR struct file *filep, int cmd, unsigned long arg) case PWRIOC_START: { /* Allow motor start only when some limits available - * and strucutre is locked. + * and structure is locked. */ if ((motor->limits.lock == false) || diff --git a/drivers/power/smps.c b/drivers/power/smps.c index a8987850535..ecc3bb2643f 100644 --- a/drivers/power/smps.c +++ b/drivers/power/smps.c @@ -228,7 +228,7 @@ static int smps_ioctl(FAR struct file *filep, int cmd, unsigned long arg) case PWRIOC_START: { /* Allow SMPS start only when some limits available - * and strucutre is locked. + * and structure is locked. * REVISIT: not sure if it is needed here */ diff --git a/drivers/sensors/adt7320.c b/drivers/sensors/adt7320.c index 6958585a56f..c50dfc4c137 100644 --- a/drivers/sensors/adt7320.c +++ b/drivers/sensors/adt7320.c @@ -421,7 +421,7 @@ static ssize_t adt7320_write(FAR struct file *filep, FAR const char *buffer, * Name: adt7320_ioctl * * Description: - * Suppoted IOCTLs: + * Supported IOCTLs: * * SNIOC_READSTAT: Read the status register, treat arg as an * uint8_t pointer. diff --git a/drivers/sensors/ak09912.c b/drivers/sensors/ak09912.c index de1293e4655..67fe396db5e 100644 --- a/drivers/sensors/ak09912.c +++ b/drivers/sensors/ak09912.c @@ -84,7 +84,7 @@ #define AK09912_ASAX 0x60 /* REGISTER: CNTL1 - * Enable or disable temparator measure or enable or disable Noice suppression + * Enable or disable temparator measure or enable or disable Noise suppression * filter. */ @@ -107,7 +107,7 @@ #define AK09912_SENSITIVITY (128) #define AK09912_SENSITIVITY_DIV (256) -/* Noice Suppression Filter */ +/* Noise Suppression Filter */ #define AK09912_NSF_NONE 0b00 #define AK09912_NSF_LOW 0b01 @@ -164,7 +164,7 @@ struct ak09912_dev_s int compensated; /* 0: uncompensated, 1:compensated */ struct sensi_data_s asa_data; /* sensitivity data */ uint8_t mode; /* power mode */ - uint8_t nsf; /* noice suppression filter setting */ + uint8_t nsf; /* noise suppression filter setting */ WDOG_ID wd; sem_t wait; }; @@ -370,14 +370,14 @@ static int ak09912_read_sensitivity_data(FAR struct ak09912_dev_s *priv, } /**************************************************************************** - * Name: ak09912_set_noice_suppr_flt + * Name: ak09912_set_noise_suppr_flt * * Description: - * set noice suppression filter for ak09912 + * set noise suppression filter for ak09912 * ****************************************************************************/ -static int ak09912_set_noice_suppr_flt(FAR struct ak09912_dev_s *priv, +static int ak09912_set_noise_suppr_flt(FAR struct ak09912_dev_s *priv, uint32_t nsf) { int ret = 0; @@ -516,7 +516,7 @@ static int ak09912_initialize(FAR struct ak09912_dev_s *priv) ret += ak09912_set_power_mode(priv, AKM_FUSE_ROM_MODE); ret += ak09912_read_sensitivity_data(priv, &priv->asa_data); ret += ak09912_set_power_mode(priv, AKM_POWER_DOWN_MODE); - ret += ak09912_set_noice_suppr_flt(priv, priv->nsf); + ret += ak09912_set_noise_suppr_flt(priv, priv->nsf); return ret; } @@ -690,7 +690,7 @@ int ak09912_register(FAR const char *devpath, FAR struct i2c_master_s *i2c) priv->wd = wd_create(); nxsem_init(&priv->wait, 0, 0); - /* set default noice suppression filter. */ + /* set default noise suppression filter. */ priv->nsf = AK09912_NSF_LOW; diff --git a/drivers/sensors/bh1750fvi.c b/drivers/sensors/bh1750fvi.c index a50b4d6e16d..f45f11a5d7f 100644 --- a/drivers/sensors/bh1750fvi.c +++ b/drivers/sensors/bh1750fvi.c @@ -436,12 +436,12 @@ int bh1750fvi_register(FAR const char *devpath, FAR struct i2c_master_s *i2c, return ret; } - /* Set Continuosly H-Resolution Mode */ + /* Set Continuously H-Resolution Mode */ ret = bh1750fvi_write8(priv, BH1750FVI_CONTINUOUS_HRM); if (ret < 0) { - snerr("ERROR: Failed to enable the Continuosly H-Resolution Mode!\n"); + snerr("ERROR: Failed to enable the Continuously H-Resolution Mode!\n"); return ret; } diff --git a/drivers/sensors/kxtj9.c b/drivers/sensors/kxtj9.c index 64da61fd0be..e333c779fa5 100644 --- a/drivers/sensors/kxtj9.c +++ b/drivers/sensors/kxtj9.c @@ -117,7 +117,7 @@ #define KXTJ9_CTRL1_CONFIG (RES_12BIT | KXTJ9_G_2G | DRDYE) -/* Misc. driver defitions ***************************************************/ +/* Misc. driver definitions *************************************************/ #define ACCEL_NUM_RETRIES 5 @@ -508,7 +508,7 @@ static ssize_t kxtj9_read(FAR struct file *filep, FAR char *buffer, if (nsamples < 1) { - snerr("ERROR: Bufer too small %lu < %u\n", + snerr("ERROR: Buffer too small %lu < %u\n", buflen, sizeof(struct kxtj9_sensor_data)); return (ssize_t)-EINVAL; } diff --git a/drivers/sensors/lis3dh.c b/drivers/sensors/lis3dh.c index bd86f03d3a2..0862bb19aec 100644 --- a/drivers/sensors/lis3dh.c +++ b/drivers/sensors/lis3dh.c @@ -286,7 +286,7 @@ static void lis3dh_queue_lock(FAR struct lis3dh_dev_s *dev) * Name: lis3dh_queue_unlock * * Description: - * Unlocks exclusive acccess to the ring buffer queue + * Unlocks exclusive access to the ring buffer queue * * Input Parameters: * dev - Pointer to device driver instance diff --git a/drivers/sensors/zerocross.c b/drivers/sensors/zerocross.c index 9929cec57ff..2f77c5d0ec7 100644 --- a/drivers/sensors/zerocross.c +++ b/drivers/sensors/zerocross.c @@ -236,7 +236,7 @@ static int zc_open(FAR struct file *filep) opriv = (FAR struct zc_open_s *)kmm_zalloc(sizeof(struct zc_open_s)); if (!opriv) { - snerr("ERROR: Failled to allocate open structure\n"); + snerr("ERROR: Failed to allocate open structure\n"); ret = -ENOMEM; goto errout_with_sem; } diff --git a/drivers/serial/pty.c b/drivers/serial/pty.c index 470202f9188..1557b8a9b5b 100644 --- a/drivers/serial/pty.c +++ b/drivers/serial/pty.c @@ -545,7 +545,7 @@ static ssize_t pty_read(FAR struct file *filep, FAR char *buffer, size_t len) * * REVISIT: Should not block if the oflags include O_NONBLOCK. * How would we ripple the O_NONBLOCK characteristic to the - * contained soruce pipe? file_vfcntl()? Or FIONREAD? See the + * contained source pipe? file_vfcntl()? Or FIONREAD? See the * TODO comment at the top of this file. */ diff --git a/drivers/serial/serial.c b/drivers/serial/serial.c index 2d9a761c732..0b16c803289 100644 --- a/drivers/serial/serial.c +++ b/drivers/serial/serial.c @@ -1784,8 +1784,8 @@ void uart_connected(FAR uart_dev_t *dev, bool connected) * Name: uart_reset_sem * * Description: - * This function is called when need reset uart semphore, this may used in kill one - * process, but this process was reading/writing with the semphore. + * This function is called when need reset uart semaphore, this may used in kill one + * process, but this process was reading/writing with the semaphore. * ************************************************************************************/ diff --git a/drivers/syslog/README.txt b/drivers/syslog/README.txt index e03bb6b2c2b..b934138d4ec 100644 --- a/drivers/syslog/README.txt +++ b/drivers/syslog/README.txt @@ -156,7 +156,7 @@ SYSLOG Channels available to applications. It may be called numerous times as necessary to change channel interfaces. - Input Parmeters: + Input Parameters: * channel - Provides the interface to the channel to be used. @@ -299,7 +299,7 @@ SYSLOG Channel Options selected when a UART or USART is configured as the system console. There is no user selection. * CONFIG_SYSLOG_CONSOLE. This configuration option is manually selected - from the SYSLOG menu. This is the option that acutally enables the + from the SYSLOG menu. This is the option that actually enables the SYSLOG console device. It depends on CONFIG_DEV_CONSOLE. * CONFIG_ARCH_LOWPUTC. This is an indication from the architecture configuration that the platform supports the up_putc() interface. diff --git a/drivers/timers/Kconfig b/drivers/timers/Kconfig index 33fb5eb2256..0267d582f9b 100644 --- a/drivers/timers/Kconfig +++ b/drivers/timers/Kconfig @@ -315,7 +315,7 @@ config WATCHDOG_AUTOMONITOR bool "Auto-monitor" ---help--- The auto-monitor provides an OS-internal mechanism for automatically - start and repeatly reset the counting after the watchdog is register. + start and repeatedly reset the counting after the watchdog is register. if WATCHDOG_AUTOMONITOR diff --git a/drivers/timers/ds3231.c b/drivers/timers/ds3231.c index f7b38a3eab1..6171772c920 100644 --- a/drivers/timers/ds3231.c +++ b/drivers/timers/ds3231.c @@ -80,7 +80,7 @@ #define DS3231_I2C_ADDRESS 0x68 /************************************************************************************ - * Priviate Types + * Private Types ************************************************************************************/ /* This structure describes the state of the DS3231 chip. Only a single RTC is @@ -444,7 +444,7 @@ int up_rtc_settime(FAR const struct timespec *tp) /* Construct the message */ - /* Write starting with the seconds regiser */ + /* Write starting with the seconds register */ buffer[0] = DSXXXX_TIME_SECR; diff --git a/drivers/timers/oneshot.c b/drivers/timers/oneshot.c index e4c047d3140..073db2babc2 100644 --- a/drivers/timers/oneshot.c +++ b/drivers/timers/oneshot.c @@ -228,7 +228,7 @@ static int oneshot_ioctl(FAR struct file *filep, int cmd, unsigned long arg) { /* OSIOC_MAXDELAY - Return the maximum delay that can be supported * by this timer. - * Argument: A referenct to a struct timespec in + * Argument: A reference to a struct timespec in * which the maximum time will be returned. */ diff --git a/drivers/timers/pcf85263.c b/drivers/timers/pcf85263.c index 53454992f51..11e56c8a1e1 100644 --- a/drivers/timers/pcf85263.c +++ b/drivers/timers/pcf85263.c @@ -80,7 +80,7 @@ #define PCF85263_I2C_ADDRESS 0x51 /************************************************************************************ - * Priviate Types + * Private Types ************************************************************************************/ /* This structure describes the state of the PCF85263 chip. Only a single RTC is diff --git a/drivers/timers/timer.c b/drivers/timers/timer.c index 33443001acb..650ffd260ec 100644 --- a/drivers/timers/timer.c +++ b/drivers/timers/timer.c @@ -616,7 +616,7 @@ int timer_setcallback(FAR void *handle, tccb_t callback, FAR void *arg) if (lower->ops->setcallback != NULL) /* Optional */ { - /* Yes.. Defer the hander attachment to the lower half driver */ + /* Yes.. Defer the handler attachment to the lower half driver */ lower->ops->setcallback(lower, callback, arg); return OK; diff --git a/drivers/usbdev/Kconfig b/drivers/usbdev/Kconfig index b9133a4cb61..e76ebbc6a20 100644 --- a/drivers/usbdev/Kconfig +++ b/drivers/usbdev/Kconfig @@ -851,7 +851,7 @@ menuconfig NET_CDCECM References: - "Universal Serial Bus - Communications Class - Subclass Specification for Ethernet Control Model Devices, - Revision 1.2, Feburary 9, 2007" + Revision 1.2, February 9, 2007" This option may require CONFIG_NETDEV_LATEINIT=y, otherwise the power-up initialization may call the non-existent up_netinitialize(). diff --git a/drivers/usbdev/cdcacm.c b/drivers/usbdev/cdcacm.c index 9db75fa82c0..fd9e4266878 100644 --- a/drivers/usbdev/cdcacm.c +++ b/drivers/usbdev/cdcacm.c @@ -2728,7 +2728,7 @@ static bool cdcuart_rxflowcontrol(FAR struct uart_dev_s *dev, priv->iactive = false; - /* Set DSR if it is not alredy set */ + /* Set DSR if it is not already set */ if ((priv->serialstate & CDCACM_UART_DSR) == 0) { diff --git a/drivers/usbdev/pl2303.c b/drivers/usbdev/pl2303.c index 6850a63a6c6..0b8ff9cdb2c 100644 --- a/drivers/usbdev/pl2303.c +++ b/drivers/usbdev/pl2303.c @@ -196,7 +196,7 @@ #define PL2303_MXDESCLEN (64) #define PL2303_MAXSTRLEN (PL2303_MXDESCLEN-2) -/* Vender specific control requests *******************************************/ +/* Vendor specific control requests *******************************************/ #define PL2303_CONTROL_TYPE (0x20) #define PL2303_SETLINEREQUEST (0x20) /* OUT, Recipient interface */ @@ -582,7 +582,7 @@ static uint16_t usbclass_fillrequest(FAR struct pl2303_dev_s *priv, uint8_t *req * Description: * This function obtains write requests, transfers the TX data into the request, * and submits the requests to the USB controller. This continues untils either - * (1) there are no further packets available, or (2) thre is not further data + * (1) there are no further packets available, or (2) there is not further data * to send. * ************************************************************************************/ @@ -689,7 +689,7 @@ static inline int usbclass_recvpacket(FAR struct pl2303_dev_s *priv, * the serial driver will be extracting data from the circular buffer and modifying * recv.tail. During this time, we should avoid modifying recv.head; Instead we will * use a shadow copy of the index. When interrupts are restored, the real recv.head - * will be updated with this indes. + * will be updated with this index. */ if (priv->rxenabled) @@ -2150,7 +2150,7 @@ static void usbser_rxint(FAR struct uart_dev_s *dev, bool enable) * buffer and modifying recv.tail. During this time, we * should avoid modifying recv.head; When interrupts are restored, * we can update the head pointer for all of the data that we - * put into cicular buffer while "interrupts" were disabled. + * put into circular buffer while "interrupts" were disabled. */ if (priv->rxhead != serdev->recv.head) diff --git a/drivers/usbhost/Kconfig b/drivers/usbhost/Kconfig index 31248cf802f..ae98c2e1fbe 100644 --- a/drivers/usbhost/Kconfig +++ b/drivers/usbhost/Kconfig @@ -171,7 +171,7 @@ config USBHOST_CDCACM_BULKONLY By default, both the CDC/ACM compliant protocol and the reduced protocol are supported. This option is then most useful for testing purposes. The interrupt IN control interface will not be used even - if it is available; nor will EP0 class requestes. + if it is available; nor will EP0 class requests. endchoice # CDC/ACM Protocol @@ -258,7 +258,7 @@ config USBHOST_CDCACM_TXBUFSIZE default 128 ---help--- This is the size of the serial buffer that will be used to hold - data waiting for tranmission. + data waiting for transmission. endif # USBHOST_CDCACM diff --git a/drivers/usbhost/hid_parser.c b/drivers/usbhost/hid_parser.c index 88a167beac6..e87df5693fa 100644 --- a/drivers/usbhost/hid_parser.c +++ b/drivers/usbhost/hid_parser.c @@ -445,7 +445,7 @@ int hid_getitem(FAR const uint8_t *report, FAR struct hid_rptitem_s *item) /**************************************************************************** * Name: hid_putitem * - * Desription: + * Description: * Retrieves the given report item's value out of the Value member of the * report item's struct hid_rptitem_s structure and places it into the correct * position in the HID report buffer. The report buffer is assumed to have diff --git a/drivers/usbhost/usbhost_cdcacm.c b/drivers/usbhost/usbhost_cdcacm.c index 2152b4a4fa6..e1ee50857c8 100644 --- a/drivers/usbhost/usbhost_cdcacm.c +++ b/drivers/usbhost/usbhost_cdcacm.c @@ -1578,7 +1578,7 @@ static int usbhost_cfgdesc(FAR struct usbhost_cdcacm_s *priv, } /* Sanity checking... did we find all of things that we needed for the - * basic CDC/ACM data itnerface? NOTE: that the Control interface with + * basic CDC/ACM data interface? NOTE: that the Control interface with * the Interrupt IN endpoint is optional. */ diff --git a/drivers/usbhost/usbhost_composite.c b/drivers/usbhost/usbhost_composite.c index d44fea5382b..2f6e96a03a7 100644 --- a/drivers/usbhost/usbhost_composite.c +++ b/drivers/usbhost/usbhost_composite.c @@ -56,7 +56,7 @@ ****************************************************************************/ /* This is the size of a large, allocated temporary buffer that we will use - * to constuct custom configuration descriptors for each member class. + * to construct custom configuration descriptors for each member class. */ #define CUSTOM_CONFIG_BUFSIZE \ @@ -577,7 +577,7 @@ int usbhost_composite(FAR struct usbhost_hubport_s *hport, } /* First, count the number of interface descriptors (nintfs) and the - * number of interfaces that are assocated to one device via IAD + * number of interfaces that are associated to one device via IAD * descriptor (nmerged). */ diff --git a/drivers/usbhost/usbhost_devaddr.c b/drivers/usbhost/usbhost_devaddr.c index 5cb64fc4e99..8aa68bf0f54 100644 --- a/drivers/usbhost/usbhost_devaddr.c +++ b/drivers/usbhost/usbhost_devaddr.c @@ -118,7 +118,7 @@ static int usbhost_devaddr_allocate(FAR struct usbhost_devaddr_s *devgen) return (int)devaddr; } - /* This address has already been allocated. The followign logic will + /* This address has already been allocated. The following logic will * prevent (unexpected) infinite loops. */ diff --git a/drivers/usbhost/usbhost_hub.c b/drivers/usbhost/usbhost_hub.c index 4c31f0f03be..5858b7b5151 100644 --- a/drivers/usbhost/usbhost_hub.c +++ b/drivers/usbhost/usbhost_hub.c @@ -248,7 +248,7 @@ static void usbhost_hport_deactivate(FAR struct usbhost_hubport_s *hport) hport->funcaddr = 0; /* If this is a downstream hub port, then there should be no class driver - * associated wit it. + * associated with it. */ DEBUGASSERT(ROOTHUB(hport) || hport->devclass == NULL); diff --git a/drivers/usbhost/usbhost_skeleton.c b/drivers/usbhost/usbhost_skeleton.c index b1ee01d0197..01e16362c04 100644 --- a/drivers/usbhost/usbhost_skeleton.c +++ b/drivers/usbhost/usbhost_skeleton.c @@ -642,7 +642,7 @@ static inline int usbhost_devinit(FAR struct usbhost_state_s *priv) /* Check if we successfully initialized. We now have to be concerned * about asynchronous modification of crefs because the block - * driver has been registerd. + * driver has been registered. */ if (ret >= 0) diff --git a/drivers/usbhost/usbhost_storage.c b/drivers/usbhost/usbhost_storage.c index 710d43b5a16..62cec1e745c 100644 --- a/drivers/usbhost/usbhost_storage.c +++ b/drivers/usbhost/usbhost_storage.c @@ -1340,7 +1340,7 @@ static inline int usbhost_initvolume(FAR struct usbhost_state_s *priv) /* Decrement the reference count. We incremented the reference count * above so that usbhost_destroy() could not be called. We now have to * be concerned about asynchronous modification of crefs because the block - * driver has been registerd. + * driver has been registered. */ usbhost_takesem(&priv->exclsem); @@ -1627,7 +1627,7 @@ static FAR struct usbmsc_cbw_s *usbhost_cbwalloc(FAR struct usbhost_state_s *pri DEBUGASSERT(priv->tbuffer && priv->tbuflen >= sizeof(struct usbmsc_cbw_s)); - /* Initialize the CBW sructure */ + /* Initialize the CBW structure */ cbw = (FAR struct usbmsc_cbw_s *)priv->tbuffer; memset(cbw, 0, sizeof(struct usbmsc_cbw_s)); @@ -1960,7 +1960,7 @@ static int usbhost_close(FAR struct inode *inode) * Name: usbhost_read * * Description: - * Read the specified numer of sectors from the read-ahead buffer or from + * Read the specified number of sectors from the read-ahead buffer or from * the physical device. * ****************************************************************************/ diff --git a/drivers/usbhost/usbhost_xboxcontroller.c b/drivers/usbhost/usbhost_xboxcontroller.c index 796c89a46c9..c8151f8221d 100644 --- a/drivers/usbhost/usbhost_xboxcontroller.c +++ b/drivers/usbhost/usbhost_xboxcontroller.c @@ -813,7 +813,7 @@ static int usbhost_xboxcontroller_poll(int argc, char *argv[]) break; default: - uinfo("Received messge type: %x\n", priv->tbuffer[0]); + uinfo("Received message type: %x\n", priv->tbuffer[0]); } } @@ -1341,7 +1341,7 @@ static inline int usbhost_devinit(FAR struct usbhost_state_s *priv) /* Check if we successfully initialized. We now have to be concerned * about asynchronous modification of crefs because the block - * driver has been registerd. + * driver has been registered. */ errout: diff --git a/drivers/video/fb.c b/drivers/video/fb.c index 4b7255bad19..5550fac8cda 100644 --- a/drivers/video/fb.c +++ b/drivers/video/fb.c @@ -390,7 +390,7 @@ static int fb_ioctl(FAR struct file *filep, int cmd, unsigned long arg) } break; - case FBIOPUT_CURSOR: /* Set cursor attibutes */ + case FBIOPUT_CURSOR: /* Set cursor attributes */ { FAR struct fb_setcursor_s *cursor = (FAR struct fb_setcursor_s *)((uintptr_t)arg); diff --git a/drivers/video/isx012.c b/drivers/video/isx012.c index 2d206a5487c..26fb43b4033 100644 --- a/drivers/video/isx012.c +++ b/drivers/video/isx012.c @@ -231,7 +231,7 @@ struct isx012_dev_s isx012_state_t state; /* ISX012 status */ bool dma_state; /* true means "in DMA" */ uint8_t mode; /* ISX012 mode */ - isx012_param_t param; /* ISX012 paramerters */ + isx012_param_t param; /* ISX012 parameters */ void *video_priv; /* pointer to video private data */ }; diff --git a/drivers/wireless/Kconfig b/drivers/wireless/Kconfig index 3f85ba58bd4..bd500bef9ad 100644 --- a/drivers/wireless/Kconfig +++ b/drivers/wireless/Kconfig @@ -38,7 +38,7 @@ config WL_GS2200M if WL_GS2200M config WL_GS2200M_SPI_FREQUENCY - int "SPI frequencey for GS2200M" + int "SPI frequency for GS2200M" default 4000000 range 4000000 10000000 diff --git a/drivers/wireless/gs2200m.c b/drivers/wireless/gs2200m.c index a678b95a2c4..47261e7eb49 100644 --- a/drivers/wireless/gs2200m.c +++ b/drivers/wireless/gs2200m.c @@ -1598,7 +1598,7 @@ static enum pkt_type_e gs2200m_join_network(FAR struct gs2200m_dev_s *dev, } else { - /* In AP mode, we can specify chennel to use */ + /* In AP mode, we can specify channel to use */ snprintf(cmd, sizeof(cmd), "AT+WA=%s,,%d\r\n", ssid, ch); } @@ -2298,7 +2298,7 @@ static int gs2200m_ioctl_accept(FAR struct gs2200m_dev_s *dev, msg->type = TYPE_OK; msg->cid = c_cid; /* NOTE: override new client cid */ - /* Disalbe accept in progress */ + /* Disable accept in progress */ _enable_cid(&dev->aip_cid_bits, c_cid, false); diff --git a/drivers/wireless/ieee80211/bcm43xxx/bcmf_driver.c b/drivers/wireless/ieee80211/bcm43xxx/bcmf_driver.c index 4e90d6227a8..97f2c19871b 100644 --- a/drivers/wireless/ieee80211/bcm43xxx/bcmf_driver.c +++ b/drivers/wireless/ieee80211/bcm43xxx/bcmf_driver.c @@ -647,7 +647,7 @@ void bcmf_wl_scan_event_handler(FAR struct bcmf_dev_s *priv, goto exit_invalid_frame; } - /* wl_escan_result structure cointains a wl_bss_info field */ + /* wl_escan_result structure contains a wl_bss_info field */ len = result->buflen - sizeof(struct wl_escan_result) + sizeof(struct wl_bss_info); diff --git a/drivers/wireless/ieee80211/bcm43xxx/bcmf_ioctl.h b/drivers/wireless/ieee80211/bcm43xxx/bcmf_ioctl.h index a4bd5d1e2ca..2d5f668bc84 100644 --- a/drivers/wireless/ieee80211/bcm43xxx/bcmf_ioctl.h +++ b/drivers/wireless/ieee80211/bcm43xxx/bcmf_ioctl.h @@ -1524,7 +1524,7 @@ typedef struct uint32_t rxcgprqfrm; /* Number of received Probe requests that made it into * the PRQ fifo */ - uint32_t rxcgprsqovfl; /* Rx Probe Request Que overflow in the AP */ + uint32_t rxcgprsqovfl; /* Rx Probe Request Queue overflow in the AP */ uint32_t txcgprsfail; /* Tx Probe Response Fail. AP sent probe response but did * not get ACK */ @@ -1768,7 +1768,7 @@ typedef struct uint32_t rxcgprqfrm; /* Number of received Probe requests that made it into * the PRQ fifo */ - uint32_t rxcgprsqovfl; /* Rx Probe Request Que overflow in the AP */ + uint32_t rxcgprsqovfl; /* Rx Probe Request Queue overflow in the AP */ uint32_t txcgprsfail; /* Tx Probe Response Fail. AP sent probe response but did * not get ACK */ @@ -2015,7 +2015,7 @@ typedef struct uint32_t rxcgprqfrm; /* Number of received Probe requests that made it into * the PRQ fifo */ - uint32_t rxcgprsqovfl; /* Rx Probe Request Que overflow in the AP */ + uint32_t rxcgprsqovfl; /* Rx Probe Request Queue overflow in the AP */ uint32_t txcgprsfail; /* Tx Probe Response Fail. AP sent probe response but did * not get ACK */ diff --git a/drivers/wireless/ieee80211/bcm43xxx/bcmf_sdio.h b/drivers/wireless/ieee80211/bcm43xxx/bcmf_sdio.h index e61ae78e283..c5447b5c499 100644 --- a/drivers/wireless/ieee80211/bcm43xxx/bcmf_sdio.h +++ b/drivers/wireless/ieee80211/bcm43xxx/bcmf_sdio.h @@ -118,7 +118,7 @@ struct bcmf_sdio_dev_s sem_t queue_mutex; /* Lock for TX/RX/free queues */ dq_queue_t free_queue; /* Queue of available frames */ - dq_queue_t tx_queue; /* Queue of frames to tramsmit */ + dq_queue_t tx_queue; /* Queue of frames to transmit */ dq_queue_t rx_queue; /* Queue of frames used to receive */ volatile int tx_queue_count; /* Count of items in TX queue */ }; diff --git a/drivers/wireless/ieee802154/mrf24j40/mrf24j40.c b/drivers/wireless/ieee802154/mrf24j40/mrf24j40.c index 060311578b0..82ad38361a3 100644 --- a/drivers/wireless/ieee802154/mrf24j40/mrf24j40.c +++ b/drivers/wireless/ieee802154/mrf24j40/mrf24j40.c @@ -138,7 +138,7 @@ static int mrf24j40_energydetect(FAR struct mrf24j40_radio_s *dev, * Function: mrf24j40_dopoll_csma * * Description: - * This function is called in order to preform an out-of-sequence TX poll. + * This function is called in order to perform an out-of-sequence TX poll. * This is done: * * 1. After completion of a transmission (mrf24j40_txdone_csma), @@ -196,7 +196,7 @@ void mrf24j40_dopoll_csma(FAR void *arg) * Function: mrf24j40_dopoll_gts * * Description: - * This function is called in order to preform an out-of-sequence TX poll. + * This function is called in order to perform an out-of-sequence TX poll. * This is done: * * 1. After completion of a transmission (mrf24j40_txdone_gts), diff --git a/drivers/wireless/ieee802154/xbee/Kconfig b/drivers/wireless/ieee802154/xbee/Kconfig index 2ac741ff660..31cae9b62b4 100644 --- a/drivers/wireless/ieee802154/xbee/Kconfig +++ b/drivers/wireless/ieee802154/xbee/Kconfig @@ -36,7 +36,7 @@ config IEEE802154_XBEE_FREQUENCY SPI SLCK frequency in Hz config XBEE_NETDEV_RECVRPRIO - int "Priority of frame receiver registerd with the MAC layer" + int "Priority of frame receiver registered with the MAC layer" default 1 ---help--- When the MAC layer receives an incoming data frame, it passes the frame diff --git a/drivers/wireless/ieee802154/xbee/xbee_mac.c b/drivers/wireless/ieee802154/xbee/xbee_mac.c index 83cdb45f6d8..30fa859e8c3 100644 --- a/drivers/wireless/ieee802154/xbee/xbee_mac.c +++ b/drivers/wireless/ieee802154/xbee/xbee_mac.c @@ -110,7 +110,7 @@ static void xbee_assoctimer(int argc, uint32_t arg, ...) FAR struct xbee_priv_s *priv = (FAR struct xbee_priv_s *)arg; int ret; - /* In complex environments, we cannot do SPI transfers from the timout + /* In complex environments, we cannot do SPI transfers from the timeout * handler because semaphores are probably used to lock the SPI bus. In * this case, we will defer processing to the worker thread. This is also * much kinder in the use of system resources and is, therefore, probably @@ -429,7 +429,7 @@ int xbee_req_data(XBEEHANDLE xbee, * attribute. * * NOTE: The standard specifies that the attribute value should be returned - * via the asynchronous MLME-GET.confirm primitve. However, in our + * via the asynchronous MLME-GET.confirm primitive. However, in our * implementation, we synchronously return the value immediately.Therefore, we * merge the functionality of the MLME-GET.request and MLME-GET.confirm * primitives together. @@ -535,7 +535,7 @@ int xbee_req_get(XBEEHANDLE xbee, enum ieee802154_attr_e attr, * indicated MAC PIB attribute. * * NOTE: The standard specifies that confirmation should be indicated via - * the asynchronous MLME-SET.confirm primitve. However, in our implementation + * the asynchronous MLME-SET.confirm primitive. However, in our implementation * we synchronously return the status from the request. Therefore, we do merge * the functionality of the MLME-SET.request and MLME-SET.confirm primitives * together. diff --git a/drivers/wireless/ieee802154/xbee/xbee_mac.h b/drivers/wireless/ieee802154/xbee/xbee_mac.h index 6fc1979c4d5..4c832345063 100644 --- a/drivers/wireless/ieee802154/xbee/xbee_mac.h +++ b/drivers/wireless/ieee802154/xbee/xbee_mac.h @@ -169,7 +169,7 @@ int xbee_req_data(XBEEHANDLE xbee, FAR const struct ieee802154_frame_meta_s *met * attribute. * * NOTE: The standard specifies that the attribute value should be returned - * via the asynchronous MLME-GET.confirm primitve. However, in our + * via the asynchronous MLME-GET.confirm primitive. However, in our * implementation, we synchronously return the value immediately.Therefore, we * merge the functionality of the MLME-GET.request and MLME-GET.confirm * primitives together. @@ -187,7 +187,7 @@ int xbee_req_get(XBEEHANDLE xbee, enum ieee802154_attr_e attr, * indicated MAC PIB attribute. * * NOTE: The standard specifies that confirmation should be indicated via - * the asynchronous MLME-SET.confirm primitve. However, in our implementation + * the asynchronous MLME-SET.confirm primitive. However, in our implementation * we synchronously return the status from the request. Therefore, we do merge * the functionality of the MLME-SET.request and MLME-SET.confirm primitives * together. diff --git a/drivers/wireless/ieee802154/xbee/xbee_netdev.c b/drivers/wireless/ieee802154/xbee/xbee_netdev.c index 9de2a06ad86..3c6f0adf0ee 100644 --- a/drivers/wireless/ieee802154/xbee/xbee_netdev.c +++ b/drivers/wireless/ieee802154/xbee/xbee_netdev.c @@ -1236,7 +1236,7 @@ static int xbeenet_req_data(FAR struct radio_driver_s *netdev, * * Input Parameters: * netdev - The network device to be queried - * properties - Location where radio properities will be returned. + * properties - Location where radio properties will be returned. * * Returned Value: * Zero (OK) returned on success; a negated errno value is returned on @@ -1373,7 +1373,7 @@ int xbee_netdev_register(XBEEHANDLE xbee) radio->r_get_mhrlen = xbeenet_get_mhrlen; /* Get MAC header length */ radio->r_req_data = xbeenet_req_data; /* Enqueue frame for transmission */ - radio->r_properties = xbeenet_properties; /* Return radio properies */ + radio->r_properties = xbeenet_properties; /* Return radio properties */ /* Initialize fields related to MAC event handling */ diff --git a/drivers/wireless/lpwan/sx127x/sx127x.c b/drivers/wireless/lpwan/sx127x/sx127x.c index 33b1fa43645..1dfabe867e1 100644 --- a/drivers/wireless/lpwan/sx127x/sx127x.c +++ b/drivers/wireless/lpwan/sx127x/sx127x.c @@ -245,7 +245,7 @@ struct sx127x_lora_s uint8_t bw; /* LORA banwidth */ uint8_t sf; /* Spreading factor */ uint8_t cr; /* Coding rate */ - bool implicthdr; /* Implict header mode ON */ + bool implicthdr; /* Implicit header mode ON */ bool invert_iq; /* Invert I and Q signals */ }; #endif @@ -1885,7 +1885,7 @@ static int sx127x_fskook_send(FAR struct sx127x_dev_s *dev, if (dev->fskook.fixlen == true) { - /* Write payload length reigster (only LSB for now) */ + /* Write payload length register (only LSB for now) */ sx127x_writeregbyte(dev, SX127X_FOM_PAYLOADLEN, datalen); } diff --git a/drivers/wireless/lpwan/sx127x/sx127x.h b/drivers/wireless/lpwan/sx127x/sx127x.h index 5c3edd7c89e..46c18c94b40 100644 --- a/drivers/wireless/lpwan/sx127x/sx127x.h +++ b/drivers/wireless/lpwan/sx127x/sx127x.h @@ -121,7 +121,7 @@ #define SX127X_FOM_TIMRES 0x38 /* FSK/OOK: Timer 1 and 2 resolution control */ #define SX127X_FOM_TIMER1COEF 0x39 /* FSK/OOK: Timer 1 setting */ #define SX127X_FOM_TIMER2COEF 0x3a /* FSK/OOK: Timer 2 setting */ -#define SX127X_FOM_IMAGECAL 0x3b /* FSK/OOK: Image callibration engine control */ +#define SX127X_FOM_IMAGECAL 0x3b /* FSK/OOK: Image calibration engine control */ #define SX127X_FOM_TEMP 0x3c /* FSK/OOK: Temperature Sensor value */ #define SX127X_FOM_LOWBAT 0x3d /* FSK/OOK: Low Battery Indicator settings */ #define SX127X_FOM_IRQ1 0x3e /* FSK/OOK: Status register 1: PLL Lock state, Timeout, RSSI */ @@ -615,7 +615,7 @@ # define SX127X_FOM_TIMRES_TIM2RES_4p1ms (2 << SX127X_FOM_TIMRES_TIM2RES_SHIFT) # define SX127X_FOM_TIMRES_TIM2RES_262ms (3 << SX127X_FOM_TIMRES_TIM2RES_SHIFT) -/* FSK/OOK: Image callibration engine control */ +/* FSK/OOK: Image calibration engine control */ #define SX127X_FOM_IMAGECAL_TEMPMONOFF (1 << 0) /* Bit 0: Temperature monitor OFF */ #define SX127X_FOM_IMAGECAL_TEMPTHR_SHIFT (1) /* Bit 1-2: Temperature threshold */ @@ -625,7 +625,7 @@ # define SX127X_FOM_IMAGECAL_TEMPTHR_15C (2 << SX127X_FOM_IMAGECAL_TEMPTHR_SHIFT) # define SX127X_FOM_IMAGECAL_TEMPTHR_20C (3 << SX127X_FOM_IMAGECAL_TEMPTHR_SHIFT) #define SX127X_FOM_IMAGECAL_TEMPCHANGE (1 << 3) /* Bit 3: Temperature change */ -#define SX127X_FOM_IMAGECAL_IMGCALRUN (1 << 5) /* Bit 5: Image Callibration are running */ +#define SX127X_FOM_IMAGECAL_IMGCALRUN (1 << 5) /* Bit 5: Image Calibration are running */ #define SX127X_FOM_IMAGECAL_IMGCALSTART (1 << 6) /* Bit 6: Image Calibration start */ #define SX127X_FOM_IMAGECAL_AUTOIMGCALON (1 << 7) /* Bit 7: Auto Image Calibration ON */ @@ -723,7 +723,7 @@ /* LORA: Modem PHY config 1 */ -#define SX127X_LRM_MDMCFG1_IMPLHDRON (1 << 0) /* Bit 0: Implict header mode ON */ +#define SX127X_LRM_MDMCFG1_IMPLHDRON (1 << 0) /* Bit 0: Implicit header mode ON */ #define SX127X_LRM_MDMCFG1_CDRATE_SHIFT (1) /* Bits 1-3: Error coding rate */ #define SX127X_LRM_MDMCFG1_CDRATE_MASK (7 << SX127X_LRM_MDMCFG1_CDRATE_SHIFT) # define SX127X_LRM_MDMCFG1_CDRATE_4d5 (1 << SX127X_LRM_MDMCFG1_CDRATE_SHIFT) diff --git a/drivers/wireless/spirit/drivers/Kconfig b/drivers/wireless/spirit/drivers/Kconfig index a0b1892ed99..aebca03446a 100644 --- a/drivers/wireless/spirit/drivers/Kconfig +++ b/drivers/wireless/spirit/drivers/Kconfig @@ -60,7 +60,7 @@ config SPIRIT_FIFOS From my reading, the only known work-around is to reduce the maximum packet size so that it is smaller than 96. Hence, this option is - conditioned on EXPERMENTAL. + conditioned on EXPERIMENTAL. config SPIRIT_PROMISICUOUS bool "Promiscuous mode" @@ -74,14 +74,14 @@ config SPIRIT_MULTICAST default n depends on !SPIRIT_PROMISICUOUS ---help--- - Enables address filtering for the multicast addess 0xee. + Enables address filtering for the multicast address 0xee. config SPIRIT_BROADCAST bool "Broadcast address filter" default n depends on !SPIRIT_PROMISICUOUS ---help--- - Enables address filtering for the broadcast addess 0xff. + Enables address filtering for the broadcast address 0xff. config SPIRIT_CRCDISABLE bool "Disable CRC" diff --git a/drivers/wireless/spirit/drivers/spirit_netdev.c b/drivers/wireless/spirit/drivers/spirit_netdev.c index 7fac9b5335e..a74ee455466 100644 --- a/drivers/wireless/spirit/drivers/spirit_netdev.c +++ b/drivers/wireless/spirit/drivers/spirit_netdev.c @@ -1288,7 +1288,7 @@ static void spirit_interrupt_work(FAR void *arg) if (priv->state != DRIVER_STATE_RECEIVING) { - /* As a race condition, the TX state, but overriden by concurrent + /* As a race condition, the TX state, but overridden by concurrent * RX activity? This assertion here *does* fire: * * DEBUGASSERT(priv->state == DRIVER_STATE_IDLE); @@ -1351,7 +1351,7 @@ static void spirit_interrupt_work(FAR void *arg) #else offset = 0; #endif - /* Get the number of bytes avaialable in the RX FIFO */ + /* Get the number of bytes available in the RX FIFO */ count = spirit_fifo_get_rxcount(spirit); wlinfo("Receiving %u bytes (%u total)\n", count, count + offset); @@ -1505,7 +1505,7 @@ static void spirit_interrupt_work(FAR void *arg) if (iob != NULL) { - /* Get the number of bytes avaialable in the RX FIFO */ + /* Get the number of bytes available in the RX FIFO */ count = spirit_fifo_get_rxcount(spirit); wlinfo("Receiving %u bytes (%u so far)\n", count, count + offset); @@ -1665,7 +1665,7 @@ static void spirit_txtimeout_work(FAR void *arg) wlwarn("WARNING: TX Timeout. state=%u\n", priv->state); /* Are we in the sending state? If not, then this must be a spurious - * timout. + * timeout. */ if (priv->state == DRIVER_STATE_SENDING) @@ -1844,7 +1844,7 @@ static void spirit_txpoll_expiry(int argc, wdparm_t arg, ...) * * Assumptions: * Called from the network layer and running on the LP working thread. - * This interracts with the spirit hardware, but does so while the network + * This interacts with the spirit hardware, but does so while the network * is down and with Spirit interrupts disabled. * ****************************************************************************/ @@ -1961,7 +1961,7 @@ error_with_ifalmostup: * * Assumptions: * Called from the network layer and running on the LP working thread. - * This interracts with the spirit hardware, but does so with Spirit + * This interacts with the spirit hardware, but does so with Spirit * interrupts disabled. * ****************************************************************************/ @@ -2320,7 +2320,7 @@ static int spirit_req_data(FAR struct radio_driver_s *netdev, * the we got from the network, be we will copy it so that we can * control the life of the container. * - * REVISIT: To bad we cound not just simply allocate the structure + * REVISIT: To bad we could not just simply allocate the structure * on the network side. But that behavior is incompatible with how * IEEE 802.15.4 works. */ @@ -2362,7 +2362,7 @@ static int spirit_req_data(FAR struct radio_driver_s *netdev, spirit_txunlock(priv); /* If are no transmissions or receptions in progress, then schedule - * tranmission of the frame in the IOB at the head of the IOB queue. + * transmission of the frame in the IOB at the head of the IOB queue. */ spirit_schedule_transmit_work(priv); @@ -2382,7 +2382,7 @@ static int spirit_req_data(FAR struct radio_driver_s *netdev, * * Input Parameters: * netdev - The network device to be queried - * properties - Location where radio properities will be returned. + * properties - Location where radio properties will be returned. * * Returned Value: * Zero (OK) returned on success; a negated errno value is returned on @@ -2475,7 +2475,7 @@ int spirit_hw_initialize(FAR struct spirit_driver_s *priv, /* Perform VCO calibration WA when the radio is initialized */ - wlinfo("Peform VCO calibration\n"); + wlinfo("Perform VCO calibration\n"); spirit_radio_enable_wavco_calibration(spirit, S_ENABLE); /* Configure the Spirit1 radio part */ diff --git a/drivers/wireless/spirit/include/spirit_aes.h b/drivers/wireless/spirit/include/spirit_aes.h index c54f94ef69e..d82d3f829e0 100644 --- a/drivers/wireless/spirit/include/spirit_aes.h +++ b/drivers/wireless/spirit/include/spirit_aes.h @@ -154,7 +154,7 @@ int spirit_aes_write_datain(FAR struct spirit_library_s *spirit, * Name: spirit_aes_read_dataout * * Description: - * Returns the encrypted or decrypted data or the decription key from the + * Returns the encrypted or decrypted data or the description key from the * AES_DATA_OUT register. * * Input Parameters: diff --git a/drivers/wireless/spirit/include/spirit_pktstack.h b/drivers/wireless/spirit/include/spirit_pktstack.h index 10b038a5f52..e2a661cc967 100644 --- a/drivers/wireless/spirit/include/spirit_pktstack.h +++ b/drivers/wireless/spirit/include/spirit_pktstack.h @@ -462,7 +462,7 @@ uint16_t spirit_pktstack_get_rxpktlen(FAR struct spirit_library_s *spirit); * NOTE: This filtering control is enabled by default but the source * address mask is by default set to 0. As a matter of fact the user has * to enable the source filtering bit after the packet initialization - * because the packet initialiazation routine disables it. + * because the packet initialization routine disables it. * * Input Parameters: * spirit - Reference to a Spirit library state structure instance diff --git a/drivers/wireless/spirit/include/spirit_radio.h b/drivers/wireless/spirit/include/spirit_radio.h index 60ef1e5d37f..388c83ada15 100644 --- a/drivers/wireless/spirit/include/spirit_radio.h +++ b/drivers/wireless/spirit/include/spirit_radio.h @@ -313,8 +313,8 @@ enum spirit_agcmode_e enum spirit_clkrecmode_e { - CLK_REC_PLL = FDEV0_CLOCK_REG_ALGO_SEL_PLL, /* PLL alogrithm for clock recovery */ - CLK_REC_DLL = FDEV0_CLOCK_REG_ALGO_SEL_DLL /* DLL alogrithm for clock recovery */ + CLK_REC_PLL = FDEV0_CLOCK_REG_ALGO_SEL_PLL, /* PLL algorithm for clock recovery */ + CLK_REC_DLL = FDEV0_CLOCK_REG_ALGO_SEL_DLL /* DLL algorithm for clock recovery */ }; /* SPIRIT Postfilter length */ @@ -706,7 +706,7 @@ int spirit_radio_set_basefrequency(FAR struct spirit_library_s *spirit, * Name: spirit_radio_enable_wavco_calibration * * Description: - * Enable/disabe the VCO calibration WA at the end of + * Enable/disable the VCO calibration WA at the end of * spirit_radio_set_basefrequency() * * Input Parameters: @@ -837,7 +837,7 @@ int spirit_radio_convert_freqdev(FAR struct spirit_library_s *spirit, * [100 500000]. * * Returned Value: - * Zero (OK) is returned on succes; a negated errnor value is returned on any + * Zero (OK) is returned on success; a negated errnor value is returned on any * failure. * ******************************************************************************/ @@ -873,7 +873,7 @@ uint32_t spirit_radio_get_datarate(FAR struct spirit_library_s *spirit); * is in the correct range [F_Xo*8/2^18, F_Xo*7680/2^18] Hz. * * Returned Value: - * Zero (OK) is returned on succes; a negated errnor value is returned on any + * Zero (OK) is returned on success; a negated errnor value is returned on any * failure. * ******************************************************************************/ @@ -914,7 +914,7 @@ uint32_t spirit_radio_get_freqdev(FAR struct spirit_library_s *spirit); * spirit_radio_get_chfilterbw() API. * * Returned Value: - * Zero (OK) is returned on succes; a negated errnor value is returned on any + * Zero (OK) is returned on success; a negated errnor value is returned on any * failure. * ******************************************************************************/ @@ -949,7 +949,7 @@ uint32_t spirit_radio_get_chfilterbw(FAR struct spirit_library_s *spirit); * modulation - Modulation to set. * * Returned Value: - * Zero (OK) is returned on succes; a negated errnor value is returned on any + * Zero (OK) is returned on success; a negated errnor value is returned on any * failure. * ******************************************************************************/ @@ -986,7 +986,7 @@ enum modulation_select_e * or S_DISABLE . * * Returned Value: - * Zero (OK) is returned on succes; a negated errnor value is returned on any + * Zero (OK) is returned on success; a negated errnor value is returned on any * failure. * ******************************************************************************/ @@ -1005,7 +1005,7 @@ int spirit_radio_enable_cwtxmode(FAR struct spirit_library_s *spirit, * ookdelay - Peak decay control for OOK. * * Returned Value: - * Zero (OK) is returned on succes; a negated errnor value is returned on any + * Zero (OK) is returned on success; a negated errnor value is returned on any * failure. * ******************************************************************************/ @@ -2031,8 +2031,8 @@ uint8_t spirit_radio_get_agclowthres(FAR struct spirit_library_s *spirit); * mode - The Clock Recovery mode. This value can be one of the values * defined in enum spirit_clkrecmode_e : * - * CLK_REC_PLL PLL alogrithm for clock recovery - * CLK_REC_DLL DLL alogrithm for clock recovery + * CLK_REC_PLL PLL algorithm for clock recovery + * CLK_REC_DLL DLL algorithm for clock recovery * * Returned Value: * Zero (OK) on success. A negated errno value is returned on any failure. @@ -2055,8 +2055,8 @@ int spirit_radio_set_clkrecmode(FAR struct spirit_library_s *spirit, * Clock Recovery mode. This value can be one of the values defined in * enum spirit_clkrecmode_e: * - * CLK_REC_PLL PLL alogrithm for clock recovery - * CLK_REC_DLL DLL alogrithm for clock recovery + * CLK_REC_PLL PLL algorithm for clock recovery + * CLK_REC_DLL DLL algorithm for clock recovery * ******************************************************************************/ diff --git a/drivers/wireless/spirit/include/spirit_regs.h b/drivers/wireless/spirit/include/spirit_regs.h index e6e4246b22f..338c9edbfce 100644 --- a/drivers/wireless/spirit/include/spirit_regs.h +++ b/drivers/wireless/spirit/include/spirit_regs.h @@ -312,7 +312,7 @@ * 13 | 1/96 * 14 | 1/128 * 15 | 1/256 - * 0 RCO_RATIO: Specifies the divsion ratio when RC oscillator is the clock source + * 0 RCO_RATIO: Specifies the division ratio when RC oscillator is the clock source * 0 - Division Ratio equal to 0 * 1 - Division Ratio equal to 1/128 */ @@ -713,16 +713,16 @@ #define FDEV0_BASE ((uint8_t)0x1c) /* Sets the Mantissa and exponent of * frequency deviation (frequency * separation/2) and PLL or DLL - * alogrithm from clock + * algorithm from clock * recovery in RX digital demod */ #define FDEV0_CLOCK_REG_ALGO_SEL_MASK ((uint8_t)0x08) /* Can be DLL or PLL algorithm for * clock recovery in RX digital demod * (see CLOCKREC reg) */ -#define FDEV0_CLOCK_REG_ALGO_SEL_PLL ((uint8_t)0x00) /* Sets PLL alogrithm for clock +#define FDEV0_CLOCK_REG_ALGO_SEL_PLL ((uint8_t)0x00) /* Sets PLL algorithm for clock * recovery in RX digital demod (see * CLOCKREC reg) */ -#define FDEV0_CLOCK_REG_ALGO_SEL_DLL ((uint8_t)0x08) /* Sets DLL alogrithm for clock +#define FDEV0_CLOCK_REG_ALGO_SEL_DLL ((uint8_t)0x08) /* Sets DLL algorithm for clock * recovery in RX digital demod (see * CLOCKREC reg) */ @@ -941,7 +941,7 @@ #define AGCCTRL2_FREEZE_ON_STEADY_MASK ((uint8_t)0x40) /* The attenuation settings will be * frozen as soon as signal level is - * betweeen min and max threshold (see + * between min and max threshold (see * AGCCTRL1) */ #define AGCCTRL2_FREEZE_ON_SYNC_MASK ((uint8_t)0x20) /* The attenuation settings will be * frozen as soon sync word is detected */ @@ -1024,7 +1024,7 @@ * 2:0 control_len[2:0]: length of control field in bytes */ -#define PCKTCTRL4_BASE ((uint8_t)0x30) /* lenghts of address and control field */ +#define PCKTCTRL4_BASE ((uint8_t)0x30) /* lengths of address and control field */ #define PCKTCTRL4_ADDRESS_LEN_MASK ((uint8_t)0x18) #define PCKTCTRL4_CONTROL_LEN_MASK ((uint8_t)0x07) diff --git a/drivers/wireless/spirit/include/spirit_spi.h b/drivers/wireless/spirit/include/spirit_spi.h index 6d7a2be9c1f..eb7e3c7b4a6 100644 --- a/drivers/wireless/spirit/include/spirit_spi.h +++ b/drivers/wireless/spirit/include/spirit_spi.h @@ -133,7 +133,7 @@ int spirit_reg_write(FAR struct spirit_library_s *spirit, uint8_t regaddr, * spirit - Reference to an instance of the driver state structure. * regaddr - Base register's address to write * clrbits - Bits to clear in the register - * setbits - Bits to set in the regiser + * setbits - Bits to set in the register * * Returned Value: * Zero (OK) is returned on success. A negated errno value is returned on diff --git a/drivers/wireless/spirit/include/spirit_types.h b/drivers/wireless/spirit/include/spirit_types.h index 3aa92901f13..161bc34c154 100644 --- a/drivers/wireless/spirit/include/spirit_types.h +++ b/drivers/wireless/spirit/include/spirit_types.h @@ -163,7 +163,7 @@ struct spirit_library_s } u; uint8_t commstate; /* MANAGEMENT: Communication state */ - uint8_t vcocalib; /* RADIO: Enalbe VCO calibration WA */ + uint8_t vcocalib; /* RADIO: Enable VCO calibration WA */ }; #ifdef __cplusplus diff --git a/drivers/wireless/spirit/lib/spirit_aes.c b/drivers/wireless/spirit/lib/spirit_aes.c index b60ecc4b20b..ee87e0348bf 100644 --- a/drivers/wireless/spirit/lib/spirit_aes.c +++ b/drivers/wireless/spirit/lib/spirit_aes.c @@ -152,7 +152,7 @@ int spirit_aes_write_datain(FAR struct spirit_library_s *spirit, * Name: spirit_aes_read_dataout * * Description: - * Returns the encrypted or decrypted data or the decription key from the + * Returns the encrypted or decrypted data or the description key from the * AES_DATA_OUT register. * * Input Parameters: diff --git a/drivers/wireless/spirit/lib/spirit_csma.c b/drivers/wireless/spirit/lib/spirit_csma.c index 9ced0497534..4a0a04d5a2e 100644 --- a/drivers/wireless/spirit/lib/spirit_csma.c +++ b/drivers/wireless/spirit/lib/spirit_csma.c @@ -323,7 +323,7 @@ int spirit_csma_set_persistentmode(FAR struct spirit_library_s *spirit, regval &= ~PROTOCOL1_CSMA_PERS_ON_MASK; } - /* Write the new vaue on the PROTOCOL1 register */ + /* Write the new value on the PROTOCOL1 register */ ret = spirit_reg_write(spirit, PROTOCOL1_BASE, ®val, 1); } diff --git a/drivers/wireless/spirit/lib/spirit_pktstack.c b/drivers/wireless/spirit/lib/spirit_pktstack.c index ad37e85b876..053f8671041 100644 --- a/drivers/wireless/spirit/lib/spirit_pktstack.c +++ b/drivers/wireless/spirit/lib/spirit_pktstack.c @@ -875,7 +875,7 @@ uint16_t spirit_pktstack_get_rxpktlen(FAR struct spirit_library_s *spirit) * NOTE: This filtering control is enabled by default but the source * address mask is by default set to 0. As a matter of fact the user has * to enable the source filtering bit after the packet initialization - * because the packet initialiazation routine disables it. + * because the packet initialization routine disables it. * * Input Parameters: * spirit - Reference to a Spirit library state structure instance diff --git a/drivers/wireless/spirit/lib/spirit_radio.c b/drivers/wireless/spirit/lib/spirit_radio.c index 995a03884e3..621f749f941 100644 --- a/drivers/wireless/spirit/lib/spirit_radio.c +++ b/drivers/wireless/spirit/lib/spirit_radio.c @@ -1398,7 +1398,7 @@ int spirit_radio_set_basefrequency(FAR struct spirit_library_s *spirit, * Name: spirit_radio_enable_wavco_calibration * * Description: - * Enable/disabe the VCO calibration WA at the end of + * Enable/disable the VCO calibration WA at the end of * spirit_radio_set_basefrequency() * * Input Parameters: @@ -1749,7 +1749,7 @@ int spirit_radio_convert_freqdev(FAR struct spirit_library_s *spirit, * [100 500000]. * * Returned Value: - * Zero (OK) is returned on succes; a negated errnor value is returned on any + * Zero (OK) is returned on success; a negated errnor value is returned on any * failure. * ******************************************************************************/ @@ -1830,7 +1830,7 @@ uint32_t spirit_radio_get_datarate(FAR struct spirit_library_s *spirit) * is in the correct range [F_Xo*8/2^18, F_Xo*7680/2^18] Hz. * * Returned Value: - * Zero (OK) is returned on succes; a negated errnor value is returned on any + * Zero (OK) is returned on success; a negated errnor value is returned on any * failure. * ******************************************************************************/ @@ -1924,7 +1924,7 @@ uint32_t spirit_radio_get_freqdev(FAR struct spirit_library_s *spirit) * spirit_radio_get_chfilterbw() API. * * Returned Value: - * Zero (OK) is returned on succes; a negated errnor value is returned on any + * Zero (OK) is returned on success; a negated errnor value is returned on any * failure. * ******************************************************************************/ @@ -2006,7 +2006,7 @@ uint32_t spirit_radio_get_chfilterbw(FAR struct spirit_library_s *spirit) * modulation - Modulation to set. * * Returned Value: - * Zero (OK) is returned on succes; a negated errnor value is returned on any + * Zero (OK) is returned on success; a negated errnor value is returned on any * failure. * ******************************************************************************/ @@ -2074,7 +2074,7 @@ enum modulation_select_e * or S_DISABLE . * * Returned Value: - * Zero (OK) is returned on succes; a negated errnor value is returned on any + * Zero (OK) is returned on success; a negated errnor value is returned on any * failure. * ******************************************************************************/ @@ -2122,7 +2122,7 @@ int spirit_radio_enable_cwtxmode(FAR struct spirit_library_s *spirit, * ookdelay - Peak decay control for OOK. * * Returned Value: - * Zero (OK) is returned on succes; a negated errnor value is returned on any + * Zero (OK) is returned on success; a negated errnor value is returned on any * failure. * ******************************************************************************/ @@ -4246,8 +4246,8 @@ uint8_t spirit_radio_get_agclowthres(FAR struct spirit_library_s *spirit) * mode - The Clock Recovery mode. This value can be one of the values * defined in enum spirit_clkrecmode_e : * - * CLK_REC_PLL PLL alogrithm for clock recovery - * CLK_REC_DLL DLL alogrithm for clock recovery + * CLK_REC_PLL PLL algorithm for clock recovery + * CLK_REC_DLL DLL algorithm for clock recovery * * Returned Value: * Zero (OK) on success. A negated errno value is returned on any failure. @@ -4290,8 +4290,8 @@ int spirit_radio_set_clkrecmode(FAR struct spirit_library_s *spirit, * Clock Recovery mode. This value can be one of the values defined in * enum spirit_clkrecmode_e: * - * CLK_REC_PLL PLL alogrithm for clock recovery - * CLK_REC_DLL DLL alogrithm for clock recovery + * CLK_REC_PLL PLL algorithm for clock recovery + * CLK_REC_DLL DLL algorithm for clock recovery * ******************************************************************************/ diff --git a/drivers/wireless/spirit/lib/spirit_spi.c b/drivers/wireless/spirit/lib/spirit_spi.c index 1e1659ebb6c..f4f1238ca3e 100644 --- a/drivers/wireless/spirit/lib/spirit_spi.c +++ b/drivers/wireless/spirit/lib/spirit_spi.c @@ -367,7 +367,7 @@ int spirit_reg_write(FAR struct spirit_library_s *spirit, uint8_t regaddr, * spirit - Reference to an instance of the driver state structure. * regaddr - Base register's address to write * clrbits - Bits to clear in the register - * setbits - Bits to set in the regiser + * setbits - Bits to set in the register * * Returned Value: * Zero (OK) is returned on success. A negated errno value is returned on diff --git a/drivers/wireless/spirit/lib/spirit_timer.c b/drivers/wireless/spirit/lib/spirit_timer.c index c5bd86eab8e..18edb181fbd 100644 --- a/drivers/wireless/spirit/lib/spirit_timer.c +++ b/drivers/wireless/spirit/lib/spirit_timer.c @@ -129,7 +129,7 @@ int spirit_timer_enable_autoreload(FAR struct spirit_library_s *spirit, ret = spirit_reg_read(spirit, PROTOCOL1_BASE, ®val, 1); if (ret >= 0) { - /* Mask te read value to enable or disable the reload on sync mode */ + /* Mask the read value to enable or disable the reload on sync mode */ if (newstate == S_ENABLE) { diff --git a/fs/dirent/fs_seekdir.c b/fs/dirent/fs_seekdir.c index 896658b690b..f608edec325 100644 --- a/fs/dirent/fs_seekdir.c +++ b/fs/dirent/fs_seekdir.c @@ -64,7 +64,7 @@ static inline void seekpseudodir(struct fs_dirent_s *idir, off_t offset) /* Determine a starting point for the seek. If the seek * is "forward" from the current position, then we will - * start at the current poisition. Otherwise, we will + * start at the current position. Otherwise, we will * "rewind" to the root dir. */ @@ -121,7 +121,7 @@ static inline void seekmountptdir(struct fs_dirent_s *idir, off_t offset) /* Determine a starting point for the seek. If the seek * is "forward" from the current position, then we will - * start at the current poisition. Otherwise, we will + * start at the current position. Otherwise, we will * "rewind" to the root dir. */ diff --git a/fs/driver/Make.defs b/fs/driver/Make.defs index ad137428a72..0442d486ac3 100644 --- a/fs/driver/Make.defs +++ b/fs/driver/Make.defs @@ -35,7 +35,7 @@ CSRCS += fs_registerdriver.c fs_unregisterdriver.c -# Don't build-in block driver support if there are no mountpoints +# Don't built-in block driver support if there are no mountpoints ifneq ($(CONFIG_DISABLE_MOUNTPOINT),y) CSRCS += fs_registerblockdriver.c fs_unregisterblockdriver.c diff --git a/fs/driver/driver.h b/fs/driver/driver.h index fc409129c4a..c7202bc875f 100644 --- a/fs/driver/driver.h +++ b/fs/driver/driver.h @@ -109,7 +109,7 @@ int find_blockdriver(FAR const char *pathname, int mountflags, * * Errors that may be returned: * - * ENOMEM - Failed to create a temporay path name. + * ENOMEM - Failed to create a temporary path name. * * Plus: * @@ -142,7 +142,7 @@ int block_proxy(FAR const char *blkdev, int oflags); * * Errors that may be returned: * - * ENOMEM - Failed to create a temporay path name. + * ENOMEM - Failed to create a temporary path name. * * Plus: * diff --git a/fs/driver/fs_blockproxy.c b/fs/driver/fs_blockproxy.c index 6fd0f53031f..83a8e26e1be 100644 --- a/fs/driver/fs_blockproxy.c +++ b/fs/driver/fs_blockproxy.c @@ -148,7 +148,7 @@ static FAR char *unique_chardev(void) * * Errors that may be returned: * - * ENOMEM - Failed to create a temporay path name. + * ENOMEM - Failed to create a temporary path name. * * Plus: * diff --git a/fs/driver/fs_mtdproxy.c b/fs/driver/fs_mtdproxy.c index 0eab9da597f..df51277cd4a 100644 --- a/fs/driver/fs_mtdproxy.c +++ b/fs/driver/fs_mtdproxy.c @@ -145,7 +145,7 @@ static FAR char *unique_blkdev(void) * * Errors that may be returned: * - * ENOMEM - Failed to create a temporay path name. + * ENOMEM - Failed to create a temporary path name. * * Plus: * diff --git a/fs/fat/Kconfig b/fs/fat/Kconfig index a6c2459dfe5..51610e27f5f 100644 --- a/fs/fat/Kconfig +++ b/fs/fat/Kconfig @@ -110,7 +110,7 @@ config FAT_FORCE_INDIRECT from mixed locations, some of which are DMA-able and some of which are not. But CONFIG_FAT_FORCE_INDIRECT could be used without CONFIG_FAT_DMAMEMORY if there is, for example, only a - memory aligment constraints. + memory alignment constraints. FORCE_ DMA DIRECT EXAMPLE USAGE INDIRECT MEMORY RETRY @@ -184,7 +184,7 @@ config FAT_DIRECT_RETRY The lower level SDIO driver may have, certain requirements on the memory buffer in order to perform the transfer. Perhaps special DMA memory should be used (with CONFIG_FAT_DMAMEMORY) or perhaps - some special memory alignment is required to interace with the + some special memory alignment is required to interface with the hardware. If this option is selected, then the FAT file system will first diff --git a/fs/fat/fs_fat32.c b/fs/fat/fs_fat32.c index 400f90a8880..9aac5e54bd6 100644 --- a/fs/fat/fs_fat32.c +++ b/fs/fat/fs_fat32.c @@ -1104,7 +1104,7 @@ static off_t fat_seek(FAR struct file *filep, off_t offset, int whence) goto errout_with_semaphore; } - /* Attempts to set the position beyound the end of file will + /* Attempts to set the position beyond the end of file will * work if the file is open for write access. */ diff --git a/fs/fat/fs_fat32.h b/fs/fat/fs_fat32.h index 6da8fc85e22..56ed75f8412 100644 --- a/fs/fat/fs_fat32.h +++ b/fs/fat/fs_fat32.h @@ -242,7 +242,7 @@ */ #define DIR_NAME 0 /* 11@ 0: NAME: 8 bytes + 3 byte extension */ -#define DIR_ATTRIBUTES 11 /* 1@11: File attibutes (see below) */ +#define DIR_ATTRIBUTES 11 /* 1@11: File attributes (see below) */ #define DIR_NTRES 12 /* 1@12: Reserved for use by NT */ #define DIR_CRTTIMETENTH 13 /* 1@13: Tenth sec creation timestamp */ #define DIR_CRTIME 14 /* 2@14: Time file created */ @@ -371,7 +371,7 @@ #define FAT_BAD 0x0ffffff7 /**************************************************************************** - * Maximum cluster by FAT type. This is the key value used to distinquish + * Maximum cluster by FAT type. This is the key value used to distinguish * between FAT12, 16, and 32. */ @@ -847,7 +847,7 @@ * * Some hardware, however, may require special DMA-capable memory in * order to perform the transfers. If CONFIG_FAT_DMAMEMORY is defined - * then the architecture-specific hardware must provide the funtions + * then the architecture-specific hardware must provide the functions * fat_dma_alloc() and fat_dma_free() as prototyped below: fat_dmalloc() * will allocate DMA-capable memory of the specified size; fat_dmafree() * is the corresponding function that will be called to free the DMA- @@ -926,7 +926,7 @@ struct fat_file_s /* This structure holds the sequence of directory entries used by one * file element (directory or file). For short file names, this is - * single diretory entry. But for long file names, the is a sequence + * single directory entry. But for long file names, the is a sequence * of directory entries. Long directory name entries appear in reverse * order: Last, next-to-last, ..., first. The "first" long file name * directory is then following by the short directory name entry. The diff --git a/fs/fat/fs_fat32dirent.c b/fs/fat/fs_fat32dirent.c index 98ec9c205fa..ba1cd327ef8 100644 --- a/fs/fat/fs_fat32dirent.c +++ b/fs/fat/fs_fat32dirent.c @@ -557,7 +557,7 @@ errout: * 2. All dots except the last deleted * 3. First 6 (uppercase) characters used as a base * 4. Then ~1. The number is increased if the file already exists in the - * directory. If the number exeeds >10, then character stripped off the + * directory. If the number exceeds >10, then character stripped off the * base. * 5. The extension is the first 3 uppercase chars of extension. * @@ -1084,7 +1084,7 @@ static int fat_findsfnentry(struct fat_mountpt_s *fs, * Name: fat_cmplfnchunk * * Description: There are 13 characters per LFN entry, broken up into three - * chunks for characts 1-5, 6-11, and 12-13. This function will perform + * chunks for characters 1-5, 6-11, and 12-13. This function will perform * the comparison of a single chunk. * ****************************************************************************/ @@ -1376,7 +1376,7 @@ static inline int fat_findlfnentry(struct fat_mountpt_s *fs, } /* Bad news.. reset and continue with this entry (which is - * probably not an LFN entry unless the file systen is + * probably not an LFN entry unless the file system is * seriously corrupted. */ @@ -1679,7 +1679,7 @@ static inline int fat_getsfname(uint8_t *direntry, char *buffer, /* In this version, we never write 0xe5 in the directory filenames * (because we do not handle any character sets where 0xe5 is valid - * in a filaname), but we could encounted this in a filesystem + * in a filaname), but we could eencounter this in a filesystem * written by some other system */ @@ -1760,7 +1760,7 @@ static inline int fat_getsfname(uint8_t *direntry, char *buffer, * Name: fat_getlfnchunk * * Description: There are 13 characters per LFN entry, broken up into three - * chunks for characts 1-5, 6-11, and 12-13. This function will get the + * chunks for characters 1-5, 6-11, and 12-13. This function will get the * file name characters from one chunk. * ****************************************************************************/ @@ -1977,7 +1977,7 @@ static int fat_putsfname(struct fat_mountpt_s *fs, struct fat_dirinfo_s *dirinfo * Name: fat_initlfname * * Description: There are 13 characters per LFN entry, broken up into three - * chunks for characts 1-5, 6-11, and 12-13. This function will put the + * chunks for characters 1-5, 6-11, and 12-13. This function will put the * 0xffff characters into one chunk. * ****************************************************************************/ @@ -2003,7 +2003,7 @@ static void fat_initlfname(uint8_t *chunk, int nchunk) * Name: fat_putlfnchunk * * Description: There are 13 characters per LFN entry, broken up into three - * chunks for characts 1-5, 6-11, and 12-13. This function will put the + * chunks for characters 1-5, 6-11, and 12-13. This function will put the * file name characters into one chunk. * ****************************************************************************/ @@ -2394,7 +2394,7 @@ int fat_finddirentry(struct fat_mountpt_s *fs, struct fat_dirinfo_s *dirinfo, if (ret < 0) { - /* A return value of -ENOENT would mean that the path segement + /* A return value of -ENOENT would mean that the path segment * was not found. Let's distinguish two cases: (1) the final * file was not found in the directory (-ENOENT), or (2) one * of the directory path segments does not exist (-ENOTDIR) @@ -2955,7 +2955,7 @@ int fat_remove(struct fat_mountpt_s *fs, const char *relpath, bool directory) subdirindex = (dirinfo.dir.fd_index & DIRSEC_NDXMASK(fs)) * DIR_SIZE; subdirentry = &fs->fs_buffer[subdirindex]; - /* Is this the last entry in the direcory? */ + /* Is this the last entry in the directory? */ if (subdirentry[DIR_NAME] == DIR0_ALLEMPTY) { diff --git a/fs/fat/fs_fat32util.c b/fs/fat/fs_fat32util.c index 859d353965a..a8fdd5c951b 100644 --- a/fs/fat/fs_fat32util.c +++ b/fs/fat/fs_fat32util.c @@ -319,7 +319,7 @@ void fat_putuint16(FAR uint8_t *ptr, uint16_t value16) #ifdef CONFIG_ENDIAN_BIG /* If the target is big-endian then the bytes always have to be swapped so - * that the representation is litle endian in the file system. + * that the representation is little endian in the file system. */ ptr[0] = val[1]; @@ -345,7 +345,7 @@ void fat_putuint32(FAR uint8_t *ptr, uint32_t value32) #ifdef CONFIG_ENDIAN_BIG /* If the target is big-endian then the bytes always have to be swapped so - * that the representation is litle endian in the file system. + * that the representation is little endian in the file system. */ fat_putuint16(&ptr[0], val[1]); diff --git a/fs/inode/fs_files.c b/fs/inode/fs_files.c index 342de6f563e..c4dc840fff4 100644 --- a/fs/inode/fs_files.c +++ b/fs/inode/fs_files.c @@ -77,7 +77,7 @@ static void _files_semtake(FAR struct filelist *list) * Description: * Close an inode (if open) * - * Assumuptions: + * Assumptions: * Caller holds the list semaphore because the file descriptor will be freed. * ****************************************************************************/ @@ -337,7 +337,7 @@ int files_allocate(FAR struct inode *inode, int oflags, off_t pos, int minfd) * Description: * Close an inode (if open) * - * Assumuptions: + * Assumptions: * Caller holds the list semaphore because the file descriptor will be freed. * ****************************************************************************/ @@ -372,7 +372,7 @@ int files_close(int fd) /**************************************************************************** * Name: files_release * - * Assumuptions: + * Assumptions: * Similar to files_close(). Called only from open() logic on error * conditions. * diff --git a/fs/inode/fs_inodesearch.c b/fs/inode/fs_inodesearch.c index 8740d368759..c525478022c 100644 --- a/fs/inode/fs_inodesearch.c +++ b/fs/inode/fs_inodesearch.c @@ -244,7 +244,7 @@ static int _inode_search(FAR struct inode_search_s *desc) int ret = -ENOENT; /* Get the search path, skipping over the leading '/'. The leading '/' is - * mandatory because only absolte paths are expected in this context. + * mandatory because only absolute paths are expected in this context. */ DEBUGASSERT(desc != NULL && desc->path != NULL); diff --git a/fs/inode/inode.h b/fs/inode/inode.h index ae1ef0ce48e..46f991db263 100644 --- a/fs/inode/inode.h +++ b/fs/inode/inode.h @@ -406,7 +406,7 @@ int files_allocate(FAR struct inode *inode, int oflags, off_t pos, int minfd); * Description: * Close an inode (if open) * - * Assumuptions: + * Assumptions: * Caller holds the list semaphore because the file descriptor will be freed. * ****************************************************************************/ @@ -416,7 +416,7 @@ int files_close(int fd); /**************************************************************************** * Name: files_release * - * Assumuptions: + * Assumptions: * Similar to files_close(). Called only from open() logic on error * conditions. * diff --git a/fs/littlefs/SPEC.md b/fs/littlefs/SPEC.md index 2a1f9eca8b0..202f50cf278 100644 --- a/fs/littlefs/SPEC.md +++ b/fs/littlefs/SPEC.md @@ -309,7 +309,7 @@ Here's an example of a file entry: (32 bits) file size = 256 KB (0x00040000) (12 bytes) name = largeavacado -00000000: 11 08 00 0c 1f 02 00 00 00 00 04 00 6c 61 72 67 ............larg +00000000: 11 08 00 0c 1f 02 00 00 00 00 04 00 6c 61 72 67 ............large 00000010: 65 61 76 61 63 61 64 6f eavacado ``` diff --git a/fs/mqueue/mq_close.c b/fs/mqueue/mq_close.c index d0c390748e5..95b7b39ab92 100644 --- a/fs/mqueue/mq_close.c +++ b/fs/mqueue/mq_close.c @@ -146,7 +146,7 @@ int mq_close(mqd_t mqdes) FAR struct tcb_s *rtcb = (FAR struct tcb_s *)sched_self(); int ret; - /* Lock the scheduler to prevent any asynchrounous task delete operation + /* Lock the scheduler to prevent any asynchronous task delete operation * (unlikely). */ diff --git a/fs/nfs/nfs_proto.h b/fs/nfs/nfs_proto.h index da9495a163a..185dc6ed447 100644 --- a/fs/nfs/nfs_proto.h +++ b/fs/nfs/nfs_proto.h @@ -547,7 +547,7 @@ struct READDIR3args * * File ID (8 bytes) * Name length (4 bytes) - * Name string (varaiable size but in multiples of 4 bytes) + * Name string (variable size but in multiples of 4 bytes) * Cookie (8 bytes) * next entry (4 bytes) */ diff --git a/fs/nfs/nfs_vfsops.c b/fs/nfs/nfs_vfsops.c index 9c1bbcb8ce8..f9c55d4303c 100644 --- a/fs/nfs/nfs_vfsops.c +++ b/fs/nfs/nfs_vfsops.c @@ -739,7 +739,7 @@ static int nfs_close(FAR struct file *filep) * free up all resources associated with the open file. * * First, find our file structure in the list of file structures - * containted in the mount structure. + * contained in the mount structure. */ else @@ -1566,7 +1566,7 @@ static int nfs_readdir(struct inode *mountpt, struct fs_dirent_s *dir) * * File ID (8 bytes) * Name length (4 bytes) - * Name string (varaiable size but in multiples of 4 bytes) + * Name string (variable size but in multiples of 4 bytes) * Cookie (8 bytes) * next entry (4 bytes) */ @@ -1659,7 +1659,7 @@ errout_with_semaphore: * Name: nfs_rewinddir * * Description: - * Reset the directory traveral logic to the first entry in the open + * Reset the directory traversal logic to the first entry in the open * directory. * * Returned Value: diff --git a/fs/nxffs/nxffs.h b/fs/nxffs/nxffs.h index d1338fac34f..dcdea7b58e5 100644 --- a/fs/nxffs/nxffs.h +++ b/fs/nxffs/nxffs.h @@ -156,7 +156,7 @@ /* Values for NXFFS inode state. Similar there are 2 (maybe 3) inode states: * - * INODE_STATE_FILE - The inode is a valid usuable, file + * INODE_STATE_FILE - The inode is a valid usable, file * INODE_STATE_DELETED - The inode has been deleted. * Other values - The inode is bad and has an invalid state. * @@ -921,7 +921,7 @@ int nxffs_wrextend(FAR struct nxffs_volume_s *volume, * On successful return the following are also valid: * * volume->ioblock - Read/write block number of the block containing the - * candidate oject position + * candidate object position * volume->iooffset - The offset in the block to the candidate object * position. * volume->froffset - Updated offset to the first free FLASH block after @@ -949,7 +949,7 @@ int nxffs_wrreserve(FAR struct nxffs_volume_s *volume, size_t size); * following settings (left by nxffs_wrreserve()): * * volume->ioblock - Read/write block number of the block containing the - * candidate oject position + * candidate object position * volume->iooffset - The offset in the block to the candidate object * position. * diff --git a/fs/nxffs/nxffs_open.c b/fs/nxffs/nxffs_open.c index eade23f8743..c08a0548626 100644 --- a/fs/nxffs/nxffs_open.c +++ b/fs/nxffs/nxffs_open.c @@ -1170,7 +1170,7 @@ int nxffs_close(FAR struct file *filep) ret = nxffs_wrclose(volume, (FAR struct nxffs_wrfile_s *)ofile); } - /* Release all resouces held by the open file */ + /* Release all resources held by the open file */ nxffs_freeofile(volume, ofile); } diff --git a/fs/nxffs/nxffs_write.c b/fs/nxffs/nxffs_write.c index 6e5a36ce830..f3007f42b3d 100644 --- a/fs/nxffs/nxffs_write.c +++ b/fs/nxffs/nxffs_write.c @@ -741,7 +741,7 @@ int nxffs_wrextend(FAR struct nxffs_volume_s *volume, * On successful return the following are also valid: * * volume->ioblock - Read/write block number of the block containing the - * candidate oject position + * candidate object position * volume->iooffset - The offset in the block to the candidate object * position. * volume->froffset - Updated offset to the first free FLASH block after @@ -828,7 +828,7 @@ int nxffs_wrreserve(FAR struct nxffs_volume_s *volume, size_t size) * following settings (left by nxffs_wrreserve()): * * volume->ioblock - Read/write block number of the block containing the - * candidate oject position + * candidate object position * volume->iooffset - The offset in the block to the candidate object * position. * diff --git a/fs/procfs/fs_procfs.c b/fs/procfs/fs_procfs.c index 52a262e9403..42914685d8a 100644 --- a/fs/procfs/fs_procfs.c +++ b/fs/procfs/fs_procfs.c @@ -292,7 +292,7 @@ const struct mountpt_operations procfs_operations = }; /* Level 0 contains the directory of active tasks in addition to other - * statically registered entries with custom handlers. This strcture + * statically registered entries with custom handlers. This structure * contains a snapshot of the active tasks when the directory is first * opened. */ diff --git a/fs/procfs/fs_skeleton.c b/fs/procfs/fs_skeleton.c index dcf7c90fae8..16aff0bd105 100644 --- a/fs/procfs/fs_skeleton.c +++ b/fs/procfs/fs_skeleton.c @@ -336,7 +336,7 @@ static int skel_dup(FAR const struct file *oldp, FAR struct file *newp) return -ENOMEM; } - /* The copy the file attribtes from the old attributes to the new */ + /* The copy the file attribute from the old attributes to the new */ memcpy(newpriv, oldpriv, sizeof(struct skel_file_s)); @@ -376,7 +376,7 @@ static int skel_opendir(FAR const char *relpath, FAR struct fs_dirent_s *dir) /* TODO: Initialize context specific data */ - /* Initialze base structure components */ + /* Initialize base structure components */ level1->base.level = 1; level1->base.nentries = 0; @@ -444,7 +444,7 @@ static int skel_readdir(FAR struct fs_dirent_s *dir) ret = -ENOENT; } - /* We are tranversing a subdirectory of task attributes */ + /* We are traversing a subdirectory of task attributes */ else { diff --git a/fs/smartfs/smartfs.h b/fs/smartfs/smartfs.h index fe6fd244f9c..018971dd176 100644 --- a/fs/smartfs/smartfs.h +++ b/fs/smartfs/smartfs.h @@ -138,7 +138,7 @@ * 2. Garbage collection can occur when a new sector is allocated or when * existing sector data is overwritten with new data. Thus, occasionally, * file writing may take longer than other times. - * 3. The implementation curently does not track bad blocks on the device. + * 3. The implementation currently does not track bad blocks on the device. * 4. There is no true wear-leveling implemented yet, though provesion have * been made to reserve logical sectors to allow it to be added using * a "sector aging" tracking mechanism. @@ -146,7 +146,7 @@ /* Values for SMART inode state. * - * SMART_STATE_FILE - The inode is a valid usuable, file + * SMART_STATE_FILE - The inode is a valid usable, file * INODE_STATE_DELETED - The inode has been deleted. * Other values - The inode is bad and has an invalid state. * diff --git a/fs/smartfs/smartfs_procfs.c b/fs/smartfs/smartfs_procfs.c index 7c7eb21499a..10dbe8cb454 100644 --- a/fs/smartfs/smartfs_procfs.c +++ b/fs/smartfs/smartfs_procfs.c @@ -525,7 +525,7 @@ static int smartfs_dup(FAR const struct file *oldp, FAR struct file *newp) return -ENOMEM; } - /* The copy the file attribtes from the old attributes to the new */ + /* The copy the file attribute from the old attributes to the new */ memcpy(newpriv, oldpriv, sizeof(struct smartfs_file_s)); diff --git a/fs/smartfs/smartfs_smart.c b/fs/smartfs/smartfs_smart.c index e9e69054025..93526251354 100644 --- a/fs/smartfs/smartfs_smart.c +++ b/fs/smartfs/smartfs_smart.c @@ -542,7 +542,7 @@ static ssize_t smartfs_read(FAR struct file *filep, char *buffer, size_t buflen) break; } - /* Read the curent sector into our buffer */ + /* Read the current sector into our buffer */ readwrite.logsector = sf->currsector; readwrite.offset = 0; @@ -1671,7 +1671,7 @@ static int smartfs_mkdir(struct inode *mountpt, const char *relpath, mode_t mode if (parentdirsector == 0xffff) { - /* Invalid entry in the path (non-existant dir segment) */ + /* Invalid entry in the path (non-existent dir segment) */ goto errout_with_semaphore; } @@ -1748,7 +1748,7 @@ int smartfs_rmdir(struct inode *mountpt, const char *relpath) /* TODO: Need to check permissions? */ - /* Check if the directory is emtpy */ + /* Check if the directory is empty */ ret = smartfs_countdirentries(fs, &entry); if (ret < 0) diff --git a/fs/spiffs/docs/TECH_SPEC b/fs/spiffs/docs/TECH_SPEC index dcec9797dd6..4b4f582e2e1 100644 --- a/fs/spiffs/docs/TECH_SPEC +++ b/fs/spiffs/docs/TECH_SPEC @@ -113,7 +113,7 @@ Choosing the page size for the system involves many factors: - How fast must spiffs be - Other things impossible to find out -So, chosing the Optimal Page Size (tm) seems tricky, to say the least. Don't +So, choosing the Optimal Page Size (tm) seems tricky, to say the least. Don't fret - there is no optimal page size. This varies from how the target will use spiffs. Use the golden rule: diff --git a/fs/spiffs/src/spiffs_core.h b/fs/spiffs/src/spiffs_core.h index 0b132544054..ca79cee0698 100644 --- a/fs/spiffs/src/spiffs_core.h +++ b/fs/spiffs/src/spiffs_core.h @@ -345,7 +345,7 @@ #define SPIFFS_PH_FLAG_NDXDELE (1<<6) -/* Check objid, only visit matching objec ids */ +/* Check objid, only visit matching object ids */ #define SPIFFS_VIS_CHECK_ID (1<<0) diff --git a/fs/tmpfs/fs_tmpfs.c b/fs/tmpfs/fs_tmpfs.c index 19f36b4bfb6..22332e6435b 100644 --- a/fs/tmpfs/fs_tmpfs.c +++ b/fs/tmpfs/fs_tmpfs.c @@ -993,7 +993,7 @@ static int tmpfs_find_object(FAR struct tmpfs_s *fs, break; } - /* No, this was not the final segement of the relpath. + /* No, this was not the final segment of the relpath. * We cannot continue the search if any of the intermediate * segments do no correspond to directories. */ @@ -1002,7 +1002,7 @@ static int tmpfs_find_object(FAR struct tmpfs_s *fs, return -ENOTDIR; } - /* Search this directory for the next segement. If we + /* Search this directory for the next segment. If we * exit the loop, tdo will still refer to the parent * directory of to. */ @@ -1162,7 +1162,7 @@ static int tmpfs_statfs_callout(FAR struct tmpfs_directory_s *tdo, DEBUGASSERT(to != NULL); - /* Accumulate statistics. Save the total memory allocted for this object. */ + /* Accumulate statistics. Save the total memory allocated for this object. */ tmpbuf->tsf_alloc += to->to_alloc; diff --git a/fs/unionfs/fs_unionfs.c b/fs/unionfs/fs_unionfs.c index c135156ea6c..2f51d7b0a43 100644 --- a/fs/unionfs/fs_unionfs.c +++ b/fs/unionfs/fs_unionfs.c @@ -765,7 +765,7 @@ static int unionfs_unbind_child(FAR struct unionfs_mountpt_s *um) } else if (ret > 0) { - /* REVISIT: This is bad if the file sysem cannot support a deferred + /* REVISIT: This is bad if the file system cannot support a deferred * unmount. Ideally it would perform the unmount when the last file * is closed. But I don't think any file system do that. */ @@ -1834,7 +1834,7 @@ static int unionfs_readdir(struct inode *mountpt, struct fs_dirent_s *dir) { /* There is something there! * REVISIT: We could allow files and directories to - * have duplicat names. + * have duplicate names. */ return -ENOENT; @@ -1902,7 +1902,7 @@ static int unionfs_readdir(struct inode *mountpt, struct fs_dirent_s *dir) { /* There is something there! * REVISIT: We could allow files and directories to - * have duplicat names. + * have duplicate names. */ duplicate = true; diff --git a/fs/userfs/fs_userfs.c b/fs/userfs/fs_userfs.c index 7d01df183da..683635c35ba 100644 --- a/fs/userfs/fs_userfs.c +++ b/fs/userfs/fs_userfs.c @@ -474,7 +474,7 @@ static ssize_t userfs_write(FAR struct file *filep, FAR const char *buffer, if (buflen > priv->mxwrite) { - return -E2BIG; /* No implememented yet */ + return -E2BIG; /* No implemented yet */ } /* Get exclusive access */ diff --git a/fs/vfs/fs_dup.c b/fs/vfs/fs_dup.c index a92621adfbf..a85e8c94407 100644 --- a/fs/vfs/fs_dup.c +++ b/fs/vfs/fs_dup.c @@ -54,7 +54,7 @@ * Name: dup * * Description: - * Clone a file or socket descriptor to an arbitray descriptor number + * Clone a file or socket descriptor to an arbitrary descriptor number * ****************************************************************************/ diff --git a/fs/vfs/fs_dup2.c b/fs/vfs/fs_dup2.c index d7e6a908f92..fdf4511da46 100644 --- a/fs/vfs/fs_dup2.c +++ b/fs/vfs/fs_dup2.c @@ -47,7 +47,7 @@ #include "inode/inode.h" /* This logic in this applies only when both socket and file descriptors are - * in that case, this function descriminates which type of dup2 is being + * in that case, this function discriminates which type of dup2 is being * performed. */ diff --git a/fs/vfs/fs_dupfd.c b/fs/vfs/fs_dupfd.c index 7beac9d4c87..4c440a0084e 100644 --- a/fs/vfs/fs_dupfd.c +++ b/fs/vfs/fs_dupfd.c @@ -103,7 +103,7 @@ int file_dup(FAR struct file *filep, int minfd) * Name: fs_dupfd OR dup * * Description: - * Clone a file descriptor 'fd' to an arbitray descriptor number (any value + * Clone a file descriptor 'fd' to an arbitrary descriptor number (any value * greater than or equal to 'minfd'). If socket descriptors are * implemented, then this is called by dup() for the case of file * descriptors. If socket descriptors are not implemented, then this diff --git a/fs/vfs/fs_fcntl.c b/fs/vfs/fs_fcntl.c index cf52abd4060..084186c5073 100644 --- a/fs/vfs/fs_fcntl.c +++ b/fs/vfs/fs_fcntl.c @@ -65,7 +65,7 @@ * * Input Parameters: * filep - Instance for struct file for the opened file. - * cmd - Indentifies the operation to be performed. + * cmd - Identifies the operation to be performed. * ap - Variable argument following the command. * * Returned Value: diff --git a/fs/vfs/fs_readlink.c b/fs/vfs/fs_readlink.c index 8b287b443ec..23a639befe5 100644 --- a/fs/vfs/fs_readlink.c +++ b/fs/vfs/fs_readlink.c @@ -89,7 +89,7 @@ ssize_t readlink(FAR const char *path, FAR char *buf, size_t bufsize) DEBUGASSERT(path != NULL && buf != NULL && bufsize > 0); - /* Find the inode that includes this path (without derefencing the final) + /* Find the inode that includes this path (without dereferencing the final) * symbolic link node. */ diff --git a/fs/vfs/fs_write.c b/fs/vfs/fs_write.c index 58986b11282..6e9a37962bb 100644 --- a/fs/vfs/fs_write.c +++ b/fs/vfs/fs_write.c @@ -204,7 +204,7 @@ ssize_t nx_write(int fd, FAR const void *buf, size_t nbytes) * buf is outside your accessible address space. * EFBIG * An attempt was made to write a file that exceeds the implementation - * defined maximum file size or the process' file size limit, or + * defined maximum file size or the process's file size limit, or * to write at a position past the maximum allowed offset. * EINTR * The call was interrupted by a signal before any data was written. diff --git a/graphics/Kconfig b/graphics/Kconfig index 5c980874f99..8c2470f502a 100644 --- a/graphics/Kconfig +++ b/graphics/Kconfig @@ -47,7 +47,7 @@ config NX_RAMBACKED default n ---help--- If this option is selected, then windows may be optionally created - with a RAM frambuffer backing up the window content. Rending into + with a RAM framebuffer backing up the window content. Rending into the window will result in rending into the backup framebuffer, then updating the physical display from the framebuffer. diff --git a/graphics/README.txt b/graphics/README.txt index d3ac53da8a7..51f14c73e0e 100644 --- a/graphics/README.txt +++ b/graphics/README.txt @@ -27,7 +27,7 @@ at the present, but here is the longer term roadmap: without NxWidgets and is built on top of NX. NXFONTS - A set of C graphics tools for presenting (bitmap) font images. NX - The tiny NuttX windowing system. This includes the small-footprint - multi-user implentation (NXMU as described below). NX can be used + multi-user implementation (NXMU as described below). NX can be used without NxWidgets and without NXTOOLKIT for raw access to window memory. NXGLIB - Low level graphics utilities and direct framebuffer rendering logic. NX is built on top of NXGLIB. diff --git a/graphics/nxbe/nxbe.h b/graphics/nxbe/nxbe.h index a7dc1e88e26..ecea23c7e1c 100644 --- a/graphics/nxbe/nxbe.h +++ b/graphics/nxbe/nxbe.h @@ -336,7 +336,7 @@ void nxbe_cursor_enable(FAR struct nxbe_state_s *be, bool enable); * Set the cursor image * * The image is provided a a 2-bits-per-pixel image. The two bit incoding - * is as followings: + * is as following: * * 00 - The transparent background * 01 - Color1: The main color of the cursor @@ -389,7 +389,7 @@ void nxbe_cursor_setposition(FAR struct nxbe_state_s *be, * be - The back-end state structure instance, or * wnd - Window state structure * rect - The modified region of the window. In windows coordinates for - * nxbe_cursor_backupdraw(); in graphics device corrdinates for + * nxbe_cursor_backupdraw(); in graphics device coordinates for * nxbe_cursor_backupdraw_dev(). * plane - The plane number to use. * @@ -415,7 +415,7 @@ void nxbe_cursor_backupdraw_dev(FAR struct nxbe_state_s *be, * be - The back-end state structure instance, or * wnd - Window state structure * rect - The modified region of the window. In windows coordinates for - * nxbe_cursor_backupdraw(); in graphics device corrdinates for + * nxbe_cursor_backupdraw(); in graphics device coordinates for * nxbe_cursor_backupdraw_dev(). * * Returned Value: @@ -505,7 +505,7 @@ void nxbe_modal(FAR struct nxbe_window_s *wnd, bool enable); * * Description: * Select if the window is visible or hidden. A hidden window is still - * present will will update normally, but will be on the visiable on the + * present will will update normally, but will be on the visible on the * display until it is unhidden. * * Input Parameters: @@ -692,7 +692,7 @@ void nxbe_bitmap(FAR struct nxbe_window_s *wnd, * Name: nxbe_flush * * Description: - * After per-window frambuffer has been updated, the modified region must + * After per-window framebuffer has been updated, the modified region must * be written to device graphics memory. That function is managed by this * simple function. It does the following: * diff --git a/graphics/nxbe/nxbe_closewindow.c b/graphics/nxbe/nxbe_closewindow.c index 4648b958a5b..8cd6087d578 100644 --- a/graphics/nxbe/nxbe_closewindow.c +++ b/graphics/nxbe/nxbe_closewindow.c @@ -97,7 +97,7 @@ void nxbe_closewindow(FAR struct nxbe_window_s *wnd) NXBE_STATE_CLRMODAL(be); } - /* A hidden window does not exist in the hiearchy */ + /* A hidden window does not exist in the hierarchy */ if (!NXBE_ISHIDDEN(wnd)) { diff --git a/graphics/nxbe/nxbe_cursor.c b/graphics/nxbe/nxbe_cursor.c index 9e3b667a36c..e27148b32bd 100644 --- a/graphics/nxbe/nxbe_cursor.c +++ b/graphics/nxbe/nxbe_cursor.c @@ -114,7 +114,7 @@ void nxbe_cursor_enable(FAR struct nxbe_state_s *be, bool enable) be->cursor.visible = true; /* For a hardware cursor, this would require some interaction with the - * grahics device. + * graphics device. */ # error Missing logic @@ -147,7 +147,7 @@ void nxbe_cursor_enable(FAR struct nxbe_state_s *be, bool enable) } #else /* For a hardware cursor, this would require some interaction with the - * grahics device. + * graphics device. */ # error Missing logic @@ -284,7 +284,7 @@ errout_with_erase: #else /* For a hardware cursor, this would require some interaction with the - * grahics device. + * graphics device. */ # error Missing logic @@ -361,7 +361,7 @@ void nxbe_cursor_setposition(FAR struct nxbe_state_s *be, #else /* For a hardware cursor, this would require some interaction with the - * grahics device. + * graphics device. */ # error Missing logic diff --git a/graphics/nxbe/nxbe_cursor_backupdraw.c b/graphics/nxbe/nxbe_cursor_backupdraw.c index e8dbe4f21f6..a1060cd9d14 100644 --- a/graphics/nxbe/nxbe_cursor_backupdraw.c +++ b/graphics/nxbe/nxbe_cursor_backupdraw.c @@ -157,7 +157,7 @@ void nxbe_cursor_backupdraw(FAR struct nxbe_window_s *wnd, * be - The back-end state structure instance, or * wnd - Window state structure * rect - The modified region of the window. In windows coordinates for - * nxbe_cursor_backupdraw(); in graphics device corrdinates for + * nxbe_cursor_backupdraw(); in graphics device coordinates for * nxbe_cursor_backupdraw_dev(). * * Returned Value: diff --git a/graphics/nxbe/nxbe_fill.c b/graphics/nxbe/nxbe_fill.c index 5cd7566c535..8f941b1e1e2 100644 --- a/graphics/nxbe/nxbe_fill.c +++ b/graphics/nxbe/nxbe_fill.c @@ -168,7 +168,7 @@ static inline void nxbe_fill_pwfb(FAR struct nxbe_window_s *wnd, DEBUGASSERT(wnd->be->plane[0].pwfb.fillrectangle != NULL); - /* The rectangle that we receive here is in abolute device coordinates. We + /* The rectangle that we receive here is in absolute device coordinates. We * need to restore this to windows relative coordinates. */ diff --git a/graphics/nxbe/nxbe_filltrapezoid.c b/graphics/nxbe/nxbe_filltrapezoid.c index 44c68f60b70..e15063638e5 100644 --- a/graphics/nxbe/nxbe_filltrapezoid.c +++ b/graphics/nxbe/nxbe_filltrapezoid.c @@ -151,7 +151,7 @@ static inline void nxbe_filltrapezoid_dev(FAR struct nxbe_window_s *wnd, #endif { /* Rend any part of the trapezoid that is not occluded by a window - * higher in the hiearchy. + * higher in the hierarchy. */ info.color = color[i]; @@ -201,7 +201,7 @@ static inline void nxbe_filltrapezoid_pwfb(FAR struct nxbe_window_s *wnd, struct nxgl_point_s origin; unsigned int bpp; - /* Both the rectangle that we receive here are in abolute device + /* Both the rectangle that we receive here are in absolute device * coordinates. We need to restore both to windows relative coordinates. */ diff --git a/graphics/nxbe/nxbe_flush.c b/graphics/nxbe/nxbe_flush.c index 66217e780d0..f05c580710e 100644 --- a/graphics/nxbe/nxbe_flush.c +++ b/graphics/nxbe/nxbe_flush.c @@ -57,7 +57,7 @@ * Name: nxbe_flush * * Description: - * After per-window frambuffer has been updated, the modified region must + * After per-window framebuffer has been updated, the modified region must * be written to device graphics memory. That function is managed by this * simple function. It does the following: * @@ -94,7 +94,7 @@ void nxbe_flush(FAR struct nxbe_window_s *wnd, if (!NXBE_ISHIDDEN(wnd)) { - /* Copy the modified per-window frambuffer into device memory. */ + /* Copy the modified per-window framebuffer into device memory. */ nxbe_bitmap_dev(wnd, dest, src, origin, stride); diff --git a/graphics/nxbe/nxbe_getrectangle.c b/graphics/nxbe/nxbe_getrectangle.c index b9f5d06b528..bdc2b84393f 100644 --- a/graphics/nxbe/nxbe_getrectangle.c +++ b/graphics/nxbe/nxbe_getrectangle.c @@ -126,7 +126,7 @@ static inline void nxbe_getrectangle_pwfb(FAR struct nxbe_window_s *wnd, DEBUGASSERT(pplane != NULL && pplane->pwfb.getrectangle != NULL); - /* The rectangle that we receive here is in abolute device coordinates. + /* The rectangle that we receive here is in absolute device coordinates. * We need to restore this to windows relative coordinates. */ diff --git a/graphics/nxbe/nxbe_lower.c b/graphics/nxbe/nxbe_lower.c index 8e93ab00612..2a1cd4e5c0e 100644 --- a/graphics/nxbe/nxbe_lower.c +++ b/graphics/nxbe/nxbe_lower.c @@ -65,7 +65,7 @@ void nxbe_lower(FAR struct nxbe_window_s *wnd) /* If the window is already at the bottom, then there is nothing to do. * Refuse to lower the background window; Refuse to lower a modal window. * It is impossible to lower a hidden window because it does not exist - * in the hiearchy. + * in the hierarchy. */ if (wnd->below == NULL || wnd->below == &be->bkgd || diff --git a/graphics/nxbe/nxbe_move.c b/graphics/nxbe/nxbe_move.c index 7075ddba722..94051e7994b 100644 --- a/graphics/nxbe/nxbe_move.c +++ b/graphics/nxbe/nxbe_move.c @@ -336,7 +336,7 @@ static inline void nxbe_move_pwfb(FAR struct nxbe_window_s *wnd, struct nxgl_rect_s destrect; unsigned int bpp; - /* The rectangle that we receive here is in abolute device coordinates. We + /* The rectangle that we receive here is in absolute device coordinates. We * need to restore this to windows relative coordinates. */ diff --git a/graphics/nxbe/nxbe_setvisibility.c b/graphics/nxbe/nxbe_setvisibility.c index 7cd3b4eacee..7bad453d20d 100644 --- a/graphics/nxbe/nxbe_setvisibility.c +++ b/graphics/nxbe/nxbe_setvisibility.c @@ -179,7 +179,7 @@ void nxbe_hide_window(FAR struct nxbe_window_s *wnd) * * Description: * Select if the window is visible or hidden. A hidden window is still - * present will will update normally, but will be on the visiable on the + * present will will update normally, but will be on the visible on the * display until it is unhidden. * * Input Parameters: diff --git a/graphics/nxglib/fb/nxglib_copyrectangle.c b/graphics/nxglib/fb/nxglib_copyrectangle.c index a6b5003acc5..cc22e40b5f0 100644 --- a/graphics/nxglib/fb/nxglib_copyrectangle.c +++ b/graphics/nxglib/fb/nxglib_copyrectangle.c @@ -83,7 +83,7 @@ void NXGL_FUNCNAME(nxgl_copyrectangle, NXGLIB_SUFFIX) deststride = pinfo->stride; - /* Get the dimensions of the rectange to fill: width in pixels, + /* Get the dimensions of the rectangle to fill: width in pixels, * height in rows */ diff --git a/graphics/nxglib/fb/nxglib_fillrectangle.c b/graphics/nxglib/fb/nxglib_fillrectangle.c index 16fde377a10..8a17ba8fc1e 100644 --- a/graphics/nxglib/fb/nxglib_fillrectangle.c +++ b/graphics/nxglib/fb/nxglib_fillrectangle.c @@ -89,7 +89,7 @@ void NXGL_FUNCNAME(nxgl_fillrectangle, NXGLIB_SUFFIX) stride = pinfo->stride; - /* Get the dimensions of the rectange to fill in pixels */ + /* Get the dimensions of the rectangle to fill in pixels */ width = rect->pt2.x - rect->pt1.x + 1; rows = rect->pt2.y - rect->pt1.y + 1; diff --git a/graphics/nxglib/fb/nxglib_getrectangle.c b/graphics/nxglib/fb/nxglib_getrectangle.c index 419c36048b3..062f4977f91 100644 --- a/graphics/nxglib/fb/nxglib_getrectangle.c +++ b/graphics/nxglib/fb/nxglib_getrectangle.c @@ -130,7 +130,7 @@ void NXGL_FUNCNAME(nxgl_getrectangle, NXGLIB_SUFFIX) fbstride = pinfo->stride; - /* Get the dimensions of the rectange to copy: width in pixels, height + /* Get the dimensions of the rectangle to copy: width in pixels, height * in rows */ diff --git a/graphics/nxglib/fb/nxglib_moverectangle.c b/graphics/nxglib/fb/nxglib_moverectangle.c index 178f6070ccd..6ab9d5ac3d3 100644 --- a/graphics/nxglib/fb/nxglib_moverectangle.c +++ b/graphics/nxglib/fb/nxglib_moverectangle.c @@ -132,7 +132,7 @@ void NXGL_FUNCNAME(nxgl_moverectangle,NXGLIB_SUFFIX) stride = pinfo->stride; - /* Get the dimensions of the rectange to fill: width in pixels, height + /* Get the dimensions of the rectangle to fill: width in pixels, height * in rows */ diff --git a/graphics/nxglib/fb/nxglib_setpixel.c b/graphics/nxglib/fb/nxglib_setpixel.c index fd240469fb7..b14033c5031 100644 --- a/graphics/nxglib/fb/nxglib_setpixel.c +++ b/graphics/nxglib/fb/nxglib_setpixel.c @@ -62,7 +62,7 @@ * Name: nxgl_setpixel_*bpp * * Description: - * Draw a single pixel in frambuffer memory at the given position and with + * Draw a single pixel in framebuffer memory at the given position and with * the given color. This is equivalent to nxgl_fillrectangle_*bpp() with * a 1x1 rectangle but is more efficient. * @@ -105,7 +105,7 @@ void NXGL_FUNCNAME(nxgl_setpixel, NXGLIB_SUFFIX) mask = (15 << shift); /* Mask is 0x0f or 0xf0 */ color <<= shift; /* Color is positioned under the mask */ #else -# error "Unsupport pixel depth" +# error "Unsupported pixel depth" #endif # else /* CONFIG_NX_PACKEDMSFIRST */ @@ -123,7 +123,7 @@ void NXGL_FUNCNAME(nxgl_setpixel, NXGLIB_SUFFIX) mask = (15 << shift); /* Mask is 0x0f or 0xf0 */ color <<= shift; /* Color is positioned under the mask */ #else -# error "Unsupport pixel depth" +# error "Unsupported pixel depth" #endif #endif /* CONFIG_NX_PACKEDMSFIRST */ diff --git a/graphics/nxglib/lcd/nxglib_copyrectangle.c b/graphics/nxglib/lcd/nxglib_copyrectangle.c index 40213ec087c..37d6e0a6aea 100644 --- a/graphics/nxglib/lcd/nxglib_copyrectangle.c +++ b/graphics/nxglib/lcd/nxglib_copyrectangle.c @@ -74,7 +74,7 @@ void NXGL_FUNCNAME(nxgl_copyrectangle, NXGLIB_SUFFIX) unsigned int remainder; #endif - /* Get the dimensions of the rectange to fill: width in pixels, + /* Get the dimensions of the rectangle to fill: width in pixels, * height in rows */ diff --git a/graphics/nxglib/lcd/nxglib_fillrectangle.c b/graphics/nxglib/lcd/nxglib_fillrectangle.c index 28be11fa631..6af251bcc8b 100644 --- a/graphics/nxglib/lcd/nxglib_fillrectangle.c +++ b/graphics/nxglib/lcd/nxglib_fillrectangle.c @@ -76,7 +76,7 @@ void NXGL_FUNCNAME(nxgl_fillrectangle, NXGLIB_SUFFIX) unsigned int ncols; unsigned int row; - /* Get the dimensions of the rectange to fill in pixels */ + /* Get the dimensions of the rectangle to fill in pixels */ ncols = rect->pt2.x - rect->pt1.x + 1; diff --git a/graphics/nxglib/lcd/nxglib_getrectangle.c b/graphics/nxglib/lcd/nxglib_getrectangle.c index 1eb927375cc..50614cd65e3 100644 --- a/graphics/nxglib/lcd/nxglib_getrectangle.c +++ b/graphics/nxglib/lcd/nxglib_getrectangle.c @@ -67,7 +67,7 @@ void NXGL_FUNCNAME(nxgl_getrectangle, NXGLIB_SUFFIX) unsigned int ncols; unsigned int srcrow; - /* Get the width of the rectange to move in pixels. */ + /* Get the width of the rectangle to move in pixels. */ ncols = rect->pt2.x - rect->pt1.x + 1; diff --git a/graphics/nxglib/lcd/nxglib_moverectangle.c b/graphics/nxglib/lcd/nxglib_moverectangle.c index f03ed919fb6..a05909dfb94 100644 --- a/graphics/nxglib/lcd/nxglib_moverectangle.c +++ b/graphics/nxglib/lcd/nxglib_moverectangle.c @@ -69,7 +69,7 @@ void NXGL_FUNCNAME(nxgl_moverectangle, NXGLIB_SUFFIX) unsigned int srcrow; unsigned int destrow; - /* Get the width of the rectange to move in pixels. */ + /* Get the width of the rectangle to move in pixels. */ ncols = rect->pt2.x - rect->pt1.x + 1; diff --git a/graphics/nxglib/lcd/nxglib_setpixel.c b/graphics/nxglib/lcd/nxglib_setpixel.c index f5e5c0b9a68..8b9c9cfa879 100644 --- a/graphics/nxglib/lcd/nxglib_setpixel.c +++ b/graphics/nxglib/lcd/nxglib_setpixel.c @@ -100,7 +100,7 @@ void NXGL_FUNCNAME(nxgl_setpixel, NXGLIB_SUFFIX) mask = (15 << shift); /* Mask is 0x0f or 0xf0 */ color <<= shift; /* Color is positioned under the mask */ #else -# error "Unsupport pixel depth" +# error "Unsupported pixel depth" #endif # else /* CONFIG_NX_PACKEDMSFIRST */ @@ -118,7 +118,7 @@ void NXGL_FUNCNAME(nxgl_setpixel, NXGLIB_SUFFIX) mask = (15 << shift); /* Mask is 0x0f or 0xf0 */ color <<= shift; /* Color is positioned under the mask */ #else -# error "Unsupport pixel depth" +# error "Unsupported pixel depth" #endif #endif /* CONFIG_NX_PACKEDMSFIRST */ diff --git a/graphics/nxglib/nxglib.h b/graphics/nxglib/nxglib.h index 03e781def4f..00c7b76b8bd 100644 --- a/graphics/nxglib/nxglib.h +++ b/graphics/nxglib/nxglib.h @@ -506,7 +506,7 @@ void nxglib_cursor_erase_32bpp(FAR struct nxbe_state_s *be, * Name: nxgl_cursor_backup_*bpp * * Description: - * Save the backgroud image for subsequent use to erase the cursor from the + * Save the background image for subsequent use to erase the cursor from the * device graphics memory. * ****************************************************************************/ diff --git a/graphics/nxglib/pwfb/pwfb_copyrectangle.c b/graphics/nxglib/pwfb/pwfb_copyrectangle.c index 93dc190d298..ef91e58ca46 100644 --- a/graphics/nxglib/pwfb/pwfb_copyrectangle.c +++ b/graphics/nxglib/pwfb/pwfb_copyrectangle.c @@ -83,7 +83,7 @@ void NXGL_FUNCNAME(pwfb_copyrectangle, NXGLIB_SUFFIX) deststride = bwnd->stride; - /* Get the dimensions of the rectange to fill: width in pixels, + /* Get the dimensions of the rectangle to fill: width in pixels, * height in rows */ diff --git a/graphics/nxglib/pwfb/pwfb_fillrectangle.c b/graphics/nxglib/pwfb/pwfb_fillrectangle.c index bc5f57aebcf..1caf06911f8 100644 --- a/graphics/nxglib/pwfb/pwfb_fillrectangle.c +++ b/graphics/nxglib/pwfb/pwfb_fillrectangle.c @@ -89,7 +89,7 @@ void NXGL_FUNCNAME(pwfb_fillrectangle, NXGLIB_SUFFIX) stride = bwnd->stride; - /* Get the dimensions of the rectange to fill in pixels */ + /* Get the dimensions of the rectangle to fill in pixels */ width = rect->pt2.x - rect->pt1.x + 1; rows = rect->pt2.y - rect->pt1.y + 1; diff --git a/graphics/nxglib/pwfb/pwfb_getrectangle.c b/graphics/nxglib/pwfb/pwfb_getrectangle.c index 9a1a0e73ba3..dfa861e7234 100644 --- a/graphics/nxglib/pwfb/pwfb_getrectangle.c +++ b/graphics/nxglib/pwfb/pwfb_getrectangle.c @@ -131,7 +131,7 @@ void NXGL_FUNCNAME(pwfb_getrectangle, NXGLIB_SUFFIX) fbstride = bwnd->stride; - /* Get the dimensions of the rectange to copy: width in pixels, height + /* Get the dimensions of the rectangle to copy: width in pixels, height * in rows */ diff --git a/graphics/nxglib/pwfb/pwfb_moverectangle.c b/graphics/nxglib/pwfb/pwfb_moverectangle.c index 98908e07350..ab939bcc035 100644 --- a/graphics/nxglib/pwfb/pwfb_moverectangle.c +++ b/graphics/nxglib/pwfb/pwfb_moverectangle.c @@ -133,7 +133,7 @@ void NXGL_FUNCNAME(pwfb_moverectangle,NXGLIB_SUFFIX) stride = bwnd->stride; - /* Get the dimensions of the rectange to fill: width in pixels, height + /* Get the dimensions of the rectangle to fill: width in pixels, height * in rows */ diff --git a/graphics/nxglib/pwfb/pwfb_setpixel.c b/graphics/nxglib/pwfb/pwfb_setpixel.c index 43b6589cca4..1bdbc37f157 100644 --- a/graphics/nxglib/pwfb/pwfb_setpixel.c +++ b/graphics/nxglib/pwfb/pwfb_setpixel.c @@ -62,7 +62,7 @@ * Name: pwfb_setpixel_*bpp * * Description: - * Draw a single pixel in frambuffer memory at the given position and with + * Draw a single pixel in framebuffer memory at the given position and with * the given color. This is equivalent to nxgl_fillrectangle_*bpp() with * a 1x1 rectangle but is more efficient. * @@ -106,7 +106,7 @@ void NXGL_FUNCNAME(pwfb_setpixel, NXGLIB_SUFFIX) mask = (15 << shift); /* Mask is 0x0f or 0xf0 */ color <<= shift; /* Color is positioned under the mask */ #else -# error "Unsupport pixel depth" +# error "Unsupported pixel depth" #endif # else /* CONFIG_NX_PACKEDMSFIRST */ @@ -124,7 +124,7 @@ void NXGL_FUNCNAME(pwfb_setpixel, NXGLIB_SUFFIX) mask = (15 << shift); /* Mask is 0x0f or 0xf0 */ color <<= shift; /* Color is positioned under the mask */ #else -# error "Unsupport pixel depth" +# error "Unsupported pixel depth" #endif #endif /* CONFIG_NX_PACKEDMSFIRST */ diff --git a/graphics/nxmu/nxmu_server.c b/graphics/nxmu/nxmu_server.c index 47ec68a1fcd..40c9f06cfef 100644 --- a/graphics/nxmu/nxmu_server.c +++ b/graphics/nxmu/nxmu_server.c @@ -190,7 +190,7 @@ static inline int nxmu_setup(FAR const char *mqname, FAR NX_DRIVERTYPE *dev, #endif /* CONFIG_FB_CMAP */ /* Initialize the non-NULL elements of the server connection structure. - * Oddly, this strcture represents the connection between the server and + * Oddly, this structure represents the connection between the server and * itself. * * Open the incoming server MQ. The server receives messages on the diff --git a/graphics/nxterm/nxterm_driver.c b/graphics/nxterm/nxterm_driver.c index f17b327750f..a9646dff728 100644 --- a/graphics/nxterm/nxterm_driver.c +++ b/graphics/nxterm/nxterm_driver.c @@ -319,7 +319,7 @@ static int nxterm_ioctl(FAR struct file *filep, int cmd, unsigned long arg) { /* NOTE: We don't need driver context here because the NXTERM handle * provided within each of the NXTERM IOCTL command data. Mutual - * exclusion is similar managed by the IOCTL cmmand hendler. + * exclusion is similar managed by the IOCTL cmmand handler. * * This permits the IOCTL to be called in abnormal context (such as * from boardctl()) @@ -383,7 +383,7 @@ static int nxterm_unlink(FAR struct inode *inode) * * NOTE: We don't need driver context here because the NXTERM handle * provided within each of the NXTERM IOCTL command data. Mutual - * exclusion is similar managed by the IOCTL cmmand hendler. + * exclusion is similar managed by the IOCTL cmmand handler. * * This permits the IOCTL to be called in abnormal context (such as * from boardctl()) diff --git a/graphics/nxterm/nxterm_vt100.c b/graphics/nxterm/nxterm_vt100.c index 1ee70e9ca17..a2bb1f4a8eb 100644 --- a/graphics/nxterm/nxterm_vt100.c +++ b/graphics/nxterm/nxterm_vt100.c @@ -198,7 +198,7 @@ static enum nxterm_vt100state_e nxterm_vt100seq(FAR struct nxterm_state_s *priv, /* The 'seqsize' is still smaller than the potential match(es). We * will need to collect more characters before we can make a decision. - * Retun an indication that we have consumed the character. + * Return an indication that we have consumed the character. */ return VT100_CONSUMED; diff --git a/graphics/vnc/server/vnc_fbdev.c b/graphics/vnc/server/vnc_fbdev.c index 8385f68301a..fbcdacab1b1 100644 --- a/graphics/vnc/server/vnc_fbdev.c +++ b/graphics/vnc/server/vnc_fbdev.c @@ -121,7 +121,7 @@ static int up_putcmap(FAR struct fb_vtable_s *vtable, static int up_getcursor(FAR struct fb_vtable_s *vtable, FAR struct fb_cursorattrib_s *attrib); static int up_setcursor(FAR struct fb_vtable_s *vtable, - FAR struct fb_setcursor_s *setttings); + FAR struct fb_setcursor_s *settings); #endif /**************************************************************************** @@ -490,7 +490,7 @@ static inline int vnc_wait_start(int display) * started. But we might be here before the thread has gotten that far. * * If it has been allocated, then wait until it is in the INIITIALIZED - * state. The INITIAILIZED states indicates tht the session structure + * state. The INITIAILIZED states indicates that the session structure * has been allocated and fully initialized. */ diff --git a/graphics/vnc/server/vnc_negotiate.c b/graphics/vnc/server/vnc_negotiate.c index 097f3f4bf16..6a8be7a4896 100644 --- a/graphics/vnc/server/vnc_negotiate.c +++ b/graphics/vnc/server/vnc_negotiate.c @@ -326,7 +326,7 @@ int vnc_negotiate(FAR struct vnc_session_s *session) * framebuffer, its pixel format and the name associated with the desktop:" * * RealVNC client supports this resolutions: - * Full (all availlable colors) - Max resolution of the platform (TrueColor) + * Full (all available colors) - Max resolution of the platform (TrueColor) * Medium (256 colors) - 256 colors (Paletted) * Low (64 colors) - RGB8 2:2:2 (default, TrueColor) * Very Low (8 colors) - RGB3 1:1:1 (TrueColor) diff --git a/graphics/vnc/server/vnc_receiver.c b/graphics/vnc/server/vnc_receiver.c index d3cf818b416..42067741b42 100644 --- a/graphics/vnc/server/vnc_receiver.c +++ b/graphics/vnc/server/vnc_receiver.c @@ -480,7 +480,7 @@ int vnc_client_encodings(FAR struct vnc_session_s *session, encoding = rfb_getbe32(&encodings->encodings[i << 2]); - /* Only a limited support for of RRE is vailable now. */ + /* Only a limited support for of RRE is available now. */ if (encoding == RFB_ENCODING_RRE) { diff --git a/graphics/vnc/server/vnc_server.c b/graphics/vnc/server/vnc_server.c index e1f5c613a44..bf230548fee 100644 --- a/graphics/vnc/server/vnc_server.c +++ b/graphics/vnc/server/vnc_server.c @@ -240,7 +240,7 @@ int vnc_server(int argc, FAR char *argv[]) int display; int ret; - /* A single argument is expected: A diplay port number in ASCII form */ + /* A single argument is expected: A display port number in ASCII form */ if (argc != 2) { @@ -344,7 +344,7 @@ int vnc_server(int argc, FAR char *argv[]) continue; } - /* Let the framebuffer driver know that we are ready to preform + /* Let the framebuffer driver know that we are ready to perform * updates. */ diff --git a/graphics/vnc/server/vnc_updater.c b/graphics/vnc/server/vnc_updater.c index b80001c554b..2f5c99f343f 100644 --- a/graphics/vnc/server/vnc_updater.c +++ b/graphics/vnc/server/vnc_updater.c @@ -376,7 +376,7 @@ static FAR void *vnc_updater(FAR void *arg) while (session->state == VNCSERVER_RUNNING) { /* Get the next queued rectangle update. This call will block until an - * upate is available for the case where the update queue is empty. + * update is available for the case where the update queue is empty. */ srcrect = vnc_remove_queue(session); diff --git a/include/cxx/cunistd b/include/cxx/cunistd index 95118c1732c..48cc2304f14 100644 --- a/include/cxx/cunistd +++ b/include/cxx/cunistd @@ -57,7 +57,7 @@ namespace std using ::usleep; using ::pause; - // File descriptor opertions + // File descriptor operations using ::close; using ::dup; diff --git a/include/dlfcn.h b/include/dlfcn.h index 380e2ba13b3..ac1af57f9c8 100644 --- a/include/dlfcn.h +++ b/include/dlfcn.h @@ -44,7 +44,7 @@ #include /**************************************************************************** - * Pre-processor Definitons + * Pre-processor Definitions ****************************************************************************/ /* The dlfcn.h header defines at least the following macros for use in the diff --git a/include/dsp.h b/include/dsp.h index ad15ab3fd2d..fca9d3feae4 100644 --- a/include/dsp.h +++ b/include/dsp.h @@ -313,7 +313,7 @@ struct motor_sobserver_pll_s struct motor_observer_smo_s { float k_slide; /* Bang-bang controller gain */ - float err_max; /* Linear mode threashold */ + float err_max; /* Linear mode threshold */ float F_gain; /* Current observer F gain (1-Ts*R/L) */ float G_gain; /* Current observer G gain (Ts/L) */ float emf_lp_filter1; /* Adaptive first low pass EMF filter */ diff --git a/include/fixedmath.h b/include/fixedmath.h index 3ed13b3b1a0..2d7c2dd81a4 100644 --- a/include/fixedmath.h +++ b/include/fixedmath.h @@ -53,7 +53,7 @@ #define b8TEN 0x0a00 /* 10 */ #define b8ONE 0x0100 /* 1 */ #define b8HALF 0x0080 /* 0.5 */ -#define b8ONETENTH 0x001a /* 0.1 (acutally 0.1015625) */ +#define b8ONETENTH 0x001a /* 0.1 (actually 0.1015625) */ #define b8ONEHUNDRTH 0x0003 /* 0.01 (actually 0.0117198765) */ #define b8HALFPI 0x0192 /* 1.5703125 */ #define b8PI 0x0324 /* 3.1406250 */ diff --git a/include/inttypes.h b/include/inttypes.h index f8fe4337230..78234d9f55b 100644 --- a/include/inttypes.h +++ b/include/inttypes.h @@ -56,7 +56,7 @@ ****************************************************************************/ /* "The following macros shall be defined. Each expands to a character string - * literal containing a conversion specifier, possibly modified by a lengt + * literal containing a conversion specifier, possibly modified by a length * modifier, suitable for use within the format argument of a formatted * input/output function when converting the corresponding integer type. * These macros have the general form of PRI (character string literals for @@ -178,7 +178,7 @@ extern "C" */ intmax_t imaxabs(intmax_t j); -imaxdiv_t imaxdiv(intmax_t numer, intmax_t denom); +imaxdiv_t imaxdiv(intmax_t number, intmax_t denom); intmax_t strtoimax(FAR const char *nptr, FAR char **endptr, int base); uintmax_t strtoumax(FAR const char *nptr, FAR char **endptr, int base); diff --git a/include/net/if.h b/include/net/if.h index 9a26ec38878..0b90045aa43 100644 --- a/include/net/if.h +++ b/include/net/if.h @@ -176,7 +176,7 @@ struct lifreq #define lifr_mii_val_in lifr_ifru.lifru_mii_data.val_in /* PHY input data */ #define lifr_mii_val_out lifr_ifru.lifru_mii_data.val_out /* PHY output data */ -/* Used only with the SIOCGLIFCONF IOCTL commnd */ +/* Used only with the SIOCGLIFCONF IOCTL command */ struct lifconf { @@ -226,7 +226,7 @@ struct ifreq #define ifr_mii_val_in ifr_ifru.ifru_mii_data.val_in /* PHY input data */ #define ifr_mii_val_out ifr_ifru.ifru_mii_data.val_out /* PHY output data */ -/* Used only with the SIOCGIFCONF IOCTL commnd*/ +/* Used only with the SIOCGIFCONF IOCTL command*/ struct ifconf { diff --git a/include/nuttx/analog/ioctl.h b/include/nuttx/analog/ioctl.h index 8098537be34..92b1988bf36 100644 --- a/include/nuttx/analog/ioctl.h +++ b/include/nuttx/analog/ioctl.h @@ -69,8 +69,8 @@ #define AN_NCMDS 3 /* Number of common commands */ /* User defined ioctl commands are also supported. These will be forwarded - * by the upper-half QE driver to the lower-half QE driver via the ioctl() - * method fo the QE lower-half interface. However, the lower-half driver + * by the upper-half driver to the lower-half driver via the ioctl() + * method of the lower-half interface. However, the lower-half driver * must reserve a block of commands as follows in order prevent IOCTL * command numbers from overlapping. */ diff --git a/include/nuttx/arch.h b/include/nuttx/arch.h index 669cd6a7578..4db087f7327 100644 --- a/include/nuttx/arch.h +++ b/include/nuttx/arch.h @@ -387,7 +387,7 @@ void up_release_stack(FAR struct tcb_s *dtcb, uint8_t ttype); * tcb: Refers to the tcb to be unblocked. This tcb is * in one of the waiting tasks lists. It must be moved to * the ready-to-run list and, if it is the highest priority - * ready to run taks, executed. + * ready to run task, executed. * ****************************************************************************/ @@ -1433,7 +1433,7 @@ void up_timer_initialize(void); * is suppressed and the platform specific code is expected to provide the * following custom functions. * - * Architecture specific timer initialiation logic initializes the timer + * Architecture specific timer initialization logic initializes the timer * facilities. This happens early in the initialization sequence (via * up_initialize()). * int up_timer_gettime(FAR struct timespec *ts): Returns the current @@ -1964,7 +1964,7 @@ int up_cpu_resume(int cpu); * * Description: * In Harvard architectures, data accesses and instruction accesses occur - * on different busses, perhaps concurrently. All data accesses are + * on different buses, perhaps concurrently. All data accesses are * performed on the data bus unless special machine instructions are * used to read data from the instruction address space. Also, in the * typical MCU, the available SRAM data memory is much smaller that the diff --git a/include/nuttx/audio/audio.h b/include/nuttx/audio/audio.h index 3f1c10310dd..20dc9359cfb 100644 --- a/include/nuttx/audio/audio.h +++ b/include/nuttx/audio/audio.h @@ -43,7 +43,7 @@ * * The Audio driver is split into two parts: * - * 1) An "upper half", generic driver that provides the comman Audio interface + * 1) An "upper half", generic driver that provides the common Audio interface * to application level code, and * 2) A "lower half", platform-specific driver that implements the low-level * controls to configure and communicate with the audio device(s). diff --git a/include/nuttx/b2c.h b/include/nuttx/b2c.h index 632c6844e04..56061f3a0f3 100644 --- a/include/nuttx/b2c.h +++ b/include/nuttx/b2c.h @@ -60,7 +60,7 @@ # define CHAR_BYTE 4 # define CHAR_SHIFT 2 #else -# error unsupport CHAR_BIT value +# error unsupported CHAR_BIT value #endif /* Macros convert between chars and bytes */ diff --git a/include/nuttx/board.h b/include/nuttx/board.h index be7a45ba02c..2bdd9c11e3b 100644 --- a/include/nuttx/board.h +++ b/include/nuttx/board.h @@ -282,7 +282,7 @@ int board_reset(int status); * length. * * Returned Value: - * Zero (OK) is returned on success. Otherwize a negated errno value is + * Zero (OK) is returned on success. Otherwise a negated errno value is * returned indicating the nature of the failure. * ****************************************************************************/ @@ -541,9 +541,9 @@ void board_autoled_off(int led); * If CONFIG_ARCH_LEDS is defined, then NuttX will control the on-board * LEDs. If CONFIG_ARCH_LEDS is not defined, then this interfaces may be * available to control the LEDs directly from user board logic or - * indirectly user applications (via the common LED charater driver). + * indirectly user applications (via the common LED character driver). * - * Most boards have only a few LEDs and in thoses cases all LEDs may be + * Most boards have only a few LEDs and in those cases all LEDs may be * used by the NuttX LED logic exclusively and may not be available for * use by user logic if CONFIG_ARCH_LEDS=y. * @@ -567,9 +567,9 @@ void board_userled_initialize(void); * If CONFIG_ARCH_LEDS is defined, then NuttX will control the on-board * LEDs. If CONFIG_ARCH_LEDS is not defined, then this interfaces may be * available to control the LEDs directly from user board logic or - * indirectly user applications (via the common LED charater driver). + * indirectly user applications (via the common LED character driver). * - * Most boards have only a few LEDs and in thoses cases all LEDs may be + * Most boards have only a few LEDs and in those cases all LEDs may be * used by the NuttX LED logic exclusively and may not be available for * use by user logic if CONFIG_ARCH_LEDS=y. * @@ -593,9 +593,9 @@ void board_userled(int led, bool ledon); * If CONFIG_ARCH_LEDS is defined, then NuttX will control the on-board * LEDs. If CONFIG_ARCH_LEDS is not defined, then this interfaces may be * available to control the LEDs directly from user board logic or - * indirectly user applications (via the common LED charater driver). + * indirectly user applications (via the common LED character driver). * - * Most boards have only a few LEDs and in thoses cases all LEDs may be + * Most boards have only a few LEDs and in those cases all LEDs may be * used by the NuttX LED logic exclusively and may not be available for * use by user logic if CONFIG_ARCH_LEDS=y. * @@ -701,7 +701,7 @@ void board_crashdump(uintptr_t currentsp, FAR void *tcb, * Description: * If CONFIG_BOARD_INITRNGSEED is selected then board_init_rngseed is * called at up_randompool_initialize() to feed initial random seed - * to RNG. Implemenation of this functions should feed at least + * to RNG. Implementation of this functions should feed at least * MIN_SEED_NEW_ENTROPY_WORDS 32-bit random words to entropy-pool using * up_rngaddentropy() or up_rngaddint(). * diff --git a/include/nuttx/can/can.h b/include/nuttx/can/can.h index 8886632dbb1..f462832af50 100644 --- a/include/nuttx/can/can.h +++ b/include/nuttx/can/can.h @@ -215,7 +215,7 @@ /* User defined ioctl commands are also supported. These will be forwarded * by the upper-half CAN driver to the lower-half CAN driver via the co_ioctl() - * method fo the CAN lower-half interface. However, the lower-half driver + * method of the CAN lower-half interface. However, the lower-half driver * must reserve a block of commands as follows in order prevent IOCTL * command numbers from overlapping. * @@ -777,7 +777,7 @@ int can_txdone(FAR struct can_dev_s *dev); * Description: * Called from the CAN interrupt handler at the completion of a send * operation. This interface is needed only for CAN hardware that - * supports queing of outgoing messages in a H/W FIFO. + * supports queueing of outgoing messages in a H/W FIFO. * * The CAN upper half driver also supports a queue of output messages in a * S/W FIFO. Messages are added to that queue when when can_write() is diff --git a/include/nuttx/clock.h b/include/nuttx/clock.h index d3d620df0dc..6a6027f2e8a 100644 --- a/include/nuttx/clock.h +++ b/include/nuttx/clock.h @@ -462,7 +462,7 @@ int clock_cpuload(int pid, FAR struct cpuload_s *cpuload); * * Description: * Configure to use a oneshot timer as described in - * include/nuttx/timers/oneshot.h to provid external clocking to assess + * include/nuttx/timers/oneshot.h to provide external clocking to assess * the CPU load. * * Input Parameters: diff --git a/include/nuttx/eeprom/i2c_xx24xx.h b/include/nuttx/eeprom/i2c_xx24xx.h index f49cb9b74fe..7f87a409241 100644 --- a/include/nuttx/eeprom/i2c_xx24xx.h +++ b/include/nuttx/eeprom/i2c_xx24xx.h @@ -40,7 +40,7 @@ * Public Types ****************************************************************************/ -/* DO NOT CHANGE ORDER, IT MACHES CODE IN drivers/eeprom/i2c_xx24xx.c */ +/* DO NOT CHANGE ORDER, IT MATCHES CODE IN drivers/eeprom/i2c_xx24xx.c */ enum eeprom_24xx_e { diff --git a/include/nuttx/eeprom/spi_xx25xx.h b/include/nuttx/eeprom/spi_xx25xx.h index b4423bd7587..58460c9a123 100644 --- a/include/nuttx/eeprom/spi_xx25xx.h +++ b/include/nuttx/eeprom/spi_xx25xx.h @@ -40,7 +40,7 @@ * Public Types ****************************************************************************/ -/* DO NOT CHANGE ORDER, IT MACHES CODE IN drivers/eeprom/spieeprom.c */ +/* DO NOT CHANGE ORDER, IT MATCHES CODE IN drivers/eeprom/spieeprom.c */ enum eeprom_25xx_e { diff --git a/include/nuttx/fs/automount.h b/include/nuttx/fs/automount.h index 3af62d5e03e..7af5c7bbf0e 100644 --- a/include/nuttx/fs/automount.h +++ b/include/nuttx/fs/automount.h @@ -54,7 +54,7 @@ * Automounter configuration * CONFIG_FS_AUTOMOUNTER - Enables automount support * - * Prequisites: + * Prerequisites: * CONFIG_SCHED_WORKQUEUE - Work queue support is required * And others that would only matter if you are working in a very minimal * configuration. diff --git a/include/nuttx/fs/fat.h b/include/nuttx/fs/fat.h index 34d54a20e74..a6163ea0e8d 100644 --- a/include/nuttx/fs/fat.h +++ b/include/nuttx/fs/fat.h @@ -100,7 +100,7 @@ int fat_setattrib(FAR const char *path, fat_attrib_t setbits, * * Some hardware, however, may require special DMA-capable memory in * order to perform the transfers. If CONFIG_FAT_DMAMEMORY is defined - * then the architecture-specific hardware must provide the funtions + * then the architecture-specific hardware must provide the functions * fat_dma_alloc() and fat_dma_free() as prototyped below: fat_dma_alloc() * will allocate DMA-capable memory of the specified size; fat_dma_free() * is the corresponding function that will be called to free the DMA- diff --git a/include/nuttx/fs/fs.h b/include/nuttx/fs/fs.h index b4687d011a3..5d70ac9fca6 100644 --- a/include/nuttx/fs/fs.h +++ b/include/nuttx/fs/fs.h @@ -1218,7 +1218,7 @@ int file_ioctl(FAR struct file *filep, int req, unsigned long arg); * * Input Parameters: * filep - Instance for struct file for the opened file. - * cmd - Indentifies the operation to be performed. + * cmd - Identifies the operation to be performed. * ap - Variable argument following the command. * * Returned Value: diff --git a/include/nuttx/fs/userfs.h b/include/nuttx/fs/userfs.h index f55010ae4ff..cc2311f183d 100644 --- a/include/nuttx/fs/userfs.h +++ b/include/nuttx/fs/userfs.h @@ -553,7 +553,7 @@ extern "C" * None * * Returned Value: - * Zero (OK) is returned if the dev/userfs driver was intitialized and + * Zero (OK) is returned if the dev/userfs driver was initialized and * registered properly. Otherwise, a negated errno value is returned * to indicate the nature of the failure. * diff --git a/include/nuttx/ioexpander/gpio.h b/include/nuttx/ioexpander/gpio.h index 27116e76b0a..5d11e1c46b5 100644 --- a/include/nuttx/ioexpander/gpio.h +++ b/include/nuttx/ioexpander/gpio.h @@ -57,7 +57,7 @@ /* Command: GPIOC_WRITE * Description: Set the value of an output GPIO - * Argument: T0=output a low value; 1=outut a high value + * Argument: T0=output a low value; 1=output a high value * * Command: GPIOC_READ * Description: Read the value of an input or output GPIO diff --git a/include/nuttx/lcd/ft80x.h b/include/nuttx/lcd/ft80x.h index d37d89fdef0..3bf1d79a17d 100644 --- a/include/nuttx/lcd/ft80x.h +++ b/include/nuttx/lcd/ft80x.h @@ -197,7 +197,7 @@ * Returns: None. * * FT80X_IOC_AUDIO: - * Description: Enable/disable an external audio amplifer. + * Description: Enable/disable an external audio amplifier. * Argument: 0=disable; 1=enable. * Returns: None. */ diff --git a/include/nuttx/lcd/hd4478ou.h b/include/nuttx/lcd/hd4478ou.h index 38fa38e7cb9..d778a53825a 100644 --- a/include/nuttx/lcd/hd4478ou.h +++ b/include/nuttx/lcd/hd4478ou.h @@ -60,7 +60,7 @@ # define HD4478OU_DISPLAY_BLINK (1 << 0) /* Blink on/off */ # define HD4478OU_DISPLAY_CURSOR (1 << 1) /* Cursor on/off */ # define HD4478OU_DISPLAY_ON (1 << 2) /* Display on/off */ -#define HD4478OU_SHIFT (0x10) /* Remove cursor and whole diplay */ +#define HD4478OU_SHIFT (0x10) /* Remove cursor and whole display */ # define HD4478OU_SHIFT_RIGHT (1 << 2) /* Shift right */ # define HD4478OU_SHIFT_LEFT (0x00) /* Shift right */ # define HD4478OU_SHIFT_DISPLAY (1 << 3) /* Display shift */ diff --git a/include/nuttx/lcd/memlcd.h b/include/nuttx/lcd/memlcd.h index 8d892bdf59e..9d7268c823a 100644 --- a/include/nuttx/lcd/memlcd.h +++ b/include/nuttx/lcd/memlcd.h @@ -105,7 +105,7 @@ struct memlcd_priv_s * Input Parameters: * * spi - A reference to the SPI driver instance. - * devno - A value in the range of 0 throuh CONFIG_MEMLCD_NINTERFACES-1. + * devno - A value in the range of 0 through CONFIG_MEMLCD_NINTERFACES-1. * This allows support for multiple devices. * memlcd_priv_s - Board specific structure * diff --git a/include/nuttx/lcd/p14201.h b/include/nuttx/lcd/p14201.h index 25d30a43893..fc7e8e2b5c4 100644 --- a/include/nuttx/lcd/p14201.h +++ b/include/nuttx/lcd/p14201.h @@ -61,7 +61,7 @@ * - Reading graphics memory cannot be supported, and * - All pixel writes must be aligned to byte boundaries. * - * The latter limitation effectively reduces the 128x96 disply to 64x96. + * The latter limitation effectively reduces the 128x96 display to 64x96. * * Required LCD driver settings: * CONFIG_LCD_P14201 - Enable P14201 support @@ -109,7 +109,7 @@ extern "C" * Input Parameters: * * spi - A reference to the SPI driver instance. - * devno - A value in the range of 0 throuh CONFIG_P14201_NINTERFACES-1. + * devno - A value in the range of 0 through CONFIG_P14201_NINTERFACES-1. * This allows support for multiple OLED devices. * * Returned Value: diff --git a/include/nuttx/lcd/pcf8574_lcd_backpack.h b/include/nuttx/lcd/pcf8574_lcd_backpack.h index b81201001a5..ebcf3f07ce3 100644 --- a/include/nuttx/lcd/pcf8574_lcd_backpack.h +++ b/include/nuttx/lcd/pcf8574_lcd_backpack.h @@ -149,7 +149,7 @@ struct slcd_createchar_s * based LCDs via I2C instead of parallel (saving a bunch of gpio lines). * * There are a multitude of these available from various sources (e.g. ebay). - * They typically vary by gpio-to-lcd pin mapping, and I2C addresss, but + * They typically vary by gpio-to-lcd pin mapping, and I2C address, but * otherwise are functionally identical. * * The characters presented for codes depend on the masked rom of the diff --git a/include/nuttx/lcd/ssd1351.h b/include/nuttx/lcd/ssd1351.h index 858ac470e83..9cf050b3f54 100644 --- a/include/nuttx/lcd/ssd1351.h +++ b/include/nuttx/lcd/ssd1351.h @@ -65,7 +65,7 @@ * CONFIG_SSD1351_VDDEXT - external VDD * CONFIG_SSD1351_TRST - reset period * CONFIG_SSD1351_TPRECHG1 - first pre-charge period - * CONFIG_SSD1351_PERFENHANCE - enhace display performance + * CONFIG_SSD1351_PERFENHANCE - enhance display performance * CONFIG_SSD1351_CLKDIV - clock divider * CONFIG_SSD1351_OSCFREQ - oscillator frequency * CONFIG_SSD1351_TPRECHG2 - second pre-charge period diff --git a/include/nuttx/lcd/st7567.h b/include/nuttx/lcd/st7567.h index c68f80e5346..cbebe407c71 100644 --- a/include/nuttx/lcd/st7567.h +++ b/include/nuttx/lcd/st7567.h @@ -63,7 +63,7 @@ * must be undefined or defined to be 1. * CONFIG_ST7567_POWER * If the hardware supports a controllable LCD a power supply, this - * configuration shold be defined. (See st7567_power() below). + * configuration should be defined. (See st7567_power() below). * * Required LCD driver settings: * CONFIG_LCD_ST7567 - Enable ST7567 support @@ -136,7 +136,7 @@ FAR struct lcd_dev_s *st7567_initialize(FAR struct spi_dev_s *spi, unsigned int * * Input Parameters: * - * devno - A value in the range of 0 throuh CONFIG_ST7567_NINTERFACES-1. + * devno - A value in the range of 0 through CONFIG_ST7567_NINTERFACES-1. * This allows support for multiple LCD devices. * on - true:turn power on, false: turn power off. * diff --git a/include/nuttx/lcd/ug-9664hswag01.h b/include/nuttx/lcd/ug-9664hswag01.h index dc06bb0a3a4..d6195e9a59a 100644 --- a/include/nuttx/lcd/ug-9664hswag01.h +++ b/include/nuttx/lcd/ug-9664hswag01.h @@ -58,7 +58,7 @@ * must be undefined or defined to be 1. * CONFIG_UG9664HSWAG01_POWER * If the hardware supports a controllable OLED a power supply, this - * configuration shold be defined. (See ug_power() below). + * configuration should be defined. (See ug_power() below). * * Required LCD driver settings: * CONFIG_LCD_UG9664HSWAG01 - Enable UG-9664HSWAG01 support @@ -132,7 +132,7 @@ FAR struct lcd_dev_s *ug_initialize(FAR struct spi_dev_s *spi, unsigned int devn * * Input Parameters: * - * devno - A value in the range of 0 throuh CONFIG_UG9664HSWAG01_NINTERFACES-1. + * devno - A value in the range of 0 through CONFIG_UG9664HSWAG01_NINTERFACES-1. * This allows support for multiple OLED devices. * on - true:turn power on, false: turn power off. * diff --git a/include/nuttx/mm/iob.h b/include/nuttx/mm/iob.h index e540cfeb525..dd26ea500ef 100644 --- a/include/nuttx/mm/iob.h +++ b/include/nuttx/mm/iob.h @@ -586,7 +586,7 @@ void iob_dump(FAR const char *msg, FAR struct iob_s *iob, unsigned int len, * Name: iob_getuserstats * * Description: - * Return a reference to the IOB usage statitics for the IOB consumer/producer + * Return a reference to the IOB usage statistics for the IOB consumer/producer * * Input Parameters: * userid - id representing the IOB producer/consumer diff --git a/include/nuttx/mm/shm.h b/include/nuttx/mm/shm.h index 558359c93d3..f4b2641f71b 100644 --- a/include/nuttx/mm/shm.h +++ b/include/nuttx/mm/shm.h @@ -125,7 +125,7 @@ struct group_shm_s * Name: shm_initialize * * Description: - * Perform one time, start-up initialization of the shared memor logic. + * Perform one time, start-up initialization of the shared memory logic. * * Input Parameters: * None diff --git a/include/nuttx/mmcsd.h b/include/nuttx/mmcsd.h index 15c0574d5a9..684f3976809 100644 --- a/include/nuttx/mmcsd.h +++ b/include/nuttx/mmcsd.h @@ -85,7 +85,7 @@ int mmcsd_slotinitialize(int minor, FAR struct sdio_dev_s *dev); * that support multiple MMC/SD slots. This value must be in the range * {0, ..., CONFIG_MMCSD_NSLOTS}. * spi - And instance of an SPI interface obtained by called the - * approprite xyz_spibus_initialize() function for the MCU "xyz" with + * appropriate xyz_spibus_initialize() function for the MCU "xyz" with * the appropriate port number. * ****************************************************************************/ diff --git a/include/nuttx/module.h b/include/nuttx/module.h index 25964d70d0f..844b7be0b31 100644 --- a/include/nuttx/module.h +++ b/include/nuttx/module.h @@ -135,7 +135,7 @@ FAR const void *modsym(FAR void *handle, FAR const char *name); * * Description: * modhandle() returns the module handle for the installed module with the - * provided name. A secondary use of this function is to determin if a + * provided name. A secondary use of this function is to determine if a * module has been loaded or not. * * Input Parameters: diff --git a/include/nuttx/mqueue.h b/include/nuttx/mqueue.h index fe230252c75..ac07704bb77 100644 --- a/include/nuttx/mqueue.h +++ b/include/nuttx/mqueue.h @@ -59,7 +59,7 @@ /* Most internal nxmq_* interfaces are not available in the user space in * PROTECTED and KERNEL builds. In that context, the application message - * queu interfaces must be used. The differences between the two sets of + * queue interfaces must be used. The differences between the two sets of * interfaces are: (1) the nxmq_* interfaces do not cause cancellation * points and (2) they do not modify the errno variable. * diff --git a/include/nuttx/mtd/hamming.h b/include/nuttx/mtd/hamming.h index e745e63990b..9139a860c75 100644 --- a/include/nuttx/mtd/hamming.h +++ b/include/nuttx/mtd/hamming.h @@ -6,7 +6,7 @@ * * This logic was taken directly from Atmel sample code with only * modifications for better integration with NuttX. The Atmel sample - * code has a BSD compatibile license that requires this copyright notice: + * code has a BSD compatible license that requires this copyright notice: * * Copyright (c) 2011, Atmel Corporation * diff --git a/include/nuttx/mtd/nand.h b/include/nuttx/mtd/nand.h index fd769bb279d..d96292039a7 100644 --- a/include/nuttx/mtd/nand.h +++ b/include/nuttx/mtd/nand.h @@ -6,7 +6,7 @@ * * This logic was based largely on Atmel sample code with modifications for * better integration with NuttX. The Atmel sample code has a BSD - * compatibile license that requires this copyright notice: + * compatible license that requires this copyright notice: * * Copyright (c) 2012, Atmel Corporation * diff --git a/include/nuttx/mtd/nand_config.h b/include/nuttx/mtd/nand_config.h index 01771f8dab9..92e353c14a1 100644 --- a/include/nuttx/mtd/nand_config.h +++ b/include/nuttx/mtd/nand_config.h @@ -6,7 +6,7 @@ * * This logic was based largely on Atmel sample code with modifications for * better integration with NuttX. The Atmel sample code has a BSD - * compatibile license that requires this copyright notice: + * compatible license that requires this copyright notice: * * Copyright (c) 2012, Atmel Corporation * diff --git a/include/nuttx/mtd/nand_ecc.h b/include/nuttx/mtd/nand_ecc.h index a86b0f2aab4..bd86f558320 100644 --- a/include/nuttx/mtd/nand_ecc.h +++ b/include/nuttx/mtd/nand_ecc.h @@ -6,7 +6,7 @@ * * This logic was based largely on Atmel sample code with modifications for * better integration with NuttX. The Atmel sample code has a BSD - * compatibile license that requires this copyright notice: + * compatible license that requires this copyright notice: * * Copyright (c) 2012, Atmel Corporation * @@ -115,7 +115,7 @@ int nandecc_readpage(FAR struct nand_dev_s *nand, off_t block, * nand - Upper-half, NAND FLASH interface * block - Number of the block where the page to write resides. * page - Number of the page to write inside the given block. - * data - Buffer containing the data to be writting + * data - Buffer containing the data to be writing * spare - Buffer containing the spare data to be written. * * Returned Value: diff --git a/include/nuttx/mtd/nand_model.h b/include/nuttx/mtd/nand_model.h index 0012e339bf3..3a400450a9e 100644 --- a/include/nuttx/mtd/nand_model.h +++ b/include/nuttx/mtd/nand_model.h @@ -11,7 +11,7 @@ * * This logic was based largely on Atmel sample code for the SAMA5D3x with * modifications for better integration with NuttX. The Atmel sample code - * has a BSD compatibile license that requires this copyright notice: + * has a BSD compatible license that requires this copyright notice: * * Copyright (c) 2012, Atmel Corporation * diff --git a/include/nuttx/mtd/nand_raw.h b/include/nuttx/mtd/nand_raw.h index 44cc0690003..3ea240099d9 100644 --- a/include/nuttx/mtd/nand_raw.h +++ b/include/nuttx/mtd/nand_raw.h @@ -6,7 +6,7 @@ * * This logic was based largely on Atmel sample code with modifications for * better integration with NuttX. The Atmel sample code has a BSD - * compatibile license that requires this copyright notice: + * compatible license that requires this copyright notice: * * Copyright (c) 2012, Atmel Corporation * @@ -133,7 +133,7 @@ * block - Number of the physical block to erase. * * Returned Value: - * OK is returned in succes; a negated errno value is returned on failure. + * OK is returned in success; a negated errno value is returned on failure. * ****************************************************************************/ @@ -154,7 +154,7 @@ * spare - Buffer where the spare area will be stored. * * Returned Value: - * OK is returned in succes; a negated errno value is returned on failure. + * OK is returned in success; a negated errno value is returned on failure. * ****************************************************************************/ @@ -171,11 +171,11 @@ * raw - Lower-half, raw NAND FLASH interface * block - Number of the block where the page to write resides. * page - Number of the page to write inside the given block. - * data - Buffer containing the data to be writting + * data - Buffer containing the data to be writing * spare - Buffer containing the spare data to be written. * * Returned Value: - * OK is returned in succes; a negated errno value is returned on failure. + * OK is returned in success; a negated errno value is returned on failure. * ****************************************************************************/ @@ -197,7 +197,7 @@ * spare - Buffer where the spare area will be stored. * * Returned Value: - * OK is returned in succes; a negated errno value is returned on failure. + * OK is returned in success; a negated errno value is returned on failure. * ****************************************************************************/ @@ -218,11 +218,11 @@ * raw - Lower-half, raw NAND FLASH interface * block - Number of the block where the page to write resides. * page - Number of the page to write inside the given block. - * data - Buffer containing the data to be writting + * data - Buffer containing the data to be writing * spare - Buffer containing the spare data to be written. * * Returned Value: - * OK is returned in succes; a negated errno value is returned on failure. + * OK is returned in success; a negated errno value is returned on failure. * ****************************************************************************/ diff --git a/include/nuttx/mtd/nand_scheme.h b/include/nuttx/mtd/nand_scheme.h index a30caae1657..5184ecd6576 100644 --- a/include/nuttx/mtd/nand_scheme.h +++ b/include/nuttx/mtd/nand_scheme.h @@ -6,7 +6,7 @@ * * This logic was based largely on Atmel sample code with modifications for * better integration with NuttX. The Atmel sample code has a BSD - * compatibile license that requires this copyright notice: + * compatible license that requires this copyright notice: * * Copyright (c) 2012, Atmel Corporation * diff --git a/include/nuttx/mtd/onfi.h b/include/nuttx/mtd/onfi.h index cd548e72e81..6fd6a31d9ba 100644 --- a/include/nuttx/mtd/onfi.h +++ b/include/nuttx/mtd/onfi.h @@ -11,7 +11,7 @@ * * This ONFI logic was based largely on Atmel sample code for the SAMA5D3x * with modifications for better integration with NuttX. The Atmel sample - * code has a BSD compatibile license that requires this copyright notice: + * code has a BSD compatible license that requires this copyright notice: * * Copyright (c) 2010, Atmel Corporation * diff --git a/include/nuttx/net/icmpv6.h b/include/nuttx/net/icmpv6.h index 87799f95d3a..201afed4a70 100644 --- a/include/nuttx/net/icmpv6.h +++ b/include/nuttx/net/icmpv6.h @@ -204,7 +204,7 @@ struct icmpv6_neighbor_advertise_s uint8_t opttype; /* Option Type: ICMPv6_OPT_TGTLLADDR */ uint8_t optlen; /* Option length in octets */ uint8_t tgtlladdr[6]; /* Options: Target link layer address */ - /* Actual size detemined by optlen */ + /* Actual size determined by optlen */ }; #define SIZEOF_ICMPV6_NEIGHBOR_ADVERTISE_S(n) \ diff --git a/include/nuttx/net/mii.h b/include/nuttx/net/mii.h index 6125e44ea3d..819fb647ac9 100644 --- a/include/nuttx/net/mii.h +++ b/include/nuttx/net/mii.h @@ -251,7 +251,7 @@ #define MII_ADVERTISE_1000XASYMPAU (1 << 8) /* Bit 8: Try 1000BASE-X asym pause */ #define MII_ADVERTISE_100BASET4 (1 << 9) /* Bit 9: Try 100BASE-T4 */ #define MII_ADVERTISE_FDXPAUSE (1 << 10) /* Bit 10: Try full duplex flow control */ -#define MII_ADVERTISE_ASYMPAUSE (1 << 11) /* Bit 11: Try asymetric pause */ +#define MII_ADVERTISE_ASYMPAUSE (1 << 11) /* Bit 11: Try asymmetric pause */ #define MII_ADVERTISE_RFAULT (1 << 13) /* Bit 13: Remote fault supported */ #define MII_ADVERTISE_LPACK (1 << 14) /* Bit 14: Ack link partners response */ #define MII_ADVERTISE_NXTPAGE (1 << 15) /* Bit 15: Next page enabled */ @@ -290,7 +290,7 @@ /* MII Auto-negotiation expansion register bit definitions */ -#define MII_EXPANSION_ANEGABLE (1 << 0) /* Bit 0: Link partner is auto-negotion able */ +#define MII_EXPANSION_ANEGABLE (1 << 0) /* Bit 0: Link partner is auto-negotiation able */ #define MII_EXPANSION_PAGERECVD (1 << 1) /* Bit 1: New link code word in LPA ability reg */ #define MII_EXPANSION_ENABLENPAGE (1 << 2) /* Bit 2: This enables npage words */ #define MII_EXPANSION_NXTPAGEABLE (1 << 3) /* Bit 3: Link partner supports next page */ @@ -516,7 +516,7 @@ #define KS8721_INTCS_LINKUP (1 << 0) /* Bit 0: Link up occurred */ #define KS8721_INTCS_REMFAULT (1 << 1) /* Bit 1: Remote fault occurred */ #define KS8721_INTCS_LINKDOWN (1 << 2) /* Bit 2: Link down occurred */ -#define KS8721_INTCS_LPACK (1 << 3) /* Bit 3: Link partner acknowlege occurred */ +#define KS8721_INTCS_LPACK (1 << 3) /* Bit 3: Link partner acknowledge occurred */ #define KS8721_INTCS_PDFAULT (1 << 4) /* Bit 4: Parallel detect fault occurred */ #define KS8721_INTCS_PGRCVD (1 << 5) /* Bit 5: Page received occurred */ #define KS8721_INTCS_RXERR (1 << 6) /* Bit 6: Receive error occurred */ diff --git a/include/nuttx/net/net.h b/include/nuttx/net/net.h index a7118751a65..afc86c7ad0d 100644 --- a/include/nuttx/net/net.h +++ b/include/nuttx/net/net.h @@ -1311,7 +1311,7 @@ int net_poll(int sockfd, struct pollfd *fds, bool setup); * Name: psock_dup * * Description: - * Clone a socket descriptor to an arbitray descriptor number. If file + * Clone a socket descriptor to an arbitrary descriptor number. If file * descriptors are implemented, then this is called by dup() for the case * of socket file descriptors. If file descriptors are not implemented, * then this function IS dup(). @@ -1328,7 +1328,7 @@ int psock_dup(FAR struct socket *psock, int minsd); * Name: net_dup * * Description: - * Clone a socket descriptor to an arbitray descriptor number. If file + * Clone a socket descriptor to an arbitrary descriptor number. If file * descriptors are implemented, then this is called by dup() for the case * of socket file descriptors. If file descriptors are not implemented, * then this function IS dup(). @@ -1355,7 +1355,7 @@ int psock_dup2(FAR struct socket *psock1, FAR struct socket *psock2); * Name: net_dup2 * * Description: - * Clone a socket descriptor to an arbitray descriptor number. If file + * Clone a socket descriptor to an arbitrary descriptor number. If file * descriptors are implemented, then this is called by dup2() for the case * of socket file descriptors. If file descriptors are not implemented, * then this function IS dup2(). diff --git a/include/nuttx/net/radiodev.h b/include/nuttx/net/radiodev.h index f69620e315c..9201b224187 100644 --- a/include/nuttx/net/radiodev.h +++ b/include/nuttx/net/radiodev.h @@ -113,7 +113,7 @@ struct radiodev_properties_s * compatible with 'struct net_driver_s' when dev->d_lltype == * NET_LL_IEEE802154 or dev->d_lltype == NET_LL_PKTRADIO. * - * The radio network driver has reponsibility for initializing this + * The radio network driver has responsibility for initializing this * structure. In general, all fields must be set to NULL. In addition: * * 1. On a TX poll, the radio network driver should provide its driver @@ -236,7 +236,7 @@ struct radio_driver_s * * Input Parameters: * netdev - The network device to be queried - * properties - Location where radio properities will be returned. + * properties - Location where radio properties will be returned. * * Returned Value: * Zero (OK) returned on success; a negated errno value is returned on diff --git a/include/nuttx/net/rfc6775.h b/include/nuttx/net/rfc6775.h index 56c34fba50b..329f425d3c8 100644 --- a/include/nuttx/net/rfc6775.h +++ b/include/nuttx/net/rfc6775.h @@ -133,7 +133,7 @@ struct sixlowpan_abro_s uint8_t verlo[2]; /* Bytes 2-3: Version low */ uint8_t verhi[2]; /* Bytes 4-5: Version high */ uint8_t lifetime[2]; /* Bytes 6-7: Valid lifetime */ - uint8_t ipv6[16]; /* Bytes 8-23: IPv6 address of the 6LBR orign of version */ + uint8_t ipv6[16]; /* Bytes 8-23: IPv6 address of the 6LBR origin of version */ }; /* 4.4 Duplicate Address Messages (DAD for both DAR and DAC) */ diff --git a/include/nuttx/net/sixlowpan.h b/include/nuttx/net/sixlowpan.h index 22581945ffa..786262c90a6 100644 --- a/include/nuttx/net/sixlowpan.h +++ b/include/nuttx/net/sixlowpan.h @@ -157,7 +157,7 @@ #define SIXLOWPAN_HC_UDP_SRCPORT_C 0x80 /* Source port compressed to 4 bits */ #define SIXLOWPAN_HC_UDP_DESTPORT_C 0x40 /* Destination port compressed to 4 bits */ #define SIXLOWPAN_HC_UDP_LENGTH _C 0x20 /* Elided, compute from IPv6 length */ -#define SIXLOWPAN_HC_UDP_ALL_C 0xe0 /* All commpressed */ +#define SIXLOWPAN_HC_UDP_ALL_C 0xe0 /* All compressed */ /* IPHC encoding * @@ -475,7 +475,7 @@ struct sixlowpan_reassbuf_s * * After each frame is processed into d_buf, the IOB is deallocated. If * reassembly is incomplete, the partially reassembled packet must be - * preserved by the radio network drvier and provided again when the next + * preserved by the radio network driver and provided again when the next * frame is received. * * When the packet in the d_buf is fully reassembled, it will be provided @@ -508,7 +508,7 @@ struct sixlowpan_reassbuf_s * must apply to all of the frames in the list. * * Returned Value: - * Ok is returned on success; Othewise a negated errno value is returned. + * Ok is returned on success; Otherwise a negated errno value is returned. * ****************************************************************************/ diff --git a/include/nuttx/nx/nxbe.h b/include/nuttx/nx/nxbe.h index 258f2927f48..b91fccd365d 100644 --- a/include/nuttx/nx/nxbe.h +++ b/include/nuttx/nx/nxbe.h @@ -147,7 +147,7 @@ /* Windows ******************************************************************/ /* This structure represents one window. This is the "base" form of the - * opaque types NXWINDOW and NXTKWINDOW. Any Window implementatin must + * opaque types NXWINDOW and NXTKWINDOW. Any Window implementation must * be described with a structure that is at least cast-compatible with * struct nxbe_window_s. */ diff --git a/include/nuttx/nx/nxcursor.h b/include/nuttx/nx/nxcursor.h index 4fdf17eaa45..1429cbf9eb6 100644 --- a/include/nuttx/nx/nxcursor.h +++ b/include/nuttx/nx/nxcursor.h @@ -98,7 +98,7 @@ extern "C" * is used to provide the cursor image. * * The image is provided a a 2-bits-per-pixel image. The two bit incoding - * is as followings: + * is as following: * * 00 - The transparent background * 01 - Color1: The main color of the cursor @@ -193,7 +193,7 @@ int nxcursor_setposition(NXHANDLE hnd, FAR const struct nxgl_point_s *pos); * CAUTION: The current cursor position is not updated until the display * is actually changed. Due to asynchronies caused by queue, the new * current cursor position may not match the cursor position set until - * the client and server are syncrhonized. + * the client and server are synchronized. * * Input Parameters: * hnd - The server handle returned by nx_connect() diff --git a/include/nuttx/nx/nxglib.h b/include/nuttx/nx/nxglib.h index 4fcb5434215..25a630eaf40 100644 --- a/include/nuttx/nx/nxglib.h +++ b/include/nuttx/nx/nxglib.h @@ -219,7 +219,7 @@ bool nxgl_intersecting(FAR const struct nxgl_rect_s *rect1, * Name: nxgl_rectadd * * Description: - * Return the rectangle that contains exactly two other rectanges. + * Return the rectangle that contains exactly two other rectangles. * ****************************************************************************/ @@ -483,7 +483,7 @@ void nxgl_circletraps(FAR const struct nxgl_point_s *center, * implementation of anti-aliasing without transparency. * * Input Parameters: - * color1 - The semi-transparent, forground color + * color1 - The semi-transparent, foreground color * color2 - The opaque, background color * frac1 - The fractional amount of color1 to blend into color2 * diff --git a/include/nuttx/nx/nxterm.h b/include/nuttx/nx/nxterm.h index a5676cb1732..a87a4191fdf 100644 --- a/include/nuttx/nx/nxterm.h +++ b/include/nuttx/nx/nxterm.h @@ -378,7 +378,7 @@ NXTERM nxtool_register(NXTKWINDOW hfwnd, FAR struct nxterm_window_s *wndo, * * NOTE: We don't need driver context here because the NXTERM handle * provided within each of the NXTERM IOCTL command data. Mutual - * exclusion is similar managed by the IOCTL cmmand hendler. + * exclusion is similar managed by the IOCTL cmmand handler. * * This permits the IOCTL to be called in abnormal context (such as * from boardctl()) diff --git a/include/nuttx/nx/nxtk.h b/include/nuttx/nx/nxtk.h index 8d6643fbebf..6bdfd40658f 100644 --- a/include/nuttx/nx/nxtk.h +++ b/include/nuttx/nx/nxtk.h @@ -193,7 +193,7 @@ int nxtk_block(NXTKWINDOW hfwnd, FAR void *arg); * Name: nxtk_synch * * Description: - * This interface can be used to syncrhonize the window client with the + * This interface can be used to sychronize the window client with the * NX server. It really just implements an 'echo': A synch message is * sent from the window client to the server which then responds * immediately by sending the NXEVENT_SYNCHED back to the windows client. @@ -223,7 +223,7 @@ int nxtk_block(NXTKWINDOW hfwnd, FAR void *arg); * } * } * - * When the windwo listener thread receives the NXEVENT_SYNCHED event, it + * When the window listener thread receives the NXEVENT_SYNCHED event, it * would set g_synched to true and post g_synch_sem, waking up the above * loop. * diff --git a/include/nuttx/power/bq2429x.h b/include/nuttx/power/bq2429x.h index a84b31636e1..4a9cd64d248 100644 --- a/include/nuttx/power/bq2429x.h +++ b/include/nuttx/power/bq2429x.h @@ -71,7 +71,7 @@ /* Dynamic Power Management - Indicated in StatusReg DPM_STAT REG08[3] VINDPM - Input Voltage threshold (a drop below 5V) that triggers DPM - INLIM - Input current threshold that tiggers DPM */ + INLIM - Input current threshold that triggers DPM */ #define BQ2429XR0_VINDPM_SHIFT 3 /* VIN DPM Offset 5V? Range*/ #define BQ2429XR0_VINDPM_MASK (0xf << BQ2429XR0_VINDPM_SHIFT) diff --git a/include/nuttx/power/motor.h b/include/nuttx/power/motor.h index 626817180ca..a2e1d73a231 100644 --- a/include/nuttx/power/motor.h +++ b/include/nuttx/power/motor.h @@ -272,7 +272,7 @@ struct motor_ops_s CODE int (*mode_set)(FAR struct motor_dev_s *dev, uint8_t mode); - /* Set motor limts */ + /* Set motor limits */ CODE int (*limits_set)(FAR struct motor_dev_s *dev, FAR struct motor_limits_s *limits); diff --git a/include/nuttx/power/powerled.h b/include/nuttx/power/powerled.h index 182b9afac12..3307956e570 100644 --- a/include/nuttx/power/powerled.h +++ b/include/nuttx/power/powerled.h @@ -134,7 +134,7 @@ struct powerled_params_s */ }; -/* Powerled private data strucutre */ +/* Powerled private data structure */ struct powerled_s { diff --git a/include/nuttx/power/smps.h b/include/nuttx/power/smps.h index 23aa2e81a72..a1da46a57ef 100644 --- a/include/nuttx/power/smps.h +++ b/include/nuttx/power/smps.h @@ -182,7 +182,7 @@ struct smps_params_s float p_out; /* */ }; -/* SMPS private data strucutre */ +/* SMPS private data structure */ struct smps_s { @@ -226,7 +226,7 @@ struct smps_ops_s CODE int (*mode_set)(FAR struct smps_dev_s *dev, uint8_t mode); - /* Set SMPS limts */ + /* Set SMPS limits */ CODE int (*limits_set)(FAR struct smps_dev_s *dev, FAR struct smps_limits_s *limits); diff --git a/include/nuttx/rptun/rptun.h b/include/nuttx/rptun/rptun.h index 8e1486f4b27..194ba801703 100644 --- a/include/nuttx/rptun/rptun.h +++ b/include/nuttx/rptun/rptun.h @@ -112,7 +112,7 @@ * Name: RPTUN_GET_RESOURCE * * Description: - * Get rptun resouce + * Get rptun resource * * Input Parameters: * dev - Device-specific state data diff --git a/include/nuttx/sched.h b/include/nuttx/sched.h index 2e998028d1a..8ae6ba15b4e 100644 --- a/include/nuttx/sched.h +++ b/include/nuttx/sched.h @@ -277,7 +277,7 @@ typedef CODE void (*onexitfunc_t)(int exitcode, FAR void *arg); #ifdef CONFIG_SCHED_SPORADIC -/* This structure represents oen replenishment interval. This is what is +/* This structure represents one replenishment interval. This is what is * received by each timeout handler. */ @@ -640,7 +640,7 @@ struct tcb_s cpu_set_t affinity; /* Bit set of permitted CPUs */ #endif uint16_t flags; /* Misc. general status flags */ - int16_t lockcount; /* 0=preemptable (not-locked) */ + int16_t lockcount; /* 0=preemptible (not-locked) */ #ifdef CONFIG_IRQCOUNT int16_t irqcount; /* 0=Not in critical section */ #endif @@ -849,7 +849,7 @@ FAR struct tcb_s *sched_gettcb(pid_t pid); /* File system helpers **********************************************************/ -/* These functions all extract lists from the group structure assocated with the +/* These functions all extract lists from the group structure associated with the * currently executing task. */ @@ -897,7 +897,7 @@ void nxtask_starthook(FAR struct task_tcb_s *tcb, starthook_t starthook, * - Allocation of the child task's TCB. * - Initialization of file descriptors and streams * - Configuration of environment variables - * - Setup the intput parameters for the task. + * - Setup the input parameters for the task. * - Initialization of the TCB (including call to up_initial_state() * 4) vfork() provides any additional operating context. vfork must: * - Allocate and initialize the stack diff --git a/include/nuttx/sched_note.h b/include/nuttx/sched_note.h index b56aab83fc0..e04935a5898 100644 --- a/include/nuttx/sched_note.h +++ b/include/nuttx/sched_note.h @@ -245,7 +245,7 @@ struct note_spinlock_s * * Description: * If instrumentation of the scheduler is enabled, then some outboard logic - * must provide the following interfaces. These interfaces are not availalble + * must provide the following interfaces. These interfaces are not available * to application code. * * NOTE: if CONFIG_SCHED_INSTRUMENTATION_BUFFER, then these interfaces are diff --git a/include/nuttx/sdio.h b/include/nuttx/sdio.h index d95755205f9..aac175c6502 100644 --- a/include/nuttx/sdio.h +++ b/include/nuttx/sdio.h @@ -346,7 +346,7 @@ #define SDIO_CCCR_INTPEND 0x05 /* Int Pending */ #define SDIO_CCCR_IOABORT 0x06 /* I/O Abort */ #define SDIO_CCCR_BUS_IF 0x07 /* Bus Interface Control */ -#define SDIO_CCCR_CARD_CAP 0x08 /* Card Capabilitiy */ +#define SDIO_CCCR_CARD_CAP 0x08 /* Card Capability */ #define SDIO_CCCR_CCP 0x09 /* Common CIS Pointer */ #define SDIO_CCCR_BUS_SUSP 0x0C /* Bus Suspend */ #define SDIO_CCCR_FUNCSEL 0x0D /* Function Select */ diff --git a/include/nuttx/sensors/adxl345.h b/include/nuttx/sensors/adxl345.h index 542137edd02..5c22137251c 100644 --- a/include/nuttx/sensors/adxl345.h +++ b/include/nuttx/sensors/adxl345.h @@ -135,7 +135,7 @@ #define ADXL345_TIME_INACT 0x26 /* Inactivity time */ #define ADXL345_ATC_INACT_CTL 0x27 /* Axis enable control for activity and inactivity detection */ #define ADXL345_THRESH_FF 0x28 /* Free-fall threshold */ -#define ADXL345_TIME_FF 0x29 /* Free-fall fime */ +#define ADXL345_TIME_FF 0x29 /* Free-fall time */ #define ADXL345_TAP_AXES 0x2a /* Axis control for tap/double tap */ #define ADXL345_ACT_TAP_STATUS 0x2b /* Source of tap/double tap */ #define ADXL345_BW_RATE 0x2c /* Data rate and power mode control */ @@ -202,7 +202,7 @@ #define POWER_CTL_WAKEUP_2HZ (2 << POWER_CTL_WAKEUP_SHIFT) #define POWER_CTL_WAKEUP_1HZ (3 << POWER_CTL_WAKEUP_SHIFT) #define POWER_CTL_SLEEP (1 << 2) /* Bit 2: Sleep mode, only activity function can be used */ -#define POWER_CTL_MEASURE (1 << 3) /* Bit 3: Writing 0 put part in standy mode, 1 measurement mode */ +#define POWER_CTL_MEASURE (1 << 3) /* Bit 3: Writing 0 put part in standby mode, 1 measurement mode */ #define POWER_CTL_AUTO_SLEEP (1 << 4) /* Bit 4: If set and link bit is set then device sleep if no activity */ #define POWER_CTL_LINK (1 << 5) /* Bit 5: Wait an inactivity before detecting an activity */ @@ -255,7 +255,7 @@ /* Register 0x38 - FIFO_CTL */ -#define FIFO_CTL_SAMPLES_SHIFT 0 /* Bit 0-4: Numbers of samples needed to trigger a watermask event */ +#define FIFO_CTL_SAMPLES_SHIFT 0 /* Bit 0-4: Numbers of samples needed to trigger a watermark event */ #define FIFO_CTL_SAMPLES_MASK (31 << FIFO_CTL_SAMPLES_SHIFT) #define FIFO_CTL_TRIGGER (1 << 5) /* Bit 5: Value 0 links trigger event to INT1, value 1 to INT2 */ #define FIFO_CTL_MODE_SHIFT 6 /* Bit 6-7: FIFO Mode */ diff --git a/include/nuttx/sensors/apds9960.h b/include/nuttx/sensors/apds9960.h index 44996a9769a..c73d0913c6e 100644 --- a/include/nuttx/sensors/apds9960.h +++ b/include/nuttx/sensors/apds9960.h @@ -176,7 +176,7 @@ #define CPSIEN (1 << 6) /* Bit 6: Clear diode Saturation Interrupt Enable */ #define PSIEN (1 << 7) /* Bit 7: Proximity Saturation Interrupt Enable */ -/* STATUS Regiser */ +/* STATUS Register */ #define AVALID (1 << 0) /* Bit 0: ALS Valid */ #define PVALID (1 << 1) /* Bit 1: Proximity Valid */ diff --git a/include/nuttx/sensors/as726x.h b/include/nuttx/sensors/as726x.h index 3a0168ebf09..43e1f2a87e8 100644 --- a/include/nuttx/sensors/as726x.h +++ b/include/nuttx/sensors/as726x.h @@ -111,7 +111,7 @@ #define AS726X_CMD_IT_1T 0x04 /* IT1=0 : IT0=1 */ #define AS726X_CMD_IT_2T 0x08 /* IT1=1 : IT0=0 */ #define AS726X_CMD_IT_4T 0x0c /* IT1=1 : IT0=1 */ -#define AS726X_CMD_ACK_THD 0x10 /* Acknowledge thresold: +#define AS726X_CMD_ACK_THD 0x10 /* Acknowledge threshold: * 0 = 102 steps * 1 = 145 steps */ #define AS726X_CMD_ACK 0x20 /* Acknowledge activity */ diff --git a/include/nuttx/sensors/mlx90614.h b/include/nuttx/sensors/mlx90614.h index 99e190af3bb..854fa75a30c 100644 --- a/include/nuttx/sensors/mlx90614.h +++ b/include/nuttx/sensors/mlx90614.h @@ -91,7 +91,7 @@ /* CONFIG_REG1 */ -#define CONFIG_REG1_IIR_SHIFT (0) /* Bits 2:0 - Configure IIR Coeficients */ +#define CONFIG_REG1_IIR_SHIFT (0) /* Bits 2:0 - Configure IIR Coefficients */ #define CONFIG_REG1_IIR_MASK (7 << CONFIG_REG1_IIR_SHIFT) #define CONFIG_REG1_IIR_0p5_0p5 (0 << CONFIG_REG1_IIR_SHIFT) /* a1 = 0.5 and b1 = 0.5 */ #define CONFIG_REG1_IIR_0p57_0p42 (7 << CONFIG_REG1_IIR_SHIFT) /* a1 = 0.571428571 and b1 = 0.428571428 */ @@ -130,7 +130,7 @@ /* MLX90614 Read Flags */ -#define MLX90614_EEBUSY (1 << 15) /* Previos write/erase EEPROM access is still in progress */ +#define MLX90614_EEBUSY (1 << 15) /* Previous write/erase EEPROM access is still in progress */ #define MLX90614_EEDEAD (1 << 13) /* EEPROM double error has occurred */ #define MLX90614_INIT (1 << 12) /* POR initialization routine is still ongoing */ diff --git a/include/nuttx/sensors/qencoder.h b/include/nuttx/sensors/qencoder.h index 3c4f058b057..5379f471edb 100644 --- a/include/nuttx/sensors/qencoder.h +++ b/include/nuttx/sensors/qencoder.h @@ -74,7 +74,7 @@ /* User defined ioctl commands are also supported. These will be forwarded * by the upper-half QE driver to the lower-half QE driver via the ioctl() - * method fo the QE lower-half interface. However, the lower-half driver + * method of the QE lower-half interface. However, the lower-half driver * must reserve a block of commands as follows in order prevent IOCTL * command numbers from overlapping. */ diff --git a/include/nuttx/sensors/scd30.h b/include/nuttx/sensors/scd30.h index c92a1c0f514..bb462e79b19 100644 --- a/include/nuttx/sensors/scd30.h +++ b/include/nuttx/sensors/scd30.h @@ -55,7 +55,7 @@ struct i2c_master_s; /* Forward reference */ struct scd30_conv_data_s { - float temperature; /* Celcius */ + float temperature; /* Celsius */ float humidity; /* RH-% */ float co2; /* COâ‚‚ PPM */ }; diff --git a/include/nuttx/sensors/veml6070.h b/include/nuttx/sensors/veml6070.h index bd06326eae0..986f0b6b7e3 100644 --- a/include/nuttx/sensors/veml6070.h +++ b/include/nuttx/sensors/veml6070.h @@ -71,7 +71,7 @@ #define VEML6070_CMD_IT_1T 0x04 /* IT1=0 : IT0=1 */ #define VEML6070_CMD_IT_2T 0x08 /* IT1=1 : IT0=0 */ #define VEML6070_CMD_IT_4T 0x0c /* IT1=1 : IT0=1 */ -#define VEML6070_CMD_ACK_THD 0x10 /* Acknowledge thresold: +#define VEML6070_CMD_ACK_THD 0x10 /* Acknowledge threshold: 0 = 102 steps 1 = 145 steps */ #define VEML6070_CMD_ACK 0x20 /* Acknowledge activity */ diff --git a/include/nuttx/sensors/xen1210.h b/include/nuttx/sensors/xen1210.h index ea2f356695e..295e9cc4bfb 100644 --- a/include/nuttx/sensors/xen1210.h +++ b/include/nuttx/sensors/xen1210.h @@ -86,7 +86,7 @@ #define XEN1210_TIMING 0x01 /* Timing and biasing settings */ #define XEN1210_TEST 0x02 /* Testing */ -/* Timming Cycles */ +/* Timing Cycles */ #define XEN1210_1K_CYCLES 0x1113 /* 1024 cycles used be internale ADC */ #define XEN1210_2K_CYCLES 0x2113 /* 2048 cycles used be internale ADC */ diff --git a/include/nuttx/serial/serial.h b/include/nuttx/serial/serial.h index 410bf379e25..1dc39c44331 100644 --- a/include/nuttx/serial/serial.h +++ b/include/nuttx/serial/serial.h @@ -499,8 +499,8 @@ void uart_recvchars_done(FAR uart_dev_t *dev); * Name: uart_reset_sem * * Description: - * This function is called when need reset uart semphore, this may used in kill one - * process, but this process was reading/writing with the semphore. + * This function is called when need reset uart semaphore, this may used in kill one + * process, but this process was reading/writing with the semaphore. * ************************************************************************************/ diff --git a/include/nuttx/serial/tioctl.h b/include/nuttx/serial/tioctl.h index 9ce789256ca..1bae0d7a173 100644 --- a/include/nuttx/serial/tioctl.h +++ b/include/nuttx/serial/tioctl.h @@ -54,7 +54,7 @@ #define TCGETS _TIOC(0x0001) /* Get serial port settings: FAR struct termios* */ #define TCSETS _TIOC(0x0002) /* Set serial port settings: FAR const struct termios* */ #define TCSETSW _TIOC(0x0003) /* Drain output and set serial port settings: FAR const struct termios* */ -#define TCSETSF _TIOC(0x0004) /* Drain output, discard intput, and set serial port settings: FAR const struct termios* */ +#define TCSETSF _TIOC(0x0004) /* Drain output, discard input, and set serial port settings: FAR const struct termios* */ #define TCGETA _TIOC(0x0005) /* See TCGETS: FAR struct termio* */ #define TCSETA _TIOC(0x0006) /* See TCSETS: FAR const struct termio* */ #define TCSETAW _TIOC(0x0007) /* See TCSETSF: FAR const struct termio* */ @@ -174,7 +174,7 @@ /* Definitions for flags used in struct serial_rs485 (Linux compatible) */ -# define SER_RS485_ENABLED (1 << 0) /* Enable/disble RS-485 support */ +# define SER_RS485_ENABLED (1 << 0) /* Enable/disable RS-485 support */ # define SER_RS485_RTS_ON_SEND (1 << 1) /* Logic level for RTS pin when sending */ # define SER_RS485_RTS_AFTER_SEND (1 << 2) /* Logic level for RTS pin after sent */ # define SER_RS485_RX_DURING_TX (1 << 4) @@ -197,8 +197,8 @@ /* Inversion Support */ -#define TIOCSINVERT _TIOC(0x0033) /* Set Singal Inversion */ -#define TIOCGINVERT _TIOC(0x0034) /* Get Singal Inversion */ +#define TIOCSINVERT _TIOC(0x0033) /* Set Signal Inversion */ +#define TIOCGINVERT _TIOC(0x0034) /* Get Signal Inversion */ #define SER_INVERT_ENABLED_RX (1 << 0) /* Enable/disable signal inversion for RX */ #define SER_INVERT_ENABLED_TX (1 << 1) /* Enable/disable signal inversion for TX */ diff --git a/include/nuttx/spi/qspi.h b/include/nuttx/spi/qspi.h index 3db0826c397..9cc86dded47 100644 --- a/include/nuttx/spi/qspi.h +++ b/include/nuttx/spi/qspi.h @@ -55,12 +55,12 @@ * Name: QSPI_LOCK * * Description: - * On QSPI busses where there are multiple devices, it will be necessary to - * lock QSPI to have exclusive access to the busses for a sequence of + * On QSPI buses where there are multiple devices, it will be necessary to + * lock QSPI to have exclusive access to the buses for a sequence of * transfers. The bus should be locked before the chip is selected. After * locking the QSPI bus, the caller should then also call the setfrequency, * setbits, and setmode methods to make sure that the QSPI is properly - * configured for the device. If the QSPI buss is being shared, then it + * configured for the device. If the QSPI bus is being shared, then it * may have been left in an incompatible state. * * Input Parameters: @@ -202,7 +202,7 @@ * buflen - Buffer length to allocate in bytes * * Returned Value: - * Address of tha allocated memory on success; NULL is returned on any + * Address of the allocated memory on success; NULL is returned on any * failure. * ****************************************************************************/ diff --git a/include/nuttx/spi/spi.h b/include/nuttx/spi/spi.h index d7ab4fc3c03..aba5de25a79 100644 --- a/include/nuttx/spi/spi.h +++ b/include/nuttx/spi/spi.h @@ -77,7 +77,7 @@ * transfers. The bus should be locked before the chip is selected. After * locking the SPI bus, the caller should then also call the setfrequency, * setbits, and setmode methods to make sure that the SPI is properly - * configured for the device. If the SPI buss is being shared, then it + * configured for the device. If the SPI bus is being shared, then it * may have been left in an incompatible state. * * Input Parameters: diff --git a/include/nuttx/spi/spi_bitbang.c b/include/nuttx/spi/spi_bitbang.c index b33f5f04642..6d483ee3964 100644 --- a/include/nuttx/spi/spi_bitbang.c +++ b/include/nuttx/spi/spi_bitbang.c @@ -156,7 +156,7 @@ static uint32_t spi_setfrequency(FAR struct spi_bitbang_s *priv, uint32_t freque uint32_t pnsec; /* SPI frequency cannot be precisely controlled with a bit-bang interface. - * Freqency corresponds to delay in toggle the SPI clock line: Set high, + * Frequency corresponds to delay in toggle the SPI clock line: Set high, * wait, set low, wait, set high, wait, etc. * * Here we calcalute the half period of the frequency in nanoseconds (i.e., diff --git a/include/nuttx/symtab.h b/include/nuttx/symtab.h index a2fd09d1040..e77adb87a6c 100644 --- a/include/nuttx/symtab.h +++ b/include/nuttx/symtab.h @@ -58,7 +58,7 @@ * supported, then typing information would also need to be included in * the structure. * - * 2. Fixed size arrays. There is no explicit provisional for dyanamically + * 2. Fixed size arrays. There is no explicit provisional for dynamically * adding or removing entries from the symbol table (realloc might be * used for that purpose if needed). The intention is to support only * fixed size arrays completely defined at compilation or link time. diff --git a/include/nuttx/timers/oneshot.h b/include/nuttx/timers/oneshot.h index 4662fbf232b..9992515b70b 100644 --- a/include/nuttx/timers/oneshot.h +++ b/include/nuttx/timers/oneshot.h @@ -63,7 +63,7 @@ * * OSIOC_MAXDELAY - Return the maximum delay that can be supported by * this timer. - * Argument: A referenct to a struct timespec in which + * Argument: A reference to a struct timespec in which * the maximum time will be returned. * OSIOC_START - Start the oneshot timer * Argument: A reference to struct oneshot_start_s @@ -96,7 +96,7 @@ * lower An instance of the lower-half oneshot state structure. This * structure must have been previously initialized via a call to * oneshot_initialize(); - * ts The location in which to return the maxumum delay. + * ts The location in which to return the maximum delay. * * Returned Value: * Zero (OK) is returned on success; a negated errno value is returned diff --git a/include/nuttx/timers/timer.h b/include/nuttx/timers/timer.h index 62a9ea12595..c78ec97bb07 100644 --- a/include/nuttx/timers/timer.h +++ b/include/nuttx/timers/timer.h @@ -74,7 +74,7 @@ * TCIOC_NOTIFICATION - Set up to notify an application via a signal when * the timer expires. * Argument: A read-only pointer to an instance of - * stuct timer_notify_s. + * struct timer_notify_s. * TCIOC_MAXTIMEOUT - Get the maximum supported timeout value * Argument: A 32-bit timeout value in microseconds. * @@ -265,7 +265,7 @@ FAR void *timer_register(FAR const char *path, void timer_unregister(FAR void *handle); /**************************************************************************** - * Kernal internal interfaces. Thse may not be used by application logic + * Kernel internal interfaces. Thse may not be used by application logic ****************************************************************************/ /**************************************************************************** diff --git a/include/nuttx/timers/watchdog.h b/include/nuttx/timers/watchdog.h index 00c3d25c46e..89c6236e39b 100644 --- a/include/nuttx/timers/watchdog.h +++ b/include/nuttx/timers/watchdog.h @@ -1,5 +1,5 @@ /**************************************************************************** - * include/nuttx/timers/watchog.h + * include/nuttx/timers/watchdog.h * * Copyright (C) 2012 Gregory Nutt. All rights reserved. * Author: Gregory Nutt @@ -93,7 +93,7 @@ /* Bit settings for the struct watchdog_status_s flags field */ #define WDFLAGS_ACTIVE (1 << 0) /* 1=The watchdog timer is running */ -#define WDFLAGS_RESET (1 << 1) /* 1=Reset when the watchog timer expires */ +#define WDFLAGS_RESET (1 << 1) /* 1=Reset when the watchdog timer expires */ #define WDFLAGS_CAPTURE (1 << 2) /* 1=Call the user function when the * watchdog timer expires */ diff --git a/include/nuttx/usb/audio.h b/include/nuttx/usb/audio.h index 97f8495662a..d7f695beaea 100644 --- a/include/nuttx/usb/audio.h +++ b/include/nuttx/usb/audio.h @@ -1477,7 +1477,7 @@ begin_packed_struct struct adc_hilo_rangeparm_s struct adc_int_message_s { uint8_t im_info; /* 0: Bitmap - * Bit 0: Vender specific, + * Bit 0: Vendor specific, * Bit 1: Interface or endpoint * Bits 2-7: Reserved */ uint8_t im_attr; /* 1: The attribute that cause the interrupt */ diff --git a/include/nuttx/usb/cdc.h b/include/nuttx/usb/cdc.h index 0cbaf9a43ac..e2b13a1ea60 100644 --- a/include/nuttx/usb/cdc.h +++ b/include/nuttx/usb/cdc.h @@ -52,7 +52,7 @@ /* Table 14: Communication Device Class Code (see definition USB_CLASS_CDC in usb.h) */ /* Table 18: Data Interface Class Code (see definition USB_CLASS_CDC_DATA in usb.h) */ -/* Communication Inteface Class Codes *******************************************************/ +/* Communication Interface Class Codes ******************************************************/ /* Table 15: Communication Interface Class Code */ #define CDC_CLASS_COMM 0x02 /* Communication Interface Class */ @@ -379,7 +379,7 @@ * transmission */ #define ECMCAP_XMIT_LATE_COLLS (1 << 28) /* Late collisions detected */ - /* Bits 29-31 Resrved, Must be set to zero */ + /* Bits 29-31 Reserved, Must be set to zero */ /* Table 47: Communication Feature Selector Codes */ diff --git a/include/nuttx/usb/cdcacm.h b/include/nuttx/usb/cdcacm.h index 700119015a5..b74dde07fd2 100644 --- a/include/nuttx/usb/cdcacm.h +++ b/include/nuttx/usb/cdcacm.h @@ -98,7 +98,7 @@ * Size of the serial receive/transmit buffers. Default 256. */ -/* Informations needed in usbdev_devinfo_s */ +/* Information needed in usbdev_devinfo_s */ #define CDCACM_NUM_EPS (3) diff --git a/include/nuttx/usb/composite.h b/include/nuttx/usb/composite.h index a71cee373ab..ada53981c49 100644 --- a/include/nuttx/usb/composite.h +++ b/include/nuttx/usb/composite.h @@ -54,7 +54,7 @@ * Enables USB composite device support */ -#define COMPOSITE_NSTRIDS (5) /* The numer of String-IDs to +#define COMPOSITE_NSTRIDS (5) /* The number of String-IDs to * reserve for the composite device */ #define COMPOSITE_NCONFIGS (1) /* The number of configurations * supported */ diff --git a/include/nuttx/usb/ehci.h b/include/nuttx/usb/ehci.h index 85dcb0f12c9..c41240e47e9 100644 --- a/include/nuttx/usb/ehci.h +++ b/include/nuttx/usb/ehci.h @@ -220,7 +220,7 @@ #define EHCI_PCI_USBLEGCTLSTS_PC (1 << 30) /* Bit 30: SMI on PCI Command */ #define EHCI_PCI_USBLEGCTLSTS_BAR (1 << 31) /* Bit 31: SMI on BAR */ -/* Host Controller Capability Register Bit Defintions ***************************************/ +/* Host Controller Capability Register Bit Definitions ***************************************/ /* Paragraph 2.2 */ /* Core Capability Register Length. Paragraph 2.2.1. 8-bit length. */ diff --git a/include/nuttx/usb/hid.h b/include/nuttx/usb/hid.h index eb555a2e777..a635d7d3e3b 100644 --- a/include/nuttx/usb/hid.h +++ b/include/nuttx/usb/hid.h @@ -641,8 +641,8 @@ struct usbhid_descriptor_s /* Optional descriptors may follow */ }; -/* The HID descriptior is can be variable length. It may be include an - * arbitray number of optional descriptors. +/* The HID descriptor is can be variable length. It may be include an + * arbitrary number of optional descriptors. */ struct usbhid_optdesc_s diff --git a/include/nuttx/usb/usbmonitor.h b/include/nuttx/usb/usbmonitor.h index fe360c0cc23..d14fa9716ef 100644 --- a/include/nuttx/usb/usbmonitor.h +++ b/include/nuttx/usb/usbmonitor.h @@ -67,7 +67,7 @@ extern "C" /**************************************************************************** * Name: usbmonitor_start and usbmonitor_stop * - * Start and stop the USB monitor kernel deamon. + * Start and stop the USB monitor kernel daemon. * * Input Parameters: * None diff --git a/include/nuttx/usb/usbmsc.h b/include/nuttx/usb/usbmsc.h index 220e60ab1d8..dd5796c5807 100644 --- a/include/nuttx/usb/usbmsc.h +++ b/include/nuttx/usb/usbmsc.h @@ -56,7 +56,7 @@ * Pre-processor Definitions ****************************************************************************/ -/* Informations about the device needed in usbdev_devinfo_s */ +/* Information about the device needed in usbdev_devinfo_s */ #define USBMSC_CONFIGID (1) /* The only supported configuration ID */ #define USBMSC_NENDPOINTS (2) /* Number of endpoints in the interface */ diff --git a/include/nuttx/video/fb.h b/include/nuttx/video/fb.h index 5bc7387e0cb..0ae47bd4350 100644 --- a/include/nuttx/video/fb.h +++ b/include/nuttx/video/fb.h @@ -511,7 +511,7 @@ struct fb_vtable_s #ifdef CONFIG_FB_SYNC /* The following are provided only if the video hardware signals - * vertical snyc. + * vertical sync. */ int (*waitforvsync)(FAR struct fb_vtable_s *vtable); diff --git a/include/nuttx/wireless/bluetooth/bt_uuid.h b/include/nuttx/wireless/bluetooth/bt_uuid.h index 433e8e024c1..31050f67485 100644 --- a/include/nuttx/wireless/bluetooth/bt_uuid.h +++ b/include/nuttx/wireless/bluetooth/bt_uuid.h @@ -250,7 +250,7 @@ struct bt_uuid_s }; /**************************************************************************** - * Public Functin Prototypes + * Public Function Prototypes ****************************************************************************/ /**************************************************************************** diff --git a/include/nuttx/wireless/ieee802154/ieee802154_mac.h b/include/nuttx/wireless/ieee802154/ieee802154_mac.h index a09a64d053f..8b35c361b46 100644 --- a/include/nuttx/wireless/ieee802154/ieee802154_mac.h +++ b/include/nuttx/wireless/ieee802154/ieee802154_mac.h @@ -271,7 +271,7 @@ #define IEEE802154_MIN_CAP_LENGTH 440 #define IEEE802154_UNIT_BACKOFF_PERIOD 20 -/* IEEE 802.15.4 MAC PIB Attribut Defaults */ +/* IEEE 802.15.4 MAC PIB Attribute Defaults */ /* Definitions used by IOCTL calls */ @@ -455,7 +455,7 @@ enum ieee802154_attr_e IEEE802154_ATTR_MAC_PANCOORD_EXT_ADDR, IEEE802154_ATTR_MAC_PANCOORD_SHORT_ADDR, - /* Non-standard MAC Atrributes*/ + /* Non-standard MAC Attributes*/ IEEE802154_ATTR_MAC_DEVMODE, }; @@ -827,7 +827,7 @@ struct ieee802154_data_ind_s FAR struct iob_s *frame; struct ieee802154_addr_s src; /* Source addressing information */ - struct ieee802154_addr_s dest; /* Destination addressing infromation */ + struct ieee802154_addr_s dest; /* Destination addressing information */ uint8_t lqi; /* Link Quality Index */ uint8_t rssi; /* Non-standard field */ uint8_t dsn; /* Data Sequence Number */ @@ -940,7 +940,7 @@ struct ieee802154_assoc_req_s * or not. Which means we don't know whether to tranmsit immediately or try * to track the beacon. The standard does say that ALL command frames should * be sent during the Contention Access Period (CAP), but how could you send - * it at the rigth time, if you are not tracking the beacon. What's worse is + * it at the right time, if you are not tracking the beacon. What's worse is * in the association section, it says if you are tracking the beacon, to * send the association request during the CAP. But how can you track the * beacon if you are not associated. Normally tracking the beacon would be @@ -1465,7 +1465,7 @@ struct ieee802154_get_req_s * Attempts to write the given value to the indicated PIB attribute. * * NOTE: The standard specifies that confirmation should be indicated via - * the asynchronous MLME-SET.confirm primitve. However, in our implementation + * the asynchronous MLME-SET.confirm primitive. However, in our implementation * there is no reason not to synchronously return the status immediately. * Therefore, we do merge the functionality of the MLME-SET.request and * MLME-SET.confirm primitives together. diff --git a/include/nuttx/wireless/ioctl.h b/include/nuttx/wireless/ioctl.h index ae7c3adddb1..cf1e50638be 100644 --- a/include/nuttx/wireless/ioctl.h +++ b/include/nuttx/wireless/ioctl.h @@ -80,8 +80,8 @@ #define WL_NCMDS 0x0006 /* Number of common commands */ /* User defined ioctl commands are also supported. These will be forwarded - * by the upper-half QE driver to the lower-half QE driver via the ioctl() - * method fo the QE lower-half interface. However, the lower-half driver + * by the upper-half driver to the lower-half driver via the ioctl() + * method of the lower-half interface. However, the lower-half driver * must reserve a block of commands as follows in order prevent IOCTL * command numbers from overlapping. */ diff --git a/include/nuttx/wireless/lpwan/sx127x.h b/include/nuttx/wireless/lpwan/sx127x.h index a2c7a631043..95f00927c8b 100644 --- a/include/nuttx/wireless/lpwan/sx127x.h +++ b/include/nuttx/wireless/lpwan/sx127x.h @@ -107,7 +107,7 @@ * - SF for LORA * - CR for LORA * - FREQ HOPPING - * - IMPLICT HEADER for LORA + * - IMPLICIT HEADER for LORA */ /* RX FIFO data *************************************************************/ diff --git a/include/nuttx/wqueue.h b/include/nuttx/wqueue.h index 50d3d0bae83..4091a3db640 100644 --- a/include/nuttx/wqueue.h +++ b/include/nuttx/wqueue.h @@ -290,7 +290,7 @@ enum work_evtype_e WORK_TCP_DISCONNECT, /* Notify loss of TCP connection */ WORK_UDP_READAHEAD, /* Notify that UDP read-ahead data is available */ WORK_UDP_WRITEBUFFER, /* Notify that UDP write buffer is empty */ - WORK_NETLINK_RESPONSE /* Notify thtat Netlink response is available */ + WORK_NETLINK_RESPONSE /* Notify that Netlink response is available */ }; /* This structure describes one notification and is provided as input to diff --git a/include/nxflat.h b/include/nxflat.h index 18d1b716559..c426f12c1ab 100644 --- a/include/nxflat.h +++ b/include/nxflat.h @@ -92,7 +92,7 @@ struct nxflat_hdr_s * The size of the data/bss segment includes (as a minimum) the data * and bss regions (bss_end - data_start) as well as the size of the * stack. At run time, this region will also include program arguments - * and environement variables. + * and environment variables. * * The bss segment is data_end through bss_end. */ @@ -130,7 +130,7 @@ struct nxflat_hdr_s /* 16-bit counts * - * h_reloccount - The number of relocation records in the arry + * h_reloccount - The number of relocation records in the array * h_importcount - The number of records in the h_importsymbols array. */ diff --git a/include/pthread.h b/include/pthread.h index 823051fe55c..c3f8c79a41c 100644 --- a/include/pthread.h +++ b/include/pthread.h @@ -506,7 +506,7 @@ int pthread_setcancelstate(int state, FAR int *oldstate); int pthread_setcanceltype(int type, FAR int *oldtype); void pthread_testcancel(void); -/* A thread may set up cleanup functions to execut when the thread exits or +/* A thread may set up cleanup functions to execute when the thread exits or * is canceled. */ diff --git a/include/stdlib.h b/include/stdlib.h index b178250e700..60e7e7be444 100644 --- a/include/stdlib.h +++ b/include/stdlib.h @@ -261,10 +261,10 @@ long long int llabs(long long int j); #endif #ifdef CONFIG_CAN_PASS_STRUCTS -div_t div(int numer, int denom); -ldiv_t ldiv(long numer, long denom); +div_t div(int number, int denom); +ldiv_t ldiv(long number, long denom); #ifdef CONFIG_HAVE_LONG_LONG -lldiv_t lldiv(long long numer, long long denom); +lldiv_t lldiv(long long number, long long denom); #endif #endif diff --git a/include/sys/boardctl.h b/include/sys/boardctl.h index 24827c0ee38..ceb63c962d7 100644 --- a/include/sys/boardctl.h +++ b/include/sys/boardctl.h @@ -113,7 +113,7 @@ * DEPENDENCIES: None * * CMD: BOARDIOC_ROMDISK - * DESCRIPTION: Reigster + * DESCRIPTION: Register * ARG: Pointer to read-only instance of struct boardioc_romdisk_s. * CONFIGURATION: CONFIG_BOARDCTL_ROMDISK * DEPENDENCIES: None diff --git a/include/sys/prctl.h b/include/sys/prctl.h index 7a62f463c29..44cf20b34c6 100644 --- a/include/sys/prctl.h +++ b/include/sys/prctl.h @@ -94,7 +94,7 @@ extern "C" * the specific command. * * Returned Value: - * The returned value may depend on the specific commnand. For PR_SET_NAME + * The returned value may depend on the specific command. For PR_SET_NAME * and PR_GET_NAME, the returned value of 0 indicates successful operation. * On any failure, -1 is retruend and the errno value is set appropriately. * diff --git a/include/sys/sendfile.h b/include/sys/sendfile.h index c414532671e..e75797a3b8b 100644 --- a/include/sys/sendfile.h +++ b/include/sys/sendfile.h @@ -77,7 +77,7 @@ extern "C" * sendfile() copies data between one file descriptor and another. * sendfile() basically just wraps a sequence of reads() and writes() * to perform a copy. It serves a purpose in systems where there is - * a penalty for copies to between user and kernal space, but really + * a penalty for copies to between user and kernel space, but really * nothing in NuttX but provide some Linux compatible (and adding * another 'almost standard' interface). * diff --git a/mm/iob/iob_statistics.c b/mm/iob/iob_statistics.c index e01c0d43141..0616683bd03 100644 --- a/mm/iob/iob_statistics.c +++ b/mm/iob/iob_statistics.c @@ -113,7 +113,7 @@ void iob_stats_onfree(enum iob_user_e producerid) * Name: iob_getuserstats * * Description: - * Return a reference to the IOB usage statitics for the IOB consumer/producer + * Return a reference to the IOB usage statistics for the IOB consumer/producer * * Input Parameters: * userid - id representing the IOB producer/consumer diff --git a/mm/kmm_heap/kmm_sbrk.c b/mm/kmm_heap/kmm_sbrk.c index cbb7f5ed5ff..45886782615 100644 --- a/mm/kmm_heap/kmm_sbrk.c +++ b/mm/kmm_heap/kmm_sbrk.c @@ -52,7 +52,7 @@ * * Description: * The sbrk() function is used to change the amount of space allocated - * for the calling process. The change is made by resetting the process' + * for the calling process. The change is made by resetting the process's * break value and allocating the appropriate amount of space. The amount * of allocated space increases as the break value increases. * diff --git a/mm/mm_heap/mm_sbrk.c b/mm/mm_heap/mm_sbrk.c index 570021c07d6..eca52c8321d 100644 --- a/mm/mm_heap/mm_sbrk.c +++ b/mm/mm_heap/mm_sbrk.c @@ -58,7 +58,7 @@ * * Description: * The sbrk() function is used to change the amount of space allocated - * for the calling process. The change is made by resetting the process' + * for the calling process. The change is made by resetting the process's * break value and allocating the appropriate amount of space. The amount * of allocated space increases as the break value increases. * diff --git a/mm/shm/README.txt b/mm/shm/README.txt index f43bc62306e..7cbe6c89383 100644 --- a/mm/shm/README.txt +++ b/mm/shm/README.txt @@ -60,7 +60,7 @@ Concepts size CONFIG_MM_PGSIZE. - A set of physical pages are allocated and the physical address of - these pages is retained in the internel data set. + these pages is retained in the internal data set. Now the key maps to and shared memory identifier (the table index) and the table index provides access to the list of physical pages making up @@ -89,7 +89,7 @@ Concepts - Allocate a virtual address spaces of the same size as the physical address space using the per-process virtual shared memory virtual - page allocator that can be found in the calling process' task group + page allocator that can be found in the calling process's task group structure. - Use platform specific interfaces to mapy the physical memory to the diff --git a/mm/shm/shm_initialize.c b/mm/shm/shm_initialize.c index 428eefc8949..8c57d58200f 100644 --- a/mm/shm/shm_initialize.c +++ b/mm/shm/shm_initialize.c @@ -68,7 +68,7 @@ struct shm_info_s g_shminfo; * Name: shm_initialize * * Description: - * Perform one time, start-up initialization of the shared memor logic. + * Perform one time, start-up initialization of the shared memory logic. * * Input Parameters: * None diff --git a/mm/umm_heap/umm_sbrk.c b/mm/umm_heap/umm_sbrk.c index 3bee8db0340..b384ff55ea5 100644 --- a/mm/umm_heap/umm_sbrk.c +++ b/mm/umm_heap/umm_sbrk.c @@ -56,7 +56,7 @@ * * Description: * The sbrk() function is used to change the amount of space allocated - * for the calling process. The change is made by resetting the process' + * for the calling process. The change is made by resetting the process's * break value and allocating the appropriate amount of space. The amount * of allocated space increases as the break value increases. * diff --git a/net/arp/arp.h b/net/arp/arp.h index e1911d8765e..af0fcd3d2d1 100644 --- a/net/arp/arp.h +++ b/net/arp/arp.h @@ -286,7 +286,7 @@ int arp_wait_cancel(FAR struct arp_notify_s *notify); * timeout occurs. * * Assumptions: - * This function is called from ARP send and mut execute with the network + * This function is called from ARP send and must execute with the network * un-locked. * ****************************************************************************/ diff --git a/net/bluetooth/Kconfig b/net/bluetooth/Kconfig index 96b6db8545f..b4479b53801 100644 --- a/net/bluetooth/Kconfig +++ b/net/bluetooth/Kconfig @@ -45,7 +45,7 @@ config NET_BLUETOOTH_BACKLOG will be freed, preventing overrun at the cost of losing the oldest frames. - NOTE: The special value of zero will disable all backlog checkes. + NOTE: The special value of zero will disable all backlog checks. endif # NET_BLUETOOTH endmenu # Bluetooth Socket Support diff --git a/net/bluetooth/bluetooth_container.c b/net/bluetooth/bluetooth_container.c index 4c445159228..c44a906d193 100644 --- a/net/bluetooth/bluetooth_container.c +++ b/net/bluetooth/bluetooth_container.c @@ -64,7 +64,7 @@ static FAR struct bluetooth_container_s *g_free_container; -/* Pool of pre-allocated meta-data stuctures */ +/* Pool of pre-allocated meta-data structures */ static struct bluetooth_container_s g_container_pool[CONFIG_NET_BLUETOOTH_NCONTAINERS]; diff --git a/net/bluetooth/bluetooth_input.c b/net/bluetooth/bluetooth_input.c index 483390cf0cc..97c5dd31b62 100644 --- a/net/bluetooth/bluetooth_input.c +++ b/net/bluetooth/bluetooth_input.c @@ -95,7 +95,7 @@ static int bluetooth_count_frames(FAR struct bluetooth_conn_s *conn) * Input Parameters: * conn - The socket connection structure. * framel - A single frame to add to the RX queue. - * meta - Meta data characterizing the received frane. + * meta - Meta data characterizing the received frame. * * Returned Value: * Zero (OK) is returned on success; A negated errno value is returned on diff --git a/net/bluetooth/bluetooth_recvfrom.c b/net/bluetooth/bluetooth_recvfrom.c index bacd04b884b..9aa03cf3534 100644 --- a/net/bluetooth/bluetooth_recvfrom.c +++ b/net/bluetooth/bluetooth_recvfrom.c @@ -139,7 +139,7 @@ static ssize_t bluetooth_recvfrom_rxqueue(FAR struct radio_driver_s *radio, size_t copylen; int ret = -EAGAIN; - /* Check if there is anyting in in the RX input queue */ + /* Check if there is anything in in the RX input queue */ DEBUGASSERT(pstate != NULL && pstate->ir_sock != NULL); conn = (FAR struct bluetooth_conn_s *)pstate->ir_sock->s_conn; @@ -183,7 +183,7 @@ static ssize_t bluetooth_recvfrom_rxqueue(FAR struct radio_driver_s *radio, ninfo("Received %d bytes\n", (int)copylen); ret = copylen; - /* If a 'from' address poiner was supplied, copy the source address + /* If a 'from' address pointer was supplied, copy the source address * in the container there. */ diff --git a/net/bluetooth/bluetooth_sockif.c b/net/bluetooth/bluetooth_sockif.c index 92a9c62a6e6..41bcafac221 100644 --- a/net/bluetooth/bluetooth_sockif.c +++ b/net/bluetooth/bluetooth_sockif.c @@ -260,7 +260,7 @@ static void bluetooth_addref(FAR struct socket *psock) * addrlen Length of actual 'addr' * * Returned Value: - * 0 on success; a negated errno value on failue. See connect() for the + * 0 on success; a negated errno value on failure. See connect() for the * list of appropriate errno values to be returned. * ****************************************************************************/ @@ -335,7 +335,7 @@ static int bluetooth_connect(FAR struct socket *psock, * * Returned Value: * Returns 0 (OK) on success. On failure, it returns a negated errno - * value. See accept() for a desrciption of the approriate error value. + * value. See accept() for a desrciption of the appropriate error value. * * Assumptions: * The network is locked. @@ -413,7 +413,7 @@ static int bluetooth_bind(FAR struct socket *psock, /* Very that some address was provided. * - * REVISIT: Currently and explict address must be assigned. Should we + * REVISIT: Currently and explicit address must be assigned. Should we * support some moral equivalent to INADDR_ANY? */ diff --git a/net/icmp/icmp_recvfrom.c b/net/icmp/icmp_recvfrom.c index 1e66a7b03b7..5f46e5aaddf 100644 --- a/net/icmp/icmp_recvfrom.c +++ b/net/icmp/icmp_recvfrom.c @@ -231,7 +231,7 @@ end_wait: * pstate recvfrom state structure * * Returned Value: - * Nunber of bytes copied to the user buffer + * Number of bytes copied to the user buffer * * Assumptions: * The network is locked. diff --git a/net/icmp/icmp_sockif.c b/net/icmp/icmp_sockif.c index 7c9f6548c63..983eb71675c 100644 --- a/net/icmp/icmp_sockif.c +++ b/net/icmp/icmp_sockif.c @@ -238,7 +238,7 @@ static void icmp_addref(FAR struct socket *psock) * addrlen Length of actual 'addr' * * Returned Value: - * 0 on success; a negated errno value on failue. See connect() for the + * 0 on success; a negated errno value on failure. See connect() for the * list of appropriate errno values to be returned. * ****************************************************************************/ @@ -285,7 +285,7 @@ static int icmp_connect(FAR struct socket *psock, * * Returned Value: * Returns 0 (OK) on success. On failure, it returns a negated errno - * value. See accept() for a desrciption of the approriate error value. + * value. See accept() for a desrciption of the appropriate error value. * * Assumptions: * The network is locked. diff --git a/net/icmpv6/icmpv6_recvfrom.c b/net/icmpv6/icmpv6_recvfrom.c index 9d5aaa9fe77..71511f20026 100644 --- a/net/icmpv6/icmpv6_recvfrom.c +++ b/net/icmpv6/icmpv6_recvfrom.c @@ -238,7 +238,7 @@ end_wait: * pstate recvfrom state structure * * Returned Value: - * Nunber of bytes copied to the user buffer + * Number of bytes copied to the user buffer * * Assumptions: * The network is locked. diff --git a/net/icmpv6/icmpv6_sockif.c b/net/icmpv6/icmpv6_sockif.c index 6dee887cca1..c99d1845b74 100644 --- a/net/icmpv6/icmpv6_sockif.c +++ b/net/icmpv6/icmpv6_sockif.c @@ -238,7 +238,7 @@ static void icmpv6_addref(FAR struct socket *psock) * addrlen Length of actual 'addr' * * Returned Value: - * 0 on success; a negated errno value on failue. See connect() for the + * 0 on success; a negated errno value on failure. See connect() for the * list of appropriate errno values to be returned. * ****************************************************************************/ @@ -285,7 +285,7 @@ static int icmpv6_connect(FAR struct socket *psock, * * Returned Value: * Returns 0 (OK) on success. On failure, it returns a negated errno - * value. See accept() for a desrciption of the approriate error value. + * value. See accept() for a desrciption of the appropriate error value. * * Assumptions: * The network is locked. diff --git a/net/ieee802154/Kconfig b/net/ieee802154/Kconfig index e5749ebbf7e..302fecb5004 100644 --- a/net/ieee802154/Kconfig +++ b/net/ieee802154/Kconfig @@ -56,7 +56,7 @@ config NET_IEEE802154_BACKLOG will be freed, preventing overrun at the cost of losing the oldest frames. - NOTE: The special value of zero will disable all backlog checkes. + NOTE: The special value of zero will disable all backlog checks. endif # NET_IEEE802154 endmenu # IEEE 802.15.4 Socket Support diff --git a/net/ieee802154/ieee802154_container.c b/net/ieee802154/ieee802154_container.c index 2f16b992584..d53687aca3c 100644 --- a/net/ieee802154/ieee802154_container.c +++ b/net/ieee802154/ieee802154_container.c @@ -64,7 +64,7 @@ static FAR struct ieee802154_container_s *g_free_container; -/* Pool of pre-allocated meta-data stuctures */ +/* Pool of pre-allocated meta-data structures */ static struct ieee802154_container_s g_container_pool[CONFIG_NET_IEEE802154_NCONTAINERS]; diff --git a/net/ieee802154/ieee802154_recvfrom.c b/net/ieee802154/ieee802154_recvfrom.c index 501f6498209..c075afef64e 100644 --- a/net/ieee802154/ieee802154_recvfrom.c +++ b/net/ieee802154/ieee802154_recvfrom.c @@ -137,7 +137,7 @@ static ssize_t ieee802154_recvfrom_rxqueue(FAR struct radio_driver_s *radio, size_t copylen; int ret = -EAGAIN; - /* Check if there is anyting in in the RX input queue */ + /* Check if there is anything in in the RX input queue */ DEBUGASSERT(pstate != NULL && pstate->ir_sock != NULL); conn = (FAR struct ieee802154_conn_s *)pstate->ir_sock->s_conn; @@ -181,7 +181,7 @@ static ssize_t ieee802154_recvfrom_rxqueue(FAR struct radio_driver_s *radio, ninfo("Received %d bytes\n", (int)copylen); ret = copylen; - /* If a 'from' address poiner was supplied, copy the source address + /* If a 'from' address pointer was supplied, copy the source address * in the container there. */ diff --git a/net/ieee802154/ieee802154_sendto.c b/net/ieee802154/ieee802154_sendto.c index 9f381ed49cb..f05c11daef5 100644 --- a/net/ieee802154/ieee802154_sendto.c +++ b/net/ieee802154/ieee802154_sendto.c @@ -170,7 +170,7 @@ static inline bool ieee802154_eaddrnull(FAR const uint8_t *eaddr) * paylen - The size of the data payload to be sent. * * Returned Value: - * Ok is returned on success; Othewise a negated errno value is returned. + * Ok is returned on success; Otherwise a negated errno value is returned. * * Assumptions: * Called with the network locked. diff --git a/net/ieee802154/ieee802154_sockif.c b/net/ieee802154/ieee802154_sockif.c index 44bb60f752f..216264a98a4 100644 --- a/net/ieee802154/ieee802154_sockif.c +++ b/net/ieee802154/ieee802154_sockif.c @@ -264,7 +264,7 @@ static void ieee802154_addref(FAR struct socket *psock) * addrlen Length of actual 'addr' * * Returned Value: - * 0 on success; a negated errno value on failue. See connect() for the + * 0 on success; a negated errno value on failure. See connect() for the * list of appropriate errno values to be returned. * ****************************************************************************/ @@ -339,7 +339,7 @@ static int ieee802154_connect(FAR struct socket *psock, * * Returned Value: * Returns 0 (OK) on success. On failure, it returns a negated errno - * value. See accept() for a desrciption of the approriate error value. + * value. See accept() for a desrciption of the appropriate error value. * * Assumptions: * The network is locked. @@ -414,7 +414,7 @@ static int ieee802154_bind(FAR struct socket *psock, /* Very that some address was provided. * - * REVISIT: Currently and explict address must be assigned. Should we + * REVISIT: Currently and explicit address must be assigned. Should we * support some moral equivalent to INADDR_ANY? */ diff --git a/net/inet/inet_sockif.c b/net/inet/inet_sockif.c index 912f437db6a..7a71ff91ba5 100644 --- a/net/inet/inet_sockif.c +++ b/net/inet/inet_sockif.c @@ -661,7 +661,7 @@ int inet_listen(FAR struct socket *psock, int backlog) * addrlen - Length of actual 'addr' * * Returned Value: - * 0 on success; a negated errno value on failue. See connect() for the + * 0 on success; a negated errno value on failure. See connect() for the * list of appropriate errno values to be returned. * ****************************************************************************/ @@ -800,7 +800,7 @@ static int inet_connect(FAR struct socket *psock, * * Returned Value: * Returns 0 (OK) on success. On failure, it returns a negated errno - * value. See accept() for a desrciption of the approriate error value. + * value. See accept() for a desrciption of the appropriate error value. * * Assumptions: * The network is locked. diff --git a/net/ipforward/ipfwd_poll.c b/net/ipforward/ipfwd_poll.c index be6c50c87fd..759014741e4 100644 --- a/net/ipforward/ipfwd_poll.c +++ b/net/ipforward/ipfwd_poll.c @@ -183,7 +183,7 @@ void ipfwd_poll(FAR struct net_driver_s *dev) dev->d_sndlen = 0; /* Perform the forwarding callbacks. Returns the new set of flags. If - * the packet was fowarded, then the new set will be zero. + * the packet was forwarded, then the new set will be zero. */ flags = devif_conn_event(dev, NULL, IPFWD_POLL, dev->d_conncb); diff --git a/net/ipforward/ipv4_forward.c b/net/ipforward/ipv4_forward.c index e9396eba096..f60185d1f43 100644 --- a/net/ipforward/ipv4_forward.c +++ b/net/ipforward/ipv4_forward.c @@ -68,7 +68,7 @@ * * Input Parameters: * ipv4 - A pointer to the IPv4 header in within the IPv4 packet. This - * is immeidately followed by the L3 header which may be TCP, UDP + * is immediately followed by the L3 header which may be TCP, UDP * or ICMP. * * Returned Value: diff --git a/net/ipforward/ipv6_forward.c b/net/ipforward/ipv6_forward.c index ccba5992a74..dacb1b9c154 100644 --- a/net/ipforward/ipv6_forward.c +++ b/net/ipforward/ipv6_forward.c @@ -75,7 +75,7 @@ * * Input Parameters: * ipv6 - A pointer to the IPv6 header in within the IPv6 packet. This - * is immeidately followed by the L3 header which may be TCP, UDP, + * is immediately followed by the L3 header which may be TCP, UDP, * or ICMPv6. * * Returned Value: @@ -191,7 +191,7 @@ static int ipv6_decr_ttl(FAR struct ipv6_hdr_s *ipv6) * Returned Value: * PACKET_FORWARDED - Packet was forwarded * PACKET_NOT_FORWARDED - Packet was not forwarded - * < 0 - And error occurred (and packet not fowarded). + * < 0 - And error occurred (and packet not forwarded). * ****************************************************************************/ @@ -606,7 +606,7 @@ int ipv6_forward(FAR struct net_driver_s *dev, FAR struct ipv6_hdr_s *ipv6) } } else -#if defined(CONFIG_NET_6LOWPAN) /* REVISIT: Currently only suport for 6LoWPAN */ +#if defined(CONFIG_NET_6LOWPAN) /* REVISIT: Currently only support for 6LoWPAN */ { /* Single network device. The use case here is where an endpoint acts * as a hub in a star configuration. This is typical for a wireless star @@ -642,7 +642,7 @@ int ipv6_forward(FAR struct net_driver_s *dev, FAR struct ipv6_hdr_s *ipv6) /* Nothing other 6LoWPAN forwarding is currently handled and that * case was dealt with in ipv6_packet_conversion(). * - * REVISIT: Is tht an issue? Do other use cases make sense? + * REVISIT: Is the an issue? Do other use cases make sense? */ nwarn("WARNING: Packet forwarding supported only for 6LoWPAN\n"); diff --git a/net/local/local.h b/net/local/local.h index 426602e2bc6..a9c98957b3a 100644 --- a/net/local/local.h +++ b/net/local/local.h @@ -72,7 +72,7 @@ */ #define LOCAL_SYNC_BYTE 0x42 /* Byte in sync sequence */ -#define LOCAL_END_BYTE 0xbd /* End of sync seqence */ +#define LOCAL_END_BYTE 0xbd /* End of sync sequence */ /**************************************************************************** * Public Type Definitions @@ -513,7 +513,7 @@ int local_fifo_read(FAR struct file *filep, FAR uint8_t *buf, size_t *len); * Input Parameters: * conn - The connection * addr - The location to return the address - * addrlen - The size of the memory allocat by the caller to receive the + * addrlen - The size of the memory allocate by the caller to receive the * address. * * Returned Value: diff --git a/net/local/local_recvfrom.c b/net/local/local_recvfrom.c index 45fb7d7ef9a..12eaca42d77 100644 --- a/net/local/local_recvfrom.c +++ b/net/local/local_recvfrom.c @@ -103,7 +103,7 @@ static int psock_fifo_read(FAR struct socket *psock, FAR void *buf, { /* No.. return the ECONNRESET error now. Otherwise, * process the received data and return ENOTCONN the - * next time that psock_recvfrom() is calle. + * next time that psock_recvfrom() is called. */ return ret; diff --git a/net/local/local_sockif.c b/net/local/local_sockif.c index 11413c0db1f..f2bbcb1428a 100644 --- a/net/local/local_sockif.c +++ b/net/local/local_sockif.c @@ -506,7 +506,7 @@ int local_listen(FAR struct socket *psock, int backlog) * addrlen Length of actual 'addr' * * Returned Value: - * 0 on success; a negated errno value on failue. See connect() for the + * 0 on success; a negated errno value on failure. See connect() for the * list of appropriate errno values to be returned. * ****************************************************************************/ @@ -595,7 +595,7 @@ static int local_connect(FAR struct socket *psock, * * Returned Value: * Returns 0 (OK) on success. On failure, it returns a negated errno - * value. See accept() for a desrciption of the approriate error value. + * value. See accept() for a desrciption of the appropriate error value. * * Assumptions: * The network is locked. diff --git a/net/neighbor/neighbor.h b/net/neighbor/neighbor.h index 57d4a6a0bc9..219e463de35 100644 --- a/net/neighbor/neighbor.h +++ b/net/neighbor/neighbor.h @@ -209,7 +209,7 @@ unsigned int neighbor_snapshot(FAR struct neighbor_entry_s *snapshot, * Name: neighbor_dumpentry * * Description: - * Dump the conents of an entry Neighbor Table. + * Dump the contents of an entry Neighbor Table. * * Input Parameters: * msg - Message to print with the entry diff --git a/net/neighbor/neighbor_dumpentry.c b/net/neighbor/neighbor_dumpentry.c index 492651eef3a..63284f658e9 100644 --- a/net/neighbor/neighbor_dumpentry.c +++ b/net/neighbor/neighbor_dumpentry.c @@ -119,7 +119,7 @@ static void neighbor_dump_address(FAR const void *buf, unsigned int buflen) * Name: neighbor_dumpentry * * Description: - * Dump the conents of an entry Neighbor Table. + * Dump the contents of an entry Neighbor Table. * * Input Parameters: * msg - Message to print with the entry diff --git a/net/netdev/netdev.h b/net/netdev/netdev.h index 3025def08e5..93da0ba1b9a 100644 --- a/net/netdev/netdev.h +++ b/net/netdev/netdev.h @@ -464,7 +464,7 @@ int netdev_count(void); * failure. * * Assumptions: - * The nework is locked + * The network is locked * ****************************************************************************/ @@ -488,7 +488,7 @@ int netdev_ipv4_ifconf(FAR struct ifconf *ifc); * failure. * * Assumptions: - * The nework is locked + * The network is locked * ****************************************************************************/ diff --git a/net/netdev/netdev_ifconf.c b/net/netdev/netdev_ifconf.c index b1cad3f5f40..cbfbeca6c8b 100644 --- a/net/netdev/netdev_ifconf.c +++ b/net/netdev/netdev_ifconf.c @@ -250,7 +250,7 @@ static int ifconf_ipv6_callback(FAR struct net_driver_s *dev, FAR void *arg) * failure. * * Assumptions: - * The nework is locked + * The network is locked * ****************************************************************************/ @@ -283,7 +283,7 @@ int netdev_ipv4_ifconf(FAR struct ifconf *ifc) * failure. * * Assumptions: - * The nework is locked + * The network is locked * ****************************************************************************/ diff --git a/net/netlink/netlink_route.c b/net/netlink/netlink_route.c index 48651c8e52a..b26bfff4943 100644 --- a/net/netlink/netlink_route.c +++ b/net/netlink/netlink_route.c @@ -231,7 +231,7 @@ struct getroute_recvfrom_ipv6resplist_s struct getroute_recvfrom_ipv6response_s payload; }; -/* netdev_foreach() callabck */ +/* netdev_foreach() callback */ struct nlroute_devinfo_s { diff --git a/net/pkt/pkt_sockif.c b/net/pkt/pkt_sockif.c index ce5323a42f8..e189ddc2f05 100644 --- a/net/pkt/pkt_sockif.c +++ b/net/pkt/pkt_sockif.c @@ -310,7 +310,7 @@ static int pkt_connect(FAR struct socket *psock, * * Returned Value: * Returns 0 (OK) on success. On failure, it returns a negated errno - * value. See accept() for a desrciption of the approriate error value. + * value. See accept() for a desrciption of the appropriate error value. * * Assumptions: * The network is locked. diff --git a/net/procfs/net_procfs.c b/net/procfs/net_procfs.c index 0f5d630d35e..44118298730 100644 --- a/net/procfs/net_procfs.c +++ b/net/procfs/net_procfs.c @@ -373,7 +373,7 @@ static int netprocfs_dup(FAR const struct file *oldp, FAR struct file *newp) return -ENOMEM; } - /* The copy the file attribtes from the old attributes to the new */ + /* The copy the file attribute from the old attributes to the new */ memcpy(newpriv, oldpriv, sizeof(struct netprocfs_file_s)); diff --git a/net/route/Kconfig b/net/route/Kconfig index 1a937a2a5fb..d7654686c9a 100644 --- a/net/route/Kconfig +++ b/net/route/Kconfig @@ -68,7 +68,7 @@ config ROUTE_MAX_IPv4_CACHEROUTES default 4 depends on ROUTE_IPv4_CACHEROUTE ---help--- - This determines the maxium number of routes that can be cached in + This determines the maximum number of routes that can be cached in memory. choice @@ -134,7 +134,7 @@ config ROUTE_MAX_IPv6_CACHEROUTES default 4 depends on ROUTE_IPv6_CACHEROUTE ---help--- - This determines the maxium number of routes that can be cached in + This determines the maximum number of routes that can be cached in memory. endif # NET_ROUTE diff --git a/net/route/cacheroute.h b/net/route/cacheroute.h index 8139cad747a..7f32827b04b 100644 --- a/net/route/cacheroute.h +++ b/net/route/cacheroute.h @@ -96,7 +96,7 @@ int net_addcache_ipv6(FAR struct net_route_ipv6_s *route); * Name: net_foreachcache_ipv4/net_foreachcache_ipv6 * * Description: - * Traverse the routing table cahce + * Traverse the routing table cache * * Input Parameters: * handler - Will be called for each route in the routing table cache. diff --git a/net/route/fileroute.h b/net/route/fileroute.h index 470a9fa3ea2..2263b496a0e 100644 --- a/net/route/fileroute.h +++ b/net/route/fileroute.h @@ -116,7 +116,7 @@ int net_openroute_ipv6(int oflags, FAR struct file *filep); * * Returned Value: * The number of bytes read on success. The special return valud of zero - * indiates that the endof of file was encountered (and nothing was read). + * indicates that the endof of file was encountered (and nothing was read). * A negated errno value is returned on any failure. * ****************************************************************************/ diff --git a/net/route/net_cacheroute.c b/net/route/net_cacheroute.c index 5e978713446..0205f8165a9 100644 --- a/net/route/net_cacheroute.c +++ b/net/route/net_cacheroute.c @@ -687,7 +687,7 @@ int net_addcache_ipv6(FAR struct net_route_ipv6_s *route) * Name: net_foreachcache_ipv4/net_foreachcache_ipv6 * * Description: - * Traverse the routing table cahce + * Traverse the routing table cache * * Input Parameters: * handler - Will be called for each route in the routing table cache. @@ -720,7 +720,7 @@ int net_foreachcache_ipv4(route_handler_ipv4_t handler, FAR void *arg) for (cache = g_ipv4_cache.head; ret == 0 && cache != NULL; cache = next) { /* Get the next entry in the to visit. We do this BEFORE calling the - * handler because the hanlder may delete this entry. + * handler because the handler may delete this entry. */ next = cache->flink; @@ -754,7 +754,7 @@ int net_foreachcache_ipv6(route_handler_ipv6_t handler, FAR void *arg) for (cache = g_ipv6_cache.head; ret == 0 && cache != NULL; cache = next) { /* Get the next entry in the to visit. We do this BEFORE calling the - * handler because the hanlder may delete this entry. + * handler because the handler may delete this entry. */ next = cache->flink; diff --git a/net/route/net_fileroute.c b/net/route/net_fileroute.c index 40b91de76a5..1c7d517cc20 100644 --- a/net/route/net_fileroute.c +++ b/net/route/net_fileroute.c @@ -316,7 +316,7 @@ int net_openroute_ipv6(int oflags, FAR struct file *filep) * * Returned Value: * The number of bytes read on success. The special return valud of zero - * indiates that the endof of file was encountered (and nothing was read). + * indicates that the endof of file was encountered (and nothing was read). * A negated errno value is returned on any failure. * ****************************************************************************/ diff --git a/net/route/net_foreach_ramroute.c b/net/route/net_foreach_ramroute.c index 908edd3c3b3..27b37993bc0 100644 --- a/net/route/net_foreach_ramroute.c +++ b/net/route/net_foreach_ramroute.c @@ -88,7 +88,7 @@ int net_foreachroute_ipv4(route_handler_ipv4_t handler, FAR void *arg) for (route = g_ipv4_routes.head; ret == 0 && route != NULL; route = next) { /* Get the next entry in the to visit. We do this BEFORE calling the - * handler because the hanlder may delete this entry. + * handler because the handler may delete this entry. */ next = route->flink; @@ -118,7 +118,7 @@ int net_foreachroute_ipv6(route_handler_ipv6_t handler, FAR void *arg) for (route = g_ipv6_routes.head; ret == 0 && route != NULL; route = next) { /* Get the next entry in the to visit. We do this BEFORE calling the - * handler because the hanlder may delete this entry. + * handler because the handler may delete this entry. */ next = route->flink; diff --git a/net/sixlowpan/Kconfig b/net/sixlowpan/Kconfig index 1651479ce54..3a5457eed71 100644 --- a/net/sixlowpan/Kconfig +++ b/net/sixlowpan/Kconfig @@ -31,7 +31,7 @@ config NET_6LOWPAN_REASS_STATIC ---help--- By default, reassembly buffers may be allocated dynamically from the stack when all of the statically allocation reassembly buffers are - in use. This will equire additional CPU cycles to perform the + in use. This will require additional CPU cycles to perform the allocation and may effect deterministic behavior. This option may be selected to suppress all dynamica allocation of reassembly buffers. In that case, only static reassembly buffers are available; @@ -69,7 +69,7 @@ config NET_6LOWPAN_COMPRESSION_THRESHOLD when packets should not be compressed. config NET_6LOWPAN_MINPORT - hex "Minimum port nubmer" + hex "Minimum port number" default 0xf0b0 depends on NET_6LOWPAN_COMPRESSION_HC1 ---help--- diff --git a/net/sixlowpan/README.txt b/net/sixlowpan/README.txt index 021ed865e6f..f4d3fa73922 100644 --- a/net/sixlowpan/README.txt +++ b/net/sixlowpan/README.txt @@ -40,7 +40,7 @@ IPv6 Neighbor Discovery IPv6 Neighbor Discovery is not supported. The current ICMPv6 and neighbor- related logic only works with Ethernet MAC. For 6LoWPAN, a new more -conservative IPv6 neigbor discovery is provided by RFC 6775 which is not +conservative IPv6 neighbor discovery is provided by RFC 6775 which is not currently supported. With IPv6 neighbor discovery, any IPv6 address may be associated with any short or extended address. In fact, that is the whole purpose of the neighbor discover logic: It plays the same role as ARP in @@ -90,7 +90,7 @@ Optimal 6LoWPAN Configuration fe80 0000 0000 0000 0000 00ff fe00 MMMM 2-byte short address IEEE 48-bit MAC fe80 0000 0000 0000 NNNN NNNN NNNN NNNN 8-byte extended address IEEE EUI-64 -4. To be compressable, port numbers must be in the range 0xf0b0-0xf0bf, +4. To be compressible, port numbers must be in the range 0xf0b0-0xf0bf, hexadecimal. That is 61616-61631 decimal. 5. IOBs: Must be big enough to hold one IEEE802.15.4 frame (typically 127). diff --git a/net/sixlowpan/sixlowpan.h b/net/sixlowpan/sixlowpan.h index 7760e47e58f..bfe8341aa5d 100644 --- a/net/sixlowpan/sixlowpan.h +++ b/net/sixlowpan/sixlowpan.h @@ -252,7 +252,7 @@ ssize_t psock_6lowpan_udp_sendto(FAR struct socket *psock, * used by the IPv6 forwarding logic. * * Input Parameters: - * dev - An instance of nework device state structure + * dev - An instance of network device state structure * fwddev - The network device used to send the data. This will be the * same device except for the IP forwarding case where packets * are sent across devices. diff --git a/net/sixlowpan/sixlowpan_framelist.c b/net/sixlowpan/sixlowpan_framelist.c index f9581abaa0f..28669a56fcf 100644 --- a/net/sixlowpan/sixlowpan_framelist.c +++ b/net/sixlowpan/sixlowpan_framelist.c @@ -201,7 +201,7 @@ static uint16_t sixlowpan_protosize(FAR const struct ipv6_hdr_s *ipv6hdr, * meta - Location to return the final metadata. * * Returned Value: - * OK is returned on success; Othewise a negated errno value is returned. + * OK is returned on success; Otherwise a negated errno value is returned. * ****************************************************************************/ @@ -300,7 +300,7 @@ static int sixlowpan_ieee802154_metadata(FAR struct radio_driver_s *radio, * meta - Location to return the final metadata. * * Returned Value: - * OK is returned on success; Othewise a negated errno value is returned. + * OK is returned on success; Otherwise a negated errno value is returned. * ****************************************************************************/ @@ -359,7 +359,7 @@ static int sixlowpan_pktradio_metadata(FAR struct radio_driver_s *radio, * destmac - The IEEE802.15.4 MAC address of the destination * * Returned Value: - * Ok is returned on success; Othewise a negated errno value is returned. + * Ok is returned on success; Otherwise a negated errno value is returned. * This function is expected to fail if the driver is not an IEEE802.15.4 * MAC network driver. In that case, the UDP/TCP will fall back to normal * IPv4/IPv6 formatting. diff --git a/net/sixlowpan/sixlowpan_framer.c b/net/sixlowpan/sixlowpan_framer.c index d9aeffa27a5..7f6a4f992de 100644 --- a/net/sixlowpan/sixlowpan_framer.c +++ b/net/sixlowpan/sixlowpan_framer.c @@ -143,7 +143,7 @@ static inline bool sixlowpan_eaddrnull(FAR const uint8_t *eaddr) * meta - Location to return the corresponding meta data. * * Returned Value: - * Ok is returned on success; Othewise a negated errno value is returned. + * Ok is returned on success; Otherwise a negated errno value is returned. * * Assumptions: * Called with the network locked. diff --git a/net/sixlowpan/sixlowpan_hc06.c b/net/sixlowpan/sixlowpan_hc06.c index d600472096b..122258824ce 100644 --- a/net/sixlowpan/sixlowpan_hc06.c +++ b/net/sixlowpan/sixlowpan_hc06.c @@ -266,7 +266,7 @@ static FAR struct sixlowpan_addrcontext_s * * prefpost takes a byte where the first nibble specify prefix count * and the second postfix count (NOTE: 15/0xf ipaddr=16 bytes copy). * - * compress_tagaddr() accepts a remote, variable length, taged MAC address; + * compress_tagaddr() accepts a remote, variable length, tagged MAC address; * compress_laddr() accepts a local, fixed length MAC address. * compress_ipaddr() is simply the common logic that does not depend on * the size of the MAC address. @@ -529,7 +529,7 @@ static void uncompress_addr(FAR const struct netdev_varaddr_s *addr, srcptr += 2; } - /* If the IP is dervied from a MAC address big enough to include the U/L bit, + /* If the IP is derived from a MAC address big enough to include the U/L bit, * invert it. */ diff --git a/net/sixlowpan/sixlowpan_hc1.c b/net/sixlowpan/sixlowpan_hc1.c index f051de40ac3..7496605b97f 100644 --- a/net/sixlowpan/sixlowpan_hc1.c +++ b/net/sixlowpan/sixlowpan_hc1.c @@ -110,7 +110,7 @@ * * Input Parameters: * radio - A reference to a radio network device instance - * ipv6 - The IPv6 header followd by TCP, UDP, or ICMPv6 header to be + * ipv6 - The IPv6 header followed by TCP, UDP, or ICMPv6 header to be * compressed * destmac - L2 destination address, needed to compress the IP * destination field diff --git a/net/sixlowpan/sixlowpan_icmpv6send.c b/net/sixlowpan/sixlowpan_icmpv6send.c index 09df100a42f..84fad4afb31 100644 --- a/net/sixlowpan/sixlowpan_icmpv6send.c +++ b/net/sixlowpan/sixlowpan_icmpv6send.c @@ -64,7 +64,7 @@ * used by the IPv6 forwarding logic. * * Input Parameters: - * dev - An instance of nework device state structure + * dev - An instance of network device state structure * fwddev - The network device used to send the data. This will be the * same device except for the IP forwarding case where packets * are sent across devices. @@ -103,7 +103,7 @@ void sixlowpan_icmpv6_send(FAR struct net_driver_s *dev, if (ipv6icmpv6->ipv6.proto != IP_PROTO_ICMP6) { - nwarn("WARNING: Expected ICMPv6 protoype: %u vs %s\n", + nwarn("WARNING: Expected ICMPv6 prototype: %u vs %s\n", ipv6icmpv6->ipv6.proto, IP_PROTO_ICMP6); } else diff --git a/net/sixlowpan/sixlowpan_input.c b/net/sixlowpan/sixlowpan_input.c index 59c2ab8d9f9..303aa097b3e 100644 --- a/net/sixlowpan/sixlowpan_input.c +++ b/net/sixlowpan/sixlowpan_input.c @@ -265,7 +265,7 @@ static uint16_t sixlowpan_uncompress_ipv6proto(FAR uint8_t *fptr, * INPUT_PARTIAL Frame processed successful, packet incomplete * INPUT_COMPLETE Frame processed successful, packet complete * - * Othewise a negated errno value is returned to indicate the nature of the + * Otherwise a negated errno value is returned to indicate the nature of the * failure. * * Assumptions: @@ -288,7 +288,7 @@ static int sixlowpan_frame_process(FAR struct radio_driver_s *radio, uint8_t fragoffset = 0; /* Offset of the fragment in the IP packet */ uint8_t protosize = 0; /* Length of the protocol header (treated like payload) */ bool isfrag = false; /* true: Frame is a fragment */ - bool isfrag1 = false; /* true: Frame is the first fragement of the series */ + bool isfrag1 = false; /* true: Frame is the first fragment of the series */ int reqsize; /* Required buffer size */ int hdrsize; /* Size of the IEEE802.15.4 header */ int ret; @@ -311,7 +311,7 @@ static int sixlowpan_frame_process(FAR struct radio_driver_s *radio, /* Since we don't support the mesh and broadcast header, the first header * we look for is the fragmentation header. NOTE that g_frame_hdrlen - * already includes the fragementation header, if presetn. + * already includes the fragmentation header, if presetn. */ fragptr = fptr + hdrsize; @@ -677,7 +677,7 @@ static int sixlowpan_dispatch(FAR struct radio_driver_s *radio) * * After each frame is processed into d_buf, the IOB is deallocated. If * reassembly is incomplete, the partially reassembled packet must be - * preserved by the radio network drvier and provided again when the next + * preserved by the radio network driver and provided again when the next * frame is received. * * When the packet in the d_buf is fully reassembled, it will be provided @@ -710,7 +710,7 @@ static int sixlowpan_dispatch(FAR struct radio_driver_s *radio) * must apply to all of the frames in the list. * * Returned Value: - * Zero (OK) is returned if the the frame was consumed; Othewise a negated + * Zero (OK) is returned if the the frame was consumed; Otherwise a negated * errno value is returned. * ****************************************************************************/ @@ -837,7 +837,7 @@ int sixlowpan_input(FAR struct radio_driver_s *radio, #endif default: { - nwarn("WARNING: Unsupported protoype: %u\n", + nwarn("WARNING: Unsupported prototype: %u\n", ipv6hdr->proto); goto drop; } diff --git a/net/sixlowpan/sixlowpan_internal.h b/net/sixlowpan/sixlowpan_internal.h index 36a103164a2..b1e73f1ec64 100644 --- a/net/sixlowpan/sixlowpan_internal.h +++ b/net/sixlowpan/sixlowpan_internal.h @@ -179,7 +179,7 @@ struct ipv6icmp_hdr_s * destination node. * * The following structure is used to summarize those per-packet - * customizations and, along, with the fixed configuratoin settings, + * customizations and, along, with the fixed configuration settings, * determines the full form of that meta data. */ @@ -270,7 +270,7 @@ struct iob_s; /* Forward reference */ * timeout - Send timeout in milliseconds * * Returned Value: - * Ok is returned on success; Othewise a negated errno value is returned. + * Ok is returned on success; Otherwise a negated errno value is returned. * This function is expected to fail if the driver is not an IEEE802.15.4 * MAC network driver. In that case, the logic will fall back to normal * IPv4/IPv6 formatting. @@ -300,7 +300,7 @@ int sixlowpan_send(FAR struct net_driver_s *dev, * (obfuscated). * * Returned Value: - * Ok is returned on success; Othewise a negated errno value is returned. + * Ok is returned on success; Otherwise a negated errno value is returned. * * Assumptions: * Called with the network locked. @@ -362,7 +362,7 @@ int sixlowpan_frame_submit(FAR struct radio_driver_s *radio, * * Description: * Process an outgoing UDP or TCP packet. This function is called from - * the send event handler when a TX poll is received. It formates the + * the send event handler when a TX poll is received. It formats the * list of frames to be sent by the IEEE802.15.4 MAC driver. * * The payload data is in the caller 'buf' and is of length 'buflen'. @@ -379,7 +379,7 @@ int sixlowpan_frame_submit(FAR struct radio_driver_s *radio, * destmac - The IEEE802.15.4 MAC address of the destination * * Returned Value: - * Ok is returned on success; Othewise a negated errno value is returned. + * Ok is returned on success; Otherwise a negated errno value is returned. * This function is expected to fail if the driver is not an IEEE802.15.4 * MAC network driver. In that case, the UDP/TCP will fall back to normal * IPv4/IPv6 formatting. @@ -629,7 +629,7 @@ bool sixlowpan_ismacbased(const net_ipv6addr_t ipaddr, * Name: sixlowpan_radio_framelen * * Description: - * Get the maximum frame length supported by radio network drvier. + * Get the maximum frame length supported by radio network driver. * * Input Parameters: * radio - Reference to a radio network driver state instance. diff --git a/net/sixlowpan/sixlowpan_reassbuf.c b/net/sixlowpan/sixlowpan_reassbuf.c index 7cd36abf02b..d499e2e16d9 100644 --- a/net/sixlowpan/sixlowpan_reassbuf.c +++ b/net/sixlowpan/sixlowpan_reassbuf.c @@ -73,7 +73,7 @@ static FAR struct sixlowpan_reassbuf_s *g_free_reass; static FAR struct sixlowpan_reassbuf_s *g_active_reass; -/* Pool of pre-allocated reassembly buffer stuctures */ +/* Pool of pre-allocated reassembly buffer structures */ static struct sixlowpan_reassbuf_s g_metadata_pool[CONFIG_NET_6LOWPAN_NREASSBUF]; @@ -86,7 +86,7 @@ static struct sixlowpan_reassbuf_s g_metadata_pool[CONFIG_NET_6LOWPAN_NREASSBUF] * * Description: * Check if the fragment that we just received is from the same source as - * the previosly received fragements. + * the previously received fragments. * * Input Parameters: * radio - Radio network device driver state instance @@ -315,7 +315,7 @@ FAR struct sixlowpan_reassbuf_s * reass = NULL; #else /* If we cannot get a reassembly buffer instance from the free list, then we - * will have to allocate one from the kernal memory pool. + * will have to allocate one from the kernel memory pool. */ reass = (FAR struct sixlowpan_reassbuf_s *) diff --git a/net/sixlowpan/sixlowpan_send.c b/net/sixlowpan/sixlowpan_send.c index ad9528aec60..8fef7e8a5b8 100644 --- a/net/sixlowpan/sixlowpan_send.c +++ b/net/sixlowpan/sixlowpan_send.c @@ -203,7 +203,7 @@ end_wait: * timeout - Send timeout in milliseconds * * Returned Value: - * Ok is returned on success; Othewise a negated errno value is returned. + * Ok is returned on success; Otherwise a negated errno value is returned. * This function is expected to fail if the driver is not an IEEE802.15.4 * MAC network driver. In that case, the logic will fall back to normal * IPv4/IPv6 formatting. diff --git a/net/sixlowpan/sixlowpan_tcpsend.c b/net/sixlowpan/sixlowpan_tcpsend.c index 53d4ed3afba..b4dde3ce755 100644 --- a/net/sixlowpan/sixlowpan_tcpsend.c +++ b/net/sixlowpan/sixlowpan_tcpsend.c @@ -579,7 +579,7 @@ end_wait: * timeout - Send timeout in milliseconds * * Returned Value: - * Ok is returned on success; Othewise a negated errno value is returned. + * Ok is returned on success; Otherwise a negated errno value is returned. * This function is expected to fail if the driver is not an IEEE802.15.4 * MAC network driver. In that case, the logic will fall back to normal * IPv4/IPv6 formatting. @@ -878,7 +878,7 @@ void sixlowpan_tcp_send(FAR struct net_driver_s *dev, if (ipv6hdr->ipv6.proto != IP_PROTO_TCP) { - nwarn("WARNING: Expected TCP protoype: %u vs %s\n", + nwarn("WARNING: Expected TCP prototype: %u vs %s\n", ipv6hdr->ipv6.proto, IP_PROTO_TCP); } else diff --git a/net/sixlowpan/sixlowpan_udpsend.c b/net/sixlowpan/sixlowpan_udpsend.c index bcbe482f646..a42db280580 100644 --- a/net/sixlowpan/sixlowpan_udpsend.c +++ b/net/sixlowpan/sixlowpan_udpsend.c @@ -400,7 +400,7 @@ ssize_t psock_6lowpan_udp_send(FAR struct socket *psock, FAR const void *buf, * used by the IPv6 forwarding logic. * * Input Parameters: - * dev - An instance of nework device state structure + * dev - An instance of network device state structure * fwddev - The network device used to send the data. This will be the * same device except for the IP forwarding case where packets * are sent across devices. @@ -440,7 +440,7 @@ void sixlowpan_udp_send(FAR struct net_driver_s *dev, if (ipv6udp->ipv6.proto != IP_PROTO_UDP) { - nwarn("WARNING: Expected UDP protoype: %u vs %s\n", + nwarn("WARNING: Expected UDP prototype: %u vs %s\n", ipv6udp->ipv6.proto, IP_PROTO_UDP); } else diff --git a/net/sixlowpan/sixlowpan_utils.c b/net/sixlowpan/sixlowpan_utils.c index ef2970c142f..5ec41c1fe0c 100644 --- a/net/sixlowpan/sixlowpan_utils.c +++ b/net/sixlowpan/sixlowpan_utils.c @@ -585,7 +585,7 @@ bool sixlowpan_ismacbased(const net_ipv6addr_t ipaddr, * Name: sixlowpan_radio_framelen * * Description: - * Get the maximum frame length supported by radio network drvier. + * Get the maximum frame length supported by radio network driver. * * Input Parameters: * radio - Reference to a radio network driver state instance. diff --git a/net/socket/net_dup2.c b/net/socket/net_dup2.c index 50a3f70c4d8..2754772c9b9 100644 --- a/net/socket/net_dup2.c +++ b/net/socket/net_dup2.c @@ -63,7 +63,7 @@ * * Input Parameters: * psock1 - The existing socket that is being cloned. - * psock2 - A reference to an uninitialized socket structure alloated by + * psock2 - A reference to an uninitialized socket structure allocated by * the caller. * * Returned Value: @@ -156,7 +156,7 @@ int psock_dup2(FAR struct socket *psock1, FAR struct socket *psock2) * Name: net_dup2 * * Description: - * Clone a socket descriptor to an arbitray descriptor number. If file + * Clone a socket descriptor to an arbitrary descriptor number. If file * descriptors are implemented, then this is called by dup2() for the case * of socket file descriptors. If file descriptors are not implemented, * then this function IS dup2(). diff --git a/net/tcp/tcp_conn.c b/net/tcp/tcp_conn.c index 2c22246af9f..0aadb4cae39 100644 --- a/net/tcp/tcp_conn.c +++ b/net/tcp/tcp_conn.c @@ -313,7 +313,7 @@ static int tcp_selectport(uint8_t domain, FAR const union ip_addr_u *ipaddr, * connection to be used with the provided TCP/IP header * * Assumptions: - * This function is called from network logic with the nework locked. + * This function is called from network logic with the network locked. * ****************************************************************************/ @@ -827,7 +827,7 @@ void tcp_free(FAR struct tcp_conn_s *conn) * connection to be used with the provided TCP/IP header * * Assumptions: - * This function is called from network logic with the nework locked. + * This function is called from network logic with the network locked. * ****************************************************************************/ @@ -860,7 +860,7 @@ FAR struct tcp_conn_s *tcp_active(FAR struct net_driver_s *dev, * Traverse the list of active TCP connections * * Assumptions: - * This function is called from network logic with the nework locked. + * This function is called from network logic with the network locked. * ****************************************************************************/ @@ -885,7 +885,7 @@ FAR struct tcp_conn_s *tcp_nextconn(FAR struct tcp_conn_s *conn) * a new connection and initialize it to send a SYNACK in return. * * Assumptions: - * This function is called from network logic with the nework locked. + * This function is called from network logic with the network locked. * ****************************************************************************/ diff --git a/net/tcp/tcp_listen.c b/net/tcp/tcp_listen.c index f43d5d5e984..c32017488a6 100644 --- a/net/tcp/tcp_listen.c +++ b/net/tcp/tcp_listen.c @@ -73,7 +73,7 @@ static FAR struct tcp_conn_s *tcp_listenports[CONFIG_NET_MAX_LISTENPORTS]; * Return the connection listener for connections on this port (if any) * * Assumptions: - * This function is called from network logic with the nework locked. + * This function is called from network logic with the network locked. * ****************************************************************************/ @@ -237,7 +237,7 @@ int tcp_listen(FAR struct tcp_conn_s *conn) * Return true is there is a listener for the specified port * * Assumptions: - * This function is called from network logic with the nework locked. + * This function is called from network logic with the network locked. * ****************************************************************************/ diff --git a/net/tcp/tcp_notifier.c b/net/tcp/tcp_notifier.c index c374708e28d..9e3f2068ceb 100644 --- a/net/tcp/tcp_notifier.c +++ b/net/tcp/tcp_notifier.c @@ -75,7 +75,7 @@ * may be used later in a call to tcp_notifier_teardown(). * == 0 - There is already buffered read-ahead data. No notification * will be provided. - * < 0 - An unexpected error occurred and notification will ocur. The + * < 0 - An unexpected error occurred and notification will occur. The * returned value is a negated errno value that indicates the * nature of the failure. * diff --git a/net/tcp/tcp_send_unbuffered.c b/net/tcp/tcp_send_unbuffered.c index 189afb1387c..aebeecb34e6 100644 --- a/net/tcp/tcp_send_unbuffered.c +++ b/net/tcp/tcp_send_unbuffered.c @@ -384,7 +384,7 @@ static uint16_t tcpsend_eventhandler(FAR struct net_driver_s *dev, else { - /* Will there be another (even) packet afer this one? + /* Will there be another (even) packet after this one? * (next_sndlen > 0) Will the split condition occur on that * next, even packet? ((next_sndlen - conn->mss) < 0) If * so, then perform the split now to avoid the case where the diff --git a/net/udp/udp_recvfrom.c b/net/udp/udp_recvfrom.c index af62ee595b5..2ed7ec01cee 100644 --- a/net/udp/udp_recvfrom.c +++ b/net/udp/udp_recvfrom.c @@ -171,7 +171,7 @@ static size_t udp_recvfrom_newdata(FAR struct net_driver_s *dev, * Copy the read data from the packet * * Input Parameters: - * dev The sructure of the network driver that generated the event + * dev The structure of the network driver that generated the event * pstate recvfrom state structure * * Returned Value: diff --git a/net/usrsock/usrsock.h b/net/usrsock/usrsock.h index d480db2a890..6fe76639481 100644 --- a/net/usrsock/usrsock.h +++ b/net/usrsock/usrsock.h @@ -490,7 +490,7 @@ int usrsock_listen(FAR struct socket *psock, int backlog); * * Returned Value: * Returns 0 (OK) on success. On failure, it returns a negated errno - * value. See accept() for a desrciption of the approriate error value. + * value. See accept() for a desrciption of the appropriate error value. * * Assumptions: * The network is locked. diff --git a/net/utils/net_lock.c b/net/utils/net_lock.c index ba51c4d7f85..da6784d9c11 100644 --- a/net/utils/net_lock.c +++ b/net/utils/net_lock.c @@ -91,7 +91,7 @@ static int _net_takesem(void) ****************************************************************************/ static int -_net_timedwait(sem_t *sem, bool interruptable, unsigned int timeout) +_net_timedwait(sem_t *sem, bool interruptible, unsigned int timeout) { unsigned int count; irqstate_t flags; @@ -125,7 +125,7 @@ _net_timedwait(sem_t *sem, bool interruptable, unsigned int timeout) /* Wait until we get the lock or until the timeout expires */ - if (interruptable) + if (interruptible) { ret = nxsem_timedwait(sem, &abstime); } @@ -138,7 +138,7 @@ _net_timedwait(sem_t *sem, bool interruptable, unsigned int timeout) { /* Wait as long as necessary to get the lock */ - if (interruptable) + if (interruptible) { ret = nxsem_wait(sem); } diff --git a/sched/Kconfig b/sched/Kconfig index 8146066798c..5093b083bb5 100644 --- a/sched/Kconfig +++ b/sched/Kconfig @@ -390,7 +390,7 @@ config INIT_SYMTAB default EXECFUNCS_SYMTAB_ARRAY if EXECFUNCS_HAVE_SYMTAB depends on !BUILD_PROTECTED && !BUILD_KERNEL ---help--- - The name of othe global array that holds the exported symbol table. + The name of other global array that holds the exported symbol table. The special string "NULL" may be provided if there is no symbol table. Quotation marks will be stripped when config.h is generated. @@ -527,7 +527,7 @@ config SCHED_CHILD_STATUS ---help--- If this option is selected, then the exit status of the child task will be retained after the child task exits. This option should be - selected if you require knowledge of a child process' exit status. + selected if you require knowledge of a child process's exit status. Without this setting, wait(), waitpid() or waitid() may fail. For example, if you do: @@ -634,7 +634,7 @@ config SCHED_USER_IDENTITY ---help--- This selection enables functionality of getuid(), setuid(), getgid(), setgid(). If this option is not selected, then stub, root-only - versions of these interfaces are avaialbe. When selected, these + versions of these interfaces are available. When selected, these interfaces will associate a UID and/or GID with each task group. Those can then be managed using the interfaces. Child tasks will inherit the UID and GID of its parent. @@ -1003,7 +1003,7 @@ config SCHED_INSTRUMENTATION_BUFFER If this option is selected, then in-memory buffering logic is enabled to capture scheduler instrumentation data. This has the advantage that (1) the platform logic does not have to provide - the sched_note_* interaces described for the previous settings. + the sched_note_* interfaces described for the previous settings. Instead, the buffering logic catches all of these. It encodes timestamps the scheduler note and adds the note to an in-memory, circular buffer. And (2) buffering the scheduler instrumentation diff --git a/sched/environ/env_release.c b/sched/environ/env_release.c index b05b1e62db2..6c62122ebef 100644 --- a/sched/environ/env_release.c +++ b/sched/environ/env_release.c @@ -86,7 +86,7 @@ void env_release(FAR struct task_group_s *group) sched_ufree(group->tg_envp); } - /* In any event, make sure that all environment-related varialbles in the + /* In any event, make sure that all environment-related variables in the * task group structure are reset to initial values. */ diff --git a/sched/environ/env_setenv.c b/sched/environ/env_setenv.c index 17c7933bece..10bd968d06c 100644 --- a/sched/environ/env_setenv.c +++ b/sched/environ/env_setenv.c @@ -103,7 +103,7 @@ int setenv(FAR const char *name, FAR const char *value, int overwrite) if (!value || *value == '\0') { - /* If overwite is set then this is the same as unsetenv */ + /* If overwrite is set then this is the same as unsetenv */ if (overwrite) { diff --git a/sched/group/group_leave.c b/sched/group/group_leave.c index 7c0df7dc450..0c063567f3a 100644 --- a/sched/group/group_leave.c +++ b/sched/group/group_leave.c @@ -237,11 +237,11 @@ static inline void group_release(FAR struct task_group_s *group) sched_ufree(group->tg_streamlist); # elif defined(CONFIG_BUILD_KERNEL) - /* In the kernel build, the unprivileged process' stream list will be + /* In the kernel build, the unprivileged process's stream list will be * allocated from with its per-process, private user heap. But in that * case, there is no reason to do anything here: That allocation resides * in the user heap which which be completely freed when we destroy the - * process' address environment. + * process's address environment. */ if ((group->tg_flags & GROUP_FLAG_PRIVILEGED) != 0) diff --git a/sched/group/group_setgid.c b/sched/group/group_setgid.c index 949cce4cd4d..89b808717e9 100644 --- a/sched/group/group_setgid.c +++ b/sched/group/group_setgid.c @@ -57,7 +57,7 @@ * privileges. * * Input Parameters: - * gid - Identity to set the various process' group ID attributes to. + * gid - Identity to set the various process's group ID attributes to. * * Returned Value: * Zero if successful and -1 in case of failure, in which case errno is set diff --git a/sched/group/group_setuid.c b/sched/group/group_setuid.c index 7bdf0d9cc50..4f2528e32bf 100644 --- a/sched/group/group_setuid.c +++ b/sched/group/group_setuid.c @@ -58,7 +58,7 @@ * privileges. * * Input Parameters: - * uid - User identity to set the various process' user ID attributes to. + * uid - User identity to set the various process's user ID attributes to. * * Returned Value: * Zero if successful and -1 in case of failure, in which case errno is set diff --git a/sched/init/nx_start.c b/sched/init/nx_start.c index c840cb9eafe..4f73f33c9d8 100644 --- a/sched/init/nx_start.c +++ b/sched/init/nx_start.c @@ -470,7 +470,7 @@ void nx_start(void) /* Set the entry point. This is only for debug purposes. NOTE: that * the start_t entry point is not saved. That is acceptable, however, - * becaue it can be used only for restarting a task: The IDLE task + * because it can be used only for restarting a task: The IDLE task * cannot be restarted. */ diff --git a/sched/module/mod_modhandle.c b/sched/module/mod_modhandle.c index 26673147dc3..a612d380ec7 100644 --- a/sched/module/mod_modhandle.c +++ b/sched/module/mod_modhandle.c @@ -57,7 +57,7 @@ * * Description: * modhandle() returns the module handle for the installed module with the - * provided name. A secondary use of this function is to determin if a + * provided name. A secondary use of this function is to determine if a * module has been loaded or not. * * Input Parameters: diff --git a/sched/mqueue/mq_sndinternal.c b/sched/mqueue/mq_sndinternal.c index ca8e32fe55e..a12eb5bb671 100644 --- a/sched/mqueue/mq_sndinternal.c +++ b/sched/mqueue/mq_sndinternal.c @@ -262,7 +262,7 @@ int nxmq_wait_send(mqd_t mqdes) } /* Yes... We will not return control until the message queue is - * available or we receive a signal or at timout occurs. + * available or we receive a signal or at timeout occurs. */ else diff --git a/sched/paging/paging.h b/sched/paging/paging.h index 15dbb41c859..6ee2c3f0c25 100644 --- a/sched/paging/paging.h +++ b/sched/paging/paging.h @@ -82,7 +82,7 @@ extern pid_t g_pgworker; /* The page fill worker thread maintains a static variable called g_pftcb. * If no page fill is in progress, g_pftcb will be NULL. Otherwise, g_pftcb * will point to the TCB of the task which is receiving the fill that is - * in progess. + * in progress. * * NOTE: I think that this is the only state in which a TCB does not reside * in some list. Here is it in limbo, outside of the normally queuing while diff --git a/sched/paging/pg_worker.c b/sched/paging/pg_worker.c index 4a5f3f1eb0e..72bc0de28d1 100644 --- a/sched/paging/pg_worker.c +++ b/sched/paging/pg_worker.c @@ -72,7 +72,7 @@ pid_t g_pgworker; /* The page fill worker thread maintains a static variable called g_pftcb. * If no fill is in progress, g_pftcb will be NULL. Otherwise, g_pftcb will - * point to the TCB of the task which is receiving the fill that is in progess. + * point to the TCB of the task which is receiving the fill that is in progress. * * NOTE: I think that this is the only state in which a TCB does not reside * in some list. Here is it in limbo, outside of the normally queuing while diff --git a/sched/pthread/pthread_cancel.c b/sched/pthread/pthread_cancel.c index c9774c9c56a..92b400231d6 100644 --- a/sched/pthread/pthread_cancel.c +++ b/sched/pthread/pthread_cancel.c @@ -92,12 +92,12 @@ int pthread_cancel(pthread_t thread) /* Then we cannot cancel the thread now. Here is how this is * supposed to work: * - * "When cancelability is disabled, all cancels are held pending - * in the target thread until the thread changes the cancelability. - * When cancelability is deferred, all cancels are held pending in - * the target thread until the thread changes the cancelability, calls + * "When cancellability is disabled, all cancels are held pending + * in the target thread until the thread changes the cancellability. + * When cancellability is deferred, all cancels are held pending in + * the target thread until the thread changes the cancellability, calls * a function which is a cancellation point or calls pthread_testcancel(), - * thus creating a cancellation point. When cancelability is asynchronous, + * thus creating a cancellation point. When cancellability is asynchronous, * all cancels are acted upon immediately, interrupting the thread with its * processing." */ diff --git a/sched/pthread/pthread_mutex.c b/sched/pthread/pthread_mutex.c index a81a00abd82..3e3f9e2da8f 100644 --- a/sched/pthread/pthread_mutex.c +++ b/sched/pthread/pthread_mutex.c @@ -294,7 +294,7 @@ int pthread_mutex_trytake(FAR struct pthread_mutex_s *mutex) * Name: pthread_mutex_give * * Description: - * Take the pthread_mutex and, if successful, add the mutex to the ist of + * Take the pthread_mutex and, if successful, add the mutex to the list of * mutexes held by this thread. * * Input Parameters: diff --git a/sched/pthread/pthread_mutextimedlock.c b/sched/pthread/pthread_mutextimedlock.c index f972b6a7ff5..be6f9df8149 100644 --- a/sched/pthread/pthread_mutextimedlock.c +++ b/sched/pthread/pthread_mutextimedlock.c @@ -138,7 +138,7 @@ int pthread_mutex_timedlock(FAR pthread_mutex_t *mutex, * behavior is like PTHREAD_MUTEX_ERRORCHECK) * * NOTE: This is the correct behavior for a 'robust', NORMAL - * mutex. Compiant behavior for non-robust mutex should not + * mutex. Compliant behavior for non-robust mutex should not * include these checks. In that case, it the deadlock * condition should not be detected and the thread should be * permitted to deadlock. diff --git a/sched/pthread/pthread_mutextrylock.c b/sched/pthread/pthread_mutextrylock.c index dab0c107a38..07441e743d2 100644 --- a/sched/pthread/pthread_mutextrylock.c +++ b/sched/pthread/pthread_mutextrylock.c @@ -121,7 +121,7 @@ int pthread_mutex_trylock(FAR pthread_mutex_t *mutex) } /* pthread_mutex_trytake failed. Did it fail because the semaphore - * was not avaialable? + * was not available? */ else if (status == EAGAIN) @@ -182,7 +182,7 @@ int pthread_mutex_trylock(FAR pthread_mutex_t *mutex) /* A thread holds the mutex, but there is no such thread. * POSIX requires that the 'robust' mutex return EOWNERDEAD * in this case. It is then the caller's responsibility to - * call pthread_mutx_consistent() fo fix the mutex. + * call pthread_mutx_consistent() to fix the mutex. */ mutex->flags |= _PTHREAD_MFLAGS_INCONSISTENT; diff --git a/sched/sched/sched_cpuload_oneshot.c b/sched/sched/sched_cpuload_oneshot.c index bc6ad40b9b0..96db6a7e77d 100644 --- a/sched/sched/sched_cpuload_oneshot.c +++ b/sched/sched/sched_cpuload_oneshot.c @@ -80,7 +80,7 @@ # define CONFIG_CPULOAD_ENTROPY 0 #endif -/* Calculate the nomimal sample interval in microseconds: +/* Calculate the nominal sample interval in microseconds: * * nominal = (1,000,000 usec/sec) / Frequency cycles/sec) = Period usec/cycle */ @@ -249,7 +249,7 @@ static void nxsched_oneshot_callback(FAR struct oneshot_lowerhalf_s *lower, * * Description: * Configure to use a oneshot timer as described in - * include/nuttx/timers/oneshot.h to provid external clocking to assess + * include/nuttx/timers/oneshot.h to provide external clocking to assess * the CPU load. * * Input Parameters: diff --git a/sched/sched/sched_cpuload_period.c b/sched/sched/sched_cpuload_period.c index c39918c76af..4b6e5c1ea7d 100644 --- a/sched/sched/sched_cpuload_period.c +++ b/sched/sched/sched_cpuload_period.c @@ -77,7 +77,7 @@ # define CONFIG_CPULOAD_ENTROPY 0 #endif -/* Calculate the nomimal sample interval in microseconds: +/* Calculate the nominal sample interval in microseconds: * * nominal = (1,000,000 usec/sec) / Frequency cycles/sec) = Period usec/cycle */ diff --git a/sched/sched/sched_cpuselect.c b/sched/sched/sched_cpuselect.c index b96436cdd49..e0d28f8332c 100644 --- a/sched/sched/sched_cpuselect.c +++ b/sched/sched/sched_cpuselect.c @@ -63,7 +63,7 @@ * * Description: * Return the index to the CPU with the lowest priority running task, - * possbily its IDLE task. + * possibly its IDLE task. * * Input Parameters: * affinity - The set of CPUs on which the thread is permitted to run. diff --git a/sched/sched/sched_garbage.c b/sched/sched/sched_garbage.c index 6fd25c7d1c9..bca7b09201a 100644 --- a/sched/sched/sched_garbage.c +++ b/sched/sched/sched_garbage.c @@ -182,7 +182,7 @@ static inline void nxsched_kcleanup(void) * Name: nxsched_have_kgarbage * * Description: - * Return TRUE if there is kernal heap garbage to be collected. + * Return TRUE if there is kernel heap garbage to be collected. * * Input Parameters: * None diff --git a/sched/semaphore/sem_recover.c b/sched/semaphore/sem_recover.c index 7d2a1c7cb17..724a493f3d1 100644 --- a/sched/semaphore/sem_recover.c +++ b/sched/semaphore/sem_recover.c @@ -79,7 +79,7 @@ void nxsem_recover(FAR struct tcb_s *tcb) { irqstate_t flags; - /* The task is being deleted. If it is waiting for a semphore, then + /* The task is being deleted. If it is waiting for a semaphore, then * increment the count on the semaphores. This logic is almost identical * to what you see in nxsem_wait_irq() except that no attempt is made to * restart the exiting task. diff --git a/sched/signal/sig_default.c b/sched/signal/sig_default.c index 69a7bb67fa3..f03b50513fc 100644 --- a/sched/signal/sig_default.c +++ b/sched/signal/sig_default.c @@ -217,13 +217,13 @@ static void nxsig_abnormal_termination(int signo) /* Then we cannot cancel the thread now. Here is how this is * supposed to work: * - * "When cancelability is disabled, all cancels are held pending - * in the target thread until the thread changes the cancelability. - * When cancelability is deferred, all cancels are held pending in - * the target thread until the thread changes the cancelability, + * "When cancellability is disabled, all cancels are held pending + * in the target thread until the thread changes the cancellability. + * When cancellability is deferred, all cancels are held pending in + * the target thread until the thread changes the cancellability, * calls a function which is a cancellation point or calls * pthread_testcancel(), thus creating a cancellation point. When - * cancelability is asynchronous, all cancels are acted upon + * cancellability is asynchronous, all cancels are acted upon * immediately, interrupting the thread with its processing." * * REVISIT: Does this rule apply to equally to both SIGKILL and @@ -539,7 +539,7 @@ bool nxsig_iscatchable(int signo) * * Description: * If 'defaction' is true, then return the default signal handler action - * for the specified signal and mark that the default signal hander is + * for the specified signal and mark that the default signal handler is * in place (it is not yet). * * If 'defaction' is false, then mark that the default signal handler is diff --git a/sched/signal/sig_deliver.c b/sched/signal/sig_deliver.c index 7eadc3279bb..10db4156770 100644 --- a/sched/signal/sig_deliver.c +++ b/sched/signal/sig_deliver.c @@ -149,7 +149,7 @@ void nxsig_deliver(FAR struct tcb_s *stcb) if (nxsig_isdefault(stcb, sigq->info.si_signo)) { - /* Leave the critical section befor calling the handler */ + /* Leave the critical section before calling the handler */ leave_critical_section(flags); (*sigq->action.sighandler)(sigq->info.si_signo, &sigq->info, @@ -171,7 +171,7 @@ void nxsig_deliver(FAR struct tcb_s *stcb) memcpy(&info, &sigq->info, sizeof(siginfo_t)); - /* Leave the critical section befor calling the handler */ + /* Leave the critical section before calling the handler */ leave_critical_section(flags); up_signal_dispatch(sigq->action.sighandler, sigq->info.si_signo, diff --git a/sched/task/task_cancelpt.c b/sched/task/task_cancelpt.c index 189fa0a97b5..5cd317ab1de 100644 --- a/sched/task/task_cancelpt.c +++ b/sched/task/task_cancelpt.c @@ -322,7 +322,7 @@ bool check_cancellation_point(void) * while we the thread is within the cancellation point. This logic * behaves much like sending a signal: It will cause waiting threads * to wake up and terminated with ECANCELED. A call to - * leave_cancellation_point() whould then follow, causing the thread to + * leave_cancellation_point() would then follow, causing the thread to * exit. * ****************************************************************************/ @@ -342,7 +342,7 @@ void nxnotify_cancellation(FAR struct tcb_s *tcb) tcb->flags |= TCB_FLAG_CANCEL_PENDING; /* We only notify the cancellation if (1) the thread has not disabled - * cancellation, (2) the thread uses the deffered cancellation mode, + * cancellation, (2) the thread uses the deferred cancellation mode, * (3) the thread is waiting within a cancellation point. */ diff --git a/sched/task/task_delete.c b/sched/task/task_delete.c index 00b45ed7bdd..8f87ad06d9c 100644 --- a/sched/task/task_delete.c +++ b/sched/task/task_delete.c @@ -143,12 +143,12 @@ int task_delete(pid_t pid) /* Then we cannot cancel the thread now. Here is how this is * supposed to work: * - * "When cancelability is disabled, all cancels are held pending - * in the target thread until the thread changes the cancelability. - * When cancelability is deferred, all cancels are held pending in - * the target thread until the thread changes the cancelability, calls + * "When cancellability is disabled, all cancels are held pending + * in the target thread until the thread changes the cancellability. + * When cancellability is deferred, all cancels are held pending in + * the target thread until the thread changes the cancellability, calls * a function which is a cancellation point or calls pthread_testcancel(), - * thus creating a cancellation point. When cancelability is asynchronous, + * thus creating a cancellation point. When cancellability is asynchronous, * all cancels are acted upon immediately, interrupting the thread with its * processing." */ diff --git a/sched/task/task_getgroup.c b/sched/task/task_getgroup.c index 870ce2e40af..f0ba92c9ccb 100644 --- a/sched/task/task_getgroup.c +++ b/sched/task/task_getgroup.c @@ -61,7 +61,7 @@ * Returned Value: * On success, a pointer to the group task structure is returned. This * function can fail only if there is no group that corresponds to the - * groupd ID. + * grouped ID. * * Assumptions: * Called during when signally tasks in a safe context. No special diff --git a/sched/task/task_onexit.c b/sched/task/task_onexit.c index 8c29a274897..9ce0c93157b 100644 --- a/sched/task/task_onexit.c +++ b/sched/task/task_onexit.c @@ -72,7 +72,7 @@ * * NOTE 2: CONFIG_SCHED_ONEXIT must be defined to enable this function * - * Limitiations in the current implementation: + * Limitations in the current implementation: * * 1. Only a single on_exit function can be registered unless * CONFIG_SCHED_ONEXIT_MAX defines a larger number. @@ -106,7 +106,7 @@ int on_exit(CODE void (*func)(int, FAR void *), FAR void *arg) sched_lock(); /* Search for the first available slot. on_exit() functions are registered - * from lower to higher arry indices; they must be called in the reverse + * from lower to higher array indices; they must be called in the reverse * order of registration when task exists, i.e., from higher to lower * indices. */ diff --git a/sched/task/task_prctl.c b/sched/task/task_prctl.c index 523cb184ead..365b2703e40 100644 --- a/sched/task/task_prctl.c +++ b/sched/task/task_prctl.c @@ -63,7 +63,7 @@ * the specific command. * * Returned Value: - * The returned value may depend on the specific commnand. For PR_SET_NAME + * The returned value may depend on the specific command. For PR_SET_NAME * and PR_GET_NAME, the returned value of 0 indicates successful operation. * On any failure, -1 is retruend and the errno value is set appropriately. * diff --git a/sched/task/task_reparent.c b/sched/task/task_reparent.c index 0b7e677568e..06b5d568ebc 100644 --- a/sched/task/task_reparent.c +++ b/sched/task/task_reparent.c @@ -195,7 +195,7 @@ int task_reparent(pid_t ppid, pid_t chpid) DEBUGASSERT(ogrp->tg_nchildren > 0); - ogrp->tg_nchildren--; /* The orignal parent now has one few children */ + ogrp->tg_nchildren--; /* The original parent now has one few children */ pgrp->tg_nchildren++; /* The new parent has one additional child */ ret = OK; @@ -308,7 +308,7 @@ int task_reparent(pid_t ppid, pid_t chpid) DEBUGASSERT(otcb->group != NULL && otcb->group->tg_nchildren > 0); - otcb->group->tg_nchildren--; /* The orignal parent now has one few children */ + otcb->group->tg_nchildren--; /* The original parent now has one few children */ ptcb->group->tg_nchildren++; /* The new parent has one additional child */ ret = OK; diff --git a/sched/task/task_setcancelstate.c b/sched/task/task_setcancelstate.c index ee2f2aff20c..a3e777b4f19 100644 --- a/sched/task/task_setcancelstate.c +++ b/sched/task/task_setcancelstate.c @@ -56,11 +56,11 @@ * * Description: * The task_setcancelstate() function atomically both sets the calling - * task's cancelability state to the indicated state and returns the - * previous cancelability state at the location referenced by oldstate. + * task's cancellability state to the indicated state and returns the + * previous cancellability state at the location referenced by oldstate. * Legal values for state are TASK_CANCEL_ENABLE and TASK_CANCEL_DISABLE. * - * The cancelability state and type of any newly created tasks are + * The cancellability state and type of any newly created tasks are * TASK_CANCEL_ENABLE and TASK_CANCEL_DEFERRED respectively. * * Input Parameters: @@ -85,7 +85,7 @@ int task_setcancelstate(int state, FAR int *oldstate) sched_lock(); - /* Return the current state if so requrested */ + /* Return the current state if so requested */ if (oldstate != NULL) { diff --git a/sched/task/task_setcanceltype.c b/sched/task/task_setcanceltype.c index 3c08c5d3206..c28e128ac52 100644 --- a/sched/task/task_setcanceltype.c +++ b/sched/task/task_setcanceltype.c @@ -56,12 +56,12 @@ * * Description: * The task_setcanceltype() function atomically both sets the calling - * thread's cancelability type to the indicated type and returns the - * previous cancelability type at the location referenced by oldtype + * thread's cancellability type to the indicated type and returns the + * previous cancellability type at the location referenced by oldtype * Legal values for type are TASK_CANCEL_DEFERRED and * TASK_CANCEL_ASYNCHRONOUS. * - * The cancelability state and type of any newly created threads, + * The cancellability state and type of any newly created threads, * including the thread in which main() was first invoked, are * TASK_CANCEL_ENABLE and TASK_CANCEL_DEFERRED respectively. * @@ -78,7 +78,7 @@ int task_setcanceltype(int type, FAR int *oldtype) sched_lock(); - /* Return the current type if so requrested */ + /* Return the current type if so requested */ if (oldtype != NULL) { diff --git a/sched/task/task_setup.c b/sched/task/task_setup.c index e8f85e3d3c6..dbd7770f4a4 100644 --- a/sched/task/task_setup.c +++ b/sched/task/task_setup.c @@ -601,7 +601,7 @@ static inline int nxtask_stackargsetup(FAR struct task_tcb_s *tcb, } /* Put a terminator entry at the end of the argv[] array. Then save the - * argv[] arry pointer in the TCB where it will be recovered later by + * argv[] array pointer in the TCB where it will be recovered later by * nxtask_start(). */ diff --git a/sched/task/task_testcancel.c b/sched/task/task_testcancel.c index 056f92fdbc7..e95d69f078f 100644 --- a/sched/task/task_testcancel.c +++ b/sched/task/task_testcancel.c @@ -56,7 +56,7 @@ * Description: * The task_testcancel() function creates a cancellation point in the * calling thread. The task_testcancel() function has no effect if - * cancelability is disabled + * cancellability is disabled * ****************************************************************************/ diff --git a/syscall/syscall_funclookup.c b/syscall/syscall_funclookup.c index aeef6df6685..d313d9da504 100644 --- a/syscall/syscall_funclookup.c +++ b/syscall/syscall_funclookup.c @@ -79,7 +79,7 @@ * interfaces to support the system calls, even though we don't use them * ourself. * - * The "normal" pre-processor defintions for these functions is in errno.h + * The "normal" pre-processor definitions for these functions is in errno.h * but we need the internal function prototypes in nuttx/errno.h. */ diff --git a/tools/Makefile.unix b/tools/Makefile.unix index cb4c0cc4c15..ae092c8f4ca 100644 --- a/tools/Makefile.unix +++ b/tools/Makefile.unix @@ -186,7 +186,7 @@ ifeq ($(V),2) MKEXPORT_ARGS += -d endif -# This is the name of the final target (relative to the top level directorty) +# This is the name of the final target (relative to the top level directory) NUTTXNAME = nuttx BIN = $(NUTTXNAME)$(EXEEXT) diff --git a/tools/Makefile.win b/tools/Makefile.win index be4fd82a60c..57f3dcf2459 100644 --- a/tools/Makefile.win +++ b/tools/Makefile.win @@ -171,7 +171,7 @@ ifeq ($(V),2) MKEXPORT_ARGS += -d endif -# This is the name of the final target (relative to the top level directorty) +# This is the name of the final target (relative to the top level directory) NUTTXNAME = nuttx BIN = $(NUTTXNAME)$(EXEEXT) diff --git a/tools/README.txt b/tools/README.txt index 130966db269..614fc992310 100644 --- a/tools/README.txt +++ b/tools/README.txt @@ -969,7 +969,7 @@ testbuild.sh list file. The final, non-optional parameter, , provides the path to that file. - The test list file is a sequence of build descriptons, one per line. One + The test list file is a sequence of build descriptions, one per line. One build descriptions consists of two comma separated values. For example: stm32f429i-disco:nsh,CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL @@ -986,7 +986,7 @@ testbuild.sh configuration names depends on the underlying architecture of the configured board. - The prefix '-' can be used to skip a configruation: + The prefix '-' can be used to skip a configuration: -stm32f429i-disco/nsh,CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL uncrustify.cfg diff --git a/tools/configure.bat b/tools/configure.bat index 7a2115c25eb..9d9cd35f08a 100755 --- a/tools/configure.bat +++ b/tools/configure.bat @@ -143,7 +143,7 @@ echo ^: echo Identifies the board. This must correspond to a board directory echo under nuttx/boards/. echo ^: -echo Identifies the specific configuratin for the selected ^. +echo Identifies the specific configuration for the selected ^. echo This must correspond to a sub-directory under the board directory at echo under nuttx/boards/^/configs/. echo -h: diff --git a/tools/configure.c b/tools/configure.c index b37f4cda5ff..5e75c123127 100644 --- a/tools/configure.c +++ b/tools/configure.c @@ -404,7 +404,7 @@ static bool verify_optiondir(const char *directory) if (stat(directory, &buf) < 0) { - /* It may be okay if the dirctory does not exist */ + /* It may be okay if the directory does not exist */ /* It may be okay if the file does not exist */ @@ -581,7 +581,7 @@ static void config_search(const char *boarddir, config_callback callback, void * } /* If it is a regular file named 'defconfig' then we have found a - * configuration directory. We could terminate the serach in this case + * configuration directory. We could terminate the search in this case * because we do not expect sub-directories within configuration * directories. */ @@ -1442,7 +1442,7 @@ static void refresh(void) if (ret < 0) #endif { - fprintf(stderr, "ERROR: Failed to refresh configuations\n"); + fprintf(stderr, "ERROR: Failed to refresh configurations\n"); fprintf(stderr, " kconfig-conf --olddefconfig Kconfig\n"); } } diff --git a/tools/define.sh b/tools/define.sh index e447a44ad52..01bc1872939 100755 --- a/tools/define.sh +++ b/tools/define.sh @@ -97,7 +97,7 @@ fi # # Most compilers support CFLAG options like '-D' to add pre-processor -# variable defintions. Some (like the Zilog tools), do not. This script +# variable definitions. Some (like the Zilog tools), do not. This script # makes the selection of pre-processor definitions compiler independent. # # Below are all known compiler names (as found in the config/*/*/Make.defs diff --git a/tools/flash_writer.py b/tools/flash_writer.py index ba748ccc623..01469084ae6 100755 --- a/tools/flash_writer.py +++ b/tools/flash_writer.py @@ -47,7 +47,7 @@ import xmodem import_serial_module = True -# When SDK release, plase set SDK_RELEASE as True. +# When SDK release, please set SDK_RELEASE as True. SDK_RELEASE = False if SDK_RELEASE : @@ -537,7 +537,7 @@ def main(): # Remove files if ConfigArgs.ERASE_NAME : - print(">>> Remove exisiting files ...") + print(">>> Remove existing files ...") writer.delete_files(ConfigArgs.ERASE_NAME) # Install files diff --git a/tools/kconfig2html.c b/tools/kconfig2html.c index a321586736c..5e273c3f103 100644 --- a/tools/kconfig2html.c +++ b/tools/kconfig2html.c @@ -423,7 +423,7 @@ static char *dequote(char *ptr) { int len; - /* Check if there is a traiing quote */ + /* Check if there is a trailing quote */ len = strlen(ptr); if (ptr[len-1] == '"') @@ -517,7 +517,7 @@ static int htmlize_character(char *dest, char ch) * Name: htmlize_text * * Description: - * HTML-ize a free-text string. This function preforms the conversions of + * HTML-ize a free-text string. This function performs the conversions of * in htmlize_character() for a text string. * ****************************************************************************/ @@ -542,7 +542,7 @@ static char *htmlize_text(const char *src) { /* Expand characters as necessary. NOTE: There is no check if the * HTML-expanded text overflows the g_scratch[] buffer. If you see - * errors, be suspicous. + * errors, be suspicious. */ dest += htmlize_character(dest, *src); @@ -556,7 +556,7 @@ static char *htmlize_text(const char *src) * * Description: * HTML-ize an expression of configuration variables. This function - * preforms the same conversions as in htmlize_character(), but also + * performs the same conversions as in htmlize_character(), but also * expands and adds hyper links for configuration variables. * ****************************************************************************/ @@ -1544,7 +1544,7 @@ static void process_dependson(void) * Name: print_dependencies * * Description: - * Output the current stack of depenencies + * Output the current stack of dependencies * ****************************************************************************/ @@ -2708,7 +2708,7 @@ int main(int argc, char **argv, char **envp) output(" These settings are presented out-of-context because they cannot be directly controlled by the user.\n"); output(" Many of these settings are selected automatically and indirectly when other, visible configuration variables are selected.\n"); output(" One purpose of these hidden configuration variables is to control menuing in the kconfig-frontends configuration tool.\n"); - output(" Many configuration variables with a form like CONFIG_ARCH_HAVE_feature, for example, are used only to indicate that the selected archicture supports feature and so addition selection associated with feature will become accessible to the user.\n"); + output(" Many configuration variables with a form like CONFIG_ARCH_HAVE_feature, for example, are used only to indicate that the selected architecture supports feature and so addition selection associated with feature will become accessible to the user.\n"); output("

          \n"); output("
            \n"); diff --git a/tools/mkdeps.c b/tools/mkdeps.c index 3daae91f660..4e0e932ea25 100644 --- a/tools/mkdeps.c +++ b/tools/mkdeps.c @@ -267,7 +267,7 @@ static void show_usage(const char *progname, const char *msg, int exitcode) fprintf(stderr, " . if provided multiple time, only the last --obj-path will be used.\n"); fprintf(stderr, " --obj-suffix \n"); fprintf(stderr, " If and object path is provided, then the extension will be assumed to be .o. This\n"); - fprintf(stderr, " default suffix can be overrided with this command line option.\n"); + fprintf(stderr, " default suffix can be overriden with this command line option.\n"); fprintf(stderr, " --winnative\n"); fprintf(stderr, " By default, a POSIX-style environment is assumed (e.g., Linux, Cygwin, etc.) This option is\n"); fprintf(stderr, " inform the tool that is working in a pure Windows native environment.\n"); diff --git a/tools/mkromfsimg.sh b/tools/mkromfsimg.sh index 54bb2b2c067..8e105535739 100755 --- a/tools/mkromfsimg.sh +++ b/tools/mkromfsimg.sh @@ -67,7 +67,7 @@ fi # Extract all values from the .config in the $topdir that contains all of the NuttX # configuration settings. The .config file was intended to be include-able by makefiles -# and source-able by scripts. Unfortunately,there are too many syntactic differents +# and source-able by scripts. Unfortunately,there are too many syntactic difference # to make that practical if [ ! -r $topdir/.config ]; then diff --git a/tools/noteinfo.c b/tools/noteinfo.c index 4bac4f05fba..0b454bf49b1 100644 --- a/tools/noteinfo.c +++ b/tools/noteinfo.c @@ -856,7 +856,7 @@ int main(int argc, char **argv) { switch(note->nc_type) { - /* Followed by a varible length, NULL terminated name */ + /* Followed by a variable length, NULL terminated name */ case 0: /* NOTE_START */ buffer[size - 1] = '\0'; @@ -909,7 +909,7 @@ int main(int argc, char **argv) remainder--; break; - /* Nothing addition shold follow these types */ + /* Nothing addition shoold follow these types */ case 1: /* NOTE_STOP */ case 3: /* NOTE_RESUME */ diff --git a/tools/ocdconsole.py b/tools/ocdconsole.py index 453a613289e..b1a536bda82 100755 --- a/tools/ocdconsole.py +++ b/tools/ocdconsole.py @@ -48,11 +48,11 @@ # read/write access for both the target and the debug host. A simple ping # pong handshake protocol over these words allows up/down link communication. # On the upside no additional integration is needed. On the downside it may be -# nessessary to feed lwl with cycles to poll for changes in the downword, +# necessary to feed lwl with cycles to poll for changes in the downword, # depending on the use case. For the case of a simple console, that's not # needed. # -# For convinence these communication locations are automatically discovered +# For convenience these communication locations are automatically discovered # from the RAM by searching through it. Just define downwordaddr and # upwordaddr if you want to work with fixed locations. # diff --git a/tools/sethost.sh b/tools/sethost.sh index 28baf587aaa..5a75885accb 100755 --- a/tools/sethost.sh +++ b/tools/sethost.sh @@ -282,7 +282,7 @@ if [ "X$dotconfig" != "Xy" ]; then sed -i -e "s/^CONFIG_APPS_DIR/# CONFIG_APPS_DIR/g" .config mv .config $configfile || \ - { echo "ERROR: Failed to move .conig to $configfile"; exit 1; } + { echo "ERROR: Failed to move .config to $configfile"; exit 1; } if [ -e SAVEconfig ]; then mv SAVEconfig .config || \ diff --git a/tools/version.sh b/tools/version.sh index 31e8412ad44..a53b3cfbcc5 100755 --- a/tools/version.sh +++ b/tools/version.sh @@ -129,7 +129,7 @@ if [ -z "${BUILD}" ]; then fi fi -# Write a version file into the NuttX directoy. The syntax of file is such that it +# Write a version file into the NuttX directory. The syntax of file is such that it # may be sourced by a bash script or included by a Makefile. echo "#!/bin/bash" >${OUTFILE} diff --git a/tools/zds/zdsar.c b/tools/zds/zdsar.c index 5b3db5fa9fd..6b9561f489d 100644 --- a/tools/zds/zdsar.c +++ b/tools/zds/zdsar.c @@ -95,7 +95,7 @@ # define HOSTNAME "Native" /* Windows native */ #elif defined(HOST_CYGWIN) # define SEPARATOR '/' -# define HOSTNAME "Cywgin" /* Cygwin or MSYS under Windows */ +# define HOSTNAME "Cygwin" /* Cygwin or MSYS under Windows */ #endif /**************************************************************************** diff --git a/wireless/bluetooth/bt_gatt.c b/wireless/bluetooth/bt_gatt.c index 1cd85ed600c..6fd6d05606b 100644 --- a/wireless/bluetooth/bt_gatt.c +++ b/wireless/bluetooth/bt_gatt.c @@ -566,7 +566,7 @@ static uint8_t disconnected_cb(FAR const struct bt_gatt_attr_s *attr, memset(&ccc->value, 0, sizeof(ccc->value)); ccc->cfg_changed(ccc->value); - wlinfo("ccc %p reseted\n", ccc); + wlinfo("ccc %p reset\n", ccc); return BT_GATT_ITER_CONTINUE; } diff --git a/wireless/bluetooth/bt_smp.c b/wireless/bluetooth/bt_smp.c index 4fcb5399b1d..52f502c582e 100644 --- a/wireless/bluetooth/bt_smp.c +++ b/wireless/bluetooth/bt_smp.c @@ -1238,7 +1238,7 @@ static void bt_smp_encrypt_change(FAR FAR struct bt_conn_s *conn, } #if defined(CONFIG_BLUETOOTH_SMP_SELFTEST) -/* spaw octets for LE encrypt */ +/* spawn octets for LE encrypt */ static void swap_buf(FAR const uint8_t *src, FAR uint8_t *dst, uint16_t len) { diff --git a/wireless/ieee802154/Kconfig b/wireless/ieee802154/Kconfig index a18adb17b4e..358fb2b8990 100644 --- a/wireless/ieee802154/Kconfig +++ b/wireless/ieee802154/Kconfig @@ -110,7 +110,7 @@ config IEEE802154_MACDEV if IEEE802154_MACDEV config IEEE802154_MACDEV_RECVRPRIO - int "Priority of frame receiver registerd with the MAC layer" + int "Priority of frame receiver registered with the MAC layer" default 0 ---help--- When the MAC layer receives an incoming data frame, it passes the frame @@ -141,7 +141,7 @@ config IEEE802154_NETDEV if IEEE802154_NETDEV config IEEE802154_NETDEV_RECVRPRIO - int "Priority of frame receiver registerd with the MAC layer" + int "Priority of frame receiver registered with the MAC layer" default 1 ---help--- When the MAC layer receives an incoming data frame, it passes the frame diff --git a/wireless/ieee802154/ieee802154_primitive.c b/wireless/ieee802154/ieee802154_primitive.c index b4e53960b08..06715eb058e 100644 --- a/wireless/ieee802154/ieee802154_primitive.c +++ b/wireless/ieee802154/ieee802154_primitive.c @@ -300,7 +300,7 @@ FAR struct ieee802154_primitive_s *ieee802154_primitive_allocate(void) #endif { /* If we cannot a primitive structure from the free list, then we - * will have to allocate one from the kernal memory pool. + * will have to allocate one from the kernel memory pool. */ leave_critical_section(flags); diff --git a/wireless/ieee802154/mac802154.h b/wireless/ieee802154/mac802154.h index 8c9d8e475d6..efe9f7864e9 100644 --- a/wireless/ieee802154/mac802154.h +++ b/wireless/ieee802154/mac802154.h @@ -162,7 +162,7 @@ int mac802154_req_data(MACHANDLE mac, * the struct mac802154_maccb_s->conf_purge callback. * * NOTE: The standard specifies that confirmation should be indicated via - * the asynchronous MLME-PURGE.confirm primitve. However, in our + * the asynchronous MLME-PURGE.confirm primitive. However, in our * implementation we synchronously return the status from the request. * Therefore, we merge the functionality of the MLME-PURGE.request and * MLME-PURGE.confirm primitives together. @@ -222,7 +222,7 @@ int mac802154_req_gts(MACHANDLE mac, FAR struct ieee802154_gts_req_s *req); * that the MLME performs a reset operation. * * NOTE: The standard specifies that confirmation should be provided via - * via the asynchronous MLME-RESET.confirm primitve. However, in our + * via the asynchronous MLME-RESET.confirm primitive. However, in our * implementation we synchronously return the value immediately. Therefore, * we merge the functionality of the MLME-RESET.request and MLME-RESET.confirm * primitives together. @@ -274,7 +274,7 @@ int mac802154_req_scan(MACHANDLE mac, FAR struct ieee802154_scan_req_s *req); * attribute. * * NOTE: The standard specifies that the attribute value should be returned - * via the asynchronous MLME-GET.confirm primitve. However, in our + * via the asynchronous MLME-GET.confirm primitive. However, in our * implementation, we synchronously return the value immediately.Therefore, we * merge the functionality of the MLME-GET.request and MLME-GET.confirm * primitives together. @@ -292,7 +292,7 @@ int mac802154_req_get(MACHANDLE mac, enum ieee802154_attr_e , * indicated MAC PIB attribute. * * NOTE: The standard specifies that confirmation should be indicated via - * the asynchronous MLME-SET.confirm primitve. However, in our implementation + * the asynchronous MLME-SET.confirm primitive. However, in our implementation * we synchronously return the status from the request. Therefore, we do merge * the functionality of the MLME-SET.request and MLME-SET.confirm primitives * together. diff --git a/wireless/ieee802154/mac802154_assoc.c b/wireless/ieee802154/mac802154_assoc.c index a7d02614b1d..836d977884a 100644 --- a/wireless/ieee802154/mac802154_assoc.c +++ b/wireless/ieee802154/mac802154_assoc.c @@ -237,7 +237,7 @@ int mac802154_req_associate(MACHANDLE mac, txdesc->frametype = IEEE802154_FRAME_COMMAND; txdesc->ackreq = true; - /* Save a copy of the destination addressing infromation into the tx + /* Save a copy of the destination addressing information into the tx * descriptor. We only do this for commands to help with handling their * progession. */ @@ -764,7 +764,7 @@ void mac802154_rx_assocresp(FAR struct ieee802154_privmac_s *priv, * * TODO: What is supposed to happen in this situation. Are we supposed * to accept the request? Are we supposed to Disassociate with the - * network as a convienience to the PAN Coordinator. So that it does + * network as a convenience to the PAN Coordinator. So that it does * not need to waste space holding our information? */ diff --git a/wireless/ieee802154/mac802154_device.c b/wireless/ieee802154/mac802154_device.c index b34a0ab5e32..e62abda26f1 100644 --- a/wireless/ieee802154/mac802154_device.c +++ b/wireless/ieee802154/mac802154_device.c @@ -820,7 +820,7 @@ static int mac802154dev_rxframe(FAR struct mac802154_chardevice_s *dev, * user-space * * Input Parameters: - * mac - Pointer to the mac layer struct to be registerd. + * mac - Pointer to the mac layer struct to be registered. * minor - The device minor number. The IEEE802.15.4 MAC character device * will be registered as /dev/ieeeN where N is the minor number * diff --git a/wireless/ieee802154/mac802154_getset.c b/wireless/ieee802154/mac802154_getset.c index f4d6d5da544..c6cf93ad7a3 100644 --- a/wireless/ieee802154/mac802154_getset.c +++ b/wireless/ieee802154/mac802154_getset.c @@ -67,7 +67,7 @@ * attribute. * * NOTE: The standard specifies that the attribute value should be returned - * via the asynchronous MLME-GET.confirm primitve. However, in our + * via the asynchronous MLME-GET.confirm primitive. However, in our * implementation, we synchronously return the value immediately.Therefore, we * merge the functionality of the MLME-GET.request and MLME-GET.confirm * primitives together. @@ -165,7 +165,7 @@ int mac802154_req_get(MACHANDLE mac, enum ieee802154_attr_e attr, * indicated MAC PIB attribute. * * NOTE: The standard specifies that confirmation should be indicated via - * the asynchronous MLME-SET.confirm primitve. However, in our implementation + * the asynchronous MLME-SET.confirm primitive. However, in our implementation * we synchronously return the status from the request. Therefore, we do merge * the functionality of the MLME-SET.request and MLME-SET.confirm primitives * together. diff --git a/wireless/ieee802154/mac802154_loopback.c b/wireless/ieee802154/mac802154_loopback.c index 74dcda5975d..0021e7c42db 100644 --- a/wireless/ieee802154/mac802154_loopback.c +++ b/wireless/ieee802154/mac802154_loopback.c @@ -343,7 +343,7 @@ static int lo_loopback(FAR struct net_driver_s *dev) IEEE802154_EADDRCOPY(ind.dest.eaddr, g_eaddr); /* Loop while there framelist to be sent, i.e., while the freme list is not - * emtpy. Sending, of course, just means relaying back through the network + * empty. Sending, of course, just means relaying back through the network * for this driver. */ diff --git a/wireless/ieee802154/mac802154_poll.c b/wireless/ieee802154/mac802154_poll.c index 56f9db77bbd..d5b53d008fe 100644 --- a/wireless/ieee802154/mac802154_poll.c +++ b/wireless/ieee802154/mac802154_poll.c @@ -142,7 +142,7 @@ int mac802154_req_poll(MACHANDLE mac, FAR struct ieee802154_poll_req_s *req) txdesc); } - /* Save a copy of the destination addressing infromation into the tx descriptor. + /* Save a copy of the destination addressing information into the tx descriptor. * We only do this for commands to help with handling their progession. */ diff --git a/wireless/ieee802154/mac802154_purge.c b/wireless/ieee802154/mac802154_purge.c index 30dd9d92c7e..dc2d4d5b26a 100644 --- a/wireless/ieee802154/mac802154_purge.c +++ b/wireless/ieee802154/mac802154_purge.c @@ -67,7 +67,7 @@ * the struct mac802154_maccb_s->conf_purge callback. * * NOTE: The standard specifies that confirmation should be indicated via - * the asynchronous MLME-PURGE.confirm primitve. However, in our + * the asynchronous MLME-PURGE.confirm primitive. However, in our * implementation we synchronously return the status from the request. * Therefore, we merge the functionality of the MLME-PURGE.request and * MLME-PURGE.confirm primitives together. diff --git a/wireless/ieee802154/mac802154_reset.c b/wireless/ieee802154/mac802154_reset.c index 7e049b2d9c8..351e695c911 100644 --- a/wireless/ieee802154/mac802154_reset.c +++ b/wireless/ieee802154/mac802154_reset.c @@ -67,7 +67,7 @@ * that the MLME performs a reset operation. * * NOTE: The standard specifies that confirmation should be provided via - * via the asynchronous MLME-RESET.confirm primitve. However, in our + * via the asynchronous MLME-RESET.confirm primitive. However, in our * implementation we synchronously return the value immediately. Therefore, * we merge the functionality of the MLME-RESET.request and MLME-RESET.confirm * primitives together. diff --git a/wireless/pktradio/pktradio_loopback.c b/wireless/pktradio/pktradio_loopback.c index be9aa6b06bf..b91beca4132 100644 --- a/wireless/pktradio/pktradio_loopback.c +++ b/wireless/pktradio/pktradio_loopback.c @@ -322,7 +322,7 @@ static int lo_loopback(FAR struct net_driver_s *dev) memcpy(pktmeta.pm_dest.pa_addr, g_mac_addr, CONFIG_PKTRADIO_ADDRLEN); /* Loop while there framelist to be sent, i.e., while the freme list is not - * emtpy. Sending, of course, just means relaying back through the network + * empty. Sending, of course, just means relaying back through the network * for this driver. */ @@ -944,7 +944,7 @@ static int lo_req_data(FAR struct radio_driver_s *netdev, * * Input Parameters: * netdev - The network device to be queried - * properties - Location where radio properities will be returned. + * properties - Location where radio properties will be returned. * * Returned Value: * Zero (OK) returned on success; a negated errno value is returned on diff --git a/wireless/pktradio/pktradio_metadata.c b/wireless/pktradio/pktradio_metadata.c index c5ee5fc4162..3a9b8409c27 100644 --- a/wireless/pktradio/pktradio_metadata.c +++ b/wireless/pktradio/pktradio_metadata.c @@ -70,7 +70,7 @@ static sem_t g_metadata_sem; static bool g_metadata_initialized; -/* Pool of pre-allocated meta-data stuctures */ +/* Pool of pre-allocated meta-data structures */ static struct pktradio_metadata_s g_metadata_pool[CONFIG_PKTRADIO_NRXMETA]; @@ -170,7 +170,7 @@ FAR struct pktradio_metadata_s *pktradio_metadata_allocate(void) else { /* If we cannot get a meta-data instance from the free list, then we - * will have to allocate one from the kernal memory pool. We won't + * will have to allocate one from the kernel memory pool. We won't * access the free list. */