From c8a4bdf21a99ff74239a7e83108f4d8ae73fd850 Mon Sep 17 00:00:00 2001 From: wangming9 Date: Fri, 14 Jul 2023 10:16:46 +0800 Subject: [PATCH] arch/arm: GoldFish Platform support Summary: Adding virtual evaluate platform GoldFish. Which is based on Android Goldfish Emulator, it's a ARM virt board but Android enhance it with more featue. The patch set goldfish as a arm chip. Signed-off-by: wangming9 --- arch/arm/Kconfig | 9 ++ arch/arm/include/goldfish/chip.h | 46 ++++++ arch/arm/include/goldfish/irq.h | 69 +++++++++ arch/arm/src/goldfish/Kconfig | 30 ++++ arch/arm/src/goldfish/Make.defs | 24 ++++ arch/arm/src/goldfish/chip.h | 114 +++++++++++++++ arch/arm/src/goldfish/goldfish_boot.c | 57 ++++++++ arch/arm/src/goldfish/goldfish_irq.c | 159 +++++++++++++++++++++ arch/arm/src/goldfish/goldfish_irq.h | 51 +++++++ arch/arm/src/goldfish/goldfish_memorymap.c | 74 ++++++++++ arch/arm/src/goldfish/goldfish_memorymap.h | 80 +++++++++++ arch/arm/src/goldfish/goldfish_serial.c | 65 +++++++++ arch/arm/src/goldfish/goldfish_timer.c | 42 ++++++ 13 files changed, 820 insertions(+) create mode 100644 arch/arm/include/goldfish/chip.h create mode 100644 arch/arm/include/goldfish/irq.h create mode 100644 arch/arm/src/goldfish/Kconfig create mode 100644 arch/arm/src/goldfish/Make.defs create mode 100644 arch/arm/src/goldfish/chip.h create mode 100644 arch/arm/src/goldfish/goldfish_boot.c create mode 100644 arch/arm/src/goldfish/goldfish_irq.c create mode 100644 arch/arm/src/goldfish/goldfish_irq.h create mode 100644 arch/arm/src/goldfish/goldfish_memorymap.c create mode 100644 arch/arm/src/goldfish/goldfish_memorymap.h create mode 100644 arch/arm/src/goldfish/goldfish_serial.c create mode 100644 arch/arm/src/goldfish/goldfish_timer.c diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 48c297abfb8..ce3044c4ae7 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -648,6 +648,11 @@ config ARCH_CHIP_QEMU_ARM ---help--- QEMU virt platform (ARMv7a) +config ARCH_CHIP_GOLDFISH_ARM + bool "GOLDFISH virt platform (ARMv7a)" + ---help--- + GOLDFISH virt platform (ARMv7a) + config ARCH_CHIP_ARM_CUSTOM bool "Custom ARM chip" select ARCH_CHIP_CUSTOM @@ -1053,6 +1058,7 @@ config ARCH_CHIP default "phy62xx" if ARCH_CHIP_PHY62XX default "tlsr82" if ARCH_CHIP_TLSR82 default "qemu" if ARCH_CHIP_QEMU_ARM + default "goldfish" if ARCH_CHIP_GOLDFISH_ARM config ARM_THUMB bool "Thumb Mode" @@ -1518,4 +1524,7 @@ endif if ARCH_CHIP_QEMU_ARM source "arch/arm/src/qemu/Kconfig" endif +if ARCH_CHIP_GOLDFISH_ARM +source "arch/arm/src/goldfish/Kconfig" +endif endif # ARCH_ARM diff --git a/arch/arm/include/goldfish/chip.h b/arch/arm/include/goldfish/chip.h new file mode 100644 index 00000000000..b30e9483648 --- /dev/null +++ b/arch/arm/include/goldfish/chip.h @@ -0,0 +1,46 @@ +/**************************************************************************** + * arch/arm/include/goldfish/chip.h + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __ARCH_ARM_INCLUDE_GOLDFISH_CHIP_H +#define __ARCH_ARM_INCLUDE_GOLDFISH_CHIP_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +/**************************************************************************** + * Pre-processor Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +/**************************************************************************** + * Public Functions Prototypes + ****************************************************************************/ + +#endif /* __ARCH_ARM_INCLUDE_GOLDFISH_CHIP_H */ diff --git a/arch/arm/include/goldfish/irq.h b/arch/arm/include/goldfish/irq.h new file mode 100644 index 00000000000..c65e06d7bda --- /dev/null +++ b/arch/arm/include/goldfish/irq.h @@ -0,0 +1,69 @@ +/**************************************************************************** + * arch/arm/include/goldfish/irq.h + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/* This file should never be included directly but, rather, + * only indirectly through nuttx/irq.h + */ + +#ifndef __ARCH_ARM_INCLUDE_GOLDFISH_IRQ_H +#define __ARCH_ARM_INCLUDE_GOLDFISH_IRQ_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +/**************************************************************************** + * Pre-processor Prototypes + ****************************************************************************/ + +#define NR_IRQS 220 /* Total number of interrupts */ + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +/**************************************************************************** + * Inline functions + ****************************************************************************/ + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +#ifndef __ASSEMBLY__ +#ifdef __cplusplus +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +#undef EXTERN +#ifdef __cplusplus +} +#endif +#endif + +#endif /* __ARCH_ARM_INCLUDE_GOLDFISH_IRQ_H */ diff --git a/arch/arm/src/goldfish/Kconfig b/arch/arm/src/goldfish/Kconfig new file mode 100644 index 00000000000..9526d26a590 --- /dev/null +++ b/arch/arm/src/goldfish/Kconfig @@ -0,0 +1,30 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_CHIP_GOLDFISH_ARM + +menu "Goldfish Virt Chip Selection" + +choice + prompt "Goldfish Core Configuration" + default ARCH_CHIP_GOLDFISH_CORTEXA7 + +config ARCH_CHIP_GOLDFISH_CORTEXA7 + bool "Goldfish virtual Processor (cortex-a7)" + select ARCH_CORTEXA7 + select ARCH_HAVE_ADDRENV + select ARCH_HAVE_LOWVECTORS + select ARCH_HAVE_MULTICPU + select ARCH_HAVE_TRUSTZONE + select ARCH_NEED_ADDRENV_MAPPING + select ARMV7A_HAVE_GICv2 + select ARMV7A_HAVE_GTM + select ARMV7A_HAVE_PTM + +endchoice # Goldfish Chip Selection + +endmenu # "Goldfish Virt Chip Selection" + +endif # ARCH_CHIP_GOLDFISH_ARM diff --git a/arch/arm/src/goldfish/Make.defs b/arch/arm/src/goldfish/Make.defs new file mode 100644 index 00000000000..041de91a52e --- /dev/null +++ b/arch/arm/src/goldfish/Make.defs @@ -0,0 +1,24 @@ +############################################################################ +# arch/arm/src/goldfish/Make.defs +# +# Licensed to the Apache Software Foundation (ASF) under one or more +# contributor license agreements. See the NOTICE file distributed with +# this work for additional information regarding copyright ownership. The +# ASF licenses this file to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance with the +# License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations +# under the License. +# +############################################################################ + +include armv7-a/Make.defs + +# goldfish-specific C source files +CHIP_CSRCS = goldfish_boot.c goldfish_serial.c goldfish_irq.c goldfish_timer.c goldfish_memorymap.c diff --git a/arch/arm/src/goldfish/chip.h b/arch/arm/src/goldfish/chip.h new file mode 100644 index 00000000000..355e3b37d61 --- /dev/null +++ b/arch/arm/src/goldfish/chip.h @@ -0,0 +1,114 @@ +/**************************************************************************** + * arch/arm/src/goldfish/chip.h + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __ARCH_ARM_SRC_GOLDFISH_CHIP_H +#define __ARCH_ARM_SRC_GOLDFISH_CHIP_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define CHIP_MPCORE_VBASE 0x8000000 +#define MPCORE_ICD_OFFSET 0x0000 +#define MPCORE_ICC_OFFSET 0x10000 + +#define PGTABLE_BASE_PADDR (CONFIG_RAM_START + CONFIG_RAM_SIZE - ALL_PGTABLE_SIZE) +#define PGTABLE_BASE_VADDR (CONFIG_RAM_START + CONFIG_RAM_SIZE - ALL_PGTABLE_SIZE) + +#define NUTTX_TEXT_VADDR (CONFIG_FLASH_VSTART & 0xfff00000) +#define NUTTX_TEXT_PADDR (CONFIG_FLASH_VSTART & 0xfff00000) +#define NUTTX_TEXT_PEND ((CONFIG_FLASH_END + 0x000fffff) & 0xfff00000) +#define NUTTX_TEXT_SIZE (NUTTX_TEXT_PEND - NUTTX_TEXT_PADDR) + +#define NUTTX_RAM_VADDR (CONFIG_RAM_VSTART & 0xfff00000) +#define NUTTX_RAM_PADDR (CONFIG_RAM_START & 0xfff00000) +#define NUTTX_RAM_PEND ((CONFIG_RAM_END + 0x000fffff) & 0xfff00000) +#define NUTTX_RAM_SIZE (NUTTX_RAM_PEND - NUTTX_RAM_PADDR) + +/**************************************************************************** + * Macro Definitions + ****************************************************************************/ + +#ifdef __ASSEMBLY__ + +/**************************************************************************** + * Name: cpuindex + * + * Description: + * Return an index idenifying the current CPU. + * + ****************************************************************************/ + +#if defined(CONFIG_SMP) && CONFIG_ARCH_INTERRUPTSTACK > 7 + .macro cpuindex, index + mrc p15, 0, \index, c0, c0, 5 /* Read the MPIDR */ + and \index, \index, #3 /* Bits 0-1=CPU ID */ + .endm +#endif + +/**************************************************************************** + * Name: setirqstack + * + * Description: + * Set the current stack pointer to the -"top" of the IRQ interrupt + * stack for the current CPU. + * + ****************************************************************************/ + +#if defined(CONFIG_SMP) && CONFIG_ARCH_INTERRUPTSTACK > 7 + .macro setirqstack, tmp1, tmp2 + mrc p15, 0, \tmp1, c0, c0, 5 /* tmp1=MPIDR */ + and \tmp1, \tmp1, #3 /* Bits 0-1=CPU ID */ + ldr \tmp2, =g_irqstack_top /* tmp2=Array of IRQ stack pointers */ + lsls \tmp1, \tmp1, #2 /* tmp1=Array byte offset */ + add \tmp2, \tmp2, \tmp1 /* tmp2=Offset address into array */ + ldr sp, [\tmp2, #0] /* sp=Address in stack allocation */ + .endm +#endif + +/**************************************************************************** + * Name: setfiqstack + * + * Description: + * Set the current stack pointer to the -"top" of the FIQ interrupt + * stack for the current CPU. + * + ****************************************************************************/ + +#if defined(CONFIG_SMP) && CONFIG_ARCH_INTERRUPTSTACK > 7 + .macro setfiqstack, tmp1, tmp2 + mrc p15, 0, \tmp1, c0, c0, 5 /* tmp1=MPIDR */ + and \tmp1, \tmp1, #3 /* Bits 0-1=CPU ID */ + ldr \tmp2, =g_fiqstack_top /* tmp2=Array of FIQ stack pointers */ + lsls \tmp1, \tmp1, #2 /* tmp1=Array byte offset */ + add \tmp2, \tmp2, \tmp1 /* tmp2=Offset address into array */ + ldr sp, [\tmp2, #0] /* sp=Address in stack allocation */ + .endm +#endif + +#endif /* __ASSEMBLY__ */ + +#endif /* __ARCH_ARM_SRC_GOLDFISH_CHIP_H */ diff --git a/arch/arm/src/goldfish/goldfish_boot.c b/arch/arm/src/goldfish/goldfish_boot.c new file mode 100644 index 00000000000..8ae23c8de67 --- /dev/null +++ b/arch/arm/src/goldfish/goldfish_boot.c @@ -0,0 +1,57 @@ +/**************************************************************************** + * arch/arm/src/goldfish/goldfish_boot.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include "arm_internal.h" + +#include "goldfish_irq.h" +#include "goldfish_memorymap.h" + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: arm_boot + * + * Description: + * Complete boot operations started in arm_head.S + * + ****************************************************************************/ + +void arm_boot(void) +{ + /* Set the page table for section */ + + goldfish_setupmappings(); + +#ifdef USE_EARLYSERIALINIT + /* Perform early serial initialization if we are going to use the serial + * driver. + */ + + arm_earlyserialinit(); +#endif +} diff --git a/arch/arm/src/goldfish/goldfish_irq.c b/arch/arm/src/goldfish/goldfish_irq.c new file mode 100644 index 00000000000..b06b09b97ef --- /dev/null +++ b/arch/arm/src/goldfish/goldfish_irq.c @@ -0,0 +1,159 @@ +/**************************************************************************** + * arch/arm/src/goldfish/goldfish_irq.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +#include "arm_internal.h" +#include "sctlr.h" +#include "gic.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Size of the interrupt stack allocation */ + +#define INTSTACK_ALLOC (CONFIG_SMP_NCPUS * INTSTACK_SIZE) + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +#if defined(CONFIG_SMP) && CONFIG_ARCH_INTERRUPTSTACK > 7 +/* In the SMP configuration, we will need custom IRQ and FIQ stacks. + * These definitions provide the aligned stack allocations. + */ + +static uint64_t g_irqstack_alloc[INTSTACK_ALLOC >> 3]; +static uint64_t g_fiqstack_alloc[INTSTACK_ALLOC >> 3]; + +/* These are arrays that point to the top of each interrupt stack */ + +uintptr_t g_irqstack_top[CONFIG_SMP_NCPUS] = +{ + (uintptr_t)g_irqstack_alloc + INTSTACK_SIZE, +#if CONFIG_SMP_NCPUS > 1 + (uintptr_t)g_irqstack_alloc + (2 * INTSTACK_SIZE), +#endif +#if CONFIG_SMP_NCPUS > 2 + (uintptr_t)g_irqstack_alloc + (3 * INTSTACK_SIZE), +#endif +#if CONFIG_SMP_NCPUS > 3 + (uintptr_t)g_irqstack_alloc + (4 * INTSTACK_SIZE) +#endif +}; + +uintptr_t g_fiqstack_top[CONFIG_SMP_NCPUS] = +{ + (uintptr_t)g_fiqstack_alloc + INTSTACK_SIZE, +#if CONFIG_SMP_NCPUS > 1 + (uintptr_t)g_fiqstack_alloc + 2 * INTSTACK_SIZE, +#endif +#if CONFIG_SMP_NCPUS > 2 + (uintptr_t)g_fiqstack_alloc + 3 * INTSTACK_SIZE, +#endif +#if CONFIG_SMP_NCPUS > 3 + (uintptr_t)g_fiqstack_alloc + 4 * INTSTACK_SIZE +#endif +}; + +#endif + +/* Symbols defined via the linker script */ + +extern uint8_t _vector_start[]; /* Beginning of vector block */ +extern uint8_t _vector_end[]; /* End+1 of vector block */ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: up_irqinitialize + * + * Description: + * This function is called by up_initialize() during the bring-up of the + * system. It is the responsibility of this function to but the interrupt + * subsystem into the working and ready state. + * + ****************************************************************************/ + +void up_irqinitialize(void) +{ +#ifdef CONFIG_ARCH_LOWVECTORS + /* Set the VBAR register to the address of the vector table */ + + DEBUGASSERT((((uintptr_t)_vector_start) & ~VBAR_MASK) == 0); + cp15_wrvbar((uint32_t)_vector_start); +#endif + + /* The following operations need to be atomic, but since this function is + * called early in the initialization sequence, we expect to have exclusive + * access to the GIC. + */ + + /* Initialize the Generic Interrupt Controller (GIC) for CPU0 */ + + arm_gic0_initialize(); /* Initialization unique to CPU0 */ + arm_gic_initialize(); /* Initialization common to all CPUs */ + +#ifndef CONFIG_SUPPRESS_INTERRUPTS + /* And finally, enable interrupts */ + + up_irq_enable(); +#endif +} + +/**************************************************************************** + * Name: arm_intstack_top + * + * Description: + * Return a pointer to the top the correct interrupt stack allocation + * for the current CPU. + * + ****************************************************************************/ + +#if defined(CONFIG_SMP) && CONFIG_ARCH_INTERRUPTSTACK > 7 +uintptr_t arm_intstack_top(void) +{ + return g_irqstack_top[up_cpu_index()]; +} +#endif + +/**************************************************************************** + * Name: arm_intstack_alloc + * + * Description: + * Return a pointer to the "alloc" the correct interrupt stack allocation + * for the current CPU. + * + ****************************************************************************/ + +#if defined(CONFIG_SMP) && CONFIG_ARCH_INTERRUPTSTACK > 7 +uintptr_t arm_intstack_alloc(void) +{ + return g_irqstack_top[up_cpu_index()] - INTSTACK_SIZE; +} +#endif diff --git a/arch/arm/src/goldfish/goldfish_irq.h b/arch/arm/src/goldfish/goldfish_irq.h new file mode 100644 index 00000000000..fddad4dfc6f --- /dev/null +++ b/arch/arm/src/goldfish/goldfish_irq.h @@ -0,0 +1,51 @@ +/**************************************************************************** + * arch/arm/src/goldfish/goldfish_irq.h + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __ARCH_ARM_SRC_GOLDFISH_GOLDFISH_IRQ_H +#define __ARCH_ARM_SRC_GOLDFISH_GOLDFISH_IRQ_H + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/**************************************************************************** + * Name: arm_earlyirqinit + ****************************************************************************/ + +void arm_earlyirqinit(void); + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __ARCH_ARM_SRC_GOLDFISH_GOLDFISH_IRQ_H */ diff --git a/arch/arm/src/goldfish/goldfish_memorymap.c b/arch/arm/src/goldfish/goldfish_memorymap.c new file mode 100644 index 00000000000..6df38afd585 --- /dev/null +++ b/arch/arm/src/goldfish/goldfish_memorymap.c @@ -0,0 +1,74 @@ +/**************************************************************************** + * arch/arm/src/goldfish/goldfish_memorymap.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include "mmu.h" +#include "goldfish_memorymap.h" + +/**************************************************************************** + * Macro Definitions + ****************************************************************************/ + +#define _NSECTIONS(b) (((b)+0x000fffff) >> 20) + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static const struct section_mapping_s g_section_mapping[] = +{ + { + VIRT_FLASH_PSECTION, VIRT_FLASH_VSECTION, + MMU_MEMFLAGS, _NSECTIONS(VIRT_FLASH_SECSIZE) + }, + { + VIRT_IO_PSECTION, VIRT_IO_VSECTION, + MMU_IOFLAGS, _NSECTIONS(VIRT_IO_SECSIZE) + }, + { + VIRT_PCIE_PSECTION, VIRT_PCIE_VSECTION, + MMU_IOFLAGS, _NSECTIONS(VIRT_PCIE_SECSIZE) + }, +}; + +static const size_t g_num_mappings = + (sizeof(g_section_mapping) / sizeof(struct section_mapping_s)); + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: goldfish_setupmappings + * + * Description: + * Initializes the non-code area page table + * + ****************************************************************************/ + +int goldfish_setupmappings(void) +{ + mmu_l1_map_regions(g_section_mapping, g_num_mappings); + + return 0; +} diff --git a/arch/arm/src/goldfish/goldfish_memorymap.h b/arch/arm/src/goldfish/goldfish_memorymap.h new file mode 100644 index 00000000000..48ab0ef24fd --- /dev/null +++ b/arch/arm/src/goldfish/goldfish_memorymap.h @@ -0,0 +1,80 @@ +/**************************************************************************** + * arch/arm/src/goldfish/goldfish_memorymap.h + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __ARCH_ARM_SRC_GOLDFISH_GOLDFISH_MEMORYMAP_H +#define __ARCH_ARM_SRC_GOLDFISH_GOLDFISH_MEMORYMAP_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include +#include +#include +#include +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Goldfish virt Physical Memory Map ****************************************/ + +#define VIRT_FLASH_PSECTION 0x00000000 /* 0x00000000-0x08000000 */ +#define VIRT_IO_PSECTION 0x08000000 /* 0x08000000-0x0f000000 */ +#define VIRT_PCIE_PSECTION 0x10000000 /* 0x10000000-0x40000000 */ + +/* Goldfish virt Virtual Memory Map *****************************************/ + +#define VIRT_FLASH_VSECTION VIRT_FLASH_PSECTION +#define VIRT_IO_VSECTION VIRT_IO_PSECTION +#define VIRT_PCIE_VSECTION VIRT_PCIE_PSECTION + +/* Sizes of memory regions in bytes. */ + +#define VIRT_FLASH_SECSIZE (128*1024*1024) +#define VIRT_IO_SECSIZE (112*1024*1024) +#define VIRT_PCIE_SECSIZE (3*256*1024*1024) + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +int goldfish_setupmappings(void); + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __ARCH_ARM_SRC_GOLDFISH_GOLDFISH_MEMORYMAP_H */ diff --git a/arch/arm/src/goldfish/goldfish_serial.c b/arch/arm/src/goldfish/goldfish_serial.c new file mode 100644 index 00000000000..00488f099f8 --- /dev/null +++ b/arch/arm/src/goldfish/goldfish_serial.c @@ -0,0 +1,65 @@ +/*************************************************************************** + * arch/arm/src/goldfish/goldfish_serial.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ***************************************************************************/ + +/*************************************************************************** + * Included Files + ***************************************************************************/ + +#include + +#include "arm_internal.h" + +#ifdef CONFIG_UART_PL011 + +/*************************************************************************** + * Public Functions + ***************************************************************************/ + +/*************************************************************************** + * Name: arm_earlyserialinit + * + * Description: + * see arm_internal.h + * + ***************************************************************************/ + +void arm_earlyserialinit(void) +{ + /* Enable the console UART. The other UARTs will be initialized if and + * when they are first opened. + */ + + pl011_earlyserialinit(); +} + +/*************************************************************************** + * Name: arm_serialinit + * + * Description: + * see arm_internal.h + * + ***************************************************************************/ + +void arm_serialinit(void) +{ + pl011_serialinit(); +} + +#endif /* CONFIG_UART_PL011 */ diff --git a/arch/arm/src/goldfish/goldfish_timer.c b/arch/arm/src/goldfish/goldfish_timer.c new file mode 100644 index 00000000000..022e5e26cb9 --- /dev/null +++ b/arch/arm/src/goldfish/goldfish_timer.c @@ -0,0 +1,42 @@ +/**************************************************************************** + * arch/arm/src/goldfish/goldfish_timer.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include "arm_timer.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define CYCLES_PER_SEC 62500000 + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +void up_timer_initialize(void) +{ + up_alarm_set_lowerhalf(arm_timer_initialize(CYCLES_PER_SEC)); +}