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SAMV7 MCAN: Finish some TX FIFO status methods; Correct interpretation of DLC in CAN_FD mode
This commit is contained in:
Gregory Nutt
parent
a64398c86b
commit
c8923bb6fc
1 changed files with 121 additions and 36 deletions
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@ -715,7 +715,7 @@
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#define MCAN_TXFIFOQ_INTS (MCAN_INT_TFE | MCAN_TXCOMMON_INTS)
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#define MCAN_TXEVFIFO_INTS (MCAN_INT_TEFN | MCAN_INT_TEFW | MCAN_INT_TEFF | \
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MCAN_INT_TEFL)
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#define MCAN_TXDEDBUG_INTS MCAN_TXCOMMON_INTS
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#define MCAN_TXDEDBUF_INTS MCAN_TXCOMMON_INTS
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#define MCAN_TXERR_INTS (MCAN_INT_TEFL | MCAN_INT_BE | MCAN_INT_ACKE)
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@ -847,9 +847,12 @@ static void mcan_dev_lock(FAR struct sam_mcan_s *priv);
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static void mcan_buffer_reserve(FAR struct sam_mcan_s *priv);
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#define mcan_buffer_release(priv) sem_post(&priv->txfsem)
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/* Mailboxes */
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/* MCAN helpers */
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static int mcan_recvsetup(FAR struct sam_mcan_s *priv);
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static uint8_t mcan_dlc2bytes(FAR struct sam_mcan_s *priv, uint8_t dlc);
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#if 0 /* Not used */
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static uint8_t mcan_bytes2dlc(FAR struct sam_mcan_s *priv, uint8_t nbytes);
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#endif
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/* CAN driver methods */
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@ -1323,31 +1326,100 @@ static void mcan_buffer_reserve(FAR struct sam_mcan_s *priv)
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}
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/****************************************************************************
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* Name: mcan_recvsetup
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* Name: mcan_dlc2bytes and mcan_bytes2dlc
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*
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* Description:
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* Configure and enable mailbox(es) for reception
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* In the CAN FD format, the coding of the DLC differs from the standard
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* CAN format. The DLC codes 0 to 8 have the same coding as in standard
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* CAN, the codes 9 to 15, which in standard CAN all code a data field of
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* 8 bytes, are encoded.
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*
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* Input Parameter:
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* priv - A pointer to the private data structure for this MCAN peripheral
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* priv - A pointer to the private data structure for this MCAN peripheral
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* dlc - the DLC to convert to a byte count
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* nbytes - the byte count to convert to a DLC
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*
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* Returned Value:
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* Zero on success; a negated errno value on failure.
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*
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* Assumptions:
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* Caller has exclusive access to the MCAN data structures
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* MCAN interrupts are disabled at the NVIC
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* The converted value
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*
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****************************************************************************/
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static int mcan_recvsetup(FAR struct sam_mcan_s *priv)
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static uint8_t mcan_dlc2bytes(FAR struct sam_mcan_s *priv, uint8_t dlc)
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{
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FAR const struct sam_config_s *config = priv->config;
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if (dlc > 8)
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{
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if (priv->config->mode == MCAN_ISO11898_1_MODE)
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{
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return 8;
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}
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else
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{
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switch (dlc)
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{
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case 9:
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return 12;
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case 10:
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return 16;
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case 11:
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return 20;
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case 12:
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return 24;
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case 13:
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return 32;
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case 14:
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return 48;
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default:
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case 15:
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return 64;
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}
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}
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}
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#warning Missing logic
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return OK;
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return dlc;
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}
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#if 0 /* Not used */
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static uint8_t mcan_bytes2dlc(FAR struct sam_mcan_s *priv, uint8_t nbytes)
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{
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if (nbytes <= 8)
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{
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return nbytes;
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}
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else if (priv->mode == MCAN_ISO11898_1_MODE)
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{
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return 8;
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}
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else if (nbytes <= 12)
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{
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return 9;
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}
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else if (nbytes <= 16)
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{
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return 10;
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}
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else if (nbytes <= 20)
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{
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return 11;
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}
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else if (nbytes <= 24)
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{
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return 12;
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}
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else if (nbytes <= 32)
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{
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return 13;
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}
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else if (nbytes <= 48)
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{
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return 14;
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}
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else /* if (nbytes <= 64) */
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{
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return 15;
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}
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}
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#endif
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/****************************************************************************
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* Name: mcan_reset
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*
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@ -1455,14 +1527,9 @@ static int mcan_setup(FAR struct can_dev_s *dev)
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return ret;
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}
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/* Setup receive mailbox(es) (enabling receive interrupts) */
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/* Enable receive interrupts */
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ret = mcan_recvsetup(priv);
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if (ret < 0)
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{
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canlldbg("MCAN%d H/W initialization failed: %d\n", config->port, ret);
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return ret;
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}
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mcan_rxint(dev, true);
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mcan_dumpregs(priv, "After receive setup");
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@ -1685,6 +1752,7 @@ static int mcan_send(FAR struct can_dev_s *dev, FAR struct can_msg_s *msg)
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uint32_t regval;
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unsigned int msglen;
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unsigned int ndx;
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unsigned int nbytes;
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unsigned int i;
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DEBUGASSERT(dev);
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@ -1766,19 +1834,20 @@ static int mcan_send(FAR struct can_dev_s *dev, FAR struct can_msg_s *msg)
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/* Followed by the amount of data corresponding to the DLC (T2..) */
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dest = (FAR uint8_t*)&txbuffer[2];
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src = msg->cm_data;
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dest = (FAR uint8_t*)&txbuffer[2];
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src = msg->cm_data;
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nbytes = mcan_dlc2bytes(priv, msg->cm_hdr.ch_dlc);
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for (i = 0; i < msg->cm_hdr.ch_dlc; i++)
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for (i = 0; i < nbytes; i++)
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{
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/* Little endian is assumed */
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*dest++ = *src++;
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}
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/* Flush the D-Cache to memory before initiating the tranfer */
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/* Flush the D-Cache to memory before initiating the transfer */
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msglen = 2 * sizeof(uint32_t) + msg->cm_hdr.ch_dlc;
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msglen = 2 * sizeof(uint32_t) + nbytes;
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arch_clean_dcache((uintptr_t)txbuffer, (uintptr_t)txbuffer + msglen);
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UNUSED(msglen);
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@ -1826,16 +1895,23 @@ static int mcan_send(FAR struct can_dev_s *dev, FAR struct can_msg_s *msg)
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static bool mcan_txready(FAR struct can_dev_s *dev)
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{
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FAR struct sam_mcan_s *priv = dev->cd_priv;
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bool txready;
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uint32_t regval;
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bool notfull;
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/* Get exclusive access to the MCAN peripheral */
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mcan_dev_lock(priv);
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#warning Missing logic
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/* Return the state of the TX FIFOQ
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*
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* REVISIT: Dedicated TX buffers are not supported.
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*/
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regval = mcan_getreg(priv, SAM_MCAN_IR_OFFSET);
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notfull = ((regval & MCAN_INT_TEFF) == 0);
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mcan_dev_unlock(priv);
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return txready;
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return notfull;
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}
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/****************************************************************************
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@ -1859,13 +1935,20 @@ static bool mcan_txready(FAR struct can_dev_s *dev)
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static bool mcan_txempty(FAR struct can_dev_s *dev)
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{
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FAR struct sam_mcan_s *priv = dev->cd_priv;
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uint32_t regval;
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bool txempty;
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/* Get exclusive access to the MCAN peripheral */
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mcan_dev_lock(priv);
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#warning Missing logic
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/* Return the state of the TX FIFOQ
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*
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* REVISIT: Dedicated TX buffers are not supported.
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*/
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regval = mcan_getreg(priv, SAM_MCAN_IR_OFFSET);
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txempty = ((regval & MCAN_INT_TFE) != 0);
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mcan_dev_unlock(priv);
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return txempty;
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@ -1914,7 +1997,7 @@ bool mcan_dedicated_rxbuffer_available(FAR struct sam_mcan_s *priv, int bufndx)
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* Input Parameters:
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* dev - CAN-common state data
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* rxbuffer - The RX buffer containing the received messages
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* nbytes - The length of the received message
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* nbytes - The length of the RX buffer (element size).
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*
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* Returned Value:
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* None
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@ -1954,6 +2037,7 @@ static void mcan_receive(FAR struct can_dev_s *dev, FAR uint32_t *rxbuffer,
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hdr.ch_id = (regval & BUFFER_R0_STDID_MASK) >> BUFFER_R0_STDID_SHIFT;
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hdr.ch_extid = false;
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}
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#else
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if ((regval & BUFFER_R0_XTD) != 0)
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{
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@ -2276,16 +2360,17 @@ static void mcan_configure_interrupts(FAR struct sam_mcan_s *priv)
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/* Select RX-related interrupts */
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#if 0 /* Dedicated RX buffers are not used by this driver */
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priv->rxints = MCAN_RXDEDBUF_INTS | MCAN_COMMON_INTS;
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priv->rxints = MCAN_RXDEDBUF_INTS;
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#else
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priv->rxints = MCAN_RXFIFO_INTS | MCAN_COMMON_INTS;
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priv->rxints = MCAN_RXFIFO_INTS;
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#endif
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/* Select RX-related interrupts */
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#if 0 /* Dedicated RX buffers are not used by this driver */
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#if 0 /* Dedicated TX buffers are not used by this driver */
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priv->txints = MCAN_TXDEDBUF_INTS;
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#else
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# warning Missing Logic
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priv->txints = MCAN_TXFIFOQ_INTS;
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#endif
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/* Direct to Line 0.
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