From c708f66aea3bca4bed7a5da1ca792ceb6e6cfc58 Mon Sep 17 00:00:00 2001 From: William Douglas Date: Tue, 15 May 2018 17:08:20 -0600 Subject: [PATCH] Squashed commit of the following: commit 7fd1f0d78546fa0315f4077b779efdd884e5bd53 Author: William Douglas Date: Tue May 15 13:19:31 2018 -0700 Add support for the second SDMMC device. The second SDMMC device was already supported but the clock was never enabled. This fixes that. --- arch/arm/src/stm32f7/stm32f74xx75xx_rcc.c | 8 +++++++- arch/arm/src/stm32f7/stm32f76xx77xx_rcc.c | 8 +++++++- 2 files changed, 14 insertions(+), 2 deletions(-) diff --git a/arch/arm/src/stm32f7/stm32f74xx75xx_rcc.c b/arch/arm/src/stm32f7/stm32f74xx75xx_rcc.c index 615e2d455fe..0883a31b705 100644 --- a/arch/arm/src/stm32f7/stm32f74xx75xx_rcc.c +++ b/arch/arm/src/stm32f7/stm32f74xx75xx_rcc.c @@ -585,11 +585,17 @@ static inline void rcc_enableapb2(void) #endif #ifdef CONFIG_STM32F7_SDMMC1 - /* SDIO clock enable */ + /* SDIO_1 clock enable */ regval |= RCC_APB2ENR_SDMMC1EN; #endif +#ifdef CONFIG_STM32F7_SDMMC2 + /* SDIO_2 clock enable */ + + regval |= RCC_APB2ENR_SDMMC2EN; +#endif + #ifdef CONFIG_STM32F7_SPI1 /* SPI1 clock enable */ diff --git a/arch/arm/src/stm32f7/stm32f76xx77xx_rcc.c b/arch/arm/src/stm32f7/stm32f76xx77xx_rcc.c index abc6fc2964c..aa31490f169 100644 --- a/arch/arm/src/stm32f7/stm32f76xx77xx_rcc.c +++ b/arch/arm/src/stm32f7/stm32f76xx77xx_rcc.c @@ -590,11 +590,17 @@ static inline void rcc_enableapb2(void) #endif #ifdef CONFIG_STM32F7_SDMMC1 - /* SDIO clock enable */ + /* SDIO_1 clock enable */ regval |= RCC_APB2ENR_SDMMC1EN; #endif +#ifdef CONFIG_STM32F7_SDMMC2 + /* SDIO_2 clock enable */ + + regval |= RCC_APB2ENR_SDMMC2EN; +#endif + #ifdef CONFIG_STM32F7_SPI1 /* SPI1 clock enable */