From c60d5c2ea13ce5555bae3fbef6aea3771ec18f18 Mon Sep 17 00:00:00 2001 From: Tiago Medicci Serrano Date: Mon, 9 Oct 2023 17:13:13 -0300 Subject: [PATCH] esp32s3/wireless: Fix typo The CPU 2 interrupt source (which is not used for anything else) is used to off-load BLE data after a SPI flash operation. --- arch/xtensa/src/esp32s3/esp32s3_wireless.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/xtensa/src/esp32s3/esp32s3_wireless.c b/arch/xtensa/src/esp32s3/esp32s3_wireless.c index 052b6fac8ea..c74bf12f2a4 100644 --- a/arch/xtensa/src/esp32s3/esp32s3_wireless.c +++ b/arch/xtensa/src/esp32s3/esp32s3_wireless.c @@ -741,7 +741,7 @@ IRAM_ATTR void esp_post_semcache(struct esp_semcache_s *sc) sc->count++; - /* Enable CPU 0 interrupt. This will generate an IRQ as soon as non-IRAM + /* Enable CPU 2 interrupt. This will generate an IRQ as soon as non-IRAM * are (re)enabled. */