From 979e671cf0e403540a2c20093417894d77db5a9d Mon Sep 17 00:00:00 2001 From: David Sidrane Date: Fri, 5 May 2017 15:02:55 -1000 Subject: [PATCH 1/5] kinetis:k20 Pin mux configure all I2C signals as Open Drain The output structure of the GPIO for I2C needs to be open drain. When left at the default, one can observe on a scope the slave contending with the push-pull during the ACK --- arch/arm/src/kinetis/chip/kinetis_k20pinmux.h | 21 ++++++++++--------- 1 file changed, 11 insertions(+), 10 deletions(-) diff --git a/arch/arm/src/kinetis/chip/kinetis_k20pinmux.h b/arch/arm/src/kinetis/chip/kinetis_k20pinmux.h index ca708acfdf8..d77ea962704 100644 --- a/arch/arm/src/kinetis/chip/kinetis_k20pinmux.h +++ b/arch/arm/src/kinetis/chip/kinetis_k20pinmux.h @@ -1,8 +1,9 @@ /******************************************************************************************** * arch/arm/src/kinetis/chip/kinetis_k20pinmux.h * - * Copyright (C) 2015-2016 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt + * Copyright (C) 2015-2017 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * David Sidrane * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -159,14 +160,14 @@ # define PIN_FTM2_QD_PHA (PIN_ALT6 | PIN_PORTB | PIN18) # define PIN_FTM2_QD_PHB (PIN_ALT6 | PIN_PORTB | PIN19) -# define PIN_I2C0_SCL_1 (PIN_ALT2 | PIN_PORTB | PIN0) -# define PIN_I2C0_SCL_2 (PIN_ALT2 | PIN_PORTB | PIN2) -# define PIN_I2C0_SDA_1 (PIN_ALT2 | PIN_PORTB | PIN1) -# define PIN_I2C0_SDA_2 (PIN_ALT2 | PIN_PORTB | PIN3) -# define PIN_I2C1_SCL_1 (PIN_ALT2 | PIN_PORTC | PIN10) -# define PIN_I2C1_SCL_2 (PIN_ALT6 | PIN_PORTE | PIN1) -# define PIN_I2C1_SDA_1 (PIN_ALT2 | PIN_PORTC | PIN11) -# define PIN_I2C1_SDA_2 (PIN_ALT6 | PIN_PORTE | PIN0) +# define PIN_I2C0_SCL_1 (PIN_ALT2_OPENDRAIN | PIN_PORTB | PIN0) +# define PIN_I2C0_SCL_2 (PIN_ALT2_OPENDRAIN | PIN_PORTB | PIN2) +# define PIN_I2C0_SDA_1 (PIN_ALT2_OPENDRAIN | PIN_PORTB | PIN1) +# define PIN_I2C0_SDA_2 (PIN_ALT2_OPENDRAIN | PIN_PORTB | PIN3) +# define PIN_I2C1_SCL_1 (PIN_ALT2_OPENDRAIN | PIN_PORTC | PIN10) +# define PIN_I2C1_SCL_2 (PIN_ALT6_OPENDRAIN | PIN_PORTE | PIN1) +# define PIN_I2C1_SDA_1 (PIN_ALT2_OPENDRAIN | PIN_PORTC | PIN11) +# define PIN_I2C1_SDA_2 (PIN_ALT6_OPENDRAIN | PIN_PORTE | PIN0) # define PIN_I2S0_MCLK_1 (PIN_ALT4 | PIN_PORTC | PIN8) # define PIN_I2S0_MCLK_2 (PIN_ALT6 | PIN_PORTC | PIN6) From 1d9d13c426d9463fb7c14d66329bb8d08e05789b Mon Sep 17 00:00:00 2001 From: David Sidrane Date: Fri, 5 May 2017 15:02:55 -1000 Subject: [PATCH 2/5] kinetis:k40 Pin mux configure all I2C signals as Open Drain The output structure of the GPIO for I2C needs to be open drain. When left at the default, one can observe on a scope the slave contending with the push-pull during the ACK --- arch/arm/src/kinetis/chip/kinetis_k40pinmux.h | 21 ++++++++++--------- 1 file changed, 11 insertions(+), 10 deletions(-) diff --git a/arch/arm/src/kinetis/chip/kinetis_k40pinmux.h b/arch/arm/src/kinetis/chip/kinetis_k40pinmux.h index 7083b0caf7c..c7570edaf9a 100644 --- a/arch/arm/src/kinetis/chip/kinetis_k40pinmux.h +++ b/arch/arm/src/kinetis/chip/kinetis_k40pinmux.h @@ -1,8 +1,9 @@ /******************************************************************************************** * arch/arm/src/kinetis/chip/kinetis_k40pinmux.h * - * Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt + * Copyright (C) 2011, 2016-2017 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * David Sidrane * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -160,7 +161,7 @@ #define PIN_ADC0_SE8 (PIN_ANALOG | PIN_PORTB | PIN0) #define PIN_ADC1_SE8 (PIN_ANALOG | PIN_PORTB | PIN0) #define PIN_TSI0_CH0 (PIN_ANALOG | PIN_PORTB | PIN0) -#define PIN_I2C0_SCL_1 (PIN_ALT2 | PIN_PORTB | PIN0) +#define PIN_I2C0_SCL_1 (PIN_ALT2_OPENDRAIN | PIN_PORTB | PIN0) #define PIN_FTM1_CH0_3 (PIN_ALT3 | PIN_PORTB | PIN0) #define PIN_FTM1_QD_PHA_3 (PIN_ALT6 | PIN_PORTB | PIN0) #define PIN_LCD_P0F (PIN_ALT7 | PIN_PORTB | PIN0) @@ -168,21 +169,21 @@ #define PIN_ADC0_SE9 (PIN_ANALOG | PIN_PORTB | PIN1) #define PIN_ADC1_SE9 (PIN_ANALOG | PIN_PORTB | PIN1) #define PIN_TSI0_CH6 (PIN_ANALOG | PIN_PORTB | PIN1) -#define PIN_I2C0_SDA_1 (PIN_ALT2 | PIN_PORTB | PIN1) +#define PIN_I2C0_SDA_1 (PIN_ALT2_OPENDRAIN | PIN_PORTB | PIN1) #define PIN_FTM1_CH1_3 (PIN_ALT3 | PIN_PORTB | PIN1) #define PIN_FTM1_QD_PHB (PIN_ALT6 | PIN_PORTB | PIN1) #define PIN_LCD_P1F (PIN_ALT7 | PIN_PORTB | PIN1) #define PIN_LCD_P2 (PIN_ANALOG | PIN_PORTB | PIN2) #define PIN_ADC0_SE12 (PIN_ANALOG | PIN_PORTB | PIN2) #define PIN_TSI0_CH7 (PIN_ANALOG | PIN_PORTB | PIN2) -#define PIN_I2C0_SCL_2 (PIN_ALT2 | PIN_PORTB | PIN2) +#define PIN_I2C0_SCL_2 (PIN_ALT2_OPENDRAIN| PIN_PORTB | PIN2) #define PIN_UART0_RTS_3 (PIN_ALT3 | PIN_PORTB | PIN2) #define PIN_FTM0_FLT3 (PIN_ALT6 | PIN_PORTB | PIN2) #define PIN_LCD_P2F (PIN_ALT7 | PIN_PORTB | PIN2) #define PIN_LCD_P3 (PIN_ANALOG | PIN_PORTB | PIN3) #define PIN_ADC0_SE13 (PIN_ANALOG | PIN_PORTB | PIN3) #define PIN_TSI0_CH8 (PIN_ANALOG | PIN_PORTB | PIN3) -#define PIN_I2C0_SDA_2 (PIN_ALT2 | PIN_PORTB | PIN3) +#define PIN_I2C0_SDA_2 (PIN_ALT2_OPENDRAIN | PIN_PORTB | PIN3) #define PIN_UART0_CTS_3 (PIN_ALT3 | PIN_PORTB | PIN3) #define PIN_FTM0_FLT0_1 (PIN_ALT6 | PIN_PORTB | PIN3) #define PIN_LCD_P3F (PIN_ALT7 | PIN_PORTB | PIN3) @@ -325,12 +326,12 @@ #define PIN_LCD_P30 (PIN_ANALOG | PIN_PORTC | PIN10) #define PIN_ADC1_SE6B (PIN_ANALOG | PIN_PORTC | PIN10) #define PIN_CMP0_IN4 (PIN_ANALOG | PIN_PORTC | PIN10) -#define PIN_I2C1_SCL_1 (PIN_ALT2 | PIN_PORTC | PIN10) +#define PIN_I2C1_SCL_1 (PIN_ALT2_OPENDRAIN | PIN_PORTC | PIN10) #define PIN_I2S0_RX_FS_2 (PIN_ALT4 | PIN_PORTC | PIN10) #define PIN_LCD_P30F (PIN_ALT7 | PIN_PORTC | PIN10) #define PIN_LCD_P31 (PIN_ANALOG | PIN_PORTC | PIN11) #define PIN_ADC1_SE7B (PIN_ANALOG | PIN_PORTC | PIN11) -#define PIN_I2C1_SDA_1 (PIN_ALT2 | PIN_PORTC | PIN11) +#define PIN_I2C1_SDA_1 (PIN_ALT2_OPENDRAIN | PIN_PORTC | PIN11) #define PIN_I2S0_RXD_2 (PIN_ALT4 | PIN_PORTC | PIN11) #define PIN_LCD_P31F (PIN_ALT7 | PIN_PORTC | PIN11) #define PIN_LCD_P32 (PIN_ANALOG | PIN_PORTC | PIN12) @@ -427,13 +428,13 @@ #define PIN_UART1_TX_2 (PIN_ALT3 | PIN_PORTE | PIN0) #define PIN_SDHC0_D1 (PIN_ALT4 | PIN_PORTE | PIN0) #define PIN_FB_AD27 (PIN_ALT5 | PIN_PORTE | PIN0) -#define PIN_I2C1_SDA_2 (PIN_ALT6 | PIN_PORTE | PIN0) +#define PIN_I2C1_SDA_2 (PIN_ALT6_OPENDRAIN | PIN_PORTE | PIN0) #define PIN_ADC1_SE5A (PIN_ANALOG | PIN_PORTE | PIN1) #define PIN_SPI1_SOUT_2 (PIN_ALT2 | PIN_PORTE | PIN1) #define PIN_UART1_RX_2 (PIN_ALT3 | PIN_PORTE | PIN1) #define PIN_SDHC0_D0 (PIN_ALT4 | PIN_PORTE | PIN1) #define PIN_FB_AD26 (PIN_ALT5 | PIN_PORTE | PIN1) -#define PIN_I2C1_SCL_2 (PIN_ALT6 | PIN_PORTE | PIN1) +#define PIN_I2C1_SCL_2 (PIN_ALT6_OPENDRAIN | PIN_PORTE | PIN1) #define PIN_ADC1_SE6A (PIN_ANALOG | PIN_PORTE | PIN2) #define PIN_SPI1_SCK_2 (PIN_ALT2 | PIN_PORTE | PIN2) #define PIN_UART1_CTS_2 (PIN_ALT3 | PIN_PORTE | PIN2) From af1f48c1c55f6ece27522f1082b554c6a246b9cc Mon Sep 17 00:00:00 2001 From: David Sidrane Date: Fri, 5 May 2017 15:02:56 -1000 Subject: [PATCH 3/5] kinetis:k60 Pin mux configure all I2C signals as Open Drain The output structure of the GPIO for I2C needs to be open drain. When left at the default, one can observe on a scope the slave contending with the push-pull during the ACK --- arch/arm/src/kinetis/chip/kinetis_k60pinmux.h | 25 ++++++++++--------- 1 file changed, 13 insertions(+), 12 deletions(-) diff --git a/arch/arm/src/kinetis/chip/kinetis_k60pinmux.h b/arch/arm/src/kinetis/chip/kinetis_k60pinmux.h index 888a5955840..b1ca87746f3 100644 --- a/arch/arm/src/kinetis/chip/kinetis_k60pinmux.h +++ b/arch/arm/src/kinetis/chip/kinetis_k60pinmux.h @@ -1,8 +1,9 @@ /******************************************************************************************** * arch/arm/src/kinetis/chip/kinetis_k60pinset.h * - * Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt + * Copyright (C) 2011, 2016-2017 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * David Sidrane * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -172,7 +173,7 @@ #define PIN_ADC0_SE8 (PIN_ANALOG | PIN_PORTB | PIN0) #define PIN_ADC1_SE8 (PIN_ANALOG | PIN_PORTB | PIN0) #define PIN_TSI0_CH0 (PIN_ANALOG | PIN_PORTB | PIN0) -#define PIN_I2C0_SCL_1 (PIN_ALT2 | PIN_PORTB | PIN0) +#define PIN_I2C0_SCL_1 (PIN_ALT2_OPENDRAIN | PIN_PORTB | PIN0) #define PIN_FTM1_CH0_3 (PIN_ALT3 | PIN_PORTB | PIN0) #ifdef CONFIG_KINETIS_ENET_MDIOPULLUP # define PIN_RMII0_MDIO (PIN_ALT4_PULLUP | PIN_PORTB | PIN0) @@ -184,20 +185,20 @@ #define PIN_ADC0_SE9 (PIN_ANALOG | PIN_PORTB | PIN1) #define PIN_ADC1_SE9 (PIN_ANALOG | PIN_PORTB | PIN1) #define PIN_TSI0_CH6 (PIN_ANALOG | PIN_PORTB | PIN1) -#define PIN_I2C0_SDA_1 (PIN_ALT2 | PIN_PORTB | PIN1) +#define PIN_I2C0_SDA_1 (PIN_ALT2_OPENDRAIN | PIN_PORTB | PIN1) #define PIN_FTM1_CH1_3 (PIN_ALT3 | PIN_PORTB | PIN1) #define PIN_RMII0_MDC (PIN_ALT4 | PIN_PORTB | PIN1) #define PIN_MII0_MDC (PIN_ALT4 | PIN_PORTB | PIN1) #define PIN_FTM1_QD_PHB_3 (PIN_ALT6 | PIN_PORTB | PIN1) #define PIN_ADC0_SE12 (PIN_ANALOG | PIN_PORTB | PIN2) #define PIN_TSI0_CH7 (PIN_ANALOG | PIN_PORTB | PIN2) -#define PIN_I2C0_SCL_2 (PIN_ALT2 | PIN_PORTB | PIN2) +#define PIN_I2C0_SCL_2 (PIN_ALT2_OPENDRAIN | PIN_PORTB | PIN2) #define PIN_UART0_RTS_3 (PIN_ALT3 | PIN_PORTB | PIN2) #define PIN_ENET0_1588_TMR0_1 (PIN_ALT4 | PIN_PORTB | PIN2) #define PIN_FTM0_FLT3 (PIN_ALT6 | PIN_PORTB | PIN2) #define PIN_ADC0_SE13 (PIN_ANALOG | PIN_PORTB | PIN3) #define PIN_TSI0_CH8 (PIN_ANALOG | PIN_PORTB | PIN3) -#define PIN_I2C0_SDA_2 (PIN_ALT2 | PIN_PORTB | PIN3) +#define PIN_I2C0_SDA_2 (PIN_ALT2_OPENDRAIN | PIN_PORTB | PIN3) #define PIN_UART0_CTS_3 (PIN_ALT3 | PIN_PORTB | PIN3) #define PIN_ENET0_1588_TMR1_1 (PIN_ALT4 | PIN_PORTB | PIN3) #define PIN_FTM0_FLT0_2 (PIN_ALT6 | PIN_PORTB | PIN3) @@ -313,11 +314,11 @@ #define PIN_FTM2_FLT0_2 (PIN_ALT6 | PIN_PORTC | PIN9) #define PIN_ADC1_SE6B (PIN_ANALOG | PIN_PORTC | PIN10) #define PIN_CMP0_IN4 (PIN_ANALOG | PIN_PORTC | PIN10) -#define PIN_I2C1_SCL_1 (PIN_ALT2 | PIN_PORTC | PIN10) +#define PIN_I2C1_SCL_1 (PIN_ALT2_OPENDRAIN | PIN_PORTC | PIN10) #define PIN_I2S0_RX_FS_2 (PIN_ALT4 | PIN_PORTC | PIN10) #define PIN_FB_AD5 (PIN_ALT5 | PIN_PORTC | PIN10) #define PIN_ADC1_SE7B (PIN_ANALOG | PIN_PORTC | PIN11) -#define PIN_I2C1_SDA_1 (PIN_ALT2 | PIN_PORTC | PIN11) +#define PIN_I2C1_SDA_1 (PIN_ALT2_OPENDRAIN | PIN_PORTC | PIN11) #define PIN_I2S0_RXD_2 (PIN_ALT4 | PIN_PORTC | PIN11) #define PIN_FB_RW (PIN_ALT5 | PIN_PORTC | PIN11) #define PIN_UART4_RTS_1 (PIN_ALT3 | PIN_PORTC | PIN12) @@ -387,10 +388,10 @@ #define PIN_UART0_TX_4 (PIN_ALT3 | PIN_PORTD | PIN7) #define PIN_FTM0_CH7_2 (PIN_ALT4 | PIN_PORTD | PIN7) #define PIN_FTM0_FLT1_2 (PIN_ALT6 | PIN_PORTD | PIN7) -#define PIN_I2C0_SCL_3 (PIN_ALT2 | PIN_PORTD | PIN8) +#define PIN_I2C0_SCL_3 (PIN_ALT2_OPENDRAIN | PIN_PORTD | PIN8) #define PIN_UART5_RX_1 (PIN_ALT3 | PIN_PORTD | PIN8) #define PIN_FB_A16 (PIN_ALT6 | PIN_PORTD | PIN8) -#define PIN_I2C0_SDA_3 (PIN_ALT2 | PIN_PORTD | PIN9) +#define PIN_I2C0_SDA_3 (PIN_ALT2_OPENDRAIN | PIN_PORTD | PIN9) #define PIN_UART5_TX_1 (PIN_ALT3 | PIN_PORTD | PIN9) #define PIN_FB_A17 (PIN_ALT6 | PIN_PORTD | PIN9) #define PIN_UART5_RTS_1 (PIN_ALT3 | PIN_PORTD | PIN10) @@ -416,12 +417,12 @@ #define PIN_SPI1_PCS1_2 (PIN_ALT2 | PIN_PORTE | PIN0) #define PIN_UART1_TX_2 (PIN_ALT3 | PIN_PORTE | PIN0) #define PIN_SDHC0_D1 (PIN_ALT4 | PIN_PORTE | PIN0) -#define PIN_I2C1_SDA_2 (PIN_ALT6 | PIN_PORTE | PIN0) +#define PIN_I2C1_SDA_2 (PIN_ALT6_OPENDRAIN | PIN_PORTE | PIN0) #define PIN_ADC1_SE5A (PIN_ANALOG | PIN_PORTE | PIN1) #define PIN_SPI1_SOUT_2 (PIN_ALT2 | PIN_PORTE | PIN1) #define PIN_UART1_RX_2 (PIN_ALT3 | PIN_PORTE | PIN1) #define PIN_SDHC0_D0 (PIN_ALT4 | PIN_PORTE | PIN1) -#define PIN_I2C1_SCL_2 (PIN_ALT6 | PIN_PORTE | PIN1) +#define PIN_I2C1_SCL_2 (PIN_ALT6_OPENDRAIN | PIN_PORTE | PIN1) #define PIN_ADC1_SE6A (PIN_ANALOG | PIN_PORTE | PIN2) #define PIN_SPI1_SCK_2 (PIN_ALT2 | PIN_PORTE | PIN2) #define PIN_UART1_CTS_2 (PIN_ALT3 | PIN_PORTE | PIN2) From ce98cedb17f0852eb93a08afb23447ef137848ff Mon Sep 17 00:00:00 2001 From: David Sidrane Date: Fri, 5 May 2017 15:02:56 -1000 Subject: [PATCH 4/5] kinetis:k64 Pin mux configure all I2C signals as Open Drain The output structure of the GPIO for I2C needs to be open drain. When left at the default, one can observe on a scope the slave contending with the push-pull during the ACK --- arch/arm/src/kinetis/chip/kinetis_k64pinmux.h | 41 ++++++++++--------- 1 file changed, 21 insertions(+), 20 deletions(-) diff --git a/arch/arm/src/kinetis/chip/kinetis_k64pinmux.h b/arch/arm/src/kinetis/chip/kinetis_k64pinmux.h index 3479099bf6c..d9894b3ff70 100644 --- a/arch/arm/src/kinetis/chip/kinetis_k64pinmux.h +++ b/arch/arm/src/kinetis/chip/kinetis_k64pinmux.h @@ -1,8 +1,9 @@ /******************************************************************************************** * arch/arm/src/kinetis/chip/kinetis_k64pinmux.h * - * Copyright (C) 2016 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt + * Copyright (C) 2016-2017 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * David Sidrane * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -305,26 +306,26 @@ /* I2C */ -#define PIN_I2C0_SCL_1 (PIN_ALT2 | PIN_PORTB | PIN0) -#define PIN_I2C0_SCL_2 (PIN_ALT2 | PIN_PORTB | PIN2) -#define PIN_I2C0_SCL_3 (PIN_ALT2 | PIN_PORTD | PIN8) -#define PIN_I2C0_SCL_4 (PIN_ALT5 | PIN_PORTE | PIN24) -#define PIN_I2C0_SCL_5 (PIN_ALT7 | PIN_PORTD | PIN2) -#define PIN_I2C0_SDA_1 (PIN_ALT2 | PIN_PORTB | PIN1) -#define PIN_I2C0_SDA_2 (PIN_ALT2 | PIN_PORTB | PIN3) -#define PIN_I2C0_SDA_3 (PIN_ALT2 | PIN_PORTD | PIN9) -#define PIN_I2C0_SDA_4 (PIN_ALT5 | PIN_PORTE | PIN25) -#define PIN_I2C0_SDA_5 (PIN_ALT7 | PIN_PORTD | PIN3) +#define PIN_I2C0_SCL_1 (PIN_ALT2_OPENDRAIN | PIN_PORTB | PIN0) +#define PIN_I2C0_SCL_2 (PIN_ALT2_OPENDRAIN | PIN_PORTB | PIN2) +#define PIN_I2C0_SCL_3 (PIN_ALT2_OPENDRAIN | PIN_PORTD | PIN8) +#define PIN_I2C0_SCL_4 (PIN_ALT5_OPENDRAIN | PIN_PORTE | PIN24) +#define PIN_I2C0_SCL_5 (PIN_ALT7_OPENDRAIN | PIN_PORTD | PIN2) +#define PIN_I2C0_SDA_1 (PIN_ALT2_OPENDRAIN | PIN_PORTB | PIN1) +#define PIN_I2C0_SDA_2 (PIN_ALT2_OPENDRAIN | PIN_PORTB | PIN3) +#define PIN_I2C0_SDA_3 (PIN_ALT2_OPENDRAIN | PIN_PORTD | PIN9) +#define PIN_I2C0_SDA_4 (PIN_ALT5_OPENDRAIN | PIN_PORTE | PIN25) +#define PIN_I2C0_SDA_5 (PIN_ALT7_OPENDRAIN | PIN_PORTD | PIN3) -#define PIN_I2C1_SCL_1 (PIN_ALT2 | PIN_PORTC | PIN10) -#define PIN_I2C1_SCL_2 (PIN_ALT6 | PIN_PORTE | PIN1) -#define PIN_I2C1_SDA_1 (PIN_ALT2 | PIN_PORTC | PIN11) -#define PIN_I2C1_SDA_2 (PIN_ALT6 | PIN_PORTE | PIN0) +#define PIN_I2C1_SCL_1 (PIN_ALT2_OPENDRAIN | PIN_PORTC | PIN10) +#define PIN_I2C1_SCL_2 (PIN_ALT6_OPENDRAIN | PIN_PORTE | PIN1) +#define PIN_I2C1_SDA_1 (PIN_ALT2_OPENDRAIN | PIN_PORTC | PIN11) +#define PIN_I2C1_SDA_2 (PIN_ALT6_OPENDRAIN | PIN_PORTE | PIN0) -#define PIN_I2C2_SCL_1 (PIN_ALT5 | PIN_PORTA | PIN12) -#define PIN_I2C2_SCL_2 (PIN_ALT5 | PIN_PORTA | PIN14) -#define PIN_I2C2_SDA_1 (PIN_ALT5 | PIN_PORTA | PIN11) -#define PIN_I2C2_SDA_2 (PIN_ALT5 | PIN_PORTA | PIN13) +#define PIN_I2C2_SCL_1 (PIN_ALT5_OPENDRAIN | PIN_PORTA | PIN12) +#define PIN_I2C2_SCL_2 (PIN_ALT5_OPENDRAIN | PIN_PORTA | PIN14) +#define PIN_I2C2_SDA_1 (PIN_ALT5_OPENDRAIN | PIN_PORTA | PIN11) +#define PIN_I2C2_SDA_2 (PIN_ALT5_OPENDRAIN | PIN_PORTA | PIN13) /* I2S */ From 97260321f2ef52407b6d5e6dc274a9e5945177da Mon Sep 17 00:00:00 2001 From: David Sidrane Date: Fri, 5 May 2017 15:02:57 -1000 Subject: [PATCH 5/5] kinetis:k66 Pin mux configure all I2C signals as Open Drain The output structure of the GPIO for I2C needs to be open drain. When left at the default, one can observe on a scope the slave contending with the push-pull during the ACK --- arch/arm/src/kinetis/chip/kinetis_k66pinmux.h | 44 +++++++++---------- 1 file changed, 22 insertions(+), 22 deletions(-) diff --git a/arch/arm/src/kinetis/chip/kinetis_k66pinmux.h b/arch/arm/src/kinetis/chip/kinetis_k66pinmux.h index b549f5c76d1..ad15c5ac024 100644 --- a/arch/arm/src/kinetis/chip/kinetis_k66pinmux.h +++ b/arch/arm/src/kinetis/chip/kinetis_k66pinmux.h @@ -317,31 +317,31 @@ /* I2C */ -#define PIN_I2C0_SCL_1 (PIN_ALT2 | PIN_PORTB | PIN0) -#define PIN_I2C0_SCL_2 (PIN_ALT2 | PIN_PORTB | PIN2) -#define PIN_I2C0_SCL_3 (PIN_ALT2 | PIN_PORTD | PIN8) -#define PIN_I2C0_SCL_4 (PIN_ALT5 | PIN_PORTE | PIN24) -#define PIN_I2C0_SCL_5 (PIN_ALT7 | PIN_PORTD | PIN2) -#define PIN_I2C0_SDA_1 (PIN_ALT2 | PIN_PORTB | PIN1) -#define PIN_I2C0_SDA_2 (PIN_ALT2 | PIN_PORTB | PIN3) -#define PIN_I2C0_SDA_3 (PIN_ALT2 | PIN_PORTD | PIN9) -#define PIN_I2C0_SDA_4 (PIN_ALT5 | PIN_PORTE | PIN25) -#define PIN_I2C0_SDA_5 (PIN_ALT7 | PIN_PORTD | PIN3) +#define PIN_I2C0_SCL_1 (PIN_ALT2_OPENDRAIN | PIN_PORTB | PIN0) +#define PIN_I2C0_SCL_2 (PIN_ALT2_OPENDRAIN | PIN_PORTB | PIN2) +#define PIN_I2C0_SCL_3 (PIN_ALT2_OPENDRAIN | PIN_PORTD | PIN8) +#define PIN_I2C0_SCL_4 (PIN_ALT5_OPENDRAIN | PIN_PORTE | PIN24) +#define PIN_I2C0_SCL_5 (PIN_ALT7_OPENDRAIN | PIN_PORTD | PIN2) +#define PIN_I2C0_SDA_1 (PIN_ALT2_OPENDRAIN | PIN_PORTB | PIN1) +#define PIN_I2C0_SDA_2 (PIN_ALT2_OPENDRAIN | PIN_PORTB | PIN3) +#define PIN_I2C0_SDA_3 (PIN_ALT2_OPENDRAIN | PIN_PORTD | PIN9) +#define PIN_I2C0_SDA_4 (PIN_ALT5_OPENDRAIN | PIN_PORTE | PIN25) +#define PIN_I2C0_SDA_5 (PIN_ALT7_OPENDRAIN | PIN_PORTD | PIN3) -#define PIN_I2C1_SCL_1 (PIN_ALT2 | PIN_PORTC | PIN10) -#define PIN_I2C1_SCL_2 (PIN_ALT6 | PIN_PORTE | PIN1) -#define PIN_I2C1_SDA_1 (PIN_ALT2 | PIN_PORTC | PIN11) -#define PIN_I2C1_SDA_2 (PIN_ALT6 | PIN_PORTE | PIN0) +#define PIN_I2C1_SCL_1 (PIN_ALT2_OPENDRAIN | PIN_PORTC | PIN10) +#define PIN_I2C1_SCL_2 (PIN_ALT6_OPENDRAIN | PIN_PORTE | PIN1) +#define PIN_I2C1_SDA_1 (PIN_ALT2_OPENDRAIN | PIN_PORTC | PIN11) +#define PIN_I2C1_SDA_2 (PIN_ALT6_OPENDRAIN | PIN_PORTE | PIN0) -#define PIN_I2C2_SCL_1 (PIN_ALT5 | PIN_PORTA | PIN12) -#define PIN_I2C2_SCL_2 (PIN_ALT5 | PIN_PORTA | PIN14) -#define PIN_I2C2_SDA_1 (PIN_ALT5 | PIN_PORTA | PIN11) -#define PIN_I2C2_SDA_2 (PIN_ALT5 | PIN_PORTA | PIN13) +#define PIN_I2C2_SCL_1 (PIN_ALT5_OPENDRAIN | PIN_PORTA | PIN12) +#define PIN_I2C2_SCL_2 (PIN_ALT5_OPENDRAIN | PIN_PORTA | PIN14) +#define PIN_I2C2_SDA_1 (PIN_ALT5_OPENDRAIN | PIN_PORTA | PIN11) +#define PIN_I2C2_SDA_2 (PIN_ALT5_OPENDRAIN | PIN_PORTA | PIN13) -#define PIN_I2C3_SCL_1 (PIN_ALT2 | PIN_PORTE | PIN11) -#define PIN_I2C3_SCL_2 (PIN_ALT4 | PIN_PORTA | PIN2) -#define PIN_I2C3_SDA_1 (PIN_ALT2 | PIN_PORTE | PIN10) -#define PIN_I2C3_SDA_2 (PIN_ALT4 | PIN_PORTA | PIN1) +#define PIN_I2C3_SCL_1 (PIN_ALT2_OPENDRAIN | PIN_PORTE | PIN11) +#define PIN_I2C3_SCL_2 (PIN_ALT4_OPENDRAIN | PIN_PORTA | PIN2) +#define PIN_I2C3_SDA_1 (PIN_ALT2_OPENDRAIN | PIN_PORTE | PIN10) +#define PIN_I2C3_SDA_2 (PIN_ALT4_OPENDRAIN | PIN_PORTA | PIN1) /* I2S */