From c266f53199717c52871e0748b244552bb9ceded7 Mon Sep 17 00:00:00 2001
From: Mateusz Szafoni <raiden00pl@gmail.com>
Date: Fri, 22 Mar 2019 07:57:33 -0600
Subject: [PATCH] arch/arm/src/stm32/stm32_tickless.c and
 arch/arm/src/stm32/stm32_freerun.c:  Apply Max's stm32_oneshot.c fix to the
 tickless implementation and to the freerunning time.

---
 arch/arm/src/stm32/stm32_freerun.c  | 10 +++++-----
 arch/arm/src/stm32/stm32_tickless.c |  8 ++++----
 2 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/arch/arm/src/stm32/stm32_freerun.c b/arch/arm/src/stm32/stm32_freerun.c
index f631aa0aa5e..1465b35a5b8 100644
--- a/arch/arm/src/stm32/stm32_freerun.c
+++ b/arch/arm/src/stm32/stm32_freerun.c
@@ -82,7 +82,7 @@ static int stm32_freerun_handler(int irq, void *context, void *arg)
   DEBUGASSERT(freerun != NULL && freerun->overflow < UINT32_MAX);
   freerun->overflow++;
 
-  STM32_TIM_ACKINT(freerun->tch, 0);
+  STM32_TIM_ACKINT(freerun->tch, GTIM_SR_UIF);
   return OK;
 }
 #endif /* CONFIG_CLOCK_TIMEKEEPING */
@@ -161,8 +161,8 @@ int stm32_freerun_initialize(struct stm32_freerun_s *freerun, int chan,
   STM32_TIM_SETMODE(freerun->tch, STM32_TIM_MODE_UP);
 
 #ifndef CONFIG_CLOCK_TIMEKEEPING
-  STM32_TIM_ACKINT(freerun->tch, 0);
-  STM32_TIM_ENABLEINT(freerun->tch, 0);
+  STM32_TIM_ACKINT(freerun->tch, GTIM_SR_UIF);
+  STM32_TIM_ENABLEINT(freerun->tch, GTIM_DIER_UIE);
 #endif
 
   return OK;
@@ -221,7 +221,7 @@ int stm32_freerun_counter(struct stm32_freerun_s *freerun,
 
   if (pending)
     {
-      STM32_TIM_ACKINT(freerun->tch, 0);
+      STM32_TIM_ACKINT(freerun->tch, GTIM_SR_UIF);
 
       /* Increment the overflow count and use the value of the
        * guaranteed to be AFTER the overflow occurred.
@@ -298,7 +298,7 @@ int stm32_freerun_uninitialize(struct stm32_freerun_s *freerun)
 
   /* Now we can disable the timer interrupt and disable the timer. */
 
-  STM32_TIM_DISABLEINT(freerun->tch, 0);
+  STM32_TIM_DISABLEINT(freerun->tch, GTIM_DIER_UIE);
   STM32_TIM_SETMODE(freerun->tch, STM32_TIM_MODE_DISABLED);
   STM32_TIM_SETISR(freerun->tch, NULL, NULL, 0);
 
diff --git a/arch/arm/src/stm32/stm32_tickless.c b/arch/arm/src/stm32/stm32_tickless.c
index 8e4bdc0aae2..42579c24a0a 100644
--- a/arch/arm/src/stm32/stm32_tickless.c
+++ b/arch/arm/src/stm32/stm32_tickless.c
@@ -342,7 +342,7 @@ static void stm32_timing_handler(void)
 {
   g_tickless.overflow++;
 
-  STM32_TIM_ACKINT(g_tickless.tch, 0);
+  STM32_TIM_ACKINT(g_tickless.tch, GTIM_SR_UIF);
 }
 #endif /* CONFIG_CLOCK_TIMEKEEPING */
 
@@ -581,8 +581,8 @@ void arm_timer_initialize(void)
 
   /* Start the timer */
 
-  STM32_TIM_ACKINT(g_tickless.tch, 0);
-  STM32_TIM_ENABLEINT(g_tickless.tch, 0);
+  STM32_TIM_ACKINT(g_tickless.tch, GTIM_SR_UIF);
+  STM32_TIM_ENABLEINT(g_tickless.tch, GTIM_DIER_UIE);
 }
 
 /****************************************************************************
@@ -651,7 +651,7 @@ int up_timer_gettime(FAR struct timespec *ts)
 
   if (pending)
     {
-      STM32_TIM_ACKINT(g_tickless.tch, 0);
+      STM32_TIM_ACKINT(g_tickless.tch, GTIM_SR_UIF);
 
       /* Increment the overflow count and use the value of the
        * guaranteed to be AFTER the overflow occurred.