From c23babbcc76419eb58ff9e2a76084eef85621ab6 Mon Sep 17 00:00:00 2001
From: Ville Juven <ville.juven@unikie.com>
Date: Wed, 30 Nov 2022 11:58:17 +0200
Subject: [PATCH] mpfs/emmcsd: Set 8-bit data width and DDR HS mode for eMMC

This is not the correct way to do this, but it gives a nice perf. boost
---
 arch/risc-v/src/mpfs/mpfs_emmcsd.c | 61 ++++++++++++++++++++++++++++++
 1 file changed, 61 insertions(+)

diff --git a/arch/risc-v/src/mpfs/mpfs_emmcsd.c b/arch/risc-v/src/mpfs/mpfs_emmcsd.c
index 56053db2ed4..48e6af8823c 100644
--- a/arch/risc-v/src/mpfs/mpfs_emmcsd.c
+++ b/arch/risc-v/src/mpfs/mpfs_emmcsd.c
@@ -1752,6 +1752,58 @@ static void mpfs_widebus(struct sdio_dev_s *dev, bool wide)
     }
 }
 
+/****************************************************************************
+ * Name: mpfs_clock
+ *
+ ****************************************************************************/
+
+static void mpfs_set_hs_8bit(struct sdio_dev_s *dev)
+{
+  struct mpfs_dev_s *priv = (struct mpfs_dev_s *)dev;
+  int ret;
+  uint32_t r1;
+
+  if ((ret = mpfs_sendcmd(dev, MMCSD_CMD6, 0x03b70000u | (6 << 8))) == OK)
+    {
+      if ((ret == mpfs_waitresponse(dev, MMCSD_CMD6)) == OK)
+        {
+          ret = mpfs_recvshortcrc(dev, MMCSD_CMD6, &r1);
+        }
+    }
+
+  if (ret < 0)
+    {
+      mcerr("Failed to set high speed mode\n");
+      goto err;
+    }
+
+  modifyreg32(MPFS_EMMCSD_HRS06, 0, priv->bus_mode);
+
+  if ((ret = mpfs_sendcmd(dev, MMCSD_CMD6, 0x03b70000u | (2 << 8))) == OK)
+    {
+      if ((ret == mpfs_waitresponse(dev, MMCSD_CMD6)) == OK)
+        {
+          ret = mpfs_recvshortcrc(dev, MMCSD_CMD6, &r1);
+        }
+    }
+
+  if (ret < 0)
+    {
+      mcerr("Failed to set 8-bit mode\n");
+      goto err;
+    }
+
+  modifyreg32(MPFS_EMMCSD_SRS10, 0, MPFS_EMMCSD_SRS10_EDTW);
+  return;
+
+err:
+
+  /* Reset to 1-bit legacy mode */
+
+  modifyreg32(MPFS_EMMCSD_HRS06, 0, MPFS_EMMCSD_MODE_LEGACY);
+  modifyreg32(MPFS_EMMCSD_SRS10, MPFS_EMMCSD_SRS10_EDTW, 0);
+}
+
 /****************************************************************************
  * Name: mpfs_clock
  *
@@ -1824,6 +1876,15 @@ static void mpfs_clock(struct sdio_dev_s *dev, enum sdio_clock_e rate)
   /* Set the new clock frequency */
 
   mpfs_setclkrate(priv, clckr);
+
+  /* REVISIT: This should really be a separate configuration procedure */
+
+  if (rate == CLOCK_MMC_TRANSFER)
+    {
+      /* eMMC: Set 8-bit data bus and correct bus mode */
+
+      mpfs_set_hs_8bit(dev);
+    }
 }
 
 /****************************************************************************