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Kinetis: Updated comment in clockconfig
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@ -278,7 +278,8 @@ void kinetis_pllconfig(void)
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*
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* Either the external clock or crystal frequency is used to select the
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* PRDIV value. Only reference clock frequencies are supported that will
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* produce a 2MHz reference clock to the PLL.
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* produce a KINETIS_MCG_PLL_REF_MIN >= PLLIN <= KINETIS_MCG_PLL_REF_MAX
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* reference clock to the PLL.
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*/
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putreg8(MCG_C5_PRDIV(BOARD_PRDIV), KINETIS_MCG_C5);
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