From b9823ce1d7812fc6682113e9bfd52c0975b2fd99 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Tue, 2 Oct 2018 10:10:56 -0600 Subject: [PATCH] EFM32, STM32 (FS/HS), STM32F7, and STM32L4 OTGFS/HS: Th epin_configure() function used the same eptype as the TxFIFO number for all endpoints. This should probably be the physical EP number, not the EP type. Suggested by Key Two. --- arch/arm/src/efm32/efm32_usbdev.c | 2 +- arch/arm/src/stm32/stm32_otgfsdev.c | 2 +- arch/arm/src/stm32/stm32_otghsdev.c | 2 +- arch/arm/src/stm32f7/stm32_otgdev.c | 2 +- arch/arm/src/stm32l4/stm32l4_otgfsdev.c | 2 +- 5 files changed, 5 insertions(+), 5 deletions(-) diff --git a/arch/arm/src/efm32/efm32_usbdev.c b/arch/arm/src/efm32/efm32_usbdev.c index 8f598342806..742d233a7bf 100644 --- a/arch/arm/src/efm32/efm32_usbdev.c +++ b/arch/arm/src/efm32/efm32_usbdev.c @@ -3929,7 +3929,7 @@ static int efm32_epin_configure(FAR struct efm32_ep_s *privep, uint8_t eptype, _USB_DIEPCTL_TXFNUM_MASK); regval |= mpsiz; regval |= (eptype << _USB_DIEPCTL_EPTYPE_SHIFT); - regval |= (eptype << _USB_DIEPCTL_TXFNUM_SHIFT); + regval |= (privep->epphy << _USB_DIEPCTL_TXFNUM_SHIFT); regval |= (USB_DIEPCTL_SETD0PIDEF | USB_DIEPCTL_USBACTEP); efm32_putreg(regval, regaddr); diff --git a/arch/arm/src/stm32/stm32_otgfsdev.c b/arch/arm/src/stm32/stm32_otgfsdev.c index 3831e6d0971..cdbb3729d55 100644 --- a/arch/arm/src/stm32/stm32_otgfsdev.c +++ b/arch/arm/src/stm32/stm32_otgfsdev.c @@ -3980,7 +3980,7 @@ static int stm32_epin_configure(FAR struct stm32_ep_s *privep, uint8_t eptype, regval &= ~(OTGFS_DIEPCTL_MPSIZ_MASK | OTGFS_DIEPCTL_EPTYP_MASK | OTGFS_DIEPCTL_TXFNUM_MASK); regval |= mpsiz; regval |= (eptype << OTGFS_DIEPCTL_EPTYP_SHIFT); - regval |= (eptype << OTGFS_DIEPCTL_TXFNUM_SHIFT); + regval |= (privep->epphy << OTGFS_DIEPCTL_TXFNUM_SHIFT); regval |= (OTGFS_DIEPCTL_SD0PID | OTGFS_DIEPCTL_USBAEP); stm32_putreg(regval, regaddr); diff --git a/arch/arm/src/stm32/stm32_otghsdev.c b/arch/arm/src/stm32/stm32_otghsdev.c index ba02546aac6..f22e8fd7715 100644 --- a/arch/arm/src/stm32/stm32_otghsdev.c +++ b/arch/arm/src/stm32/stm32_otghsdev.c @@ -3930,7 +3930,7 @@ static int stm32_epin_configure(FAR struct stm32_ep_s *privep, uint8_t eptype, regval &= ~(OTGHS_DIEPCTL_MPSIZ_MASK | OTGHS_DIEPCTL_EPTYP_MASK | OTGHS_DIEPCTL_TXFNUM_MASK); regval |= mpsiz; regval |= (eptype << OTGHS_DIEPCTL_EPTYP_SHIFT); - regval |= (eptype << OTGHS_DIEPCTL_TXFNUM_SHIFT); + regval |= (privep->epphy << OTGHS_DIEPCTL_TXFNUM_SHIFT); regval |= (OTGHS_DIEPCTL_SD0PID | OTGHS_DIEPCTL_USBAEP); stm32_putreg(regval, regaddr); diff --git a/arch/arm/src/stm32f7/stm32_otgdev.c b/arch/arm/src/stm32f7/stm32_otgdev.c index 515819b9f71..a12862af983 100644 --- a/arch/arm/src/stm32f7/stm32_otgdev.c +++ b/arch/arm/src/stm32f7/stm32_otgdev.c @@ -4000,7 +4000,7 @@ static int stm32_epin_configure(FAR struct stm32_ep_s *privep, OTG_DIEPCTL_TXFNUM_MASK); regval |= mpsiz; regval |= (eptype << OTG_DIEPCTL_EPTYP_SHIFT); - regval |= (eptype << OTG_DIEPCTL_TXFNUM_SHIFT); + regval |= (privep->epphy << OTG_DIEPCTL_TXFNUM_SHIFT); regval |= (OTG_DIEPCTL_SD0PID | OTG_DIEPCTL_USBAEP); stm32_putreg(regval, regaddr); diff --git a/arch/arm/src/stm32l4/stm32l4_otgfsdev.c b/arch/arm/src/stm32l4/stm32l4_otgfsdev.c index 2a55633ac6c..6bcfb14bb8a 100644 --- a/arch/arm/src/stm32l4/stm32l4_otgfsdev.c +++ b/arch/arm/src/stm32l4/stm32l4_otgfsdev.c @@ -4035,7 +4035,7 @@ static int stm32l4_epin_configure(FAR struct stm32l4_ep_s *privep, uint8_t eptyp regval &= ~(OTGFS_DIEPCTL_MPSIZ_MASK | OTGFS_DIEPCTL_EPTYP_MASK | OTGFS_DIEPCTL_TXFNUM_MASK); regval |= mpsiz; regval |= (eptype << OTGFS_DIEPCTL_EPTYP_SHIFT); - regval |= (eptype << OTGFS_DIEPCTL_TXFNUM_SHIFT); + regval |= (privep->epphy << OTGFS_DIEPCTL_TXFNUM_SHIFT); regval |= (OTGFS_DIEPCTL_SD0PID | OTGFS_DIEPCTL_USBAEP); stm32l4_putreg(regval, regaddr);