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Add support for the Cortex-M4 floating pointing
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4144 42af7a65-404d-4744-a932-0658087f49c3
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11 changed files with 287 additions and 12 deletions
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@ -2,7 +2,7 @@
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* arch/arm/include/armv7-m/irq.h
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*
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* Copyright (C) 2009, 2011 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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@ -143,7 +143,7 @@
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# define REG_D15 (SW_INT_REGS+30) /* D15 */
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# define REG_S30 (SW_INT_REGS+30) /* S30 */
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# define REG_S31 (SW_INT_REGS+31) /* S31 */
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# DEFINE REG_FPSCR (SW_INT_REGS+32) /* Floating point status and control */
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# define REG_FPSCR (SW_INT_REGS+32) /* Floating point status and control */
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# define SW_FPU_REGS (33)
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#else
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# define SW_FPU_REGS (0)
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