From b3ebe66ff5804d0a42feb2db3d3b7ae4585bae27 Mon Sep 17 00:00:00 2001 From: ligd Date: Tue, 2 Aug 2022 00:00:51 +0800 Subject: [PATCH] arch: dump backtrace should after set rtcb regs Signed-off-by: ligd --- arch/arm/src/common/arm_assert.c | 12 ++++++------ arch/risc-v/src/common/riscv_assert.c | 12 ++++++------ 2 files changed, 12 insertions(+), 12 deletions(-) diff --git a/arch/arm/src/common/arm_assert.c b/arch/arm/src/common/arm_assert.c index 42e01487380..936181ef623 100644 --- a/arch/arm/src/common/arm_assert.c +++ b/arch/arm/src/common/arm_assert.c @@ -389,12 +389,6 @@ static void arm_dumpstate(void) struct tcb_s *rtcb = running_task(); uint32_t sp = up_getsp(); - /* Show back trace */ - -#ifdef CONFIG_SCHED_BACKTRACE - sched_dumpstack(rtcb->pid); -#endif - /* Update the xcp context */ if (CURRENT_REGS) @@ -407,6 +401,12 @@ static void arm_dumpstate(void) rtcb->xcp.regs = (uint32_t *)s_last_regs; } + /* Show back trace */ + +#ifdef CONFIG_SCHED_BACKTRACE + sched_dumpstack(rtcb->pid); +#endif + /* Dump the registers */ arm_registerdump(rtcb->xcp.regs); diff --git a/arch/risc-v/src/common/riscv_assert.c b/arch/risc-v/src/common/riscv_assert.c index 713d1b131ef..bd3df7ac3f6 100644 --- a/arch/risc-v/src/common/riscv_assert.c +++ b/arch/risc-v/src/common/riscv_assert.c @@ -366,12 +366,6 @@ static void riscv_dumpstate(void) struct tcb_s *rtcb = running_task(); uintptr_t sp = up_getsp(); - /* Show back trace */ - -#ifdef CONFIG_SCHED_BACKTRACE - sched_dumpstack(rtcb->pid); -#endif - /* Update the xcp context */ if (CURRENT_REGS) @@ -384,6 +378,12 @@ static void riscv_dumpstate(void) rtcb->xcp.regs = (uintptr_t *)s_last_regs; } + /* Show back trace */ + +#ifdef CONFIG_SCHED_BACKTRACE + sched_dumpstack(rtcb->pid); +#endif + /* Dump the registers (if available) */ riscv_registerdump(rtcb->xcp.regs);