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Squashed commit of the following:

Browse source 
arch/arm/src/lpc17xx:  This commit removes support for the dedicated vector handling from the LPC17xx architectures. Only common vectors are now supported.
    arch/arm/src/kinetis:  This commit removes support for the dedicated vector handling from the Kinetis architectures. Only common vectors are now supported.
This commit is contained in:
Gregory Nutt 2018-06-20 08:18:32 -06:00
parent dd899c0453
commit b38618d0c6
80 changed files with 462 additions and 2648 deletions
Download patch file Download diff file Expand all files Collapse all files

2
arch/arm/Kconfig
View file

@ -105,6 +105,7 @@ config ARCH_CHIP_KINETIS
select ARCH_HAVE_RAMFUNCS
select ARCH_HAVE_CMNVECTOR
select ARCH_HAVE_I2CRESET
select ARMV7M_CMNVECTOR
---help---
Freescale Kinetis Architectures (ARM Cortex-M4)
@ -149,6 +150,7 @@ config ARCH_CHIP_LPC17XX
select ARCH_HAVE_MPU
select ARM_HAVE_MPU_UNIFIED
select ARCH_HAVE_FETCHADD
select ARMV7M_CMNVECTOR
select ARMV7M_HAVE_STACKCHECK
---help---
NXP LPC17xx architectures (ARM Cortex-M3)

2
arch/arm/include/lpc17xx/lpc178x_irq.h
View file

@ -153,7 +153,7 @@
* Capture 0-1 of PWM0 */
#define LPC17_IRQ_EEPROM (LPC17_IRQ_EXTINT+40) /* EEPROM Interrupt
* EE_PROG_DONE, EE_RW_DONE */
#define LPC17_IRQ_NEXTINT (40)
#define LPC17_IRQ_NEXTINT (41)
#define LPC17_IRQ_NIRQS (LPC17_IRQ_EXTINT+LPC17_IRQ_NEXTINT)
/* GPIO interrupts. The LPC177x_8x supports several interrupts on ports 0 and

7
arch/arm/src/efm32/Make.defs
View file

@ -76,12 +76,7 @@ CMN_CSRCS += up_checkstack.c
endif
ifeq ($(CONFIG_ARCH_FPU),y)
CMN_ASRCS += up_fpu.S
ifneq ($(CONFIG_ARMV7M_CMNVECTOR),y)
CMN_CSRCS += up_copyarmstate.c
else ifeq ($(CONFIG_ARMV7M_LAZYFPU),y)
CMN_CSRCS += up_copyarmstate.c
endif
CMN_ASRCS += up_fpu.S up_copyarmstate.c
endif
ifeq ($(CONFIG_ARMV7M_ITMSYSLOG),y)

2
arch/arm/src/efm32/efm32_start.c
View file

@ -68,7 +68,7 @@
/* .data is positioned first in the primary RAM followed immediately by .bss.
* The IDLE thread stack lies just after .bss and has size give by
* CONFIG_IDLETHREAD_STACKSIZE; The heap then begins just after the IDLE
* ARM EBI requires 64 bit stack alignment.
* ARM EABI requires 64 bit stack alignment.
*/
#define IDLE_STACKSIZE (CONFIG_IDLETHREAD_STACKSIZE & ~7)

11
arch/arm/src/kinetis/Make.defs
View file

@ -33,11 +33,7 @@
#
############################################################################
ifeq ($(CONFIG_ARMV7M_CMNVECTOR),y)
HEAD_ASRC =
else
HEAD_ASRC = kinetis_vectors.S
endif
CMN_UASRCS =
CMN_UCSRCS =
@ -94,12 +90,7 @@ endif
endif
ifeq ($(CONFIG_ARCH_FPU),y)
CMN_ASRCS += up_fpu.S
ifneq ($(CONFIG_ARMV7M_CMNVECTOR),y)
CMN_CSRCS += up_copyarmstate.c
else ifeq ($(CONFIG_ARMV7M_LAZYFPU),y)
CMN_CSRCS += up_copyarmstate.c
endif
CMN_ASRCS += up_fpu.S up_copyarmstate.c
endif
ifeq ($(CONFIG_ARMV7M_ITMSYSLOG),y)

24
arch/arm/src/kinetis/chip.h
View file

@ -1,7 +1,7 @@
/************************************************************************************
* arch/arm/src/kinetis/chip.h
*
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
* Copyright (C) 2011, 2018 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -50,28 +50,16 @@
#include <arch/kinetis/chip.h>
#include "chip/kinetis_memorymap.h"
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/* If the common ARMv7-M vector handling logic is used, then it expects the
* following definition in this file that provides the number of supported external
* interrupts which, for this architecture, is provided in the arch/kinetis/chip.h
* header file.
*/
#define ARMV7M_PERIPHERAL_INTERRUPTS NR_INTERRUPTS
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/************************************************************************************
* Public Types
************************************************************************************/
/************************************************************************************
* Public Data
************************************************************************************/
/************************************************************************************
* Public Functions
************************************************************************************/
#define ARMV7M_PERIPHERAL_INTERRUPTS NR_INTERRUPTS
#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_H */

156
arch/arm/src/kinetis/chip/kinetis_k20vectors.h
View file

@ -1,156 +0,0 @@
/************************************************************************************
* arch/arm/src/kinetis/chip/kinetis_k20vectors.h
*
* Copyright (C) 2016 Gregory Nutt. All rights reserved.
* Authors: Gregory Nutt <gnutt@nuttx.org>
* David Sidrane <david_s5@nscdg.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
/************************************************************************************
* Pre-processor definitions
************************************************************************************/
/* This file is included by kinetis_vectors.S. It provides the macro VECTOR that
* supplies ach K20 vector in terms of a (lower-case) ISR label and an
* (upper-case) IRQ number as defined in arch/arm/include/kinetis/kinetis_k20irq.h.
* kinetis_vectors.S will defined the VECTOR in different ways in order to generate
* the interrupt vectors and handlers in their final form.
*/
#if defined(CONFIG_ARCH_FAMILY_K20)
/* If the common ARMv7-M vector handling is used, then all it needs is the following
* definition that provides the number of supported vectors.
*/
# ifdef CONFIG_ARMV7M_CMNVECTOR
/* Reserve interrupt table entries for I/O interrupts. */
# define ARMV7M_PERIPHERAL_INTERRUPTS NR_INTERRUPTS
# else
VECTOR(kinetis_dmach0, KINETIS_IRQ_DMACH0) /* Vector 16: DMA channel 0 transfer complete */
VECTOR(kinetis_dmach1, KINETIS_IRQ_DMACH1) /* Vector 17: DMA channel 1 transfer complete */
VECTOR(kinetis_dmach2, KINETIS_IRQ_DMACH2) /* Vector 18: DMA channel 2 transfer complete */
VECTOR(kinetis_dmach3, KINETIS_IRQ_DMACH3) /* Vector 19: DMA channel 3 transfer complete */
VECTOR(kinetis_dmach4, KINETIS_IRQ_DMACH4) /* Vector 20: DMA channel 4 transfer complete */
VECTOR(kinetis_dmach5, KINETIS_IRQ_DMACH5) /* Vector 21: DMA channel 5 transfer complete */
VECTOR(kinetis_dmach6, KINETIS_IRQ_DMACH6) /* Vector 22: DMA channel 6 transfer complete */
VECTOR(kinetis_dmach7, KINETIS_IRQ_DMACH7) /* Vector 23: DMA channel 7 transfer complete */
VECTOR(kinetis_dmach8, KINETIS_IRQ_DMACH8) /* Vector 24: DMA channel 8 transfer complete */
VECTOR(kinetis_dmach9, KINETIS_IRQ_DMACH9) /* Vector 25: DMA channel 9 transfer complete */
VECTOR(kinetis_dmach10, KINETIS_IRQ_DMACH10) /* Vector 26: DMA channel 10 transfer complete */
VECTOR(kinetis_dmach11, KINETIS_IRQ_DMACH11) /* Vector 27: DMA channel 11 transfer complete */
VECTOR(kinetis_dmach12, KINETIS_IRQ_DMACH12) /* Vector 28: DMA channel 12 transfer complete */
VECTOR(kinetis_dmach13, KINETIS_IRQ_DMACH13) /* Vector 29: DMA channel 13 transfer complete */
VECTOR(kinetis_dmach14, KINETIS_IRQ_DMACH14) /* Vector 30: DMA channel 14 transfer complete */
VECTOR(kinetis_dmach15, KINETIS_IRQ_DMACH15) /* Vector 31: DMA channel 15 transfer complete */
VECTOR(kinetis_dmaerr, KINETIS_IRQ_DMAERR) /* Vector 32: DMA error interrupt channels 0-15 */
UNUSED(KINETIS_IRQ_RESVD17) /* Vector 33: Reserved */
VECTOR(kinetis_flashcc, KINETIS_IRQ_FLASHCC) /* Vector 34: Flash memory command complete */
VECTOR(kinetis_flashrc, KINETIS_IRQ_FLASHRC) /* Vector 35: Flash memory read collision */
VECTOR(kinetis_smclvd, KINETIS_IRQ_SMCLVD) /* Vector 36: Mode Controller low-voltage detect, low-voltage warning */
VECTOR(kinetis_llwu, KINETIS_IRQ_LLWU) /* Vector 37: LLWU Normal Low Leakage Wakeup */
VECTOR(kinetis_wdog, KINETIS_IRQ_WDOG) /* Vector 38: Watchdog */
UNUSED(KINETIS_IRQ_RESVD23) /* Vector 39: Reserved */
VECTOR(kinetis_i2c0, KINETIS_IRQ_I2C0) /* Vector 40: I2C0 */
VECTOR(kinetis_i2c1, KINETIS_IRQ_I2C1) /* Vector 41: I2C1 */
VECTOR(kinetis_spi0, KINETIS_IRQ_SPI0) /* Vector 42: SPI0 all sources */
VECTOR(kinetis_spi1, KINETIS_IRQ_SPI1) /* Vector 43: SPI1 all sources */
UNUSED(KINETIS_IRQ_RESVD28) /* Vector 44: Reserved */
VECTOR(kinetis_can0mb, KINETIS_IRQ_CAN0MB) /* Vector 45: CAN0 OR'ed Message buffer (0-15) */
VECTOR(kinetis_can0bo, KINETIS_IRQ_CAN0BO) /* Vector 46: CAN0 Bus Off */
VECTOR(kinetis_can0err, KINETIS_IRQ_CAN0ERR) /* Vector 47: CAN0 Error */
VECTOR(kinetis_can0tw, KINETIS_IRQ_CAN0TW) /* Vector 48: CAN0 Transmit Warning */
VECTOR(kinetis_can0rw, KINETIS_IRQ_CAN0RW) /* Vector 49: CAN0 Receive Warning */
VECTOR(kinetis_can0wu, KINETIS_IRQ_CAN0WU) /* Vector 50: CAN0 Wake UP */
UNUSED(KINETIS_IRQ_RESVD35) /* Vector 51: Reserved */
UNUSED(KINETIS_IRQ_RESVD36) /* Vector 52: Reserved */
UNUSED(KINETIS_IRQ_RESVD37) /* Vector 53: Reserved */
UNUSED(KINETIS_IRQ_RESVD38) /* Vector 54: Reserved */
UNUSED(KINETIS_IRQ_RESVD39) /* Vector 55: Reserved */
UNUSED(KINETIS_IRQ_RESVD40) /* Vector 56: Reserved */
UNUSED(KINETIS_IRQ_RESVD41) /* Vector 57: Reserved */
UNUSED(KINETIS_IRQ_RESVD42) /* Vector 58: Reserved */
UNUSED(KINETIS_IRQ_RESVD43) /* Vector 59: Reserved */
VECTOR(kinetis_uart0l, KINETIS_IRQ_UART0L) /* Vector 60: UART0 LON */
VECTOR(kinetis_uart0s, KINETIS_IRQ_UART0S) /* Vector 61: UART0 status */
VECTOR(kinetis_uart0e, KINETIS_IRQ_UART0E) /* Vector 62: UART0 error */
VECTOR(kinetis_uart1s, KINETIS_IRQ_UART1S) /* Vector 63: UART1 status */
VECTOR(kinetis_uart1e, KINETIS_IRQ_UART1E) /* Vector 64: UART1 error */
VECTOR(kinetis_uart2s, KINETIS_IRQ_UART2S) /* Vector 65: UART2 status */
VECTOR(kinetis_uart2e, KINETIS_IRQ_UART2E) /* Vector 66: UART2 error */
UNUSED(KINETIS_IRQ_RESVD51) /* Vector 67: Reserved */
UNUSED(KINETIS_IRQ_RESVD52) /* Vector 68: Reserved */
UNUSED(KINETIS_IRQ_RESVD53) /* Vector 69: Reserved */
UNUSED(KINETIS_IRQ_RESVD54) /* Vector 70: Reserved */
UNUSED(KINETIS_IRQ_RESVD55) /* Vector 71: Reserved */
UNUSED(KINETIS_IRQ_RESVD56) /* Vector 72: Reserved */
VECTOR(kinetis_adc0, KINETIS_IRQ_ADC0) /* Vector 73: ADC0 */
VECTOR(kinetis_adc1, KINETIS_IRQ_ADC1) /* Vector 74: ADC1 */
VECTOR(kinetis_cmp0, KINETIS_IRQ_CMP0) /* Vector 75: CMP0 */
VECTOR(kinetis_cmp1, KINETIS_IRQ_CMP1) /* Vector 76: CMP1 */
VECTOR(kinetis_cmp2, KINETIS_IRQ_CMP2) /* Vector 77: CMP2 */
VECTOR(kinetis_ftm0, KINETIS_IRQ_FTM0) /* Vector 78: FTM0 all sources */
VECTOR(kinetis_ftm1, KINETIS_IRQ_FTM1) /* Vector 79: FTM1 all sources */
VECTOR(kinetis_ftm2, KINETIS_IRQ_FTM2) /* Vector 80: FTM2 all sources */
VECTOR(kinetis_cmt, KINETIS_IRQ_CMT) /* Vector 81: CMT */
VECTOR(kinetis_rtc, KINETIS_IRQ_RTC) /* Vector 82: RTC alarm interrupt */
VECTOR(kinetis_rtcs, KINETIS_IRQ_RTCS) /* Vector 83: RTC seconds interrupt */
VECTOR(kinetis_pitch0, KINETIS_IRQ_PITCH0) /* Vector 84: PIT channel 0 */
VECTOR(kinetis_pitch1, KINETIS_IRQ_PITCH1) /* Vector 85: PIT channel 1 */
VECTOR(kinetis_pitch2, KINETIS_IRQ_PITCH2) /* Vector 86: PIT channel 2 */
VECTOR(kinetis_pitch3, KINETIS_IRQ_PITCH3) /* Vector 87: PIT channel 3 */
VECTOR(kinetis_pdb, KINETIS_IRQ_PDB) /* Vector 88: PDB */
VECTOR(kinetis_usbotg, KINETIS_IRQ_USBOTG) /* Vector 89: USB OTG */
VECTOR(kinetis_usbcd, KINETIS_IRQ_USBCD) /* Vector 90: USB charger detect */
UNUSED(KINETIS_IRQ_RESVD75) /* Vector 91: Reserved */
UNUSED(KINETIS_IRQ_RESVD76) /* Vector 92: Reserved */
UNUSED(KINETIS_IRQ_RESVD77) /* Vector 93: Reserved */
UNUSED(KINETIS_IRQ_RESVD78) /* Vector 94: Reserved */
UNUSED(KINETIS_IRQ_RESVD79) /* Vector 95: Reserved */
UNUSED(KINETIS_IRQ_RESVD80) /* Vector 96: Reserved */
VECTOR(kinetis_dac0, KINETIS_IRQ_DAC0) /* Vector 97: DAC0 */
UNUSED(KINETIS_IRQ_RESVD82) /* Vector 98: Reserved */
VECTOR(kinetis_tsi, KINETIS_IRQ_TSI) /* Vector 99: TSI all sources */
VECTOR(kinetis_mcg, KINETIS_IRQ_MCG) /* Vector 100: MCG */
VECTOR(kinetis_lpt, KINETIS_IRQ_LPT) /* Vector 101: Low power timer */
UNUSED(KINETIS_IRQ_RESVD86) /* Vector 102: Reserved */
VECTOR(kinetis_porta, KINETIS_IRQ_PORTA) /* Vector 103: Pin detect port A */
VECTOR(kinetis_portb, KINETIS_IRQ_PORTB) /* Vector 104: Pin detect port B */
VECTOR(kinetis_portc, KINETIS_IRQ_PORTC) /* Vector 105: Pin detect port C */
VECTOR(kinetis_portd, KINETIS_IRQ_PORTD) /* Vector 106: Pin detect port D */
VECTOR(kinetis_porte, KINETIS_IRQ_PORTE) /* Vector 107: Pin detect port E */
UNUSED(KINETIS_IRQ_RESVD92) /* Vector 108: Reserved */
UNUSED(KINETIS_IRQ_RESVD93) /* Vector 109: Reserved */
VECTOR(kinetis_swi, KINETIS_IRQ_SWI) /* Vector 110: Software interrupt */
# endif /* CONFIG_ARMV7M_CMNVECTOR */
#endif /* CONFIG_ARCH_FAMILY_K20 */

179
arch/arm/src/kinetis/chip/kinetis_k28vectors.h
View file

@ -1,179 +0,0 @@
/************************************************************************************
* arch/arm/src/kinetis/chip/kinetis_k28vectors.h
*
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
* Authors: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
/************************************************************************************
* Pre-processor definitions
************************************************************************************/
/* This file is included by kinetis_vectors.S. It provides the macro VECTOR that
* supplies ach K28 vector in terms of a (lower-case) ISR label and an
* (upper-case) IRQ number as defined in arch/arm/include/kinetis/kinetis_k28irq.h.
* kinetis_vectors.S will defined the VECTOR in different ways in order to generate
* the interrupt vectors and handlers in their final form.
*/
#if defined(CONFIG_ARCH_FAMILY_K28)
/* If the common ARMv7-M vector handling is used, then all it needs is the following
* definition that provides the number of supported vectors.
*/
# ifdef CONFIG_ARMV7M_CMNVECTOR
/* Reserve interrupt table entries for I/O interrupts. */
# define ARMV7M_PERIPHERAL_INTERRUPTS NR_INTERRUPTS
# else
VECTOR(kinetis_dmach0, KINETIS_IRQ_DMACH0) /* 0: DMA channel 0, 16 transfer complete */
VECTOR(kinetis_dmach1, KINETIS_IRQ_DMACH1) /* 1: DMA channel 1, 17 transfer complete */
VECTOR(kinetis_dmach2, KINETIS_IRQ_DMACH2) /* 2: DMA channel 2, 18 transfer complete */
VECTOR(kinetis_dmach3, KINETIS_IRQ_DMACH3) /* 3: DMA channel 3, 19 transfer complete */
VECTOR(kinetis_dmach4, KINETIS_IRQ_DMACH4) /* 4: DMA channel 4, 20 transfer complete */
VECTOR(kinetis_dmach5, KINETIS_IRQ_DMACH5) /* 5: DMA channel 5, 21 transfer complete */
VECTOR(kinetis_dmach6, KINETIS_IRQ_DMACH6) /* 6: DMA channel 6, 11 transfer complete */
VECTOR(kinetis_dmach7, KINETIS_IRQ_DMACH7) /* 7: DMA channel 7, 23 transfer complete */
VECTOR(kinetis_dmach8, KINETIS_IRQ_DMACH8) /* 8: DMA channel 8, 24 transfer complete */
VECTOR(kinetis_dmach9, KINETIS_IRQ_DMACH9) /* 9: DMA channel 9, 25 transfer complete */
VECTOR(kinetis_dmach10, KINETIS_IRQ_DMACH10) /* 10: DMA channel 10, 26 transfer complete */
VECTOR(kinetis_dmach11, KINETIS_IRQ_DMACH11) /* 11: DMA channel 11, 27 transfer complete */
VECTOR(kinetis_dmach12, KINETIS_IRQ_DMACH12) /* 12: DMA channel 12, 28 transfer complete */
VECTOR(kinetis_dmach13, KINETIS_IRQ_DMACH13) /* 13: DMA channel 13, 29 transfer complete */
VECTOR(kinetis_dmach14, KINETIS_IRQ_DMACH14) /* 14: DMA channel 14, 30 transfer complete */
VECTOR(kinetis_dmach15, KINETIS_IRQ_DMACH15) /* 15: DMA channel 15, 31 transfer complete */
VECTOR(kinetis_dmaerr, KINETIS_IRQ_DMAERR) /* 16: DMA error interrupt channels 0-31 */
VECTOR(kinetis_mcm, KINETIS_IRQ_MCM) /* 17: MCM or RDC interrupt */
VECTOR(kinetis_flashcc, KINETIS_IRQ_FLASHCC) /* 18: Flash memory command complete */
VECTOR(kinetis_flashrc, KINETIS_IRQ_FLASHRC) /* 19: Flash memory read collision */
VECTOR(kinetis_smclvd, KINETIS_IRQ_SMCLVD) /* 20: Mode Controller low-voltage */
VECTOR(kinetis_llwu, KINETIS_IRQ_LLWU) /* 21: LLWU Normal Low Leakage Wakeup */
VECTOR(kinetis_wdog, KINETIS_IRQ_WDOG) /* 22: Watchdog or EWM */
VECTOR(kinetis_rngb, KINETIS_IRQ_RNGB) /* 23: True random number generator (TRNG) */
VECTOR(kinetis_i2c0, KINETIS_IRQ_I2C0) /* 24: I2C0 */
VECTOR(kinetis_i2c1, KINETIS_IRQ_I2C1) /* 25: I2C1 */
VECTOR(kinetis_spi0, KINETIS_IRQ_SPI0) /* 26: SPI0 all sources */
VECTOR(kinetis_spi1, KINETIS_IRQ_SPI1) /* 27: SPI1 all sources */
VECTOR(kinetis_i2s0, KINETIS_IRQ_I2S0) /* 28: 12S0 Transmit */
VECTOR(kinetis_i2s1, KINETIS_IRQ_I2S1) /* 29: 12S0 Receive */
VECTOR(kinetis_lpuart0, KINETIS_IRQ_LPUART0) /* 30: LPUART0 Status and error */
VECTOR(kinetis_lpuart1, KINETIS_IRQ_LPUART1) /* 31: LPUART1 Status and error */
VECTOR(kinetis_lpuart2, KINETIS_IRQ_LPUART2) /* 32: LPUART2 Status and error */
VECTOR(kinetis_lpuart3, KINETIS_IRQ_LPUART3) /* 33: LPUART3 Status and error */
VECTOR(kinetis_lpuart4, KINETIS_IRQ_LPUART4) /* 34: LPUART4 Status and error */
UNUSED(KINETIS_IRQ_RESVD35)
UNUSED(KINETIS_IRQ_RESVD36)
UNUSED(KINETIS_IRQ_RESVD37)
UNUSED(KINETIS_IRQ_RESVD38)
VECTOR(kinetis_adc0, KINETIS_IRQ_ADC0) /* 39: ADC0 */
VECTOR(kinetis_cmp0, KINETIS_IRQ_CMP0) /* 40: CMP0 */
VECTOR(kinetis_cmp1, KINETIS_IRQ_CMP1) /* 41: CMP1 */
VECTOR(kinetis_ftm0, KINETIS_IRQ_FTM0) /* 42: FTM0 all sources */
VECTOR(kinetis_ftm1, KINETIS_IRQ_FTM1) /* 43: FTM1 all sources */
VECTOR(kinetis_ftm2, KINETIS_IRQ_FTM2) /* 44: FTM2 all sources */
VECTOR(kinetis_cmt, KINETIS_IRQ_CMT) /* 45: CMT */
VECTOR(kinetis_rtc, KINETIS_IRQ_RTC) /* 46: RTC alarm interrupt */
VECTOR(kinetis_rtcs, KINETIS_IRQ_RTCS) /* 47: RTC seconds interrupt */
VECTOR(kinetis_pitch0, KINETIS_IRQ_PITCH0) /* 48: PIT channel 0 */
VECTOR(kinetis_pitch1, KINETIS_IRQ_PITCH1) /* 49: PIT channel 1 */
VECTOR(kinetis_pitch2, KINETIS_IRQ_PITCH2) /* 50: PIT channel 2 */
VECTOR(kinetis_pitch3, KINETIS_IRQ_PITCH3) /* 51: PIT channel 3 */
VECTOR(kinetis_pdb, KINETIS_IRQ_PDB) /* 52: PDB */
VECTOR(kinetis_usbotg, KINETIS_IRQ_USBOTG) /* 53: USB OTG */
VECTOR(kinetis_usbcd, KINETIS_IRQ_USBCD) /* 54: USB charger detect */
UNUSED(KINETIS_IRQ_RESVD55)
VECTOR(kinetis_dac0, KINETIS_IRQ_DAC0) /* 56: DAC0 */
VECTOR(kinetis_mcg, KINETIS_IRQ_MCG) /* 57: MCG */
VECTOR(kinetis_lpt, KINETIS_IRQ_LPT) /* 58: Low power timer LPTMR0 and LPTMR1 */
VECTOR(kinetis_porta, KINETIS_IRQ_PORTA) /* 59: Pin detect port A */
VECTOR(kinetis_portb, KINETIS_IRQ_PORTB) /* 60: Pin detect port B */
VECTOR(kinetis_portc, KINETIS_IRQ_PORTC) /* 61: Pin detect port C */
VECTOR(kinetis_portd, KINETIS_IRQ_PORTD) /* 62: Pin detect port D */
VECTOR(kinetis_porte, KINETIS_IRQ_PORTE) /* 63: Pin detect port E */
VECTOR(kinetis_swi, KINETIS_IRQ_SWI) /* 64: Software interrupt */
VECTOR(kinetis_spi2, KINETIS_IRQ_SPI2) /* 65: SPI2 all sources */
VECTOR(kinetis_spi3, KINETIS_IRQ_SPI3) /* 66: SPI3 all sources */
UNUSED(KINETIS_IRQ_RESVD67)
VECTOR(kinetis_i2s1tx, KINETIS_IRQ_I2S1TX) /* 68: I2S1 Transmit */
VECTOR(kinetis_i2s1rx, KINETIS_IRQ_I2S1RX) /* 69: I2S1 Receive */
VECTOR(kinetis_flexio, KINETIS_IRQ_FLEXIO) /* 70: FlexIO */
VECTOR(kinetis_ftm3, KINETIS_IRQ_FTM3) /* 71: FTM3 all sources */
UNUSED(KINETIS_IRQ_RESVD72)
UNUSED(KINETIS_IRQ_RESVD73)
VECTOR(kinetis_i2c2, KINETIS_IRQ_I2C2) /* 74: I2C2 */
UNUSED(KINETIS_IRQ_RESVD75)
UNUSED(KINETIS_IRQ_RESVD76)
UNUSED(KINETIS_IRQ_RESVD77)
UNUSED(KINETIS_IRQ_RESVD78)
UNUSED(KINETIS_IRQ_RESVD79)
UNUSED(KINETIS_IRQ_RESVD80)
VECTOR(kinetis_sdhc, KINETIS_IRQ_SDHC) /* 81: SDHC */
UNUSED(KINETIS_IRQ_RESVD82)
UNUSED(KINETIS_IRQ_RESVD83)
UNUSED(KINETIS_IRQ_RESVD84)
UNUSED(KINETIS_IRQ_RESVD85)
UNUSED(KINETIS_IRQ_RESVD86)
UNUSED(KINETIS_IRQ_RESVD87)
VECTOR(kinetis_tpm1, KINETIS_IRQ_TPM1) /* 88: TPM1 */
VECTOR(kinetis_tpm2, KINETIS_IRQ_TPM2) /* 89: TPM2 */
VECTOR(kinetis_usbhsdcd, KINETIS_IRQ_USBHSDCD) /* 90: USBHS DCD or USBHS Phy modules */
VECTOR(kinetis_i2c3, KINETIS_IRQ_I2C3) /* 91: I2C3 */
UNUSED(KINETIS_IRQ_RESVD92)
VECTOR(kinetis_usb1otg, KINETIS_IRQ_USB1OTG) /* 93: USB1 OTG*/
UNUSED(KINETIS_IRQ_RESVD94)
UNUSED(KINETIS_IRQ_RESVD95)
UNUSED(KINETIS_IRQ_RESVD96)
UNUSED(KINETIS_IRQ_RESVD97)
UNUSED(KINETIS_IRQ_RESVD98)
UNUSED(KINETIS_IRQ_RESVD99)
VECTOR(kinetis_qspi0, KINETIS_QSPI0) /* 100: QSPI0 all sources */
UNUSED(KINETIS_IRQ_RESVD101)
UNUSED(KINETIS_IRQ_RESVD102)
UNUSED(KINETIS_IRQ_RESVD103)
UNUSED(KINETIS_IRQ_RESVD104)
UNUSED(KINETIS_IRQ_RESVD105)
UNUSED(KINETIS_IRQ_RESVD106)
# endif /* CONFIG_ARMV7M_CMNVECTOR */
#endif /* CONFIG_ARCH_FAMILY_K28 */

156
arch/arm/src/kinetis/chip/kinetis_k40vectors.h
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@ -1,156 +0,0 @@
/************************************************************************************
* arch/arm/src/kinetis/chip/kinetis_k40vectors.h
*
* Copyright (C) 2016 Gregory Nutt. All rights reserved.
* Authors: Gregory Nutt <gnutt@nuttx.org>
* David Sidrane <david_s5@nscdg.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
/************************************************************************************
* Pre-processor definitions
************************************************************************************/
/* This file is included by kinetis_vectors.S. It provides the macro VECTOR that
* supplies ach K40 vector in terms of a (lower-case) ISR label and an
* (upper-case) IRQ number as defined in arch/arm/include/kinetis/kinetis_k40irq.h.
* kinetis_vectors.S will defined the VECTOR in different ways in order to generate
* the interrupt vectors and handlers in their final form.
*/
#if defined(CONFIG_ARCH_FAMILY_K40)
/* If the common ARMv7-M vector handling is used, then all it needs is the following
* definition that provides the number of supported vectors.
*/
# ifdef CONFIG_ARMV7M_CMNVECTOR
/* Reserve interrupt table entries for I/O interrupts. */
# define ARMV7M_PERIPHERAL_INTERRUPTS NR_INTERRUPTS
# else
VECTOR(kinetis_dmach0, KINETIS_IRQ_DMACH0) /* Vector 16: DMA channel 0 transfer complete */
VECTOR(kinetis_dmach1, KINETIS_IRQ_DMACH1) /* Vector 17: DMA channel 1 transfer complete */
VECTOR(kinetis_dmach2, KINETIS_IRQ_DMACH2) /* Vector 18: DMA channel 2 transfer complete */
VECTOR(kinetis_dmach3, KINETIS_IRQ_DMACH3) /* Vector 19: DMA channel 3 transfer complete */
VECTOR(kinetis_dmach4, KINETIS_IRQ_DMACH4) /* Vector 20: DMA channel 4 transfer complete */
VECTOR(kinetis_dmach5, KINETIS_IRQ_DMACH5) /* Vector 21: DMA channel 5 transfer complete */
VECTOR(kinetis_dmach6, KINETIS_IRQ_DMACH6) /* Vector 22: DMA channel 6 transfer complete */
VECTOR(kinetis_dmach7, KINETIS_IRQ_DMACH7) /* Vector 23: DMA channel 7 transfer complete */
VECTOR(kinetis_dmach8, KINETIS_IRQ_DMACH8) /* Vector 24: DMA channel 8 transfer complete */
VECTOR(kinetis_dmach9, KINETIS_IRQ_DMACH9) /* Vector 25: DMA channel 9 transfer complete */
VECTOR(kinetis_dmach10, KINETIS_IRQ_DMACH10) /* Vector 26: DMA channel 10 transfer complete */
VECTOR(kinetis_dmach11, KINETIS_IRQ_DMACH11) /* Vector 27: DMA channel 11 transfer complete */
VECTOR(kinetis_dmach12, KINETIS_IRQ_DMACH12) /* Vector 28: DMA channel 12 transfer complete */
VECTOR(kinetis_dmach13, KINETIS_IRQ_DMACH13) /* Vector 29: DMA channel 13 transfer complete */
VECTOR(kinetis_dmach14, KINETIS_IRQ_DMACH14) /* Vector 30: DMA channel 14 transfer complete */
VECTOR(kinetis_dmach15, KINETIS_IRQ_DMACH15) /* Vector 31: DMA channel 15 transfer complete */
VECTOR(kinetis_dmaerr, KINETIS_IRQ_DMAERR) /* Vector 32: DMA error interrupt channels 0-15 */
VECTOR(kinetis_mcm, KINETIS_IRQ_MCM) /* Vector 33: MCM Normal interrupt */
VECTOR(kinetis_flashcc, KINETIS_IRQ_FLASHCC) /* Vector 34: Flash memory command complete */
VECTOR(kinetis_flashrc, KINETIS_IRQ_FLASHRC) /* Vector 35: Flash memory read collision */
VECTOR(kinetis_smclvd, KINETIS_IRQ_SMCLVD) /* Vector 36: Mode Controller low-voltage detect, low-voltage warning */
VECTOR(kinetis_llwu, KINETIS_IRQ_LLWU) /* Vector 37: LLWU Normal Low Leakage Wakeup */
VECTOR(kinetis_wdog, KINETIS_IRQ_WDOG) /* Vector 38: Watchdog */
UNUSED(KINETIS_IRQ_RESVD23) /* Vector 39: Reserved */
VECTOR(kinetis_i2c0, KINETIS_IRQ_I2C0) /* Vector 40: I2C0 */
VECTOR(kinetis_i2c1, KINETIS_IRQ_I2C1) /* Vector 41: I2C1 */
VECTOR(kinetis_spi0, KINETIS_IRQ_SPI0) /* Vector 42: SPI0 all sources */
VECTOR(kinetis_spi1, KINETIS_IRQ_SPI1) /* Vector 43: SPI1 all sources */
VECTOR(kinetis_spi2, KINETIS_IRQ_SPI2) /* Vector 44: SPI2 all sources */
VECTOR(kinetis_can0mb, KINETIS_IRQ_CAN0MB) /* Vector 45: CAN0 OR'ed Message buffer (0-15) */
VECTOR(kinetis_can0bo, KINETIS_IRQ_CAN0BO) /* Vector 46: CAN0 Bus Off */
VECTOR(kinetis_can0err, KINETIS_IRQ_CAN0ERR) /* Vector 47: CAN0 Error */
VECTOR(kinetis_can0tw, KINETIS_IRQ_CAN0TW) /* Vector 48: CAN0 Transmit Warning */
VECTOR(kinetis_can0rw, KINETIS_IRQ_CAN0RW) /* Vector 49: CAN0 Receive Warning */
VECTOR(kinetis_can0wu, KINETIS_IRQ_CAN0WU) /* Vector 50: CAN0 Wake UP */
UNUSED(KINETIS_IRQ_RESVD35) /* Vector 51: Reserved */
UNUSED(KINETIS_IRQ_RESVD36) /* Vector 52: Reserved */
VECTOR(kinetis_can1mb, KINETIS_IRQ_CAN1MB) /* Vector 53: CAN1 OR'ed Message buffer (0-15) */
VECTOR(kinetis_can1bo, KINETIS_IRQ_CAN1BO) /* Vector 54: CAN1 Bus Off */
VECTOR(kinetis_can1err, KINETIS_IRQ_CAN1ERR) /* Vector 55: CAN1 Error */
VECTOR(kinetis_can1tw, KINETIS_IRQ_CAN1TW) /* Vector 56: CAN1 Transmit Warning */
VECTOR(kinetis_can1rw, KINETIS_IRQ_CAN1RW) /* Vector 57: CAN1 Receive Warning */
VECTOR(kinetis_can1wu, KINETIS_IRQ_CAN1WU) /* Vector 58: CAN1 Wake UP */
UNUSED(KINETIS_IRQ_RESVD43) /* Vector 59: Reserved */
UNUSED(KINETIS_IRQ_RESVD44) /* Vector 60: Reserved */
VECTOR(kinetis_uart0s, KINETIS_IRQ_UART0S) /* Vector 61: UART0 status */
VECTOR(kinetis_uart0e, KINETIS_IRQ_UART0E) /* Vector 62: UART0 error */
VECTOR(kinetis_uart1s, KINETIS_IRQ_UART1S) /* Vector 63: UART1 status */
VECTOR(kinetis_uart1e, KINETIS_IRQ_UART1E) /* Vector 64: UART1 error */
VECTOR(kinetis_uart2s, KINETIS_IRQ_UART2S) /* Vector 65: UART2 status */
VECTOR(kinetis_uart2e, KINETIS_IRQ_UART2E) /* Vector 66: UART2 error */
VECTOR(kinetis_uart3s, KINETIS_IRQ_UART3S) /* Vector 67: UART3 status */
VECTOR(kinetis_uart3e, KINETIS_IRQ_UART3E) /* Vector 68: UART3 error */
VECTOR(kinetis_uart4s, KINETIS_IRQ_UART4S) /* Vector 69: UART4 status */
VECTOR(kinetis_uart4e, KINETIS_IRQ_UART4E) /* Vector 70: UART4 error */
VECTOR(kinetis_uart5s, KINETIS_IRQ_UART5S) /* Vector 71: UART5 status */
VECTOR(kinetis_uart5e, KINETIS_IRQ_UART5E) /* Vector 72: UART5 error */
VECTOR(kinetis_adc0, KINETIS_IRQ_ADC0) /* Vector 73: ADC0 */
VECTOR(kinetis_adc1, KINETIS_IRQ_ADC1) /* Vector 74: ADC1 */
VECTOR(kinetis_cmp0, KINETIS_IRQ_CMP0) /* Vector 75: CMP0 */
VECTOR(kinetis_cmp1, KINETIS_IRQ_CMP1) /* Vector 76: CMP1 */
VECTOR(kinetis_cmp2, KINETIS_IRQ_CMP2) /* Vector 77: CMP2 */
VECTOR(kinetis_ftm0, KINETIS_IRQ_FTM0) /* Vector 78: FTM0 all sources */
VECTOR(kinetis_ftm1, KINETIS_IRQ_FTM1) /* Vector 79: FTM1 all sources */
VECTOR(kinetis_ftm2, KINETIS_IRQ_FTM2) /* Vector 80: FTM2 all sources */
VECTOR(kinetis_cmt, KINETIS_IRQ_CMT) /* Vector 81: CMT */
VECTOR(kinetis_rtc, KINETIS_IRQ_RTC) /* Vector 82: RTC alarm interrupt */
UNUSED(KINETIS_IRQ_RESVD67) /* Vector 83: Reserved */
VECTOR(kinetis_pitch0, KINETIS_IRQ_PITCH0) /* Vector 84: PIT channel 0 */
VECTOR(kinetis_pitch1, KINETIS_IRQ_PITCH1) /* Vector 85: PIT channel 1 */
VECTOR(kinetis_pitch2, KINETIS_IRQ_PITCH2) /* Vector 86: PIT channel 2 */
VECTOR(kinetis_pitch3, KINETIS_IRQ_PITCH3) /* Vector 87: PIT channel 3 */
VECTOR(kinetis_pdb, KINETIS_IRQ_PDB) /* Vector 88: PDB */
VECTOR(kinetis_usbotg, KINETIS_IRQ_USBOTG) /* Vector 89: USB OTG */
VECTOR(kinetis_usbcd, KINETIS_IRQ_USBCD) /* Vector 90: USB charger detect */
UNUSED(KINETIS_IRQ_RESVD75) /* Vector 91: Reserved */
UNUSED(KINETIS_IRQ_RESVD76) /* Vector 92: Reserved */
UNUSED(KINETIS_IRQ_RESVD77) /* Vector 93: Reserved */
UNUSED(KINETIS_IRQ_RESVD78) /* Vector 94: Reserved */
VECTOR(kinetis_i2s0, KINETIS_IRQ_I2S0) /* Vector 95: I2S0 */
VECTOR(kinetis_sdhc, KINETIS_IRQ_SDHC) /* Vector 96: SDHC */
VECTOR(kinetis_dac0, KINETIS_IRQ_DAC0) /* Vector 97: DAC0 */
VECTOR(kinetis_dac1, KINETIS_IRQ_DAC1) /* Vector 98: DAC1 */
VECTOR(kinetis_tsi, KINETIS_IRQ_TSI) /* Vector 99: TSI all sources */
VECTOR(kinetis_mcg, KINETIS_IRQ_MCG) /* Vector 100: MCG */
VECTOR(kinetis_lpt, KINETIS_IRQ_LPT) /* Vector 101: Low power timer */
VECTOR(kinetis_slcd, KINETIS_IRQ_SLCD) /* Vector 102: Segment LCD all sources */
VECTOR(kinetis_porta, KINETIS_IRQ_PORTA) /* Vector 103: Pin detect port A */
VECTOR(kinetis_portb, KINETIS_IRQ_PORTB) /* Vector 104: Pin detect port B */
VECTOR(kinetis_portc, KINETIS_IRQ_PORTC) /* Vector 105: Pin detect port C */
VECTOR(kinetis_portd, KINETIS_IRQ_PORTD) /* Vector 106: Pin detect port D */
VECTOR(kinetis_porte, KINETIS_IRQ_PORTE) /* Vector 107: Pin detect port E */
UNUSED(KINETIS_IRQ_RESVD92) /* Vector 108: Reserved */
UNUSED(KINETIS_IRQ_RESVD93) /* Vector 109: Reserved */
VECTOR(kinetis_swi, KINETIS_IRQ_SWI) /* Vector 110: Software interrupt */
# endif /* CONFIG_ARMV7M_CMNVECTOR */
#endif /* CONFIG_ARCH_FAMILY_K40 */

156
arch/arm/src/kinetis/chip/kinetis_k60vectors.h
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@ -1,156 +0,0 @@
/************************************************************************************
* arch/arm/src/kinetis/chip/kinetis_k60vectors.h
*
* Copyright (C) 2016 Gregory Nutt. All rights reserved.
* Authors: Gregory Nutt <gnutt@nuttx.org>
* David Sidrane <david_s5@nscdg.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
/************************************************************************************
* Pre-processor definitions
************************************************************************************/
/* This file is included by kinetis_vectors.S. It provides the macro VECTOR that
* supplies ach K60 vector in terms of a (lower-case) ISR label and an
* (upper-case) IRQ number as defined in arch/arm/include/kinetis/kinetis_k60irq.h.
* kinetis_vectors.S will defined the VECTOR in different ways in order to generate
* the interrupt vectors and handlers in their final form.
*/
#if defined(CONFIG_ARCH_FAMILY_K60)
/* If the common ARMv7-M vector handling is used, then all it needs is the following
* definition that provides the number of supported vectors.
*/
# ifdef CONFIG_ARMV7M_CMNVECTOR
/* Reserve interrupt table entries for I/O interrupts. */
# define ARMV7M_PERIPHERAL_INTERRUPTS NR_INTERRUPTS
# else
VECTOR(kinetis_dmach0, KINETIS_IRQ_DMACH0) /* Vector 16: DMA channel 0 transfer complete */
VECTOR(kinetis_dmach1, KINETIS_IRQ_DMACH1) /* Vector 17: DMA channel 1 transfer complete */
VECTOR(kinetis_dmach2, KINETIS_IRQ_DMACH2) /* Vector 18: DMA channel 2 transfer complete */
VECTOR(kinetis_dmach3, KINETIS_IRQ_DMACH3) /* Vector 19: DMA channel 3 transfer complete */
VECTOR(kinetis_dmach4, KINETIS_IRQ_DMACH4) /* Vector 20: DMA channel 4 transfer complete */
VECTOR(kinetis_dmach5, KINETIS_IRQ_DMACH5) /* Vector 21: DMA channel 5 transfer complete */
VECTOR(kinetis_dmach6, KINETIS_IRQ_DMACH6) /* Vector 22: DMA channel 6 transfer complete */
VECTOR(kinetis_dmach7, KINETIS_IRQ_DMACH7) /* Vector 23: DMA channel 7 transfer complete */
VECTOR(kinetis_dmach8, KINETIS_IRQ_DMACH8) /* Vector 24: DMA channel 8 transfer complete */
VECTOR(kinetis_dmach9, KINETIS_IRQ_DMACH9) /* Vector 25: DMA channel 9 transfer complete */
VECTOR(kinetis_dmach10, KINETIS_IRQ_DMACH10) /* Vector 26: DMA channel 10 transfer complete */
VECTOR(kinetis_dmach11, KINETIS_IRQ_DMACH11) /* Vector 27: DMA channel 11 transfer complete */
VECTOR(kinetis_dmach12, KINETIS_IRQ_DMACH12) /* Vector 28: DMA channel 12 transfer complete */
VECTOR(kinetis_dmach13, KINETIS_IRQ_DMACH13) /* Vector 29: DMA channel 13 transfer complete */
VECTOR(kinetis_dmach14, KINETIS_IRQ_DMACH14) /* Vector 30: DMA channel 14 transfer complete */
VECTOR(kinetis_dmach15, KINETIS_IRQ_DMACH15) /* Vector 31: DMA channel 15 transfer complete */
VECTOR(kinetis_dmaerr, KINETIS_IRQ_DMAERR) /* Vector 32: DMA error interrupt channels 0-15 */
VECTOR(kinetis_mcm, KINETIS_IRQ_MCM) /* Vector 33: MCM Normal interrupt */
VECTOR(kinetis_flashcc, KINETIS_IRQ_FLASHCC) /* Vector 34: Flash memory command complete */
VECTOR(kinetis_flashrc, KINETIS_IRQ_FLASHRC) /* Vector 35: Flash memory read collision */
VECTOR(kinetis_smclvd, KINETIS_IRQ_SMCLVD) /* Vector 36: Mode Controller low-voltage detect, low-voltage warning */
VECTOR(kinetis_llwu, KINETIS_IRQ_LLWU) /* Vector 37: LLWU Normal Low Leakage Wakeup */
VECTOR(kinetis_wdog, KINETIS_IRQ_WDOG) /* Vector 38: Watchdog */
VECTOR(kinetis_rngb, KINETIS_IRQ_RNGB) /* Vector 39: Random number generator */
VECTOR(kinetis_i2c0, KINETIS_IRQ_I2C0) /* Vector 40: I2C0 */
VECTOR(kinetis_i2c1, KINETIS_IRQ_I2C1) /* Vector 41: I2C1 */
VECTOR(kinetis_spi0, KINETIS_IRQ_SPI0) /* Vector 42: SPI0 all sources */
VECTOR(kinetis_spi1, KINETIS_IRQ_SPI1) /* Vector 43: SPI1 all sources */
VECTOR(kinetis_spi2, KINETIS_IRQ_SPI2) /* Vector 44: SPI2 all sources */
VECTOR(kinetis_can0mb, KINETIS_IRQ_CAN0MB) /* Vector 45: CAN0 OR'ed Message buffer (0-15) */
VECTOR(kinetis_can0bo, KINETIS_IRQ_CAN0BO) /* Vector 46: CAN0 Bus Off */
VECTOR(kinetis_can0err, KINETIS_IRQ_CAN0ERR) /* Vector 47: CAN0 Error */
VECTOR(kinetis_can0tw, KINETIS_IRQ_CAN0TW) /* Vector 48: CAN0 Transmit Warning */
VECTOR(kinetis_can0rw, KINETIS_IRQ_CAN0RW) /* Vector 49: CAN0 Receive Warning */
VECTOR(kinetis_can0wu, KINETIS_IRQ_CAN0WU) /* Vector 50: CAN0 Wake UP */
UNUSED(KINETIS_IRQ_RESVD35) /* Vector 51: Reserved */
UNUSED(KINETIS_IRQ_RESVD36) /* Vector 52: Reserved */
VECTOR(kinetis_can1mb, KINETIS_IRQ_CAN1MB) /* Vector 53: CAN1 OR'ed Message buffer (0-15) */
VECTOR(kinetis_can1bo, KINETIS_IRQ_CAN1BO) /* Vector 54: CAN1 Bus Off */
VECTOR(kinetis_can1err, KINETIS_IRQ_CAN1ERR) /* Vector 55: CAN1 Error */
VECTOR(kinetis_can1tw, KINETIS_IRQ_CAN1TW) /* Vector 56: CAN1 Transmit Warning */
VECTOR(kinetis_can1rw, KINETIS_IRQ_CAN1RW) /* Vector 57: CAN1 Receive Warning */
VECTOR(kinetis_can1wu, KINETIS_IRQ_CAN1WU) /* Vector 58: CAN1 Wake UP */
UNUSED(KINETIS_IRQ_RESVD43) /* Vector 59: Reserved */
UNUSED(KINETIS_IRQ_RESVD44) /* Vector 60: Reserved */
VECTOR(kinetis_uart0s, KINETIS_IRQ_UART0S) /* Vector 61: UART0 status */
VECTOR(kinetis_uart0e, KINETIS_IRQ_UART0E) /* Vector 62: UART0 error */
VECTOR(kinetis_uart1s, KINETIS_IRQ_UART1S) /* Vector 63: UART1 status */
VECTOR(kinetis_uart1e, KINETIS_IRQ_UART1E) /* Vector 64: UART1 error */
VECTOR(kinetis_uart2s, KINETIS_IRQ_UART2S) /* Vector 65: UART2 status */
VECTOR(kinetis_uart2e, KINETIS_IRQ_UART2E) /* Vector 66: UART2 error */
VECTOR(kinetis_uart3s, KINETIS_IRQ_UART3S) /* Vector 67: UART3 status */
VECTOR(kinetis_uart3e, KINETIS_IRQ_UART3E) /* Vector 68: UART3 error */
VECTOR(kinetis_uart4s, KINETIS_IRQ_UART4S) /* Vector 69: UART4 status */
VECTOR(kinetis_uart4e, KINETIS_IRQ_UART4E) /* Vector 70: UART4 error */
VECTOR(kinetis_uart5s, KINETIS_IRQ_UART5S) /* Vector 71: UART5 status */
VECTOR(kinetis_uart5e, KINETIS_IRQ_UART5E) /* Vector 72: UART5 error */
VECTOR(kinetis_adc0, KINETIS_IRQ_ADC0) /* Vector 73: ADC0 */
VECTOR(kinetis_adc1, KINETIS_IRQ_ADC1) /* Vector 74: ADC1 */
VECTOR(kinetis_cmp0, KINETIS_IRQ_CMP0) /* Vector 75: CMP0 */
VECTOR(kinetis_cmp1, KINETIS_IRQ_CMP1) /* Vector 76: CMP1 */
VECTOR(kinetis_cmp2, KINETIS_IRQ_CMP2) /* Vector 77: CMP2 */
VECTOR(kinetis_ftm0, KINETIS_IRQ_FTM0) /* Vector 78: FTM0 all sources */
VECTOR(kinetis_ftm1, KINETIS_IRQ_FTM1) /* Vector 79: FTM1 all sources */
VECTOR(kinetis_ftm2, KINETIS_IRQ_FTM2) /* Vector 80: FTM2 all sources */
VECTOR(kinetis_cmt, KINETIS_IRQ_CMT) /* Vector 81: CMT */
VECTOR(kinetis_rtc, KINETIS_IRQ_RTC) /* Vector 82: RTC alarm interrupt */
UNUSED(KINETIS_IRQ_RESVD67) /* Vector 83: Reserved */
VECTOR(kinetis_pitch0, KINETIS_IRQ_PITCH0) /* Vector 84: PIT channel 0 */
VECTOR(kinetis_pitch1, KINETIS_IRQ_PITCH1) /* Vector 85: PIT channel 1 */
VECTOR(kinetis_pitch2, KINETIS_IRQ_PITCH2) /* Vector 86: PIT channel 2 */
VECTOR(kinetis_pitch3, KINETIS_IRQ_PITCH3) /* Vector 87: PIT channel 3 */
VECTOR(kinetis_pdb, KINETIS_IRQ_PDB) /* Vector 88: PDB */
VECTOR(kinetis_usbotg, KINETIS_IRQ_USBOTG) /* Vector 89: USB OTG */
VECTOR(kinetis_usbcd, KINETIS_IRQ_USBCD) /* Vector 90: USB charger detect */
VECTOR(kinetis_emactmr, KINETIS_IRQ_EMACTMR) /* Vector 91: Ethernet MAC IEEE 1588 timer interrupt */
VECTOR(kinetis_emactx, KINETIS_IRQ_EMACTX) /* Vector 92: Ethernet MAC transmit interrupt */
VECTOR(kinetis_emacrx, KINETIS_IRQ_EMACRX) /* Vector 93: Ethernet MAC receive interrupt */
VECTOR(kinetis_emacmisc, KINETIS_IRQ_EMACMISC) /* Vector 94: Ethernet MAC error and misc interrupt */
VECTOR(kinetis_i2s0, KINETIS_IRQ_I2S0) /* Vector 95: I2S0 */
VECTOR(kinetis_sdhc, KINETIS_IRQ_SDHC) /* Vector 96: SDHC */
VECTOR(kinetis_dac0, KINETIS_IRQ_DAC0) /* Vector 97: DAC0 */
VECTOR(kinetis_dac1, KINETIS_IRQ_DAC1) /* Vector 98: DAC1 */
VECTOR(kinetis_tsi, KINETIS_IRQ_TSI) /* Vector 99: TSI all sources */
VECTOR(kinetis_mcg, KINETIS_IRQ_MCG) /* Vector 100: MCG */
VECTOR(kinetis_lpt, KINETIS_IRQ_LPT) /* Vector 101: Low power timer */
UNUSED(KINETIS_IRQ_RESVD86) /* Vector 102: Reserved */
VECTOR(kinetis_porta, KINETIS_IRQ_PORTA) /* Vector 103: Pin detect port A */
VECTOR(kinetis_portb, KINETIS_IRQ_PORTB) /* Vector 104: Pin detect port B */
VECTOR(kinetis_portc, KINETIS_IRQ_PORTC) /* Vector 105: Pin detect port C */
VECTOR(kinetis_portd, KINETIS_IRQ_PORTD) /* Vector 106: Pin detect port D */
VECTOR(kinetis_porte, KINETIS_IRQ_PORTE) /* Vector 107: Pin detect port E */
UNUSED(KINETIS_IRQ_RESVD92) /* Vector 108: Reserved */
UNUSED(KINETIS_IRQ_RESVD93) /* Vector 109: Reserved */
VECTOR(kinetis_swi, KINETIS_IRQ_SWI) /* Vector 110: Software interrupt */
# endif /* CONFIG_ARMV7M_CMNVECTOR */
#endif /* CONFIG_ARCH_FAMILY_K60 */

147
arch/arm/src/kinetis/chip/kinetis_k64vectors.h
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@ -1,147 +0,0 @@
/************************************************************************************
* arch/arm/src/kinetis/chip/kinetis_k64vectors.h
*
* Copyright (C) 2016 Gregory Nutt. All rights reserved.
* Authors: Gregory Nutt <gnutt@nuttx.org>
* David Sidrane <david_s5@nscdg.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
/************************************************************************************
* Pre-processor definitions
************************************************************************************/
/* This file is included by kinetis_vectors.S. It provides the macro VECTOR that
* supplies ach K64 vector in terms of a (lower-case) ISR label and an
* (upper-case) IRQ number as defined in arch/arm/include/kinetis/kinetis_k64irq.h.
* kinetis_vectors.S will defined the VECTOR in different ways in order to generate
* the interrupt vectors and handlers in their final form.
*/
#if defined(CONFIG_ARCH_FAMILY_K64)
/* If the common ARMv7-M vector handling is used, then all it needs is the following
* definition that provides the number of supported vectors.
*/
# ifdef CONFIG_ARMV7M_CMNVECTOR
/* Reserve interrupt table entries for I/O interrupts. */
# define ARMV7M_PERIPHERAL_INTERRUPTS NR_INTERRUPTS
# else
VECTOR(kinetis_dmach0, KINETIS_IRQ_DMACH0) /* Vector 16: DMA channel 0 transfer complete */
VECTOR(kinetis_dmach1, KINETIS_IRQ_DMACH1) /* Vector 17: DMA channel 1 transfer complete */
VECTOR(kinetis_dmach2, KINETIS_IRQ_DMACH2) /* Vector 18: DMA channel 2 transfer complete */
VECTOR(kinetis_dmach3, KINETIS_IRQ_DMACH3) /* Vector 19: DMA channel 3 transfer complete */
VECTOR(kinetis_dmach4, KINETIS_IRQ_DMACH4) /* Vector 20: DMA channel 4 transfer complete */
VECTOR(kinetis_dmach5, KINETIS_IRQ_DMACH5) /* Vector 21: DMA channel 5 transfer complete */
VECTOR(kinetis_dmach6, KINETIS_IRQ_DMACH6) /* Vector 22: DMA channel 6 transfer complete */
VECTOR(kinetis_dmach7, KINETIS_IRQ_DMACH7) /* Vector 23: DMA channel 7 transfer complete */
VECTOR(kinetis_dmach8, KINETIS_IRQ_DMACH8) /* Vector 24: DMA channel 8 transfer complete */
VECTOR(kinetis_dmach9, KINETIS_IRQ_DMACH9) /* Vector 25: DMA channel 9 transfer complete */
VECTOR(kinetis_dmach10, KINETIS_IRQ_DMACH10) /* Vector 26: DMA channel 10 transfer complete */
VECTOR(kinetis_dmach11, KINETIS_IRQ_DMACH11) /* Vector 27: DMA channel 11 transfer complete */
VECTOR(kinetis_dmach12, KINETIS_IRQ_DMACH12) /* Vector 28: DMA channel 12 transfer complete */
VECTOR(kinetis_dmach13, KINETIS_IRQ_DMACH13) /* Vector 29: DMA channel 13 transfer complete */
VECTOR(kinetis_dmach14, KINETIS_IRQ_DMACH14) /* Vector 30: DMA channel 14 transfer complete */
VECTOR(kinetis_dmach15, KINETIS_IRQ_DMACH15) /* Vector 31: DMA channel 15 transfer complete */
VECTOR(kinetis_dmaerr, KINETIS_IRQ_DMAERR) /* Vector 32: DMA error interrupt channels 0-15 */
VECTOR(kinetis_mcm, KINETIS_IRQ_MCM) /* Vector 33: MCM Normal interrupt */
VECTOR(kinetis_flashcc, KINETIS_IRQ_FLASHCC) /* Vector 34: Flash memory command complete */
VECTOR(kinetis_flashrc, KINETIS_IRQ_FLASHRC) /* Vector 35: Flash memory read collision */
VECTOR(kinetis_smclvd, KINETIS_IRQ_SMCLVD) /* Vector 36: Mode Controller low-voltage detect, low-voltage warning */
VECTOR(kinetis_llwu, KINETIS_IRQ_LLWU) /* Vector 37: LLWU Normal Low Leakage Wakeup */
VECTOR(kinetis_wdog, KINETIS_IRQ_WDOG) /* Vector 38: Watchdog */
VECTOR(kinetis_rngb, KINETIS_IRQ_RNGB) /* Vector 39: Random number generator */
VECTOR(kinetis_i2c0, KINETIS_IRQ_I2C0) /* Vector 40: I2C0 */
VECTOR(kinetis_i2c1, KINETIS_IRQ_I2C1) /* Vector 41: I2C1 */
VECTOR(kinetis_spi0, KINETIS_IRQ_SPI0) /* Vector 42: SPI0 all sources */
VECTOR(kinetis_spi1, KINETIS_IRQ_SPI1) /* Vector 43: SPI1 all sources */
VECTOR(kinetis_i2s0, KINETIS_IRQ_I2S0) /* Vector 44: Transmit */
VECTOR(kinetis_i2s1, KINETIS_IRQ_I2S1) /* Vector 45: Transmit */
UNUSED(KINETIS_IRQ_RESVD30) /* Vector 46: Reserved */
VECTOR(kinetis_uart0s, KINETIS_IRQ_UART0S) /* Vector 47: UART0 status */
VECTOR(kinetis_uart0e, KINETIS_IRQ_UART0E) /* Vector 48: UART0 error */
VECTOR(kinetis_uart1s, KINETIS_IRQ_UART1S) /* Vector 49: UART1 status */
VECTOR(kinetis_uart1e, KINETIS_IRQ_UART1E) /* Vector 50: UART1 error */
VECTOR(kinetis_uart2s, KINETIS_IRQ_UART2S) /* Vector 51: UART2 status */
VECTOR(kinetis_uart2e, KINETIS_IRQ_UART2E) /* Vector 52: UART2 error */
VECTOR(kinetis_uart3s, KINETIS_IRQ_UART3S) /* Vector 53: UART3 status */
VECTOR(kinetis_uart3e, KINETIS_IRQ_UART3E) /* Vector 54: UART3 error */
VECTOR(kinetis_adc0, KINETIS_IRQ_ADC0) /* Vector 55: ADC0 */
VECTOR(kinetis_cmp0, KINETIS_IRQ_CMP0) /* Vector 56: CMP0 */
VECTOR(kinetis_cmp1, KINETIS_IRQ_CMP1) /* Vector 57: CMP1 */
VECTOR(kinetis_ftm0, KINETIS_IRQ_FTM0) /* Vector 58: FTM0 all sources */
VECTOR(kinetis_ftm1, KINETIS_IRQ_FTM1) /* Vector 59: FTM1 all sources */
VECTOR(kinetis_ftm2, KINETIS_IRQ_FTM2) /* Vector 60: FTM2 all sources */
VECTOR(kinetis_cmt, KINETIS_IRQ_CMT) /* Vector 61: CMT */
VECTOR(kinetis_rtc0, KINETIS_IRQ_RTC) /* Vector 62: RTC alarm interrupt */
VECTOR(kinetis_rtc1, KINETIS_IRQ_RTCS) /* Vector 63: RTC seconds interrupt */
VECTOR(kinetis_pitch0, KINETIS_IRQ_PITCH0) /* Vector 64: PIT channel 0 */
VECTOR(kinetis_pitch1, KINETIS_IRQ_PITCH1) /* Vector 65: PIT channel 1 */
VECTOR(kinetis_pitch2, KINETIS_IRQ_PITCH2) /* Vector 66: PIT channel 2 */
VECTOR(kinetis_pitch3, KINETIS_IRQ_PITCH3) /* Vector 67: PIT channel 3 */
VECTOR(kinetis_pdb, KINETIS_IRQ_PDB) /* Vector 68: PDB */
VECTOR(kinetis_usbotg, KINETIS_IRQ_USBOTG) /* Vector 69: USB OTG */
VECTOR(kinetis_usbcd, KINETIS_IRQ_USBCD) /* Vector 70: USB charger detect */
UNUSED(KINETIS_IRQ_RESVD55) /* Vector 71: Reserved */
VECTOR(kinetis_dac0, KINETIS_IRQ_DAC0) /* Vector 72: DAC0 */
VECTOR(kinetis_mcg, KINETIS_IRQ_MCG) /* Vector 73: MCG */
VECTOR(kinetis_lpt, KINETIS_IRQ_LPT) /* Vector 74: Low power timer */
VECTOR(kinetis_porta, KINETIS_IRQ_PORTA) /* Vector 75: Pin detect port A */
VECTOR(kinetis_portb, KINETIS_IRQ_PORTB) /* Vector 76: Pin detect port B */
VECTOR(kinetis_portc, KINETIS_IRQ_PORTC) /* Vector 77: Pin detect port C */
VECTOR(kinetis_portd, KINETIS_IRQ_PORTD) /* Vector 78: Pin detect port D */
VECTOR(kinetis_porte, KINETIS_IRQ_PORTE) /* Vector 79: Pin detect port E */
VECTOR(kinetis_software, KINETIS_IRQ_SWI) /* Vector 80: Software interrupt */
VECTOR(kinetis_spi2, KINETIS_IRQ_SPI2) /* Vector 81: SPI2 all sources */
VECTOR(kinetis_uart4s, KINETIS_IRQ_UART4S) /* Vector 82: UART4 status */
VECTOR(kinetis_uart4e, KINETIS_IRQ_UART4E) /* Vector 83: UART4 error */
VECTOR(kinetis_uart5s, KINETIS_IRQ_UART5S) /* Vector 84: UART5 status */
VECTOR(kinetis_uart5e, KINETIS_IRQ_UART5E) /* Vector 85: UART5 error */
VECTOR(kinetis_cmp2, KINETIS_IRQ_CMP2) /* Vector 86: CMP2 */
VECTOR(kinetis_ftm3, KINETIS_IRQ_FTM3) /* Vector 87: FTM3 all sources */
VECTOR(kinetis_dac1, KINETIS_IRQ_DAC1) /* Vector 88: DAC1 */
VECTOR(kinetis_adc1, KINETIS_IRQ_ADC1) /* Vector 89: ADC1 */
VECTOR(kinetis_i2c2, KINETIS_IRQ_I2C2) /* Vector 90: I2C2 */
VECTOR(kinetis_can0mb, KINETIS_IRQ_CAN0MB) /* Vector 91: CAN0 ORed Message buffer (0-15) */
VECTOR(kinetis_can0bo, KINETIS_IRQ_CAN0BO) /* Vector 92: CAN0 Bus Off */
VECTOR(kinetis_can0err, KINETIS_IRQ_CAN0ERR) /* Vector 93: CAN0 Error */
VECTOR(kinetis_can0tw, KINETIS_IRQ_CAN0TW) /* Vector 94: CAN0 Transmit Warning */
VECTOR(kinetis_can0rw, KINETIS_IRQ_CAN0RW) /* Vector 95: CAN0 Receive Warning */
VECTOR(kinetis_can0wu, KINETIS_IRQ_CAN0WU) /* Vector 96: CAN0 Wake UP */
VECTOR(kinetis_sdhc, KINETIS_IRQ_SDHC) /* Vector 97: SDHC */
VECTOR(kinetis_emactmr, KINETIS_IRQ_EMACTMR) /* Vector 91: Ethernet MAC IEEE 1588 timer interrupt */
VECTOR(kinetis_emactx, KINETIS_IRQ_EMACTX) /* Vector 92: Ethernet MAC transmit interrupt */
VECTOR(kinetis_emacrx, KINETIS_IRQ_EMACRX) /* Vector 93: Ethernet MAC receive interrupt */
VECTOR(kinetis_emacmisc, KINETIS_IRQ_EMACMISC) /* Vector 94: Ethernet MAC error and misc interrupt */
# endif /* CONFIG_ARMV7M_CMNVECTOR */
#endif /* CONFIG_ARCH_FAMILY_K64 */

162
arch/arm/src/kinetis/chip/kinetis_k66vectors.h
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@ -1,162 +0,0 @@
/************************************************************************************
* arch/arm/src/kinetis/chip/kinetis_k66vectors.h
*
* Copyright (C) 2016 Gregory Nutt. All rights reserved.
* Authors: Gregory Nutt <gnutt@nuttx.org>
* David Sidrane <david_s5@nscdg.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
/************************************************************************************
* Pre-processor definitions
************************************************************************************/
/* This file is included by kinetis_vectors.S. It provides the macro VECTOR that
* supplies ach K66 vector in terms of a (lower-case) ISR label and an
* (upper-case) IRQ number as defined in arch/arm/include/kinetis/kinetis_k66irq.h.
* kinetis_vectors.S will defined the VECTOR in different ways in order to generate
* the interrupt vectors and handlers in their final form.
*/
#if defined(CONFIG_ARCH_FAMILY_K66)
/* If the common ARMv7-M vector handling is used, then all it needs is the following
* definition that provides the number of supported vectors.
*/
# ifdef CONFIG_ARMV7M_CMNVECTOR
/* Reserve interrupt table entries for I/O interrupts. */
# define ARMV7M_PERIPHERAL_INTERRUPTS NR_INTERRUPTS
# else
VECTOR(kinetis_dmach0, KINETIS_IRQ_DMACH0) /* Vector 16: DMA channel 0 transfer complete */
VECTOR(kinetis_dmach1, KINETIS_IRQ_DMACH1) /* Vector 17: DMA channel 1 transfer complete */
VECTOR(kinetis_dmach2, KINETIS_IRQ_DMACH2) /* Vector 18: DMA channel 2 transfer complete */
VECTOR(kinetis_dmach3, KINETIS_IRQ_DMACH3) /* Vector 19: DMA channel 3 transfer complete */
VECTOR(kinetis_dmach4, KINETIS_IRQ_DMACH4) /* Vector 20: DMA channel 4 transfer complete */
VECTOR(kinetis_dmach5, KINETIS_IRQ_DMACH5) /* Vector 21: DMA channel 5 transfer complete */
VECTOR(kinetis_dmach6, KINETIS_IRQ_DMACH6) /* Vector 22: DMA channel 6 transfer complete */
VECTOR(kinetis_dmach7, KINETIS_IRQ_DMACH7) /* Vector 23: DMA channel 7 transfer complete */
VECTOR(kinetis_dmach8, KINETIS_IRQ_DMACH8) /* Vector 24: DMA channel 8 transfer complete */
VECTOR(kinetis_dmach9, KINETIS_IRQ_DMACH9) /* Vector 25: DMA channel 9 transfer complete */
VECTOR(kinetis_dmach10, KINETIS_IRQ_DMACH10) /* Vector 26: DMA channel 10 transfer complete */
VECTOR(kinetis_dmach11, KINETIS_IRQ_DMACH11) /* Vector 27: DMA channel 11 transfer complete */
VECTOR(kinetis_dmach12, KINETIS_IRQ_DMACH12) /* Vector 28: DMA channel 12 transfer complete */
VECTOR(kinetis_dmach13, KINETIS_IRQ_DMACH13) /* Vector 29: DMA channel 13 transfer complete */
VECTOR(kinetis_dmach14, KINETIS_IRQ_DMACH14) /* Vector 30: DMA channel 14 transfer complete */
VECTOR(kinetis_dmach15, KINETIS_IRQ_DMACH15) /* Vector 31: DMA channel 15 transfer complete */
VECTOR(kinetis_dmaerr, KINETIS_IRQ_DMAERR) /* Vector 32: DMA error interrupt channels 0-15 */
VECTOR(kinetis_mcm, KINETIS_IRQ_MCM) /* Vector 33: MCM Normal interrupt */
VECTOR(kinetis_flashcc, KINETIS_IRQ_FLASHCC) /* Vector 34: Flash memory command complete */
VECTOR(kinetis_flashrc, KINETIS_IRQ_FLASHRC) /* Vector 35: Flash memory read collision */
VECTOR(kinetis_smclvd, KINETIS_IRQ_SMCLVD) /* Vector 36: Mode Controller low-voltage detect, low-voltage warning */
VECTOR(kinetis_llwu, KINETIS_IRQ_LLWU) /* Vector 37: LLWU Normal Low Leakage Wakeup */
VECTOR(kinetis_wdog, KINETIS_IRQ_WDOG) /* Vector 38: Watchdog */
VECTOR(kinetis_rngb, KINETIS_IRQ_RNGB) /* Vector 39: Random number generator */
VECTOR(kinetis_i2c0, KINETIS_IRQ_I2C0) /* Vector 40: I2C0 */
VECTOR(kinetis_i2c1, KINETIS_IRQ_I2C1) /* Vector 41: I2C1 */
VECTOR(kinetis_spi0, KINETIS_IRQ_SPI0) /* Vector 42: SPI0 all sources */
VECTOR(kinetis_spi1, KINETIS_IRQ_SPI1) /* Vector 43: SPI1 all sources */
VECTOR(kinetis_i2s0, KINETIS_IRQ_I2S0) /* Vector 44: Transmit */
VECTOR(kinetis_i2s1, KINETIS_IRQ_I2S1) /* Vector 45: Transmit */
UNUSED(KINETIS_IRQ_RESVD30) /* Vector 46: Reserved */
VECTOR(kinetis_uart0s, KINETIS_IRQ_UART0S) /* Vector 47: UART0 status */
VECTOR(kinetis_uart0e, KINETIS_IRQ_UART0E) /* Vector 48: UART0 error */
VECTOR(kinetis_uart1s, KINETIS_IRQ_UART1S) /* Vector 49: UART1 status */
VECTOR(kinetis_uart1e, KINETIS_IRQ_UART1E) /* Vector 50: UART1 error */
VECTOR(kinetis_uart2s, KINETIS_IRQ_UART2S) /* Vector 51: UART2 status */
VECTOR(kinetis_uart2e, KINETIS_IRQ_UART2E) /* Vector 52: UART2 error */
VECTOR(kinetis_uart3s, KINETIS_IRQ_UART3S) /* Vector 53: UART3 status */
VECTOR(kinetis_uart3e, KINETIS_IRQ_UART3E) /* Vector 54: UART3 error */
VECTOR(kinetis_adc0, KINETIS_IRQ_ADC0) /* Vector 55: ADC0 */
VECTOR(kinetis_cmp0, KINETIS_IRQ_CMP0) /* Vector 56: CMP0 */
VECTOR(kinetis_cmp1, KINETIS_IRQ_CMP1) /* Vector 57: CMP1 */
VECTOR(kinetis_ftm0, KINETIS_IRQ_FTM0) /* Vector 58: FTM0 all sources */
VECTOR(kinetis_ftm1, KINETIS_IRQ_FTM1) /* Vector 59: FTM1 all sources */
VECTOR(kinetis_ftm2, KINETIS_IRQ_FTM2) /* Vector 60: FTM2 all sources */
VECTOR(kinetis_cmt, KINETIS_IRQ_CMT) /* Vector 61: CMT */
VECTOR(kinetis_rtc0, KINETIS_IRQ_RTC) /* Vector 62: RTC alarm interrupt */
VECTOR(kinetis_rtc1, KINETIS_IRQ_RTCS) /* Vector 63: RTC seconds interrupt */
VECTOR(kinetis_pitch0, KINETIS_IRQ_PITCH0) /* Vector 64: PIT channel 0 */
VECTOR(kinetis_pitch1, KINETIS_IRQ_PITCH1) /* Vector 65: PIT channel 1 */
VECTOR(kinetis_pitch2, KINETIS_IRQ_PITCH2) /* Vector 66: PIT channel 2 */
VECTOR(kinetis_pitch3, KINETIS_IRQ_PITCH3) /* Vector 67: PIT channel 3 */
VECTOR(kinetis_pdb, KINETIS_IRQ_PDB) /* Vector 68: PDB */
VECTOR(kinetis_usbotg, KINETIS_IRQ_USBOTG) /* Vector 69: USB OTG */
VECTOR(kinetis_usbcd, KINETIS_IRQ_USBCD) /* Vector 70: USB charger detect */
UNUSED(KINETIS_IRQ_RESVD55) /* Vector 71: Reserved */
VECTOR(kinetis_dac0, KINETIS_IRQ_DAC0) /* Vector 72: DAC0 */
VECTOR(kinetis_mcg, KINETIS_IRQ_MCG) /* Vector 73: MCG */
VECTOR(kinetis_lpt, KINETIS_IRQ_LPT) /* Vector 74: Low power timer */
VECTOR(kinetis_porta, KINETIS_IRQ_PORTA) /* Vector 75: Pin detect port A */
VECTOR(kinetis_portb, KINETIS_IRQ_PORTB) /* Vector 76: Pin detect port B */
VECTOR(kinetis_portc, KINETIS_IRQ_PORTC) /* Vector 77: Pin detect port C */
VECTOR(kinetis_portd, KINETIS_IRQ_PORTD) /* Vector 78: Pin detect port D */
VECTOR(kinetis_porte, KINETIS_IRQ_PORTE) /* Vector 79: Pin detect port E */
VECTOR(kinetis_software, KINETIS_IRQ_SWI) /* Vector 80: Software interrupt */
VECTOR(kinetis_spi2, KINETIS_IRQ_SPI2) /* Vector 81: SPI2 all sources */
VECTOR(kinetis_uart4s, KINETIS_IRQ_UART4S) /* Vector 82: UART4 status */
VECTOR(kinetis_uart4e, KINETIS_IRQ_UART4E) /* Vector 83: UART4 error */
UNUSED(KINETIS_IRQ_RESVD68) /* Vector 84: Reserved */
UNUSED(KINETIS_IRQ_RESVD69) /* Vector 85: Reserved */
VECTOR(kinetis_cmp2, KINETIS_IRQ_CMP2) /* Vector 86: CMP2 */
VECTOR(kinetis_ftm3, KINETIS_IRQ_FTM3) /* Vector 87: FTM3 all sources */
VECTOR(kinetis_dac1, KINETIS_IRQ_DAC1) /* Vector 88: DAC1 */
VECTOR(kinetis_adc1, KINETIS_IRQ_ADC1) /* Vector 89: ADC1 */
VECTOR(kinetis_i2c2, KINETIS_IRQ_I2C2) /* Vector 90: I2C2 */
VECTOR(kinetis_can0mb, KINETIS_IRQ_CAN0MB) /* Vector 91: CAN0 ORed Message buffer (0-15) */
VECTOR(kinetis_can0bo, KINETIS_IRQ_CAN0BO) /* Vector 92: CAN0 Bus Off */
VECTOR(kinetis_can0err, KINETIS_IRQ_CAN0ERR) /* Vector 93: CAN0 Error */
VECTOR(kinetis_can0tw, KINETIS_IRQ_CAN0TW) /* Vector 94: CAN0 Transmit Warning */
VECTOR(kinetis_can0rw, KINETIS_IRQ_CAN0RW) /* Vector 95: CAN0 Receive Warning */
VECTOR(kinetis_can0wu, KINETIS_IRQ_CAN0WU) /* Vector 96: CAN0 Wake UP */
VECTOR(kinetis_sdhc, KINETIS_IRQ_SDHC) /* Vector 97: SDHC */
VECTOR(kinetis_emactmr, KINETIS_IRQ_EMACTMR) /* Vector 98: Ethernet MAC IEEE 1588 timer interrupt */
VECTOR(kinetis_emactx, KINETIS_IRQ_EMACTX) /* Vector 99: Ethernet MAC transmit interrupt */
VECTOR(kinetis_emacrx, KINETIS_IRQ_EMACRX) /* Vector 100: Ethernet MAC receive interrupt */
VECTOR(kinetis_emacmisc, KINETIS_IRQ_EMACMISC) /* Vector 101: Ethernet MAC error and misc interrupt */
VECTOR(kinetis_lpuart0, KINETIS_IRQ_LPUART0) /* Vector 102: LPUART0 Status and error */
VECTOR(kinetis_tsi0, KINETIS_IRQ_TSI0) /* Vector 103: TSI0 */
VECTOR(kinetis_tpm1, KINETIS_IRQ_TPM1) /* Vector 104: TPM1 */
VECTOR(kinetis_tpm2, KINETIS_IRQ_TPM2) /* Vector 105: TPM2 */
VECTOR(kinetis_usbhsdcd,KINETIS_IRQ_USBHSDCD) /* Vector 106: shared by USBHS DCD & USBHS Phy modules */
VECTOR(kinetis_i2c3, KINETIS_IRQ_I2C3) /* Vector 107: I2C3 */
VECTOR(kinetis_cmp3, KINETIS_IRQ_CMP3) /* Vector 108: CMP3 */
VECTOR(kinetis_usbhsotg,KINETIS_IRQ_USBHSOTG) /* Vector 109: USBHS OTG*/
VECTOR(kinetis_can1mb, KINETIS_IRQ_CAN1MB) /* Vector 110: CAN1 OR'ed Message buffer (0-15) */
VECTOR(kinetis_can1bo, KINETIS_IRQ_CAN1BO) /* Vector 111: CAN1 Bus Off */
VECTOR(kinetis_can1err, KINETIS_IRQ_CAN1ERR ) /* Vector 112: CAN1 Error */
VECTOR(kinetis_can1tw, KINETIS_IRQ_CAN1TW) /* Vector 113: CAN1 Transmit Warning */
VECTOR(kinetis_can1rw, KINETIS_IRQ_CAN1RW) /* Vector 114: CAN1 Receive Warning */
VECTOR(kinetis_can1wu, KINETIS_IRQ_CAN1WU) /* Vector 115: CAN1 Wake UP */
# endif /* CONFIG_ARMV7M_CMNVECTOR */
#endif /* CONFIG_ARCH_FAMILY_K66 */

16
arch/arm/src/kinetis/kinetis_start.c
View file

@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/kinetis/kinetis_start.c
*
* Copyright (C) 2011-2012 Gregory Nutt. All rights reserved.
* Copyright (C) 2011-2012, 2018 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -89,11 +89,14 @@ static void go_os_start(void *pv, unsigned int nbytes)
* start of heap. NOTE that the ARM uses a decrement before
* store stack so that the correct initial value is the end of
* the stack + 4;
* 0x2002:ffff - End of internal SRAM and end of heap (a
* 0x2002:ffff - End of internal SRAM and end of heap.
*
* NOTE: ARM EABI requires 64 bit stack alignment.
*/
#define IDLE_STACK ((uintptr_t)&_ebss+CONFIG_IDLETHREAD_STACKSIZE-4)
#define HEAP_BASE ((uintptr_t)&_ebss+CONFIG_IDLETHREAD_STACKSIZE)
#define IDLE_STACKSIZE (CONFIG_IDLETHREAD_STACKSIZE & ~7)
#define IDLE_STACK ((uintptr_t)&_ebss + IDLE_STACKSIZE)
#define HEAP_BASE ((uintptr_t)&_ebss + IDLE_STACKSIZE)
/****************************************************************************
* Public Data
@ -108,9 +111,8 @@ static void go_os_start(void *pv, unsigned int nbytes)
* g_idle_topstack is a read-only variable the provides this computed
* address.
*/
#if defined(CONFIG_ARMV7M_CMNVECTOR)
const uintptr_t g_idle_topstack = HEAP_BASE;
#endif
/****************************************************************************
* Private Data
@ -155,7 +157,7 @@ void __start(void) __attribute__ ((no_instrument_function));
****************************************************************************/
#ifdef CONFIG_ARCH_FPU
#if defined(CONFIG_ARMV7M_CMNVECTOR) && !defined(CONFIG_ARMV7M_LAZYFPU)
#ifndef CONFIG_ARMV7M_LAZYFPU
static inline void kinetis_fpuconfig(void)
{

18
arch/arm/src/kinetis/kinetis_start.h
View file

@ -1,7 +1,7 @@
/************************************************************************************
* arch/arm/src/kinetis/kinetis_start.h
*
* Copyright (C) 2017 Gregory Nutt. All rights reserved.
* Copyright (C) 2017-2018 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -42,6 +42,22 @@
#include <nuttx/config.h>
/************************************************************************************
* Public Data
************************************************************************************/
/* g_idle_topstack: _sbss is the start of the BSS region as defined by the
* linker script. _ebss lies at the end of the BSS region. The idle task
* stack starts at the end of BSS and is of size CONFIG_IDLETHREAD_STACKSIZE.
* The IDLE thread is the thread that the system boots on and, eventually,
* becomes the IDLE, do nothing task that runs only when there is nothing
* else to run. The heap continues from there until the end of memory.
* g_idle_topstack is a read-only variable the provides this computed
* address.
*/
extern const uintptr_t g_idle_topstack;
/************************************************************************************
* Public Function Prototypes
************************************************************************************/

518
arch/arm/src/kinetis/kinetis_vectors.S
View file

@ -1,518 +0,0 @@
/*****************************************************************************
* arch/arm/src/kinetis/kinetis_vectors.S
*
* Copyright (C) 2011, 2013-2016 Gregory Nutt. All rights reserved.
* Authors: Gregory Nutt <gnutt@nuttx.org>
* David Sidrane <david_s5@nscdg.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/*****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <arch/irq.h>
#include "chip.h"
#include "exc_return.h"
/*****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Configuration ************************************************************/
#ifdef CONFIG_ARCH_HIPRI_INTERRUPT
/* In kernel mode without an interrupt stack, this interrupt handler will set the
* MSP to the stack pointer of the interrupted thread. If the interrupted thread
* was a privileged thread, that will be the MSP otherwise it will be the PSP. If
* the PSP is used, then the value of the MSP will be invalid when the interrupt
* handler returns because it will be a pointer to an old position in the
* unprivileged stack. Then when the high priority interrupt occurs and uses this
* stale MSP, there will most likely be a system failure.
*
* If the interrupt stack is selected, on the other hand, then the interrupt
* handler will always set the MSP to the interrupt stack. So when the high
* priority interrupt occurs, it will either use the MSP of the last privileged
* thread to run or, in the case of the nested interrupt, the interrupt stack if
* no privileged task has run.
*/
# if defined(CONFIG_BUILD_PROTECTED) && CONFIG_ARCH_INTERRUPTSTACK < 4
# error Interrupt stack must be used with high priority interrupts in kernel mode
# endif
/* Use the BASEPRI to control interrupts is required if nested, high
* priority interrupts are supported.
*/
# ifndef CONFIG_ARMV7M_USEBASEPRI
# error CONFIG_ARMV7M_USEBASEPRI must be used with CONFIG_ARCH_HIPRI_INTERRUPT
# endif
#endif
/* Memory Map ***********************************************************************/
/*
* 0x0000:0000 - Beginning of FLASH. Address of vectors
* 0x1800:0000 - Start of CPU SRAM and start of .data (_sdata)
* - End of .data (_edata) and start of .bss (_sbss)
* - End of .bss (_ebss) and bottom of idle stack
* - _ebss + CONFIG_IDLETHREAD_STACKSIZE = end of idle stack, start of heap. NOTE
* that the ARM uses a decrement before store stack so that the correct initial
* value is the end of the stack + 4;
* - Heap ends at the configured end of SRAM.
*/
#define IDLE_STACK (_ebss+CONFIG_IDLETHREAD_STACKSIZE-4)
#define HEAP_BASE (_ebss+CONFIG_IDLETHREAD_STACKSIZE)
/************************************************************************************
* Public Symbols
************************************************************************************/
.syntax unified
.thumb
.file "kinetis_vectors.S"
/* Check if common ARMv7 interrupt vectoring is used (see arch/arm/src/armv7-m/up_vectors.S) */
#ifndef CONFIG_ARMV7M_CMNVECTOR
.globl __start
/************************************************************************************
* Macros
************************************************************************************/
/* On entry into an IRQ, the hardware automatically saves the xPSR, PC, LR, R12, R0-R3
* registers on the stack, then branches to an instantantiation of the following
* macro. This macro simply loads the IRQ number into R0, then jumps to the common
* IRQ handling logic.
*/
.macro HANDLER, label, irqno
.thumb_func
\label:
mov r0, #\irqno
b exception_common
.endm
/************************************************************************************
* Vectors
************************************************************************************/
.section .vectors, "ax"
.code 16
.align 2
.globl _vectors
.type _vectors, function
_vectors:
/* Processor Exceptions */
.word IDLE_STACK /* Vector 0: Reset stack pointer */
.word __start /* Vector 1: Reset vector */
.word kinetis_nmi /* Vector 2: Non-Maskable Interrupt (NMI) */
.word kinetis_hardfault /* Vector 3: Hard fault */
.word kinetis_mpu /* Vector 4: Memory management (MPU) */
.word kinetis_busfault /* Vector 5: Bus fault */
.word kinetis_usagefault /* Vector 6: Usage fault */
.word kinetis_reserved /* Vector 7: Reserved */
.word kinetis_reserved /* Vector 8: Reserved */
.word kinetis_reserved /* Vector 9: Reserved */
.word kinetis_reserved /* Vector 10: Reserved */
.word kinetis_svcall /* Vector 11: SVC call */
.word kinetis_dbgmonitor /* Vector 12: Debug monitor */
.word kinetis_reserved /* Vector 13: Reserved */
.word kinetis_pendsv /* Vector 14: Pendable system service request */
.word kinetis_systick /* Vector 15: System tick */
/* External Interrupts */
#if !defined(CONFIG_KINETIS_NOEXT_VECTORS)
#undef VECTOR
#define VECTOR(l,i) .word l
#undef UNUSED
#define UNUSED(i) .word kinetis_reserved
#if defined(CONFIG_ARCH_FAMILY_K20)
# include "chip/kinetis_k20vectors.h"
#elif defined(CONFIG_ARCH_FAMILY_K28)
# include "chip/kinetis_k28vectors.h"
#elif defined(CONFIG_ARCH_FAMILY_K40)
# include "chip/kinetis_k40vectors.h"
#elif defined(CONFIG_ARCH_FAMILY_K60)
# include "chip/kinetis_k60vectors.h"
#elif defined(CONFIG_ARCH_FAMILY_K64)
# include "chip/kinetis_k64vectors.h"
#elif defined(CONFIG_ARCH_FAMILY_K66)
# include "chip/kinetis_k66vectors.h"
#else
# error "No vectors for Kinetis chip"
#endif
#endif /* CONFIG_KINETIS_NOEXT_VECTORS */
.size _vectors, .-_vectors
/************************************************************************************
* .text
************************************************************************************/
.text
.type handlers, function
.thumb_func
handlers:
HANDLER kinetis_reserved, KINETIS_IRQ_RESERVED /* Unexpected/reserved vector */
HANDLER kinetis_nmi, KINETIS_IRQ_NMI /* Vector 2: Non-Maskable Interrupt (NMI) */
HANDLER kinetis_hardfault, KINETIS_IRQ_HARDFAULT /* Vector 3: Hard fault */
HANDLER kinetis_mpu, KINETIS_IRQ_MEMFAULT /* Vector 4: Memory management (MPU) */
HANDLER kinetis_busfault, KINETIS_IRQ_BUSFAULT /* Vector 5: Bus fault */
HANDLER kinetis_usagefault, KINETIS_IRQ_USAGEFAULT /* Vector 6: Usage fault */
HANDLER kinetis_svcall, KINETIS_IRQ_SVCALL /* Vector 11: SVC call */
HANDLER kinetis_dbgmonitor, KINETIS_IRQ_DBGMONITOR /* Vector 12: Debug Monitor */
HANDLER kinetis_pendsv, KINETIS_IRQ_PENDSV /* Vector 14: Penable system service request */
HANDLER kinetis_systick, KINETIS_IRQ_SYSTICK /* Vector 15: System tick */
#if !defined(CONFIG_KINETIS_NOEXT_VECTORS)
#undef VECTOR
#define VECTOR(l,i) HANDLER l, i
#undef UNUSED
#define UNUSED(i)
#if defined(CONFIG_ARCH_FAMILY_K20)
# include "chip/kinetis_k20vectors.h"
#elif defined(CONFIG_ARCH_FAMILY_K28)
# include "chip/kinetis_k28vectors.h"
#elif defined(CONFIG_ARCH_FAMILY_K40)
# include "chip/kinetis_k40vectors.h"
#elif defined(CONFIG_ARCH_FAMILY_K60)
# include "chip/kinetis_k60vectors.h"
#elif defined(CONFIG_ARCH_FAMILY_K64)
# include "chip/kinetis_k64vectors.h"
#elif defined(CONFIG_ARCH_FAMILY_K66)
# include "chip/kinetis_k66vectors.h"
#else
# error "No vectors for Kinetis chip"
#endif
#endif /* CONFIG_KINETIS_NOEXT_VECTORS */
/* Common IRQ handling logic. On entry here, the return stack is on either
* the PSP or the MSP and looks like the following:
*
* REG_XPSR
* REG_R15
* REG_R14
* REG_R12
* REG_R3
* REG_R2
* REG_R1
* MSP->REG_R0
*
* And
* R0 contains the IRQ number
* R14 Contains the EXC_RETURN value
* We are in handler mode and the current SP is the MSP
*/
.globl exception_common
.type exception_common, function
exception_common:
/* Complete the context save */
#ifdef CONFIG_BUILD_PROTECTED
/* The EXC_RETURN value will be 0xfffffff9 (privileged thread) or 0xfffffff1
* (handler mode) if the stack is on the MSP. It can only be on the PSP if
* EXC_RETURN is 0xfffffffd (unprivileged thread)
*/
tst r14, #EXC_RETURN_PROCESS_STACK /* nonzero if context on process stack */
beq 1f /* Branch if context already on the MSP */
mrs r1, psp /* R1=The process stack pointer (PSP) */
mov sp, r1 /* Set the MSP to the PSP */
1:
#endif
/* r1 holds the value of the stack pointer AFTER the exception handling logic
* pushed the various registers onto the stack. Get r2 = the value of the
* stack pointer BEFORE the interrupt modified it.
*/
mov r2, sp /* R2=Copy of the main/process stack pointer */
add r2, #HW_XCPT_SIZE /* R2=MSP/PSP before the interrupt was taken */
#ifdef CONFIG_ARMV7M_USEBASEPRI
mrs r3, basepri /* R3=Current BASEPRI setting */
#else
mrs r3, primask /* R3=Current PRIMASK setting */
#endif
#ifdef CONFIG_ARCH_FPU
/* Skip over the block of memory reserved for floating pointer register save.
* Lazy FPU register saving is used. FPU registers will be saved in this
* block only if a context switch occurs (this means, of course, that the FPU
* cannot be used in interrupt processing).
*/
sub sp, #(4*SW_FPU_REGS)
#endif
/* Save the remaining registers on the stack after the registers pushed
* by the exception handling logic. r2=SP and r3=primask or basepri, r4-r11,
* r14=register values.
*/
#ifdef CONFIG_BUILD_PROTECTED
stmdb sp!, {r2-r11,r14} /* Save the remaining registers plus the SP value */
#else
stmdb sp!, {r2-r11} /* Save the remaining registers plus the SP value */
#endif
#ifndef CONFIG_ARCH_HIPRI_INTERRUPT
/* Disable interrupts, select the stack to use for interrupt handling
* and call up_doirq to handle the interrupt
*/
cpsid i /* Disable further interrupts */
#else
/* Set the BASEPRI register so that further normal interrupts will be
* masked. Nested, high priority may still occur, however.
*/
mov r2, #NVIC_SYSH_DISABLE_PRIORITY
msr basepri, r2 /* Set the BASEPRI */
#endif
/* There are two arguments to up_doirq:
*
* R0 = The IRQ number
* R1 = The top of the stack points to the saved state
*/
mov r1, sp
/* Also save the top of the stack in a preserved register */
mov r4, sp
#if CONFIG_ARCH_INTERRUPTSTACK > 7
/* If CONFIG_ARCH_INTERRUPTSTACK is defined, we will set the MSP to use
* a special special interrupt stack pointer. The way that this is done
* here prohibits nested interrupts without some additional logic!
*/
ldr sp, =g_intstackbase
#else
/* Otherwise, we will re-use the interrupted thread's stack. That may
* mean using either MSP or PSP stack for interrupt level processing (in
* kernel mode).
*/
bic r2, r4, #7 /* Get the stack pointer with 8-byte alignment */
mov sp, r2 /* Instantiate the aligned stack */
#endif
bl up_doirq /* R0=IRQ, R1=register save (msp) */
mov r1, r4 /* Recover R1=main stack pointer */
/* On return from up_doirq, R0 will hold a pointer to register context
* array to use for the interrupt return. If that return value is the same
* as current stack pointer, then things are relatively easy.
*/
cmp r0, r1 /* Context switch? */
beq 2f /* Branch if no context switch */
/* We are returning with a pending context switch.
*
* If the FPU is enabled, then we will need to restore FPU registers.
* This is not done in normal interrupt save/restore because the cost
* is prohibitive. This is only done when switching contexts. A
* consequence of this is that floating point operations may not be
* performed in interrupt handling logic.
*
* Here:
* r0 = Address of the register save area
*
* NOTE: It is a requirement that up_restorefpu() preserve the value of
* r0!
*/
#ifdef CONFIG_ARCH_FPU
bl up_restorefpu /* Restore the FPU registers */
#endif
/* We are returning with a pending context switch. This case is different
* because in this case, the register save structure does not lie in the
* stack but, rather, within a TCB structure. We'll have to copy some
* values to the stack.
*/
add r1, r0, #SW_XCPT_SIZE /* R1=Address of HW save area in reg array */
ldmia r1, {r4-r11} /* Fetch eight registers in HW save area */
ldr r1, [r0, #(4*REG_SP)] /* R1=Value of SP before interrupt */
stmdb r1!, {r4-r11} /* Store eight registers in HW save area */
#ifdef CONFIG_BUILD_PROTECTED
ldmia r0, {r2-r11,r14} /* Recover R4-R11, r14 + 2 temp values */
#else
ldmia r0, {r2-r11} /* Recover R4-R11 + 2 temp values */
#endif
b 3f /* Re-join common logic */
/* We are returning with no context switch. We simply need to "unwind"
* the same stack frame that we created
*
* Here:
* r1 = Address of the return stack (same as r0)
*/
2:
#ifdef CONFIG_BUILD_PROTECTED
ldmia r1!, {r2-r11,r14} /* Recover R4-R11, r14 + 2 temp values */
#else
ldmia r1!, {r2-r11} /* Recover R4-R11 + 2 temp values */
#endif
#ifdef CONFIG_ARCH_FPU
/* Skip over the block of memory reserved for floating pointer register
* save. Then R1 is the address of the HW save area
*/
add r1, #(4*SW_FPU_REGS)
#endif
/* Set up to return from the exception
*
* Here:
* r1 = Address on the target thread's stack position at the start of
* the registers saved by hardware
* r3 = primask or basepri
* r4-r11 = restored register values
*/
3:
#ifdef CONFIG_BUILD_PROTECTED
/* The EXC_RETURN value will be 0xfffffff9 (privileged thread) or 0xfffffff1
* (handler mode) if the stack is on the MSP. It can only be on the PSP if
* EXC_RETURN is 0xfffffffd (unprivileged thread)
*/
mrs r2, control /* R2=Contents of the control register */
tst r14, #EXC_RETURN_PROCESS_STACK /* nonzero if context on process stack */
beq 4f /* Branch if privileged */
orr r2, r2, #1 /* Unprivileged mode */
msr psp, r1 /* R1=The process stack pointer */
b 5f
4:
bic r2, r2, #1 /* Privileged mode */
msr msp, r1 /* R1=The main stack pointer */
5:
msr control, r2 /* Save the updated control register */
#else
msr msp, r1 /* Recover the return MSP value */
/* Preload r14 with the special return value first (so that the return
* actually occurs with interrupts still disabled).
*/
ldr r14, =EXC_RETURN_PRIVTHR /* Load the special value */
#endif
/* Restore the interrupt state */
#ifdef CONFIG_ARMV7M_USEBASEPRI
msr basepri, r3 /* Restore interrupts priority masking */
#ifndef CONFIG_ARCH_HIPRI_INTERRUPT
cpsie i /* Re-enable interrupts */
#endif
#else
msr primask, r3 /* Restore interrupts */
#endif
/* Always return with R14 containing the special value that will: (1)
* return to thread mode, and (2) continue to use the MSP
*/
bx r14 /* And return */
.size handlers, .-handlers
/************************************************************************************
* Name: g_intstackalloc/g_intstackbase
*
* Description:
* Shouldn't happen
*
************************************************************************************/
#if CONFIG_ARCH_INTERRUPTSTACK > 7
.bss
.global g_intstackalloc
.global g_intstackbase
.align 8
g_intstackalloc:
.skip ((CONFIG_ARCH_INTERRUPTSTACK + 4) & ~7)
g_intstackbase:
.size g_intstackalloc, .-g_intstackalloc
#endif
#endif /* CONFIG_ARMV7M_CMNVECTOR */
/************************************************************************************
* .rodata
************************************************************************************/
.section .rodata, "a"
/* Variables: _sbss is the start of the BSS region (see ld.script) _ebss is the end
* of the BSS regsion (see ld.script). The idle task stack starts at the end of BSS
* and is of size CONFIG_IDLETHREAD_STACKSIZE. The IDLE thread is the thread that
* the system boots on and, eventually, becomes the idle, do nothing task that runs
* only when there is nothing else to run. The heap continues from there until the
* end of memory. See g_idle_topstack below.
*/
.globl g_idle_topstack
.type g_idle_topstack, object
g_idle_topstack:
.word HEAP_BASE
.size g_idle_topstack, .-g_idle_topstack
.end

15
arch/arm/src/lpc17xx/Make.defs
View file

@ -35,11 +35,7 @@
# The start-up, "head", file
ifeq ($(CONFIG_ARMV7M_CMNVECTOR),y)
HEAD_ASRC =
else
HEAD_ASRC = lpc17_vectors.S
endif
# Common ARM and Cortex-M3 files
@ -93,12 +89,7 @@ endif
endif
ifeq ($(CONFIG_ARCH_FPU),y)
CMN_ASRCS += up_fpu.S
ifneq ($(CONFIG_ARMV7M_CMNVECTOR),y)
CMN_CSRCS += up_copyarmstate.c
else ifeq ($(CONFIG_ARMV7M_LAZYFPU),y)
CMN_CSRCS += up_copyarmstate.c
endif
CMN_ASRCS += up_fpu.S up_copyarmstate.c
endif
# Required LPC17xx files
@ -119,10 +110,6 @@ ifneq ($(CONFIG_SCHED_TICKLESS),y)
CHIP_CSRCS += lpc17_timerisr.c
endif
ifeq ($(CONFIG_ARMV7M_CMNVECTOR),y)
CHIP_ASRCS += lpc17_vectors.S
endif
ifeq ($(CONFIG_BUILD_PROTECTED),y)
CHIP_CSRCS += lpc17_userspace.c lpc17_mpuinit.c
endif

49
arch/arm/src/lpc17xx/chip.h
View file

@ -1,7 +1,7 @@
/************************************************************************************
* arch/arm/src/lpc17xx/chip.h
*
* Copyright (C) 2010-2011, 2013 Gregory Nutt. All rights reserved.
* Copyright (C) 2010-2011, 2013, 2018 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -47,29 +47,9 @@
#include <arch/lpc17xx/chip.h>
/* If the common ARMv7-M vector handling logic is used, then include the
* required vector definitions as well.
*/
/* Include the chip interrupt definition file */
#ifdef CONFIG_ARMV7M_CMNVECTOR
# if defined(LPC176x)
# include "chip/lpc176x_vectors.h"
# elif defined(LPC178x)
# include "chip/lpc178x_vectors.h"
# else
# error "No vector file for this LPC17xx family"
# endif
#endif
/* Vector Table Offset Register (VECTAB). Redefine the mask defined in
* arch/arm/src/armv7-m/nvic.h; The LPC178x/7x User manual definitions
* do not match the ARMv7M field definitions. Any bits set above bit
* 29 would be an error and apparently the register wants 8- not 6-bit
* alignment.
*/
#undef NVIC_VECTAB_TBLOFF_MASK
#define NVIC_VECTAB_TBLOFF_MASK (0x3fffff00)
#include <arch/lpc17xx/irq.h>
/* Include the memory map file. Other chip hardware files should then include
* this file for the proper setup.
@ -81,16 +61,21 @@
* Pre-processor Definitions
************************************************************************************/
/************************************************************************************
* Public Types
************************************************************************************/
/* Provide the required number of peripheral interrupt vector definitions as well.
* The definition LPC17_IRQ_NEXTINT simply comes from the chip-specific IRQ header
* file included by arch/lpc17xx/irq.h.
*/
/************************************************************************************
* Public Data
************************************************************************************/
#define ARMV7M_PERIPHERAL_INTERRUPTS LPC17_IRQ_NEXTINT
/************************************************************************************
* Public Functions
************************************************************************************/
/* Vector Table Offset Register (VECTAB). Redefine the mask defined in
* arch/arm/src/armv7-m/nvic.h; The LPC178x/7x User manual definitions
* do not match the ARMv7M field definitions. Any bits set above bit
* 29 would be an error and apparently the register wants 8- not 6-bit
* alignment.
*/
#undef NVIC_VECTAB_TBLOFF_MASK
#define NVIC_VECTAB_TBLOFF_MASK (0x3fffff00)
#endif /* __ARCH_ARM_SRC_LPC17XX_CHIP_H */

110
arch/arm/src/lpc17xx/chip/lpc176x_vectors.h
View file

@ -1,110 +0,0 @@
/********************************************************************************
* arch/arm/src/lpc17xx/chip/lpc176x_vectors.h
*
* Copyright (C) 2010-2011, 2013 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
********************************************************************************/
/********************************************************************************
* Included Files
********************************************************************************/
/********************************************************************************
* Pre-processor Definitions
********************************************************************************/
/* This file is included by lpc17_vectors.S. It provides the macro VECTOR that
* supplies each LPC17xx vector in terms of a (lower-case) ISR label and an
* (upper-case) IRQ number as defined in arch/arm/include/lpc17/lpc17xx_irq.h.
* lpc17_vectors.S will defined the VECTOR in different ways in order to generate
* the interrupt vectors and handlers in their final form.
*/
/* If the common ARMv7-M vector handling is used, then all it needs is the following
* definition that provides the number of supported vectors.
*/
#ifdef CONFIG_ARMV7M_CMNVECTOR
/* Reserve 35 interrupt table entries for I/O interrupts. */
# define ARMV7M_PERIPHERAL_INTERRUPTS 35
#else
VECTOR(lpc17_wdt, LPC17_IRQ_WDT) /* Vector 16+0: Watchdog timer */
VECTOR(lpc17_tmr0, LPC17_IRQ_TMR0) /* Vector 16+1: Timer 0 */
VECTOR(lpc17_tmr1, LPC17_IRQ_TMR1) /* Vector 16+2: Timer 1 */
VECTOR(lpc17_tmr2, LPC17_IRQ_TMR2) /* Vector 16+3: Timer 2 */
VECTOR(lpc17_tmr3, LPC17_IRQ_TMR3) /* Vector 16+4: Timer 3 */
VECTOR(lpc17_uart0, LPC17_IRQ_UART0) /* Vector 16+5: UART 0 */
VECTOR(lpc17_uart1, LPC17_IRQ_UART1) /* Vector 16+6: UART 1 */
VECTOR(lpc17_uart2, LPC17_IRQ_UART2) /* Vector 16+7: UART 2 */
VECTOR(lpc17_uart3, LPC17_IRQ_UART3) /* Vector 16+8: UART 3 */
VECTOR(lpc17_pwm1, LPC17_IRQ_PWM1) /* Vector 16+9: PWM 1 */
VECTOR(lpc17_i2c0, LPC17_IRQ_I2C0) /* Vector 16+10: I2C 0 */
VECTOR(lpc17_i2c1, LPC17_IRQ_I2C1) /* Vector 16+11: I2C 1 */
VECTOR(lpc17_i2c2, LPC17_IRQ_I2C2) /* Vector 16+12: I2C 2 */
VECTOR(lpc17_spif, LPC17_IRQ_SPIF) /* Vector 16+13: SPI */
VECTOR(lpc17_ssp0, LPC17_IRQ_SSP0) /* Vector 16+14: SSP 0 */
VECTOR(lpc17_ssp1, LPC17_IRQ_SSP1) /* Vector 16+15: SSP 1 */
VECTOR(lpc17_pll0, LPC17_IRQ_PLL0) /* Vector 16+16: PLL 0 */
VECTOR(lpc17_rtc, LPC17_IRQ_RTC) /* Vector 16+17: Real time clock */
VECTOR(lpc17_eint0, LPC17_IRQ_EINT0) /* Vector 16+18: External interrupt 0 */
VECTOR(lpc17_eint1, LPC17_IRQ_EINT1) /* Vector 16+19: External interrupt 1 */
VECTOR(lpc17_eint2, LPC17_IRQ_EINT2) /* Vector 16+20: External interrupt 2 */
VECTOR(lpc17_eint3, LPC17_IRQ_EINT3) /* Vector 16+21: External interrupt 3 */
VECTOR(lpc17_adc, LPC17_IRQ_ADC) /* Vector 16+22: A/D Converter */
VECTOR(lpc17_bod, LPC17_IRQ_BOD) /* Vector 16+23: Brown Out detect */
VECTOR(lpc17_usb, LPC17_IRQ_USB) /* Vector 16+24: USB */
VECTOR(lpc17_can, LPC17_IRQ_CAN) /* Vector 16+25: CAN */
VECTOR(lpc17_gpdma, LPC17_IRQ_GPDMA) /* Vector 16+26: GPDMA */
VECTOR(lpc17_i2s, LPC17_IRQ_I2S) /* Vector 16+27: I2S */
VECTOR(lpc17_eth, LPC17_IRQ_ETH) /* Vector 16+28: Ethernet */
VECTOR(lpc17_ritint, LPC17_IRQ_RITINT) /* Vector 16+29: Repetitive Interrupt Timer */
VECTOR(lpc17_mcpwm, LPC17_IRQ_MCPWM) /* Vector 16+30: Motor Control PWM */
VECTOR(lpc17_qei, LPC17_IRQ_QEI) /* Vector 16+31: Quadrature Encoder */
VECTOR(lpc17_pll1, LPC17_IRQ_PLL1) /* Vector 16+32: PLL 1 */
VECTOR(lpc17_usbact, LPC17_IRQ_USBACT) /* Vector 16+33: USB Activity Interrupt */
VECTOR(lpc17_canact, LPC17_IRQ_CANACT) /* Vector 16+34: CAN Activity Interrupt */
#endif
/********************************************************************************
* Public Types
********************************************************************************/
/********************************************************************************
* Public Data
********************************************************************************/
/********************************************************************************
* Public Function Prototypes
********************************************************************************/

117
arch/arm/src/lpc17xx/chip/lpc178x_vectors.h
View file

@ -1,117 +0,0 @@
/************************************************************************************************
* arch/arm/src/lpc17xx/chip/lpc178x_vectors.h
*
* Copyright (C) 2013 Gregory Nutt. All rights reserved.
* Author: Rommel Marcelo
* Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
********************************************************************************/
/********************************************************************************
* Included Files
********************************************************************************/
/*********************************************************************************
* Pre-processor Definitions
********************************************************************************/
/* This file is included by lpc17_vectors.S. It provides the macro VECTOR that
* supplies each LPC17xx vector in terms of a (lower-case) ISR label and an
* (upper-case) IRQ number as defined in arch/arm/include/lpc17/lpc17xx_irq.h.
* lpc17_vectors.S will defined the VECTOR in different ways in order to generate
* the interrupt vectors and handlers in their final form.
*/
/* If the common ARMv7-M vector handling is used, then all it needs is the following
* definition that provides the number of supported vectors.
*/
#ifdef CONFIG_ARMV7M_CMNVECTOR
/* Reserve 41 interrupt table entries for I/O interrupts. */
# define ARMV7M_PERIPHERAL_INTERRUPTS 41
#else
VECTOR(lpc17_wdt, LPC17_IRQ_WDT) /* Vector 16+0: Watchdog timer */
VECTOR(lpc17_tmr0, LPC17_IRQ_TMR0) /* Vector 16+1: Timer 0 */
VECTOR(lpc17_tmr1, LPC17_IRQ_TMR1) /* Vector 16+2: Timer 1 */
VECTOR(lpc17_tmr2, LPC17_IRQ_TMR2) /* Vector 16+3: Timer 2 */
VECTOR(lpc17_tmr3, LPC17_IRQ_TMR3) /* Vector 16+4: Timer 3 */
VECTOR(lpc17_uart0, LPC17_IRQ_UART0) /* Vector 16+5: UART 0 */
VECTOR(lpc17_uart1, LPC17_IRQ_UART1) /* Vector 16+6: UART 1 */
VECTOR(lpc17_uart2, LPC17_IRQ_UART2) /* Vector 16+7: UART 2 */
VECTOR(lpc17_uart3, LPC17_IRQ_UART3) /* Vector 16+8: UART 3 */
VECTOR(lpc17_pwm1, LPC17_IRQ_PWM1) /* Vector 16+9: PWM 1 */
VECTOR(lpc17_i2c0, LPC17_IRQ_I2C0) /* Vector 16+10: I2C 0 */
VECTOR(lpc17_i2c1, LPC17_IRQ_I2C1) /* Vector 16+11: I2C 1 */
VECTOR(lpc17_i2c2, LPC17_IRQ_I2C2) /* Vector 16+12: I2C 2 */
UNUSED(LPC17_IRQ_RESERVED29) /* Vector 16+13: Reserved */
VECTOR(lpc17_ssp0, LPC17_IRQ_SSP0) /* Vector 16+14: SSP 0 */
VECTOR(lpc17_ssp1, LPC17_IRQ_SSP1) /* Vector 16+15: SSP 1 */
VECTOR(lpc17_pll0, LPC17_IRQ_PLL0) /* Vector 16+16: PLL 0 */
VECTOR(lpc17_rtc, LPC17_IRQ_RTC) /* Vector 16+17: Real time clock */
VECTOR(lpc17_eint0, LPC17_IRQ_EINT0) /* Vector 16+18: External interrupt 0 */
VECTOR(lpc17_eint1, LPC17_IRQ_EINT1) /* Vector 16+19: External interrupt 1 */
VECTOR(lpc17_eint2, LPC17_IRQ_EINT2) /* Vector 16+20: External interrupt 2 */
VECTOR(lpc17_eint3, LPC17_IRQ_EINT3) /* Vector 16+21: External interrupt 3 */
VECTOR(lpc17_adc, LPC17_IRQ_ADC) /* Vector 16+22: A/D Converter */
VECTOR(lpc17_bod, LPC17_IRQ_BOD) /* Vector 16+23: Brown Out detect */
VECTOR(lpc17_usb, LPC17_IRQ_USB) /* Vector 16+24: USB */
VECTOR(lpc17_can, LPC17_IRQ_CAN) /* Vector 16+25: CAN */
VECTOR(lpc17_gpdma, LPC17_IRQ_GPDMA) /* Vector 16+26: GPDMA */
VECTOR(lpc17_i2s, LPC17_IRQ_I2S) /* Vector 16+27: I2S */
VECTOR(lpc17_eth, LPC17_IRQ_ETH) /* Vector 16+28: Ethernet */
VECTOR(lpc17_mci, LPC17_IRQ_MCI) /* Vector 16+29: MMC/SD */
VECTOR(lpc17_mcpwm, LPC17_IRQ_MCPWM) /* Vector 16+30: Motor Control PWM */
VECTOR(lpc17_qei, LPC17_IRQ_QEI) /* Vector 16+31: Quadrature Encoder */
VECTOR(lpc17_pll1, LPC17_IRQ_PLL1) /* Vector 16+32: PLL 1 */
VECTOR(lpc17_usbact, LPC17_IRQ_USBACT) /* Vector 16+33: USB Activity Interrupt */
VECTOR(lpc17_canact, LPC17_IRQ_CANACT) /* Vector 16+34: CAN Activity Interrupt */
VECTOR(lpc17_uart4, LPC17_IRQ_UART4) /* Vector 16+35: UART 4 */
VECTOR(lpc17_ssp2, LPC17_IRQ_SSP2) /* Vector 16+36: SSP 2 */
VECTOR(lpc17_lcd, LPC17_IRQ_LCD) /* Vector 16+37: LCD */
VECTOR(lpc17_gpio, LPC17_IRQ_GPIO) /* Vector 16+38: GPIO */
VECTOR(lpc17_pwm0, LPC17_IRQ_PWM0) /* Vector 16+39: PWM0 */
VECTOR(lpc17_eeprom, LPC17_IRQ_EEPROM) /* Vector 16+40: EEPROM */
#endif
/********************************************************************************
* Public Types
********************************************************************************/
/********************************************************************************
* Public Data
********************************************************************************/
/********************************************************************************
* Public Function Prototypes
********************************************************************************/

36
arch/arm/src/lpc17xx/lpc17_start.c
View file

@ -1,8 +1,8 @@
/****************************************************************************
* arch/arm/src/lpc17xx/lpc17_start.c
* arch/arm/src/chip/lpc17_start.c
*
* Copyright (C) 2010, 2012-2013, 2015 Gregory Nutt. All rights reserved.
* Copyright (C) 2010, 2012-2013, 2015, 2018 Gregory Nutt. All rights
* reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -59,6 +59,36 @@
#include "lpc17_start.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* .data is positioned first in the primary RAM followed immediately by .bss.
* The IDLE thread stack lies just after .bss and has size give by
* CONFIG_IDLETHREAD_STACKSIZE; The heap then begins just after the IDLE.
* ARM EABI requires 64 bit stack alignment.
*/
#define IDLE_STACKSIZE (CONFIG_IDLETHREAD_STACKSIZE & ~7)
#define IDLE_STACK ((uintptr_t)&_ebss + IDLE_STACKSIZE)
#define HEAP_BASE ((uintptr_t)&_ebss + IDLE_STACKSIZE)
/****************************************************************************
* Public Data
****************************************************************************/
/* g_idle_topstack: _sbss is the start of the BSS region as defined by the
* linker script. _ebss lies at the end of the BSS region. The idle task
* stack starts at the end of BSS and is of size CONFIG_IDLETHREAD_STACKSIZE.
* The IDLE thread is the thread that the system boots on and, eventually,
* becomes the IDLE, do nothing task that runs only when there is nothing
* else to run. The heap continues from there until the end of memory.
* g_idle_topstack is a read-only variable the provides this computed
* address.
*/
const uintptr_t g_idle_topstack = HEAP_BASE;
/****************************************************************************
* Private Functions
****************************************************************************/
@ -101,7 +131,7 @@
****************************************************************************/
#ifdef CONFIG_ARCH_FPU
#if defined(CONFIG_ARMV7M_CMNVECTOR) && !defined(CONFIG_ARMV7M_LAZYFPU)
#ifndef CONFIG_ARMV7M_LAZYFPU
static inline void lpc17_fpuconfig(void)
{

18
arch/arm/src/lpc17xx/lpc17_start.h
View file

@ -1,7 +1,7 @@
/************************************************************************************
* arch/arm/src/lpc17xx/lpc17_start.h
*
* Copyright (C) 2017 Gregory Nutt. All rights reserved.
* Copyright (C) 2017-2018 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -42,6 +42,22 @@
#include <nuttx/config.h>
/************************************************************************************
* Public Data
************************************************************************************/
/* g_idle_topstack: _sbss is the start of the BSS region as defined by the
* linker script. _ebss lies at the end of the BSS region. The idle task
* stack starts at the end of BSS and is of size CONFIG_IDLETHREAD_STACKSIZE.
* The IDLE thread is the thread that the system boots on and, eventually,
* becomes the IDLE, do nothing task that runs only when there is nothing
* else to run. The heap continues from there until the end of memory.
* g_idle_topstack is a read-only variable the provides this computed
* address.
*/
extern const uintptr_t g_idle_topstack;
/************************************************************************************
* Public Function Prototypes
************************************************************************************/

497
arch/arm/src/lpc17xx/lpc17_vectors.S
View file

@ -1,497 +0,0 @@
/************************************************************************************************
* arch/arm/src/lpc17xx/lpc17_vectors.S
*
* Copyright (C) 2010-2011, 2013-2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************************/
/************************************************************************************************
* Included Files
************************************************************************************************/
#include <nuttx/config.h>
#include <arch/irq.h>
#include "chip.h"
#include "exc_return.h"
/************************************************************************************************
* Pre-processor Definitions
************************************************************************************************/
/* Configuration ********************************************************************************/
#ifdef CONFIG_ARCH_HIPRI_INTERRUPT
/* In kernel mode without an interrupt stack, this interrupt handler will set the MSP to the
* stack pointer of the interrupted thread. If the interrupted thread was a privileged
* thread, that will be the MSP otherwise it will be the PSP. If the PSP is used, then the
* value of the MSP will be invalid when the interrupt handler returns because it will be a
* pointer to an old position in the unprivileged stack. Then when the high priority
* interrupt occurs and uses this stale MSP, there will most likely be a system failure.
*
* If the interrupt stack is selected, on the other hand, then the interrupt handler will
* always set the MSP to the interrupt stack. So when the high priority interrupt occurs,
* it will either use the MSP of the last privileged thread to run or, in the case of the
* nested interrupt, the interrupt stack if no privileged task has run.
*/
# if defined(CONFIG_BUILD_PROTECTED) && CONFIG_ARCH_INTERRUPTSTACK < 4
# error Interrupt stack must be used with high priority interrupts in kernel mode
# endif
/* Use the BASEPRI to control interrupts is required if nested, high
* priority interrupts are supported.
*/
# ifndef CONFIG_ARMV7M_USEBASEPRI
# error CONFIG_ARMV7M_USEBASEPRI must be used with CONFIG_ARCH_HIPRI_INTERRUPT
# endif
#endif
/* Memory Map ***********************************************************************************/
/*
* 0x0000:0000 - Beginning of FLASH. Address of vectors
* 0x0003:ffff - End of flash
* 0x1000:0000 - Start of CPU SRAM and start of .data (_sdata)
* - End of .data (_edata) and start of .bss (_sbss)
* - End of .bss (_ebss) and bottom of idle stack
* - _ebss + CONFIG_IDLETHREAD_STACKSIZE = end of idle stack, start of heap. NOTE
* that the ARM uses a decrement before store stack so that the correct initial
* value is the end of the stack + 4;
* 0x1000:7fff - End of CPU SRAM and end of heap (1st region)
*/
#define IDLE_STACK (_ebss+CONFIG_IDLETHREAD_STACKSIZE-4)
#define HEAP_BASE (_ebss+CONFIG_IDLETHREAD_STACKSIZE)
/************************************************************************************************
* Public Symbols
************************************************************************************************/
.syntax unified
.thumb
.file "lpc17_vectors.S"
/* Check if common ARMv7 interrupt vectoring is used (see arch/arm/src/armv7-m/up_vectors.S) */
#ifndef CONFIG_ARMV7M_CMNVECTOR
.globl __start
/************************************************************************************************
* Macros
************************************************************************************************/
/* On entry into an IRQ, the hardware automatically saves the xPSR, PC, LR, R12, R0-R3
* registers on the stack, then branches to an instantantiation of the following
* macro. This macro simply loads the IRQ number into R0, then jumps to the common
* IRQ handling logic.
*/
.macro HANDLER, label, irqno
.thumb_func
\label:
mov r0, #\irqno
b exception_common
.endm
/************************************************************************************************
* Vectors
************************************************************************************************/
.section .vectors, "ax"
.code 16
.align 2
.globl _vectors
.type _vectors, function
_vectors:
/* Processor Exceptions */
.word IDLE_STACK /* Vector 0: Reset stack pointer */
.word __start /* Vector 1: Reset vector */
.word lpc17_nmi /* Vector 2: Non-Maskable Interrupt (NMI) */
.word lpc17_hardfault /* Vector 3: Hard fault */
.word lpc17_mpu /* Vector 4: Memory management (MPU) */
.word lpc17_busfault /* Vector 5: Bus fault */
.word lpc17_usagefault /* Vector 6: Usage fault */
.word lpc17_reserved /* Vector 7: Reserved */
.word lpc17_reserved /* Vector 8: Reserved */
.word lpc17_reserved /* Vector 9: Reserved */
.word lpc17_reserved /* Vector 10: Reserved */
.word lpc17_svcall /* Vector 11: SVC call */
.word lpc17_dbgmonitor /* Vector 12: Debug monitor */
.word lpc17_reserved /* Vector 13: Reserved */
.word lpc17_pendsv /* Vector 14: Pendable system service request */
.word lpc17_systick /* Vector 15: System tick */
/* External Interrupts */
#undef VECTOR
#define VECTOR(l,i) .word l
#undef UNUSED
#define UNUSED(i) .word lpc17_reserved
#if defined(LPC176x)
# include "chip/lpc176x_vectors.h"
#elif defined(LPC178x)
# include "chip/lpc178x_vectors.h"
#else
# error "Unrecognized LPC17xx family"
#endif
.size _vectors, .-_vectors
/************************************************************************************************
* .text
************************************************************************************************/
.text
.type handlers, function
.thumb_func
handlers:
HANDLER lpc17_reserved, LPC17_IRQ_RESERVED /* Unexpected/reserved vector */
HANDLER lpc17_nmi, LPC17_IRQ_NMI /* Vector 2: Non-Maskable Interrupt (NMI) */
HANDLER lpc17_hardfault, LPC17_IRQ_HARDFAULT /* Vector 3: Hard fault */
HANDLER lpc17_mpu, LPC17_IRQ_MEMFAULT /* Vector 4: Memory management (MPU) */
HANDLER lpc17_busfault, LPC17_IRQ_BUSFAULT /* Vector 5: Bus fault */
HANDLER lpc17_usagefault, LPC17_IRQ_USAGEFAULT /* Vector 6: Usage fault */
HANDLER lpc17_svcall, LPC17_IRQ_SVCALL /* Vector 11: SVC call */
HANDLER lpc17_dbgmonitor, LPC17_IRQ_DBGMONITOR /* Vector 12: Debug Monitor */
HANDLER lpc17_pendsv, LPC17_IRQ_PENDSV /* Vector 14: Penable system service request */
HANDLER lpc17_systick, LPC17_IRQ_SYSTICK /* Vector 15: System tick */
/* External Interrupts */
#undef VECTOR
#define VECTOR(l,i) HANDLER l, i
#undef UNUSED
#define UNUSED(i)
#if defined(LPC176x)
# include "chip/lpc176x_vectors.h"
#elif defined(LPC178x)
# include "chip/lpc178x_vectors.h"
#else
# error "Unrecognized LPC17xx family"
#endif
/* Common IRQ handling logic. On entry here, the return stack is on either
* the PSP or the MSP and looks like the following:
*
* REG_XPSR
* REG_R15
* REG_R14
* REG_R12
* REG_R3
* REG_R2
* REG_R1
* MSP->REG_R0
*
* And
* R0 contains the IRQ number
* R14 Contains the EXC_RETURN value
* We are in handler mode and the current SP is the MSP
*/
.globl exception_common
.type exception_common, function
exception_common:
/* Complete the context save */
#ifdef CONFIG_BUILD_PROTECTED
/* The EXC_RETURN value will be 0xfffffff9 (privileged thread) or 0xfffffff1
* (handler mode) if the stack is on the MSP. It can only be on the PSP if
* EXC_RETURN is 0xfffffffd (unprivileged thread)
*/
tst r14, #EXC_RETURN_PROCESS_STACK /* nonzero if context on process stack */
beq 1f /* Branch if context already on the MSP */
mrs r1, psp /* R1=The process stack pointer (PSP) */
mov sp, r1 /* Set the MSP to the PSP */
1:
#endif
/* r1 holds the value of the stack pointer AFTER the exception handling logic
* pushed the various registers onto the stack. Get r2 = the value of the
* stack pointer BEFORE the interrupt modified it.
*/
mov r2, sp /* R2=Copy of the main/process stack pointer */
add r2, #HW_XCPT_SIZE /* R2=MSP/PSP before the interrupt was taken */
#ifdef CONFIG_ARMV7M_USEBASEPRI
mrs r3, basepri /* R3=Current BASEPRI setting */
#else
mrs r3, primask /* R3=Current PRIMASK setting */
#endif
#ifdef CONFIG_ARCH_FPU
/* Skip over the block of memory reserved for floating pointer register save.
* Lazy FPU register saving is used. FPU registers will be saved in this
* block only if a context switch occurs (this means, of course, that the FPU
* cannot be used in interrupt processing).
*/
sub sp, #(4*SW_FPU_REGS)
#endif
/* Save the remaining registers on the stack after the registers pushed
* by the exception handling logic. r2=SP and r3=primask or basepri, r4-r11,
* r14=register values.
*/
#ifdef CONFIG_BUILD_PROTECTED
stmdb sp!, {r2-r11,r14} /* Save the remaining registers plus the SP value */
#else
stmdb sp!, {r2-r11} /* Save the remaining registers plus the SP value */
#endif
#ifndef CONFIG_ARCH_HIPRI_INTERRUPT
/* Disable interrupts, select the stack to use for interrupt handling
* and call up_doirq to handle the interrupt
*/
cpsid i /* Disable further interrupts */
#else
/* Set the BASEPRI register so that further normal interrupts will be
* masked. Nested, high priority may still occur, however.
*/
mov r2, #NVIC_SYSH_DISABLE_PRIORITY
msr basepri, r2 /* Set the BASEPRI */
#endif
/* There are two arguments to up_doirq:
*
* R0 = The IRQ number
* R1 = The top of the stack points to the saved state
*/
mov r1, sp
/* Also save the top of the stack in a preserved register */
mov r4, sp
#if CONFIG_ARCH_INTERRUPTSTACK > 7
/* If CONFIG_ARCH_INTERRUPTSTACK is defined, we will set the MSP to use
* a special special interrupt stack pointer. The way that this is done
* here prohibits nested interrupts without some additional logic!
*/
ldr sp, =g_intstackbase
#else
/* Otherwise, we will re-use the interrupted thread's stack. That may
* mean using either MSP or PSP stack for interrupt level processing (in
* kernel mode).
*/
bic r2, r4, #7 /* Get the stack pointer with 8-byte alignment */
mov sp, r2 /* Instantiate the aligned stack */
#endif
bl up_doirq /* R0=IRQ, R1=register save (msp) */
mov r1, r4 /* Recover R1=main stack pointer */
/* On return from up_doirq, R0 will hold a pointer to register context
* array to use for the interrupt return. If that return value is the same
* as current stack pointer, then things are relatively easy.
*/
cmp r0, r1 /* Context switch? */
beq 2f /* Branch if no context switch */
/* We are returning with a pending context switch.
*
* If the FPU is enabled, then we will need to restore FPU registers.
* This is not done in normal interrupt save/restore because the cost
* is prohibitive. This is only done when switching contexts. A
* consequence of this is that floating point operations may not be
* performed in interrupt handling logic.
*
* Here:
* r0 = Address of the register save area
*
* NOTE: It is a requirement that up_restorefpu() preserve the value of
* r0!
*/
#ifdef CONFIG_ARCH_FPU
bl up_restorefpu /* Restore the FPU registers */
#endif
/* We are returning with a pending context switch. This case is different
* because in this case, the register save structure does not lie in the
* stack but, rather, within a TCB structure. We'll have to copy some
* values to the stack.
*/
add r1, r0, #SW_XCPT_SIZE /* R1=Address of HW save area in reg array */
ldmia r1, {r4-r11} /* Fetch eight registers in HW save area */
ldr r1, [r0, #(4*REG_SP)] /* R1=Value of SP before interrupt */
stmdb r1!, {r4-r11} /* Store eight registers in HW save area */
#ifdef CONFIG_BUILD_PROTECTED
ldmia r0, {r2-r11,r14} /* Recover R4-R11, r14 + 2 temp values */
#else
ldmia r0, {r2-r11} /* Recover R4-R11 + 2 temp values */
#endif
b 3f /* Re-join common logic */
/* We are returning with no context switch. We simply need to "unwind"
* the same stack frame that we created
*
* Here:
* r1 = Address of the return stack (same as r0)
*/
2:
#ifdef CONFIG_BUILD_PROTECTED
ldmia r1!, {r2-r11,r14} /* Recover R4-R11, r14 + 2 temp values */
#else
ldmia r1!, {r2-r11} /* Recover R4-R11 + 2 temp values */
#endif
#ifdef CONFIG_ARCH_FPU
/* Skip over the block of memory reserved for floating pointer register
* save. Then R1 is the address of the HW save area
*/
add r1, #(4*SW_FPU_REGS)
#endif
/* Set up to return from the exception
*
* Here:
* r1 = Address on the target thread's stack position at the start of
* the registers saved by hardware
* r3 = primask or basepri
* r4-r11 = restored register values
*/
3:
#ifdef CONFIG_BUILD_PROTECTED
/* The EXC_RETURN value will be 0xfffffff9 (privileged thread) or 0xfffffff1
* (handler mode) if the stack is on the MSP. It can only be on the PSP if
* EXC_RETURN is 0xfffffffd (unprivileged thread)
*/
mrs r2, control /* R2=Contents of the control register */
tst r14, #EXC_RETURN_PROCESS_STACK /* nonzero if context on process stack */
beq 4f /* Branch if privileged */
orr r2, r2, #1 /* Unprivileged mode */
msr psp, r1 /* R1=The process stack pointer */
b 5f
4:
bic r2, r2, #1 /* Privileged mode */
msr msp, r1 /* R1=The main stack pointer */
5:
msr control, r2 /* Save the updated control register */
#else
msr msp, r1 /* Recover the return MSP value */
/* Preload r14 with the special return value first (so that the return
* actually occurs with interrupts still disabled).
*/
ldr r14, =EXC_RETURN_PRIVTHR /* Load the special value */
#endif
/* Restore the interrupt state */
#ifdef CONFIG_ARMV7M_USEBASEPRI
msr basepri, r3 /* Restore interrupts priority masking */
#ifndef CONFIG_ARCH_HIPRI_INTERRUPT
cpsie i /* Re-enable interrupts */
#endif
#else
msr primask, r3 /* Restore interrupts */
#endif
/* Always return with R14 containing the special value that will: (1)
* return to thread mode, and (2) continue to use the MSP
*/
bx r14 /* And return */
.size handlers, .-handlers
/************************************************************************************************
* Name: g_intstackalloc/g_intstackbase
*
* Description:
* Shouldn't happen
*
************************************************************************************************/
#if CONFIG_ARCH_INTERRUPTSTACK > 7
.bss
.global g_intstackalloc
.global g_intstackbase
.align 8
g_intstackalloc:
.skip ((CONFIG_ARCH_INTERRUPTSTACK + 4) & ~7)
g_intstackbase:
.size g_intstackalloc, .-g_intstackalloc
#endif
#endif /* CONFIG_ARMV7M_CMNVECTOR */
/************************************************************************************************
* .rodata
************************************************************************************************/
.section .rodata, "a"
/* Variables: _sbss is the start of the BSS region (see ld.script) _ebss is the end
* of the BSS regsion (see ld.script). The idle task stack starts at the end of BSS
* and is of size CONFIG_IDLETHREAD_STACKSIZE. The IDLE thread is the thread that
* the system boots on and, eventually, becomes the idle, do nothing task that runs
* only when there is nothing else to run. The heap continues from there until the
* end of memory. See g_idle_topstack below.
*/
.globl g_idle_topstack
.type g_idle_topstack, object
g_idle_topstack:
.word HEAP_BASE
.size g_idle_topstack, .-g_idle_topstack
.end

7
arch/arm/src/sam34/Make.defs
View file

@ -84,12 +84,7 @@ endif
endif
ifeq ($(CONFIG_ARCH_FPU),y)
CMN_ASRCS += up_fpu.S
ifneq ($(CONFIG_ARMV7M_CMNVECTOR),y)
CMN_CSRCS += up_copyarmstate.c
else ifeq ($(CONFIG_ARMV7M_LAZYFPU),y)
CMN_CSRCS += up_copyarmstate.c
endif
CMN_ASRCS += up_fpu.S up_copyarmstate.c
endif
ifeq ($(CONFIG_STACK_COLORATION),y)

2
arch/arm/src/sam34/sam_start.c
View file

@ -67,7 +67,7 @@
/* .data is positioned first in the primary RAM followed immediately by .bss.
* The IDLE thread stack lies just after .bss and has size give by
* CONFIG_IDLETHREAD_STACKSIZE; The heap then begins just after the IDLE.
* ARM EBI requires 64 bit stack alignment.
* ARM EABI requires 64 bit stack alignment.
*/
#define IDLE_STACKSIZE (CONFIG_IDLETHREAD_STACKSIZE & ~7)

1
configs/freedom-k28f/scripts/flash.ld
View file

@ -63,6 +63,7 @@ MEMORY
}
OUTPUT_ARCH(arm)
EXTERN(_vectors)
ENTRY(_stext)
EXTERN(__flashconfigbytes)
SECTIONS

30
configs/freedom-k64f/netnsh/defconfig
View file

@ -1,10 +1,10 @@
# CONFIG_ARCH_FPU is not set
CONFIG_ARCH_BOARD_FREEDOM_K64F=y
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="freedom-k64f"
CONFIG_ARCH_BOARD_FREEDOM_K64F=y
CONFIG_ARCH_CHIP_KINETIS=y
CONFIG_ARCH_CHIP_MK64FN1M0VLL12=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_ARCH="arm"
CONFIG_BOARD_LOOPSPERMSEC=10016
CONFIG_BUILTIN=y
CONFIG_DEBUG_FULLOPT=y
@ -12,33 +12,33 @@ CONFIG_DEBUG_SYMBOLS=y
CONFIG_ETH0_PHY_KSZ8081=y
CONFIG_EXAMPLES_NSH=y
CONFIG_FS_FAT=y
CONFIG_FS_PROCFS_REGISTER=y
CONFIG_FS_PROCFS=y
CONFIG_FS_PROCFS_REGISTER=y
CONFIG_HOST_WINDOWS=y
CONFIG_INTELHEX_BINARY=y
CONFIG_KINETIS_ENET_MDIOPULLUP=y
CONFIG_KINETIS_ENET=y
CONFIG_KINETIS_ENET_MDIOPULLUP=y
CONFIG_KINETIS_UART3=y
CONFIG_MAX_TASKS=16
CONFIG_MAX_WDOGPARMS=2
CONFIG_MOTOROLA_SREC=y
CONFIG_NET_ARP_SEND=y
CONFIG_NET_BROADCAST=y
CONFIG_NET_HOSTNAME="Freedom-K64F"
CONFIG_NET_ICMP_SOCKET=y
CONFIG_NET_ICMP=y
CONFIG_NET_SOCKOPTS=y
CONFIG_NET_STATISTICS=y
CONFIG_NET_TCP_WRITE_BUFFERS=y
CONFIG_NET_TCP=y
CONFIG_NET_TCPBACKLOG=y
CONFIG_NET_UDP=y
CONFIG_NETDB_DNSCLIENT=y
CONFIG_NETDEV_PHY_IOCTL=y
CONFIG_NETDEV_STATISTICS=y
CONFIG_NETUTILS_TELNETD=y
CONFIG_NETUTILS_TFTPC=y
CONFIG_NETUTILS_WEBCLIENT=y
CONFIG_NET_ARP_SEND=y
CONFIG_NET_BROADCAST=y
CONFIG_NET_HOSTNAME="Freedom-K64F"
CONFIG_NET_ICMP=y
CONFIG_NET_ICMP_SOCKET=y
CONFIG_NET_SOCKOPTS=y
CONFIG_NET_STATISTICS=y
CONFIG_NET_TCP=y
CONFIG_NET_TCPBACKLOG=y
CONFIG_NET_TCP_WRITE_BUFFERS=y
CONFIG_NET_UDP=y
CONFIG_NFILE_DESCRIPTORS=8
CONFIG_NFILE_STREAMS=8
CONFIG_NSH_ARCHINIT=y

10
configs/freedom-k64f/nsh/defconfig
View file

@ -1,11 +1,11 @@
# CONFIG_ARCH_FPU is not set
# CONFIG_MMCSD_MMCSUPPORT is not set
CONFIG_ARCH_BOARD_FREEDOM_K64F=y
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="freedom-k64f"
CONFIG_ARCH_BOARD_FREEDOM_K64F=y
CONFIG_ARCH_CHIP_KINETIS=y
CONFIG_ARCH_CHIP_MK64FN1M0VLL12=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_ARCH="arm"
CONFIG_BOARD_LOOPSPERMSEC=10016
CONFIG_BUILTIN=y
CONFIG_DEBUG_FULLOPT=y
@ -19,21 +19,21 @@ CONFIG_EXAMPLES_PWM=y
CONFIG_FAT_LCNAMES=y
CONFIG_FAT_LFN=y
CONFIG_FS_FAT=y
CONFIG_FS_PROCFS_REGISTER=y
CONFIG_FS_PROCFS=y
CONFIG_FS_PROCFS_REGISTER=y
CONFIG_INTELHEX_BINARY=y
CONFIG_KINETIS_FTM0=y
CONFIG_KINETIS_FTM0_CHANNEL=2
CONFIG_KINETIS_FTM0_PWM=y
CONFIG_KINETIS_FTM0=y
CONFIG_KINETIS_GPIOIRQ=y
CONFIG_KINETIS_PORTEINTS=y
CONFIG_KINETIS_SDHC=y
CONFIG_KINETIS_UART0=y
CONFIG_MAX_TASKS=16
CONFIG_MAX_WDOGPARMS=2
CONFIG_MMCSD=y
CONFIG_MMCSD_MULTIBLOCK_DISABLE=y
CONFIG_MMCSD_SDIO=y
CONFIG_MMCSD=y
CONFIG_MOTOROLA_SREC=y
CONFIG_NFILE_DESCRIPTORS=8
CONFIG_NFILE_STREAMS=8

1
configs/freedom-k64f/scripts/flash.ld
View file

@ -55,6 +55,7 @@ MEMORY
}
OUTPUT_ARCH(arm)
EXTERN(_vectors)
ENTRY(_stext)
EXTERN(__flashconfigbytes)
SECTIONS

33
configs/freedom-k66f/netnsh/defconfig
View file

@ -1,29 +1,28 @@
CONFIG_ARCH_BOARD_FREEDOM_K66F=y
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="freedom-k66f"
CONFIG_ARCH_BOARD_FREEDOM_K66F=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP_KINETIS=y
CONFIG_ARCH_CHIP_MK66FN2M0VMD18=y
CONFIG_ARCH_INTERRUPTSTACK=2048
CONFIG_ARCH_IRQBUTTONS=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_ARCH="arm"
CONFIG_ARMV7M_CMNVECTOR=y
CONFIG_ARMV7M_USEBASEPRI=y
CONFIG_BOARD_LOOPSPERMSEC=10016
CONFIG_BOARDCTL_RESET=y
CONFIG_BOARDCTL_UNIQUEID=y
CONFIG_BOARD_LOOPSPERMSEC=10016
CONFIG_BUILTIN=y
CONFIG_DEBUG_FULLOPT=y
CONFIG_DEBUG_SYMBOLS=y
CONFIG_ETH0_PHY_KSZ8081=y
CONFIG_EXAMPLES_NSH=y
CONFIG_FS_FAT=y
CONFIG_FS_PROCFS_REGISTER=y
CONFIG_FS_PROCFS=y
CONFIG_FS_PROCFS_REGISTER=y
CONFIG_I2C=y
CONFIG_KINETIS_EMAC_RMIICLK1588CLKIN=y
CONFIG_KINETIS_ENET_MDIOPULLUP=y
CONFIG_KINETIS_ENET=y
CONFIG_KINETIS_ENET_MDIOPULLUP=y
CONFIG_KINETIS_GPIOIRQ=y
CONFIG_KINETIS_PORTAINTS=y
CONFIG_KINETIS_PORTDINTS=y
@ -31,23 +30,23 @@ CONFIG_KINETIS_UART1=y
CONFIG_KINETIS_UART4=y
CONFIG_MAX_TASKS=16
CONFIG_MAX_WDOGPARMS=2
CONFIG_NET_ARP_SEND=y
CONFIG_NET_BROADCAST=y
CONFIG_NET_HOSTNAME="Freedom-K66F"
CONFIG_NET_ICMP_SOCKET=y
CONFIG_NET_ICMP=y
CONFIG_NET_SOCKOPTS=y
CONFIG_NET_STATISTICS=y
CONFIG_NET_TCP_WRITE_BUFFERS=y
CONFIG_NET_TCP=y
CONFIG_NET_TCPBACKLOG=y
CONFIG_NET_UDP=y
CONFIG_NETDB_DNSCLIENT=y
CONFIG_NETDEV_PHY_IOCTL=y
CONFIG_NETDEV_STATISTICS=y
CONFIG_NETUTILS_TELNETD=y
CONFIG_NETUTILS_TFTPC=y
CONFIG_NETUTILS_WEBCLIENT=y
CONFIG_NET_ARP_SEND=y
CONFIG_NET_BROADCAST=y
CONFIG_NET_HOSTNAME="Freedom-K66F"
CONFIG_NET_ICMP=y
CONFIG_NET_ICMP_SOCKET=y
CONFIG_NET_SOCKOPTS=y
CONFIG_NET_STATISTICS=y
CONFIG_NET_TCP=y
CONFIG_NET_TCPBACKLOG=y
CONFIG_NET_TCP_WRITE_BUFFERS=y
CONFIG_NET_UDP=y
CONFIG_NFILE_DESCRIPTORS=8
CONFIG_NFILE_STREAMS=8
CONFIG_NSH_ARCHINIT=y

26
configs/freedom-k66f/nsh/defconfig
View file

@ -1,31 +1,30 @@
# CONFIG_KINETIS_SDHC_DMA is not set
# CONFIG_MMCSD_SPI is not set
# CONFIG_NSH_DISABLE_PRINTF is not set
CONFIG_ARCH_BOARD_FREEDOM_K66F=y
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="freedom-k66f"
CONFIG_ARCH_BOARD_FREEDOM_K66F=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP_KINETIS=y
CONFIG_ARCH_CHIP_MK66FN2M0VMD18=y
CONFIG_ARCH_INTERRUPTSTACK=2048
CONFIG_ARCH_IRQBUTTONS=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_ARCH="arm"
CONFIG_ARMV7M_CMNVECTOR=y
CONFIG_ARMV7M_USEBASEPRI=y
CONFIG_BOARD_LOOPSPERMSEC=10016
CONFIG_BOARDCTL_RESET=y
CONFIG_BOARDCTL_UNIQUEID=y
CONFIG_BOARD_LOOPSPERMSEC=10016
CONFIG_BUILTIN=y
CONFIG_BUTTONS_LOWER=y
CONFIG_BUTTONS=y
CONFIG_BUTTONS_LOWER=y
CONFIG_DEBUG_FULLOPT=y
CONFIG_DEBUG_SYMBOLS=y
CONFIG_DEV_ZERO=y
CONFIG_EXAMPLES_BUTTONS=y
CONFIG_EXAMPLES_BUTTONS_NAME0="SW2"
CONFIG_EXAMPLES_BUTTONS_NAME1="SW3"
CONFIG_EXAMPLES_BUTTONS_NAMES=y
CONFIG_EXAMPLES_BUTTONS_QTD=2
CONFIG_EXAMPLES_BUTTONS=y
CONFIG_EXAMPLES_NSH=y
CONFIG_EXAMPLES_PWM=y
CONFIG_FAT_LCNAMES=y
@ -33,16 +32,16 @@ CONFIG_FAT_LFN=y
CONFIG_FRDMK66F_SDHC_AUTOMOUNT=y
CONFIG_FS_AUTOMOUNTER=y
CONFIG_FS_FAT=y
CONFIG_FS_PROCFS_REGISTER=y
CONFIG_FS_PROCFS=y
CONFIG_FS_PROCFS_REGISTER=y
CONFIG_I2C_RESET=y
CONFIG_INPUT=y
CONFIG_KINETIS_FTM0=y
CONFIG_KINETIS_FTM0_CHANNEL=2
CONFIG_KINETIS_FTM0_PWM=y
CONFIG_KINETIS_FTM0=y
CONFIG_KINETIS_FTM3=y
CONFIG_KINETIS_FTM3_CHANNEL=1
CONFIG_KINETIS_FTM3_PWM=y
CONFIG_KINETIS_FTM3=y
CONFIG_KINETIS_GPIOIRQ=y
CONFIG_KINETIS_I2C0=y
CONFIG_KINETIS_PORTAINTS=y
@ -51,16 +50,16 @@ CONFIG_KINETIS_RTC=y
CONFIG_KINETIS_SDHC=y
CONFIG_KINETIS_SERIALBRK_BSDCOMPAT=y
CONFIG_KINETIS_SPI1=y
CONFIG_KINETIS_UART_BREAKS=y
CONFIG_KINETIS_UART_EXTEDED_BREAK=y
CONFIG_KINETIS_UART1=y
CONFIG_KINETIS_UART4=y
CONFIG_KINETIS_UART_BREAKS=y
CONFIG_KINETIS_UART_EXTEDED_BREAK=y
CONFIG_LIBC_STRERROR=y
CONFIG_MAX_TASKS=16
CONFIG_MAX_WDOGPARMS=2
CONFIG_MMCSD=y
CONFIG_MMCSD_MULTIBLOCK_DISABLE=y
CONFIG_MMCSD_SDIO=y
CONFIG_MMCSD=y
CONFIG_NFILE_DESCRIPTORS=8
CONFIG_NFILE_STREAMS=8
CONFIG_NSH_ARCHINIT=y
@ -81,15 +80,14 @@ CONFIG_RAW_BINARY=y
CONFIG_READLINE_CMD_HISTORY=y
CONFIG_READLINE_TABCOMPLETION=y
CONFIG_RR_INTERVAL=200
CONFIG_RTC=y
CONFIG_RTC_ALARM=y
CONFIG_RTC_DRIVER=y
CONFIG_RTC_HIRES=y
CONFIG_RTC=y
CONFIG_SCHED_CHILD_STATUS=y
CONFIG_SCHED_HAVE_PARENT=y
CONFIG_SCHED_HPWORK=y
CONFIG_SCHED_HPWORKPERIOD=50000
CONFIG_SCHED_LPWORK=y
CONFIG_SCHED_WAITPID=y
CONFIG_SDCLONE_DISABLE=y
CONFIG_SERIAL_TERMIOS=y

1
configs/freedom-k66f/scripts/flash.ld
View file

@ -52,6 +52,7 @@ MEMORY
}
OUTPUT_ARCH(arm)
EXTERN(_vectors)
ENTRY(_stext)
EXTERN(__flashconfigbytes)
SECTIONS

6
configs/kwikstik-k40/ostest/defconfig
View file

@ -1,10 +1,10 @@
# CONFIG_ARCH_FPU is not set
CONFIG_ARCH_BOARD_KWIKSTIK_K40=y
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="kwikstik-k40"
CONFIG_ARCH_BOARD_KWIKSTIK_K40=y
CONFIG_ARCH_CHIP_KINETIS=y
CONFIG_ARCH_CHIP_MK40X256VLQ100=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_ARCH="arm"
CONFIG_ARMV7M_OABI_TOOLCHAIN=y
CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y
CONFIG_BOARD_LOOPSPERMSEC=9535
@ -12,9 +12,9 @@ CONFIG_DEV_LOWCONSOLE=y
CONFIG_DISABLE_ENVIRON=y
CONFIG_DISABLE_MOUNTPOINT=y
CONFIG_DISABLE_POLL=y
CONFIG_EXAMPLES_OSTEST=y
CONFIG_EXAMPLES_OSTEST_NBARRIER_THREADS=3
CONFIG_EXAMPLES_OSTEST_STACKSIZE=2048
CONFIG_EXAMPLES_OSTEST=y
CONFIG_INTELHEX_BINARY=y
CONFIG_KINETIS_UART5=y
CONFIG_MAX_TASKS=16

1
configs/kwikstik-k40/scripts/kwikstik-k40.ld
View file

@ -55,6 +55,7 @@ MEMORY
}
OUTPUT_ARCH(arm)
EXTERN(_vectors)
ENTRY(_stext)
EXTERN(__flashconfigbytes)
SECTIONS

34
configs/lincoln60/netnsh/defconfig
View file

@ -1,12 +1,12 @@
# CONFIG_NSH_DISABLE_IFCONFIG is not set
# CONFIG_NSH_DISABLE_PS is not set
CONFIG_ARCH_BOARD_LINCOLN60=y
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="lincoln60"
CONFIG_ARCH_BOARD_LINCOLN60=y
CONFIG_ARCH_CHIP_LPC1769=y
CONFIG_ARCH_CHIP_LPC17XX=y
CONFIG_ARCH_INTERRUPTSTACK=1536
CONFIG_ARCH_STACKDUMP=y
CONFIG_ARCH="arm"
CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y
CONFIG_BOARD_LOOPSPERMSEC=7982
CONFIG_ETH0_PHY_KSZ8041=y
@ -19,21 +19,6 @@ CONFIG_LPC17_UART0=y
CONFIG_MAX_TASKS=16
CONFIG_MAX_WDOGPARMS=2
CONFIG_MM_REGIONS=2
CONFIG_NET_ARP_SEND=y
CONFIG_NET_BROADCAST=y
CONFIG_NET_EMACRAM_SIZE=7296
CONFIG_NET_ICMP_SOCKET=y
CONFIG_NET_ICMP=y
CONFIG_NET_MAX_LISTENPORTS=8
CONFIG_NET_NRXDESC=6
CONFIG_NET_NTXDESC=6
CONFIG_NET_SOCKOPTS=y
CONFIG_NET_STATISTICS=y
CONFIG_NET_TCP_WRITE_BUFFERS=y
CONFIG_NET_TCP=y
CONFIG_NET_TCPBACKLOG=y
CONFIG_NET_UDP_CHECKSUMS=y
CONFIG_NET_UDP=y
CONFIG_NET=y
CONFIG_NETDB_DNSCLIENT=y
CONFIG_NETDB_DNSSERVER_NOADDR=y
@ -41,6 +26,21 @@ CONFIG_NETUTILS_DHCPC=y
CONFIG_NETUTILS_TELNETD=y
CONFIG_NETUTILS_TFTPC=y
CONFIG_NETUTILS_WEBCLIENT=y
CONFIG_NET_ARP_SEND=y
CONFIG_NET_BROADCAST=y
CONFIG_NET_EMACRAM_SIZE=7296
CONFIG_NET_ICMP=y
CONFIG_NET_ICMP_SOCKET=y
CONFIG_NET_MAX_LISTENPORTS=8
CONFIG_NET_NRXDESC=6
CONFIG_NET_NTXDESC=6
CONFIG_NET_SOCKOPTS=y
CONFIG_NET_STATISTICS=y
CONFIG_NET_TCP=y
CONFIG_NET_TCPBACKLOG=y
CONFIG_NET_TCP_WRITE_BUFFERS=y
CONFIG_NET_UDP=y
CONFIG_NET_UDP_CHECKSUMS=y
CONFIG_NFILE_DESCRIPTORS=8
CONFIG_NFILE_STREAMS=8
CONFIG_NSH_ARCHINIT=y

4
configs/lincoln60/nsh/defconfig
View file

@ -1,11 +1,11 @@
# CONFIG_NSH_DISABLE_IFCONFIG is not set
# CONFIG_NSH_DISABLE_PS is not set
CONFIG_ARCH_BOARD_LINCOLN60=y
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="lincoln60"
CONFIG_ARCH_BOARD_LINCOLN60=y
CONFIG_ARCH_CHIP_LPC1769=y
CONFIG_ARCH_CHIP_LPC17XX=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_ARCH="arm"
CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y
CONFIG_BOARD_LOOPSPERMSEC=7982
CONFIG_DISABLE_POLL=y

1
configs/lincoln60/scripts/ld.script
View file

@ -47,6 +47,7 @@ MEMORY
}
OUTPUT_ARCH(arm)
EXTERN(_vectors)
ENTRY(_stext)
SECTIONS
{

24
configs/lincoln60/thttpd-binfs/defconfig
View file

@ -1,10 +1,10 @@
CONFIG_ARCH_BOARD_LINCOLN60=y
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="lincoln60"
CONFIG_ARCH_BOARD_LINCOLN60=y
CONFIG_ARCH_CHIP_LPC1769=y
CONFIG_ARCH_CHIP_LPC17XX=y
CONFIG_ARCH_INTERRUPTSTACK=1024
CONFIG_ARCH_STACKDUMP=y
CONFIG_ARCH="arm"
CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y
CONFIG_BOARD_LOOPSPERMSEC=7982
CONFIG_BUILTIN=y
@ -13,8 +13,8 @@ CONFIG_DISABLE_MQUEUE=y
CONFIG_DISABLE_POSIX_TIMERS=y
CONFIG_DISABLE_PTHREAD=y
CONFIG_ETH0_PHY_KSZ8041=y
CONFIG_EXAMPLES_THTTPD_NOMAC=y
CONFIG_EXAMPLES_THTTPD=y
CONFIG_EXAMPLES_THTTPD_NOMAC=y
CONFIG_FS_BINFS=y
CONFIG_FS_ROMFS=y
CONFIG_FS_UNIONFS=y
@ -26,22 +26,22 @@ CONFIG_LPC17_UART0=y
CONFIG_MAX_TASKS=16
CONFIG_MAX_WDOGPARMS=2
CONFIG_MM_REGIONS=2
CONFIG_NET=y
CONFIG_NETUTILS_NETLIB=y
CONFIG_NETUTILS_THTTPD=y
CONFIG_NET_ARP_SEND=y
CONFIG_NET_EMACRAM_SIZE=9696
CONFIG_NET_ICMP_SOCKET=y
CONFIG_NET_ICMP=y
CONFIG_NET_ICMP_SOCKET=y
CONFIG_NET_MAX_LISTENPORTS=8
CONFIG_NET_NACTIVESOCKETS=12
CONFIG_NET_NRXDESC=8
CONFIG_NET_NTXDESC=8
CONFIG_NET_SOCKOPTS=y
CONFIG_NET_TCP_CONNS=12
CONFIG_NET_TCP_WRITE_BUFFERS=y
CONFIG_NET_TCP=y
CONFIG_NET_TCPBACKLOG=y
CONFIG_NET=y
CONFIG_NETUTILS_NETLIB=y
CONFIG_NETUTILS_THTTPD=y
CONFIG_NET_TCP_CONNS=12
CONFIG_NET_TCP_WRITE_BUFFERS=y
CONFIG_NFILE_DESCRIPTORS=8
CONFIG_NFILE_STREAMS=8
CONFIG_NSOCKET_DESCRIPTORS=12
@ -61,14 +61,14 @@ CONFIG_SYMTAB_ORDEREDBYNAME=y
CONFIG_SYSTEM_PING=y
CONFIG_TASK_NAME_SIZE=0
CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=1536
CONFIG_THTTPD_CGI_BYTECOUNT=20000
CONFIG_THTTPD_CGI_STACKSIZE=1536
CONFIG_THTTPD_CGIINBUFFERSIZ=256
CONFIG_THTTPD_CGIOUTBUFFERSIZE=256
CONFIG_THTTPD_CGI_BYTECOUNT=20000
CONFIG_THTTPD_CGI_STACKSIZE=1536
CONFIG_THTTPD_IOBUFFERSIZE=512
CONFIG_UART0_RXBUFSIZE=64
CONFIG_UART0_SERIAL_CONSOLE=y
CONFIG_UART0_TXBUFSIZE=64
CONFIG_USER_ENTRYPOINT="thttp_main"
CONFIG_USERMAIN_STACKSIZE=6144
CONFIG_USER_ENTRYPOINT="thttp_main"
CONFIG_WDOG_INTRESERVE=1

14
configs/lpcxpresso-lpc1768/dhcpd/defconfig
View file

@ -1,10 +1,10 @@
# CONFIG_NETUTILS_DHCPD_IGNOREBROADCAST is not set
CONFIG_ARCH_BOARD_LPCXPRESSO=y
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="lpcxpresso-lpc1768"
CONFIG_ARCH_BOARD_LPCXPRESSO=y
CONFIG_ARCH_CHIP_LPC1768=y
CONFIG_ARCH_CHIP_LPC17XX=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_ARCH="arm"
CONFIG_ARMV7M_TOOLCHAIN_CODEREDL=y
CONFIG_BOARD_LOOPSPERMSEC=8079
CONFIG_DISABLE_ENVIRON=y
@ -13,23 +13,23 @@ CONFIG_DISABLE_MQUEUE=y
CONFIG_DISABLE_POLL=y
CONFIG_DISABLE_PTHREAD=y
CONFIG_ETH0_PHY_LAN8720=y
CONFIG_EXAMPLES_DHCPD=y
CONFIG_EXAMPLES_DHCPD_IPADDR=0x0a000001
CONFIG_EXAMPLES_DHCPD_NOMAC=y
CONFIG_EXAMPLES_DHCPD=y
CONFIG_INTELHEX_BINARY=y
CONFIG_LPC17_ETHERNET=y
CONFIG_LPC17_UART3=y
CONFIG_MAX_TASKS=8
CONFIG_MM_REGIONS=2
CONFIG_NET=y
CONFIG_NETUTILS_DHCPD=y
CONFIG_NETUTILS_NETLIB=y
CONFIG_NET_BROADCAST=y
CONFIG_NET_EMACRAM_SIZE=15776
CONFIG_NET_ICMP=y
CONFIG_NET_SOCKOPTS=y
CONFIG_NET_UDP_CHECKSUMS=y
CONFIG_NET_UDP=y
CONFIG_NET=y
CONFIG_NETUTILS_DHCPD=y
CONFIG_NETUTILS_NETLIB=y
CONFIG_NET_UDP_CHECKSUMS=y
CONFIG_NFILE_DESCRIPTORS=8
CONFIG_NFILE_STREAMS=8
CONFIG_NUNGET_CHARS=0

24
configs/lpcxpresso-lpc1768/nsh/defconfig
View file

@ -4,12 +4,12 @@
# CONFIG_NSH_DISABLE_PS is not set
# CONFIG_SPI_CALLBACK is not set
# CONFIG_SPI_EXCHANGE is not set
CONFIG_ARCH_BOARD_LPCXPRESSO=y
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="lpcxpresso-lpc1768"
CONFIG_ARCH_BOARD_LPCXPRESSO=y
CONFIG_ARCH_CHIP_LPC1768=y
CONFIG_ARCH_CHIP_LPC17XX=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_ARCH="arm"
CONFIG_ARMV7M_TOOLCHAIN_CODEREDL=y
CONFIG_BOARD_LOOPSPERMSEC=8079
CONFIG_ETH0_PHY_LAN8720=y
@ -21,28 +21,28 @@ CONFIG_LPC17_SSP1=y
CONFIG_LPC17_UART3=y
CONFIG_MAX_TASKS=16
CONFIG_MAX_WDOGPARMS=2
CONFIG_MM_REGIONS=2
CONFIG_MMCSD=y
CONFIG_MM_REGIONS=2
CONFIG_MTD=y
CONFIG_NET=y
CONFIG_NETDB_DNSCLIENT=y
CONFIG_NETDB_DNSCLIENT_ENTRIES=4
CONFIG_NETDB_DNSSERVER_NOADDR=y
CONFIG_NETUTILS_TELNETD=y
CONFIG_NETUTILS_TFTPC=y
CONFIG_NETUTILS_WEBCLIENT=y
CONFIG_NET_BROADCAST=y
CONFIG_NET_EMACRAM_SIZE=7296
CONFIG_NET_ICMP_SOCKET=y
CONFIG_NET_ICMP=y
CONFIG_NET_ICMP_SOCKET=y
CONFIG_NET_MAX_LISTENPORTS=8
CONFIG_NET_NRXDESC=6
CONFIG_NET_NTXDESC=6
CONFIG_NET_SOCKOPTS=y
CONFIG_NET_STATISTICS=y
CONFIG_NET_TCP=y
CONFIG_NET_UDP_CHECKSUMS=y
CONFIG_NET_UDP=y
CONFIG_NET=y
CONFIG_NETDB_DNSCLIENT_ENTRIES=4
CONFIG_NETDB_DNSCLIENT=y
CONFIG_NETDB_DNSSERVER_NOADDR=y
CONFIG_NETUTILS_TELNETD=y
CONFIG_NETUTILS_TFTPC=y
CONFIG_NETUTILS_WEBCLIENT=y
CONFIG_NET_UDP_CHECKSUMS=y
CONFIG_NFILE_DESCRIPTORS=8
CONFIG_NFILE_STREAMS=8
CONFIG_NSH_ARCHINIT=y

18
configs/lpcxpresso-lpc1768/nx/defconfig
View file

@ -1,19 +1,20 @@
# CONFIG_EXAMPLES_NX_DEFAULT_COLORS is not set
# CONFIG_NX_DISABLE_1BPP is not set
# CONFIG_NXTK_DEFAULT_BORDERCOLORS is not set
# CONFIG_NX_DISABLE_1BPP is not set
# CONFIG_SPI_EXCHANGE is not set
CONFIG_ARCH_BOARD_LPCXPRESSO=y
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="lpcxpresso-lpc1768"
CONFIG_ARCH_BOARD_LPCXPRESSO=y
CONFIG_ARCH_CHIP_LPC1768=y
CONFIG_ARCH_CHIP_LPC17XX=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_ARCH="arm"
CONFIG_ARMV7M_TOOLCHAIN_CODEREDL=y
CONFIG_BOARD_LOOPSPERMSEC=8079
CONFIG_DISABLE_ENVIRON=y
CONFIG_DISABLE_MOUNTPOINT=y
CONFIG_DISABLE_POLL=y
CONFIG_DISABLE_POSIX_TIMERS=y
CONFIG_EXAMPLES_NX=y
CONFIG_EXAMPLES_NX_BGCOLOR=0
CONFIG_EXAMPLES_NX_BPP=1
CONFIG_EXAMPLES_NX_COLOR1=1
@ -21,12 +22,11 @@ CONFIG_EXAMPLES_NX_COLOR2=1
CONFIG_EXAMPLES_NX_FONTCOLOR=0
CONFIG_EXAMPLES_NX_TBCOLOR=1
CONFIG_EXAMPLES_NX_TOOLBAR_HEIGHT=4
CONFIG_EXAMPLES_NX=y
CONFIG_INTELHEX_BINARY=y
CONFIG_LCD=y
CONFIG_LCD_MAXCONTRAST=255
CONFIG_LCD_MAXPOWER=2
CONFIG_LCD_UG9664HSWAG01=y
CONFIG_LCD=y
CONFIG_LPC17_SSP1=y
CONFIG_LPC17_UART3=y
CONFIG_MAX_TASKS=16
@ -35,9 +35,6 @@ CONFIG_MM_REGIONS=2
CONFIG_MQ_MAXMSGSIZE=64
CONFIG_NFILE_DESCRIPTORS=12
CONFIG_NFILE_STREAMS=12
CONFIG_NX_BLOCKING=y
CONFIG_NX_KBD=y
CONFIG_NX_XYINPUT_MOUSE=y
CONFIG_NX=y
CONFIG_NXFONT_SANS23X27=y
CONFIG_NXSTART_EXTERNINIT=y
@ -45,6 +42,9 @@ CONFIG_NXTK_BORDERCOLOR1=1
CONFIG_NXTK_BORDERCOLOR2=0
CONFIG_NXTK_BORDERCOLOR3=1
CONFIG_NXTK_BORDERWIDTH=2
CONFIG_NX_BLOCKING=y
CONFIG_NX_KBD=y
CONFIG_NX_XYINPUT_MOUSE=y
CONFIG_PREALLOC_MQ_MSGS=4
CONFIG_PREALLOC_TIMERS=4
CONFIG_PREALLOC_WDOGS=4
@ -52,8 +52,8 @@ CONFIG_RAM_SIZE=32768
CONFIG_RAM_START=0x10000000
CONFIG_RR_INTERVAL=200
CONFIG_SDCLONE_DISABLE=y
CONFIG_SPI_CMDDATA=y
CONFIG_SPI=y
CONFIG_SPI_CMDDATA=y
CONFIG_START_DAY=18
CONFIG_START_MONTH=4
CONFIG_START_YEAR=2011

1
configs/lpcxpresso-lpc1768/scripts/ld.script
View file

@ -47,6 +47,7 @@ MEMORY
}
OUTPUT_ARCH(arm)
EXTERN(_vectors)
ENTRY(_stext)
SECTIONS
{

16
configs/lpcxpresso-lpc1768/thttpd/defconfig
View file

@ -1,9 +1,9 @@
CONFIG_ARCH_BOARD_LPCXPRESSO=y
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="lpcxpresso-lpc1768"
CONFIG_ARCH_BOARD_LPCXPRESSO=y
CONFIG_ARCH_CHIP_LPC1768=y
CONFIG_ARCH_CHIP_LPC17XX=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_ARCH="arm"
CONFIG_ARMV7M_TOOLCHAIN_CODEREDL=y
CONFIG_BOARD_LOOPSPERMSEC=8079
CONFIG_DEV_LOWCONSOLE=y
@ -11,8 +11,8 @@ CONFIG_DISABLE_MQUEUE=y
CONFIG_DISABLE_POSIX_TIMERS=y
CONFIG_DISABLE_PTHREAD=y
CONFIG_ETH0_PHY_LAN8720=y
CONFIG_EXAMPLES_THTTPD_NOMAC=y
CONFIG_EXAMPLES_THTTPD=y
CONFIG_EXAMPLES_THTTPD_NOMAC=y
CONFIG_FS_ROMFS=y
CONFIG_INTELHEX_BINARY=y
CONFIG_LPC17_ETHERNET=y
@ -20,16 +20,16 @@ CONFIG_LPC17_UART3=y
CONFIG_MAX_TASKS=16
CONFIG_MAX_WDOGPARMS=2
CONFIG_MM_REGIONS=2
CONFIG_NET=y
CONFIG_NETUTILS_NETLIB=y
CONFIG_NETUTILS_THTTPD=y
CONFIG_NET_EMACRAM_SIZE=15776
CONFIG_NET_ICMP=y
CONFIG_NET_MAX_LISTENPORTS=8
CONFIG_NET_SOCKOPTS=y
CONFIG_NET_TCP_CONNS=16
CONFIG_NET_TCP=y
CONFIG_NET_TCPBACKLOG=y
CONFIG_NET=y
CONFIG_NETUTILS_NETLIB=y
CONFIG_NETUTILS_THTTPD=y
CONFIG_NET_TCP_CONNS=16
CONFIG_NFILE_DESCRIPTORS=8
CONFIG_NFILE_STREAMS=8
CONFIG_NSOCKET_DESCRIPTORS=16
@ -52,6 +52,6 @@ CONFIG_THTTPD_CGI_PRIORITY=50
CONFIG_THTTPD_CGI_STACKSIZE=1024
CONFIG_THTTPD_IOBUFFERSIZE=1024
CONFIG_UART3_SERIAL_CONSOLE=y
CONFIG_USER_ENTRYPOINT="thttp_main"
CONFIG_USERMAIN_STACKSIZE=8192
CONFIG_USER_ENTRYPOINT="thttp_main"
CONFIG_WDOG_INTRESERVE=1

12
configs/lpcxpresso-lpc1768/usbmsc/defconfig
View file

@ -1,11 +1,11 @@
# CONFIG_SPI_CALLBACK is not set
# CONFIG_SPI_EXCHANGE is not set
CONFIG_ARCH_BOARD_LPCXPRESSO=y
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="lpcxpresso-lpc1768"
CONFIG_ARCH_BOARD_LPCXPRESSO=y
CONFIG_ARCH_CHIP_LPC1768=y
CONFIG_ARCH_CHIP_LPC17XX=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_ARCH="arm"
CONFIG_ARMV7M_TOOLCHAIN_CODEREDL=y
CONFIG_BOARD_LOOPSPERMSEC=8079
CONFIG_DISABLE_POLL=y
@ -13,15 +13,15 @@ CONFIG_INTELHEX_BINARY=y
CONFIG_LIB_BOARDCTL=y
CONFIG_LPC17_SSP1=y
CONFIG_LPC17_UART3=y
CONFIG_LPC17_USBDEV=y
CONFIG_LPC17_USBDEV_NDMADESCRIPTORS=0
CONFIG_LPC17_USBDEV_NOLED=y
CONFIG_LPC17_USBDEV_NOVBUS=y
CONFIG_LPC17_USBDEV=y
CONFIG_MAX_TASKS=16
CONFIG_MAX_WDOGPARMS=2
CONFIG_MM_REGIONS=2
CONFIG_MMCSD_SPICLOCK=12500000
CONFIG_MMCSD=y
CONFIG_MMCSD_SPICLOCK=12500000
CONFIG_MM_REGIONS=2
CONFIG_NFILE_DESCRIPTORS=8
CONFIG_NFILE_STREAMS=8
CONFIG_PREALLOC_MQ_MSGS=4
@ -38,6 +38,7 @@ CONFIG_START_YEAR=2011
CONFIG_SYSTEM_USBMSC=y
CONFIG_TASK_NAME_SIZE=0
CONFIG_UART3_SERIAL_CONSOLE=y
CONFIG_USBMSC=y
CONFIG_USBMSC_BULKINREQLEN=256
CONFIG_USBMSC_BULKOUTREQLEN=256
CONFIG_USBMSC_EPBULKIN=5
@ -46,6 +47,5 @@ CONFIG_USBMSC_NWRREQS=2
CONFIG_USBMSC_PRODUCTSTR="USBdev Storage"
CONFIG_USBMSC_REMOVABLE=y
CONFIG_USBMSC_VERSIONNO=0x0399
CONFIG_USBMSC=y
CONFIG_USER_ENTRYPOINT="msconn_main"
CONFIG_WDOG_INTRESERVE=1

9
configs/mbed/nsh/defconfig
View file

@ -1,18 +1,17 @@
# CONFIG_MMCSD_HAVE_CARDDETECT is not set
# CONFIG_MMCSD_MMCSUPPORT is not set
# CONFIG_NSH_ARGCAT is not set
# CONFIG_NSH_CMDOPT_DF_H is not set
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
# CONFIG_NSH_CMDPARMS is not set
# CONFIG_NSH_DISABLE_IFCONFIG is not set
# CONFIG_NSH_DISABLE_PS is not set
# CONFIG_SPI_EXCHANGE is not set
CONFIG_ARCH_BOARD_MBED=y
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="mbed"
CONFIG_ARCH_BOARD_MBED=y
CONFIG_ARCH_CHIP_LPC1768=y
CONFIG_ARCH_CHIP_LPC17XX=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_ARCH="arm"
CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y
CONFIG_BOARD_LOOPSPERMSEC=7982
CONFIG_DISABLE_POLL=y
@ -22,9 +21,9 @@ CONFIG_LPC17_SSP0=y
CONFIG_LPC17_UART0=y
CONFIG_MAX_TASKS=16
CONFIG_MAX_WDOGPARMS=2
CONFIG_MM_REGIONS=2
CONFIG_MMCSD_SPICLOCK=12500000
CONFIG_MMCSD=y
CONFIG_MMCSD_SPICLOCK=12500000
CONFIG_MM_REGIONS=2
CONFIG_MTD=y
CONFIG_NFILE_DESCRIPTORS=8
CONFIG_NFILE_STREAMS=8

1
configs/mbed/scripts/ld.script
View file

@ -47,6 +47,7 @@ MEMORY
}
OUTPUT_ARCH(arm)
EXTERN(_vectors)
ENTRY(_stext)
SECTIONS
{

9
configs/mcb1700/nsh/defconfig
View file

@ -1,18 +1,17 @@
# CONFIG_MMCSD_HAVE_CARDDETECT is not set
# CONFIG_MMCSD_MMCSUPPORT is not set
# CONFIG_NSH_ARGCAT is not set
# CONFIG_NSH_CMDOPT_DF_H is not set
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
# CONFIG_NSH_CMDPARMS is not set
# CONFIG_NSH_DISABLE_IFCONFIG is not set
# CONFIG_NSH_DISABLE_PS is not set
# CONFIG_SPI_EXCHANGE is not set
CONFIG_ARCH_BOARD_MCB1700=y
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="mcb1700"
CONFIG_ARCH_BOARD_MCB1700=y
CONFIG_ARCH_CHIP_LPC1768=y
CONFIG_ARCH_CHIP_LPC17XX=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_ARCH="arm"
CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y
CONFIG_BOARD_LOOPSPERMSEC=7982
CONFIG_DISABLE_POLL=y
@ -22,9 +21,9 @@ CONFIG_LPC17_SSP0=y
CONFIG_LPC17_UART0=y
CONFIG_MAX_TASKS=16
CONFIG_MAX_WDOGPARMS=2
CONFIG_MM_REGIONS=2
CONFIG_MMCSD_SPICLOCK=12500000
CONFIG_MMCSD=y
CONFIG_MMCSD_SPICLOCK=12500000
CONFIG_MM_REGIONS=2
CONFIG_MTD=y
CONFIG_NFILE_DESCRIPTORS=8
CONFIG_NFILE_STREAMS=8

1
configs/mcb1700/scripts/ld.script
View file

@ -47,6 +47,7 @@ MEMORY
}
OUTPUT_ARCH(arm)
EXTERN(_vectors)
ENTRY(_stext)
SECTIONS
{

21
configs/olimex-lpc1766stk/ftpc/defconfig
View file

@ -1,16 +1,15 @@
# CONFIG_NSH_ARGCAT is not set
# CONFIG_NSH_CMDOPT_DF_H is not set
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
# CONFIG_NSH_CMDPARMS is not set
# CONFIG_NSH_DISABLE_IFCONFIG is not set
# CONFIG_NSH_DISABLE_PS is not set
# CONFIG_SPI_EXCHANGE is not set
CONFIG_ARCH_BOARD_LPC1766STK=y
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="olimex-lpc1766stk"
CONFIG_ARCH_BOARD_LPC1766STK=y
CONFIG_ARCH_CHIP_LPC1766=y
CONFIG_ARCH_CHIP_LPC17XX=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_ARCH="arm"
CONFIG_BOARD_LOOPSPERMSEC=8111
CONFIG_BUILTIN=y
CONFIG_ETH0_PHY_KS8721=y
@ -24,26 +23,26 @@ CONFIG_LPC17_SSP1=y
CONFIG_LPC17_UART0=y
CONFIG_MAX_TASKS=16
CONFIG_MAX_WDOGPARMS=2
CONFIG_MM_REGIONS=2
CONFIG_MMCSD=y
CONFIG_MM_REGIONS=2
CONFIG_NET=y
CONFIG_NETDB_DNSCLIENT=y
CONFIG_NETDB_DNSCLIENT_ENTRIES=4
CONFIG_NETUTILS_FTPC=y
CONFIG_NET_BROADCAST=y
CONFIG_NET_EMACRAM_SIZE=8512
CONFIG_NET_ETH_TCP_RECVWNDO=550
CONFIG_NET_ICMP_SOCKET=y
CONFIG_NET_ICMP=y
CONFIG_NET_ICMP_SOCKET=y
CONFIG_NET_MAX_LISTENPORTS=8
CONFIG_NET_NRXDESC=7
CONFIG_NET_NTXDESC=7
CONFIG_NET_SOCKOPTS=y
CONFIG_NET_TCP_CONNS=16
CONFIG_NET_TCP=y
CONFIG_NET_TCPBACKLOG=y
CONFIG_NET_UDP_CHECKSUMS=y
CONFIG_NET_TCP_CONNS=16
CONFIG_NET_UDP=y
CONFIG_NET=y
CONFIG_NETDB_DNSCLIENT_ENTRIES=4
CONFIG_NETDB_DNSCLIENT=y
CONFIG_NETUTILS_FTPC=y
CONFIG_NET_UDP_CHECKSUMS=y
CONFIG_NFILE_DESCRIPTORS=8
CONFIG_NFILE_STREAMS=12
CONFIG_NSH_ARCHINIT=y

25
configs/olimex-lpc1766stk/hidmouse/defconfig
View file

@ -1,22 +1,21 @@
# CONFIG_NSH_ARGCAT is not set
# CONFIG_NSH_CMDOPT_DF_H is not set
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
# CONFIG_NSH_CMDPARMS is not set
# CONFIG_NSH_DISABLE_IFCONFIG is not set
# CONFIG_NSH_DISABLE_PS is not set
CONFIG_ARCH_BOARD_LPC1766STK=y
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="olimex-lpc1766stk"
CONFIG_ARCH_BOARD_LPC1766STK=y
CONFIG_ARCH_CHIP_LPC1766=y
CONFIG_ARCH_CHIP_LPC17XX=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_ARCH="arm"
CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y
CONFIG_BOARD_LOOPSPERMSEC=8111
CONFIG_BUILTIN=y
CONFIG_EXAMPLES_NSH=y
CONFIG_EXAMPLES_TOUCHSCREEN=y
CONFIG_EXAMPLES_TOUCHSCREEN_DEVPATH="/dev/mouse0"
CONFIG_EXAMPLES_TOUCHSCREEN_MOUSE=y
CONFIG_EXAMPLES_TOUCHSCREEN=y
CONFIG_FAT_LCNAMES=y
CONFIG_FAT_LFN=y
CONFIG_FS_FAT=y
@ -27,15 +26,6 @@ CONFIG_LPC17_USBHOST=y
CONFIG_MAX_TASKS=16
CONFIG_MAX_WDOGPARMS=2
CONFIG_MM_REGIONS=2
CONFIG_NET_BROADCAST=y
CONFIG_NET_ICMP_SOCKET=y
CONFIG_NET_ICMP=y
CONFIG_NET_MAX_LISTENPORTS=8
CONFIG_NET_SOCKOPTS=y
CONFIG_NET_TCP_SPLIT=y
CONFIG_NET_TCP=y
CONFIG_NET_UDP_CHECKSUMS=y
CONFIG_NET_UDP=y
CONFIG_NET=y
CONFIG_NETDB_DNSCLIENT=y
CONFIG_NETDB_DNSSERVER_NOADDR=y
@ -43,6 +33,15 @@ CONFIG_NETUTILS_DHCPC=y
CONFIG_NETUTILS_TELNETD=y
CONFIG_NETUTILS_TFTPC=y
CONFIG_NETUTILS_WEBCLIENT=y
CONFIG_NET_BROADCAST=y
CONFIG_NET_ICMP=y
CONFIG_NET_ICMP_SOCKET=y
CONFIG_NET_MAX_LISTENPORTS=8
CONFIG_NET_SOCKOPTS=y
CONFIG_NET_TCP=y
CONFIG_NET_TCP_SPLIT=y
CONFIG_NET_UDP=y
CONFIG_NET_UDP_CHECKSUMS=y
CONFIG_NFILE_DESCRIPTORS=8
CONFIG_NFILE_STREAMS=8
CONFIG_NSH_ARCHINIT=y

10
configs/olimex-lpc1766stk/nettest/defconfig
View file

@ -1,9 +1,9 @@
CONFIG_ARCH_BOARD_LPC1766STK=y
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="olimex-lpc1766stk"
CONFIG_ARCH_BOARD_LPC1766STK=y
CONFIG_ARCH_CHIP_LPC1766=y
CONFIG_ARCH_CHIP_LPC17XX=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_ARCH="arm"
CONFIG_ARMV7M_OABI_TOOLCHAIN=y
CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y
CONFIG_BOARD_LOOPSPERMSEC=8111
@ -14,13 +14,15 @@ CONFIG_DISABLE_MQUEUE=y
CONFIG_DISABLE_POLL=y
CONFIG_DISABLE_PTHREAD=y
CONFIG_ETH0_PHY_KS8721=y
CONFIG_EXAMPLES_NETTEST_NOMAC=y
CONFIG_EXAMPLES_NETTEST=y
CONFIG_EXAMPLES_NETTEST_NOMAC=y
CONFIG_INTELHEX_BINARY=y
CONFIG_LPC17_ETHERNET=y
CONFIG_LPC17_UART0=y
CONFIG_MAX_TASKS=8
CONFIG_MM_REGIONS=2
CONFIG_NET=y
CONFIG_NETUTILS_NETLIB=y
CONFIG_NET_EMACRAM_SIZE=7296
CONFIG_NET_ICMP=y
CONFIG_NET_MAX_LISTENPORTS=8
@ -28,8 +30,6 @@ CONFIG_NET_NRXDESC=6
CONFIG_NET_NTXDESC=6
CONFIG_NET_SOCKOPTS=y
CONFIG_NET_TCP=y
CONFIG_NET=y
CONFIG_NETUTILS_NETLIB=y
CONFIG_NFILE_DESCRIPTORS=8
CONFIG_NFILE_STREAMS=8
CONFIG_NUNGET_CHARS=0

33
configs/olimex-lpc1766stk/nsh/defconfig
View file

@ -1,17 +1,16 @@
# CONFIG_MMCSD_HAVE_CARDDETECT is not set
# CONFIG_MMCSD_MMCSUPPORT is not set
# CONFIG_NSH_ARGCAT is not set
# CONFIG_NSH_CMDOPT_DF_H is not set
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
# CONFIG_NSH_CMDPARMS is not set
# CONFIG_SPI_CALLBACK is not set
# CONFIG_SPI_EXCHANGE is not set
CONFIG_ARCH_BOARD_LPC1766STK=y
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="olimex-lpc1766stk"
CONFIG_ARCH_BOARD_LPC1766STK=y
CONFIG_ARCH_CHIP_LPC1766=y
CONFIG_ARCH_CHIP_LPC17XX=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_ARCH="arm"
CONFIG_ARMV7M_OABI_TOOLCHAIN=y
CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y
CONFIG_BOARD_LOOPSPERMSEC=8111
@ -28,21 +27,9 @@ CONFIG_LPC17_SSP1=y
CONFIG_LPC17_UART0=y
CONFIG_MAX_TASKS=16
CONFIG_MAX_WDOGPARMS=2
CONFIG_MM_REGIONS=2
CONFIG_MMCSD_SPICLOCK=12500000
CONFIG_MMCSD=y
CONFIG_NET_BROADCAST=y
CONFIG_NET_EMACRAM_SIZE=7296
CONFIG_NET_ICMP_SOCKET=y
CONFIG_NET_ICMP=y
CONFIG_NET_MAX_LISTENPORTS=8
CONFIG_NET_NRXDESC=6
CONFIG_NET_NTXDESC=6
CONFIG_NET_SOCKOPTS=y
CONFIG_NET_TCP_SPLIT=y
CONFIG_NET_TCP=y
CONFIG_NET_UDP_CHECKSUMS=y
CONFIG_NET_UDP=y
CONFIG_MMCSD_SPICLOCK=12500000
CONFIG_MM_REGIONS=2
CONFIG_NET=y
CONFIG_NETDB_DNSCLIENT=y
CONFIG_NETDB_DNSSERVER_NOADDR=y
@ -50,6 +37,18 @@ CONFIG_NETUTILS_DHCPC=y
CONFIG_NETUTILS_TELNETD=y
CONFIG_NETUTILS_TFTPC=y
CONFIG_NETUTILS_WEBCLIENT=y
CONFIG_NET_BROADCAST=y
CONFIG_NET_EMACRAM_SIZE=7296
CONFIG_NET_ICMP=y
CONFIG_NET_ICMP_SOCKET=y
CONFIG_NET_MAX_LISTENPORTS=8
CONFIG_NET_NRXDESC=6
CONFIG_NET_NTXDESC=6
CONFIG_NET_SOCKOPTS=y
CONFIG_NET_TCP=y
CONFIG_NET_TCP_SPLIT=y
CONFIG_NET_UDP=y
CONFIG_NET_UDP_CHECKSUMS=y
CONFIG_NFILE_DESCRIPTORS=8
CONFIG_NFILE_STREAMS=8
CONFIG_NSH_ARCHINIT=y

1
configs/olimex-lpc1766stk/scripts/ld.script
View file

@ -47,6 +47,7 @@ MEMORY
}
OUTPUT_ARCH(arm)
EXTERN(_vectors)
ENTRY(_stext)
SECTIONS
{

16
configs/olimex-lpc1766stk/slip-httpd/defconfig
View file

@ -1,17 +1,17 @@
# CONFIG_NET_ETHERNET is not set
CONFIG_ARCH_BOARD_LPC1766STK=y
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="olimex-lpc1766stk"
CONFIG_ARCH_BOARD_LPC1766STK=y
CONFIG_ARCH_CHIP_LPC1766=y
CONFIG_ARCH_CHIP_LPC17XX=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_ARCH="arm"
CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y
CONFIG_BOARD_LOOPSPERMSEC=8111
CONFIG_DISABLE_MQUEUE=y
CONFIG_DISABLE_POSIX_TIMERS=y
CONFIG_DISABLE_PTHREAD=y
CONFIG_EXAMPLES_THTTPD_NOMAC=y
CONFIG_EXAMPLES_THTTPD=y
CONFIG_EXAMPLES_THTTPD_NOMAC=y
CONFIG_FS_ROMFS=y
CONFIG_INTELHEX_BINARY=y
CONFIG_LPC17_UART0=y
@ -19,16 +19,16 @@ CONFIG_LPC17_UART1=y
CONFIG_MAX_TASKS=16
CONFIG_MAX_WDOGPARMS=2
CONFIG_MM_REGIONS=2
CONFIG_NET=y
CONFIG_NETUTILS_NETLIB=y
CONFIG_NETUTILS_THTTPD=y
CONFIG_NET_ICMP=y
CONFIG_NET_MAX_LISTENPORTS=8
CONFIG_NET_SLIP=y
CONFIG_NET_SOCKOPTS=y
CONFIG_NET_TCP_CONNS=16
CONFIG_NET_TCP=y
CONFIG_NET_TCPBACKLOG=y
CONFIG_NET=y
CONFIG_NETUTILS_NETLIB=y
CONFIG_NETUTILS_THTTPD=y
CONFIG_NET_TCP_CONNS=16
CONFIG_NFILE_DESCRIPTORS=8
CONFIG_NFILE_STREAMS=8
CONFIG_NSOCKET_DESCRIPTORS=16
@ -51,6 +51,6 @@ CONFIG_THTTPD_IOBUFFERSIZE=1024
CONFIG_UART0_BAUD=57600
CONFIG_UART0_SERIAL_CONSOLE=y
CONFIG_UART1_BAUD=57600
CONFIG_USER_ENTRYPOINT="thttp_main"
CONFIG_USERMAIN_STACKSIZE=8192
CONFIG_USER_ENTRYPOINT="thttp_main"
CONFIG_WDOG_INTRESERVE=1

16
configs/olimex-lpc1766stk/thttpd-binfs/defconfig
View file

@ -1,9 +1,9 @@
CONFIG_ARCH_BOARD_LPC1766STK=y
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="olimex-lpc1766stk"
CONFIG_ARCH_BOARD_LPC1766STK=y
CONFIG_ARCH_CHIP_LPC1766=y
CONFIG_ARCH_CHIP_LPC17XX=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_ARCH="arm"
CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y
CONFIG_BOARD_LOOPSPERMSEC=8111
CONFIG_BUILTIN=y
@ -12,8 +12,8 @@ CONFIG_DISABLE_MQUEUE=y
CONFIG_DISABLE_POSIX_TIMERS=y
CONFIG_DISABLE_PTHREAD=y
CONFIG_ETH0_PHY_KS8721=y
CONFIG_EXAMPLES_THTTPD_NOMAC=y
CONFIG_EXAMPLES_THTTPD=y
CONFIG_EXAMPLES_THTTPD_NOMAC=y
CONFIG_FS_BINFS=y
CONFIG_FS_ROMFS=y
CONFIG_FS_UNIONFS=y
@ -24,16 +24,16 @@ CONFIG_LPC17_UART0=y
CONFIG_MAX_TASKS=16
CONFIG_MAX_WDOGPARMS=2
CONFIG_MM_REGIONS=2
CONFIG_NET=y
CONFIG_NETUTILS_NETLIB=y
CONFIG_NETUTILS_THTTPD=y
CONFIG_NET_EMACRAM_SIZE=15776
CONFIG_NET_ICMP=y
CONFIG_NET_MAX_LISTENPORTS=8
CONFIG_NET_SOCKOPTS=y
CONFIG_NET_TCP_CONNS=16
CONFIG_NET_TCP=y
CONFIG_NET_TCPBACKLOG=y
CONFIG_NET=y
CONFIG_NETUTILS_NETLIB=y
CONFIG_NETUTILS_THTTPD=y
CONFIG_NET_TCP_CONNS=16
CONFIG_NFILE_DESCRIPTORS=8
CONFIG_NFILE_STREAMS=8
CONFIG_NSOCKET_DESCRIPTORS=16
@ -54,6 +54,6 @@ CONFIG_THTTPD_CGI_BYTECOUNT=20000
CONFIG_THTTPD_IOBUFFERSIZE=1024
CONFIG_UART0_BAUD=57600
CONFIG_UART0_SERIAL_CONSOLE=y
CONFIG_USER_ENTRYPOINT="thttp_main"
CONFIG_USERMAIN_STACKSIZE=8192
CONFIG_USER_ENTRYPOINT="thttp_main"
CONFIG_WDOG_INTRESERVE=1

16
configs/olimex-lpc1766stk/thttpd-nxflat/defconfig
View file

@ -1,9 +1,9 @@
CONFIG_ARCH_BOARD_LPC1766STK=y
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="olimex-lpc1766stk"
CONFIG_ARCH_BOARD_LPC1766STK=y
CONFIG_ARCH_CHIP_LPC1766=y
CONFIG_ARCH_CHIP_LPC17XX=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_ARCH="arm"
CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y
CONFIG_BOARD_LOOPSPERMSEC=8111
CONFIG_DEV_LOWCONSOLE=y
@ -11,8 +11,8 @@ CONFIG_DISABLE_MQUEUE=y
CONFIG_DISABLE_POSIX_TIMERS=y
CONFIG_DISABLE_PTHREAD=y
CONFIG_ETH0_PHY_KS8721=y
CONFIG_EXAMPLES_THTTPD_NOMAC=y
CONFIG_EXAMPLES_THTTPD=y
CONFIG_EXAMPLES_THTTPD_NOMAC=y
CONFIG_FS_ROMFS=y
CONFIG_INTELHEX_BINARY=y
CONFIG_LPC17_ETHERNET=y
@ -20,16 +20,16 @@ CONFIG_LPC17_UART0=y
CONFIG_MAX_TASKS=16
CONFIG_MAX_WDOGPARMS=2
CONFIG_MM_REGIONS=2
CONFIG_NET=y
CONFIG_NETUTILS_NETLIB=y
CONFIG_NETUTILS_THTTPD=y
CONFIG_NET_EMACRAM_SIZE=15776
CONFIG_NET_ICMP=y
CONFIG_NET_MAX_LISTENPORTS=8
CONFIG_NET_SOCKOPTS=y
CONFIG_NET_TCP_CONNS=16
CONFIG_NET_TCP=y
CONFIG_NET_TCPBACKLOG=y
CONFIG_NET=y
CONFIG_NETUTILS_NETLIB=y
CONFIG_NETUTILS_THTTPD=y
CONFIG_NET_TCP_CONNS=16
CONFIG_NFILE_DESCRIPTORS=8
CONFIG_NFILE_STREAMS=8
CONFIG_NSOCKET_DESCRIPTORS=16
@ -53,6 +53,6 @@ CONFIG_THTTPD_CGI_STACKSIZE=1024
CONFIG_THTTPD_IOBUFFERSIZE=1024
CONFIG_UART0_BAUD=57600
CONFIG_UART0_SERIAL_CONSOLE=y
CONFIG_USER_ENTRYPOINT="thttp_main"
CONFIG_USERMAIN_STACKSIZE=8192
CONFIG_USER_ENTRYPOINT="thttp_main"
CONFIG_WDOG_INTRESERVE=1

12
configs/olimex-lpc1766stk/usbmsc/defconfig
View file

@ -2,12 +2,12 @@
# CONFIG_MMCSD_MMCSUPPORT is not set
# CONFIG_SPI_CALLBACK is not set
# CONFIG_SPI_EXCHANGE is not set
CONFIG_ARCH_BOARD_LPC1766STK=y
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="olimex-lpc1766stk"
CONFIG_ARCH_BOARD_LPC1766STK=y
CONFIG_ARCH_CHIP_LPC1766=y
CONFIG_ARCH_CHIP_LPC17XX=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_ARCH="arm"
CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y
CONFIG_BOARD_LOOPSPERMSEC=8111
CONFIG_DISABLE_POLL=y
@ -15,13 +15,13 @@ CONFIG_INTELHEX_BINARY=y
CONFIG_LIB_BOARDCTL=y
CONFIG_LPC17_SSP1=y
CONFIG_LPC17_UART0=y
CONFIG_LPC17_USBDEV_NDMADESCRIPTORS=0
CONFIG_LPC17_USBDEV=y
CONFIG_LPC17_USBDEV_NDMADESCRIPTORS=0
CONFIG_MAX_TASKS=16
CONFIG_MAX_WDOGPARMS=2
CONFIG_MM_REGIONS=2
CONFIG_MMCSD_SPICLOCK=12500000
CONFIG_MMCSD=y
CONFIG_MMCSD_SPICLOCK=12500000
CONFIG_MM_REGIONS=2
CONFIG_NFILE_DESCRIPTORS=8
CONFIG_NFILE_STREAMS=8
CONFIG_PREALLOC_MQ_MSGS=4
@ -39,6 +39,7 @@ CONFIG_SYSTEM_USBMSC=y
CONFIG_TASK_NAME_SIZE=0
CONFIG_UART0_BAUD=57600
CONFIG_UART0_SERIAL_CONSOLE=y
CONFIG_USBMSC=y
CONFIG_USBMSC_BULKINREQLEN=256
CONFIG_USBMSC_BULKOUTREQLEN=256
CONFIG_USBMSC_EPBULKIN=5
@ -47,6 +48,5 @@ CONFIG_USBMSC_NWRREQS=2
CONFIG_USBMSC_PRODUCTSTR="USBdev Storage"
CONFIG_USBMSC_REMOVABLE=y
CONFIG_USBMSC_VERSIONNO=0x0399
CONFIG_USBMSC=y
CONFIG_USER_ENTRYPOINT="msconn_main"
CONFIG_WDOG_INTRESERVE=1

8
configs/olimex-lpc1766stk/usbserial/defconfig
View file

@ -1,9 +1,9 @@
CONFIG_ARCH_BOARD_LPC1766STK=y
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="olimex-lpc1766stk"
CONFIG_ARCH_BOARD_LPC1766STK=y
CONFIG_ARCH_CHIP_LPC1766=y
CONFIG_ARCH_CHIP_LPC17XX=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_ARCH="arm"
CONFIG_ARMV7M_OABI_TOOLCHAIN=y
CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y
CONFIG_BOARD_LOOPSPERMSEC=8111
@ -13,19 +13,19 @@ CONFIG_EXAMPLES_USBSERIAL=y
CONFIG_INTELHEX_BINARY=y
CONFIG_LIB_BOARDCTL=y
CONFIG_LPC17_UART0=y
CONFIG_LPC17_USBDEV_NDMADESCRIPTORS=0
CONFIG_LPC17_USBDEV=y
CONFIG_LPC17_USBDEV_NDMADESCRIPTORS=0
CONFIG_MAX_TASKS=16
CONFIG_MAX_WDOGPARMS=2
CONFIG_MM_REGIONS=2
CONFIG_NFILE_DESCRIPTORS=8
CONFIG_NFILE_STREAMS=8
CONFIG_PL2303=y
CONFIG_PL2303_EPBULKIN=5
CONFIG_PL2303_PRODUCTSTR="USBdev Serial"
CONFIG_PL2303_RXBUFSIZE=512
CONFIG_PL2303_TXBUFSIZE=512
CONFIG_PL2303_VENDORSTR="Nuttx"
CONFIG_PL2303=y
CONFIG_PREALLOC_MQ_MSGS=4
CONFIG_PREALLOC_TIMERS=4
CONFIG_PREALLOC_WDOGS=8

33
configs/olimex-lpc1766stk/zmodem/defconfig
View file

@ -1,16 +1,15 @@
# CONFIG_MMCSD_HAVE_CARDDETECT is not set
# CONFIG_MMCSD_MMCSUPPORT is not set
# CONFIG_NSH_CMDOPT_DF_H is not set
# CONFIG_NSH_DISABLE_IFCONFIG is not set
# CONFIG_NSH_DISABLE_PS is not set
# CONFIG_SPI_CALLBACK is not set
# CONFIG_SPI_EXCHANGE is not set
CONFIG_ARCH_BOARD_LPC1766STK=y
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="olimex-lpc1766stk"
CONFIG_ARCH_BOARD_LPC1766STK=y
CONFIG_ARCH_CHIP_LPC1766=y
CONFIG_ARCH_CHIP_LPC17XX=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_ARCH="arm"
CONFIG_ARMV7M_OABI_TOOLCHAIN=y
CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y
CONFIG_BOARD_LOOPSPERMSEC=8111
@ -27,26 +26,26 @@ CONFIG_LPC17_UART0=y
CONFIG_LPC17_UART1=y
CONFIG_MAX_TASKS=16
CONFIG_MAX_WDOGPARMS=2
CONFIG_MM_REGIONS=2
CONFIG_MMCSD_SPICLOCK=12500000
CONFIG_MMCSD=y
CONFIG_NET_EMACRAM_SIZE=7296
CONFIG_NET_ICMP_SOCKET=y
CONFIG_NET_ICMP=y
CONFIG_NET_MAX_LISTENPORTS=8
CONFIG_NET_NRXDESC=6
CONFIG_NET_NTXDESC=6
CONFIG_NET_SOCKOPTS=y
CONFIG_NET_TCP_SPLIT=y
CONFIG_NET_TCP=y
CONFIG_NET_UDP_CHECKSUMS=y
CONFIG_NET_UDP=y
CONFIG_MMCSD_SPICLOCK=12500000
CONFIG_MM_REGIONS=2
CONFIG_NET=y
CONFIG_NETDB_DNSCLIENT=y
CONFIG_NETDB_DNSSERVER_NOADDR=y
CONFIG_NETUTILS_TELNETD=y
CONFIG_NETUTILS_TFTPC=y
CONFIG_NETUTILS_WEBCLIENT=y
CONFIG_NET_EMACRAM_SIZE=7296
CONFIG_NET_ICMP=y
CONFIG_NET_ICMP_SOCKET=y
CONFIG_NET_MAX_LISTENPORTS=8
CONFIG_NET_NRXDESC=6
CONFIG_NET_NTXDESC=6
CONFIG_NET_SOCKOPTS=y
CONFIG_NET_TCP=y
CONFIG_NET_TCP_SPLIT=y
CONFIG_NET_UDP=y
CONFIG_NET_UDP_CHECKSUMS=y
CONFIG_NFILE_DESCRIPTORS=8
CONFIG_NFILE_STREAMS=8
CONFIG_NSH_ARCHINIT=y
@ -73,13 +72,13 @@ CONFIG_START_MONTH=12
CONFIG_START_YEAR=2011
CONFIG_SYMTAB_ORDEREDBYNAME=y
CONFIG_SYSTEM_PING=y
CONFIG_SYSTEM_ZMODEM=y
CONFIG_SYSTEM_ZMODEM_DEVNAME="/dev/ttyS1"
CONFIG_SYSTEM_ZMODEM_MOUNTPOINT="/mnt/sdcard"
CONFIG_SYSTEM_ZMODEM_PKTBUFSIZE=1024
CONFIG_SYSTEM_ZMODEM_RCVBUFSIZE=256
CONFIG_SYSTEM_ZMODEM_RESPTIME=20
CONFIG_SYSTEM_ZMODEM_WRITESIZE=512
CONFIG_SYSTEM_ZMODEM=y
CONFIG_TASK_NAME_SIZE=0
CONFIG_UART0_BAUD=57600
CONFIG_UART0_RXBUFSIZE=1024

8
configs/open1788/fb/defconfig
View file

@ -1,10 +1,10 @@
# CONFIG_NX_DISABLE_32BPP is not set
CONFIG_ARCH_BOARD_OPEN1788=y
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="open1788"
CONFIG_ARCH_BOARD_OPEN1788=y
CONFIG_ARCH_CHIP_LPC1788=y
CONFIG_ARCH_CHIP_LPC17XX=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_ARCH="arm"
CONFIG_BCH=y
CONFIG_BOARD_INITIALIZE=y
CONFIG_BOARD_LOOPSPERMSEC=11934
@ -21,9 +21,9 @@ CONFIG_LPC17_SDCARD=y
CONFIG_LPC17_UART0=y
CONFIG_MAX_TASKS=16
CONFIG_MAX_WDOGPARMS=2
CONFIG_MM_REGIONS=2
CONFIG_MMCSD_SDIO=y
CONFIG_MMCSD=y
CONFIG_MMCSD_SDIO=y
CONFIG_MM_REGIONS=2
CONFIG_NFILE_DESCRIPTORS=8
CONFIG_NFILE_STREAMS=8
CONFIG_NX=y

11
configs/open1788/knsh/defconfig
View file

@ -1,16 +1,16 @@
# CONFIG_LPC17_EMC is not set
# CONFIG_NSH_CMDPARMS is not set
# CONFIG_NSH_DISABLE_IFCONFIG is not set
CONFIG_ARCH_BOARD_OPEN1788=y
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="open1788"
CONFIG_ARCH_BOARD_OPEN1788=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP_LPC1788=y
CONFIG_ARCH_CHIP_LPC17XX=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_ARCH="arm"
CONFIG_ARM_MPU=y
CONFIG_ARMV7M_OABI_TOOLCHAIN=y
CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y
CONFIG_ARM_MPU=y
CONFIG_BCH=y
CONFIG_BOARD_INITIALIZE=y
CONFIG_BOARD_LOOPSPERMSEC=11934
@ -28,14 +28,13 @@ CONFIG_LPC17_SDCARD=y
CONFIG_LPC17_UART0=y
CONFIG_MAX_TASKS=16
CONFIG_MAX_WDOGPARMS=2
CONFIG_MM_REGIONS=2
CONFIG_MMCSD_SDIO=y
CONFIG_MMCSD=y
CONFIG_MMCSD_SDIO=y
CONFIG_MM_REGIONS=2
CONFIG_NFILE_DESCRIPTORS=8
CONFIG_NFILE_STREAMS=8
CONFIG_NSH_DISABLE_DD=y
CONFIG_NSH_DISABLE_LOSETUP=y
CONFIG_NSH_DISABLE_MKFATFS=y
CONFIG_NSH_DISABLE_MKRD=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_READLINE=y

8
configs/open1788/nsh/defconfig
View file

@ -1,12 +1,12 @@
# CONFIG_LPC17_EMC is not set
# CONFIG_NSH_DISABLE_IFCONFIG is not set
# CONFIG_NSH_DISABLE_PS is not set
CONFIG_ARCH_BOARD_OPEN1788=y
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="open1788"
CONFIG_ARCH_BOARD_OPEN1788=y
CONFIG_ARCH_CHIP_LPC1788=y
CONFIG_ARCH_CHIP_LPC17XX=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_ARCH="arm"
CONFIG_ARMV7M_OABI_TOOLCHAIN=y
CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y
CONFIG_BCH=y
@ -24,9 +24,9 @@ CONFIG_LPC17_SDCARD=y
CONFIG_LPC17_UART0=y
CONFIG_MAX_TASKS=16
CONFIG_MAX_WDOGPARMS=2
CONFIG_MM_REGIONS=2
CONFIG_MMCSD_SDIO=y
CONFIG_MMCSD=y
CONFIG_MMCSD_SDIO=y
CONFIG_MM_REGIONS=2
CONFIG_NFILE_DESCRIPTORS=8
CONFIG_NFILE_STREAMS=8
CONFIG_NSH_ARCHINIT=y

12
configs/open1788/nxlines/defconfig
View file

@ -1,18 +1,18 @@
# CONFIG_NX_DISABLE_32BPP is not set
CONFIG_ARCH_BOARD_OPEN1788=y
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="open1788"
CONFIG_ARCH_BOARD_OPEN1788=y
CONFIG_ARCH_CHIP_LPC1788=y
CONFIG_ARCH_CHIP_LPC17XX=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_ARCH="arm"
CONFIG_ARMV7M_OABI_TOOLCHAIN=y
CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y
CONFIG_BCH=y
CONFIG_BOARD_LOOPSPERMSEC=11934
CONFIG_BUILTIN=y
CONFIG_DEV_LOOP=y
CONFIG_EXAMPLES_NXLINES_BPP=32
CONFIG_EXAMPLES_NXLINES=y
CONFIG_EXAMPLES_NXLINES_BPP=32
CONFIG_FAT_LCNAMES=y
CONFIG_FAT_LFN=y
CONFIG_FS_FAT=y
@ -26,16 +26,16 @@ CONFIG_LPC17_SDCARD=y
CONFIG_LPC17_UART0=y
CONFIG_MAX_TASKS=16
CONFIG_MAX_WDOGPARMS=2
CONFIG_MM_REGIONS=2
CONFIG_MMCSD_SDIO=y
CONFIG_MMCSD=y
CONFIG_MMCSD_SDIO=y
CONFIG_MM_REGIONS=2
CONFIG_MQ_MAXMSGSIZE=64
CONFIG_NFILE_DESCRIPTORS=8
CONFIG_NFILE_STREAMS=8
CONFIG_NX_BLOCKING=y
CONFIG_NX=y
CONFIG_NXFONT_SANS23X27=y
CONFIG_NXFONT_SANS28X37B=y
CONFIG_NX_BLOCKING=y
CONFIG_PIPES=y
CONFIG_PREALLOC_MQ_MSGS=4
CONFIG_PREALLOC_TIMERS=4

8
configs/open1788/pdcurses/defconfig
View file

@ -1,11 +1,11 @@
# CONFIG_NSH_DISABLE_IFCONFIG is not set
# CONFIG_NSH_DISABLE_PS is not set
CONFIG_ARCH_BOARD_OPEN1788=y
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="open1788"
CONFIG_ARCH_BOARD_OPEN1788=y
CONFIG_ARCH_CHIP_LPC1788=y
CONFIG_ARCH_CHIP_LPC17XX=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_ARCH="arm"
CONFIG_BCH=y
CONFIG_BOARD_LOOPSPERMSEC=11934
CONFIG_BUILTIN=y
@ -33,9 +33,9 @@ CONFIG_LPC17_SDCARD=y
CONFIG_LPC17_UART0=y
CONFIG_MAX_TASKS=16
CONFIG_MAX_WDOGPARMS=2
CONFIG_MM_REGIONS=2
CONFIG_MMCSD_SDIO=y
CONFIG_MMCSD=y
CONFIG_MMCSD_SDIO=y
CONFIG_MM_REGIONS=2
CONFIG_NFILE_DESCRIPTORS=8
CONFIG_NFILE_STREAMS=8
CONFIG_NSH_ARCHINIT=y

1
configs/open1788/scripts/kernel-space.ld
View file

@ -38,6 +38,7 @@
*/
OUTPUT_ARCH(arm)
EXTERN(_vectors)
ENTRY(_stext)
SECTIONS
{

1
configs/open1788/scripts/ld.script
View file

@ -54,6 +54,7 @@ MEMORY
}
OUTPUT_ARCH(arm)
EXTERN(_vectors)
ENTRY(_stext)
SECTIONS
{

7
configs/teensy-3.x/nsh/defconfig
View file

@ -1,16 +1,15 @@
# CONFIG_ARCH_FPU is not set
# CONFIG_NSH_ARGCAT is not set
# CONFIG_NSH_CMDOPT_DF_H is not set
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
# CONFIG_NSH_CMDPARMS is not set
# CONFIG_NSH_DISABLE_IFCONFIG is not set
# CONFIG_NSH_DISABLE_PS is not set
CONFIG_ARCH_BOARD_TEENSY_3X=y
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="teensy-3.x"
CONFIG_ARCH_BOARD_TEENSY_3X=y
CONFIG_ARCH_CHIP_KINETIS=y
CONFIG_ARCH_CHIP_MK20DX256VLH7=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_ARCH="arm"
CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y
CONFIG_BOARD_LOOPSPERMSEC=6024
CONFIG_BUILTIN=y
@ -21,9 +20,9 @@ CONFIG_EXAMPLES_NSH=y
CONFIG_HOST_WINDOWS=y
CONFIG_INTELHEX_BINARY=y
CONFIG_KINETIS_SERIALBRK_BSDCOMPAT=y
CONFIG_KINETIS_UART_BREAKS=y
CONFIG_KINETIS_UART0=y
CONFIG_KINETIS_UARTFIFOS=y
CONFIG_KINETIS_UART_BREAKS=y
CONFIG_MAX_TASKS=16
CONFIG_MAX_WDOGPARMS=2
CONFIG_NFILE_DESCRIPTORS=8

1
configs/teensy-3.x/scripts/mk20dx128vlh5.ld
View file

@ -55,6 +55,7 @@ MEMORY
}
OUTPUT_ARCH(arm)
EXTERN(_vectors)
ENTRY(_stext)
EXTERN(__flashconfigbytes)
SECTIONS

1
configs/teensy-3.x/scripts/mk20dx256vlh7.ld
View file

@ -55,6 +55,7 @@ MEMORY
}
OUTPUT_ARCH(arm)
EXTERN(_vectors)
ENTRY(_stext)
EXTERN(__flashconfigbytes)
SECTIONS

4
configs/twr-k60n512/nsh/defconfig
View file

@ -1,12 +1,12 @@
# CONFIG_ARCH_FPU is not set
# CONFIG_NSH_DISABLE_IFCONFIG is not set
# CONFIG_NSH_DISABLE_PS is not set
CONFIG_ARCH_BOARD_TWR_K60N512=y
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="twr-k60n512"
CONFIG_ARCH_BOARD_TWR_K60N512=y
CONFIG_ARCH_CHIP_KINETIS=y
CONFIG_ARCH_CHIP_MK60N512VMD100=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_ARCH="arm"
CONFIG_ARMV7M_OABI_TOOLCHAIN=y
CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y
CONFIG_BOARD_LOOPSPERMSEC=9535

1
configs/twr-k60n512/scripts/twr-k60n512.ld
View file

@ -55,6 +55,7 @@ MEMORY
}
OUTPUT_ARCH(arm)
EXTERN(_vectors)
ENTRY(_stext)
EXTERN(__flashconfigbytes)
SECTIONS

12
configs/twr-k64f120m/netnsh/defconfig
View file

@ -1,11 +1,11 @@
# CONFIG_ARCH_FPU is not set
# CONFIG_KINETIS_SDHC_DMA is not set
CONFIG_ARCH_BOARD_TWR_K64F120M=y
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="twr-k64f120m"
CONFIG_ARCH_BOARD_TWR_K64F120M=y
CONFIG_ARCH_CHIP_KINETIS=y
CONFIG_ARCH_CHIP_MK64FN1M0VMD12=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_ARCH="arm"
CONFIG_BOARD_LOOPSPERMSEC=9535
CONFIG_ETH0_PHY_KSZ8041=y
CONFIG_EXAMPLES_NSH=y
@ -21,18 +21,18 @@ CONFIG_KINETIS_SDHC=y
CONFIG_KINETIS_UART1=y
CONFIG_MAX_TASKS=16
CONFIG_MAX_WDOGPARMS=2
CONFIG_MMCSD_SDIO=y
CONFIG_MMCSD=y
CONFIG_MMCSD_SDIO=y
CONFIG_NETUTILS_TELNETD=y
CONFIG_NET_ARP_IPIN=y
CONFIG_NET_ARP_SEND=y
CONFIG_NET_BROADCAST=y
CONFIG_NET_HOSTNAME="TWRK64"
CONFIG_NET_ICMP_SOCKET=y
CONFIG_NET_ICMP=y
CONFIG_NET_TCP_WRITE_BUFFERS=y
CONFIG_NET_ICMP_SOCKET=y
CONFIG_NET_TCP=y
CONFIG_NET_TCP_WRITE_BUFFERS=y
CONFIG_NET_UDP=y
CONFIG_NETUTILS_TELNETD=y
CONFIG_NFILE_DESCRIPTORS=8
CONFIG_NFILE_STREAMS=8
CONFIG_NSH_ARCHINIT=y

6
configs/twr-k64f120m/nsh/defconfig
View file

@ -1,11 +1,11 @@
# CONFIG_ARCH_FPU is not set
# CONFIG_KINETIS_SDHC_DMA is not set
CONFIG_ARCH_BOARD_TWR_K64F120M=y
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="twr-k64f120m"
CONFIG_ARCH_BOARD_TWR_K64F120M=y
CONFIG_ARCH_CHIP_KINETIS=y
CONFIG_ARCH_CHIP_MK64FN1M0VMD12=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_ARCH="arm"
CONFIG_BOARD_LOOPSPERMSEC=9535
CONFIG_DISABLE_POLL=y
CONFIG_EXAMPLES_NSH=y
@ -20,8 +20,8 @@ CONFIG_KINETIS_SDHC=y
CONFIG_KINETIS_UART1=y
CONFIG_MAX_TASKS=16
CONFIG_MAX_WDOGPARMS=2
CONFIG_MMCSD_SDIO=y
CONFIG_MMCSD=y
CONFIG_MMCSD_SDIO=y
CONFIG_NFILE_DESCRIPTORS=8
CONFIG_NFILE_STREAMS=8
CONFIG_NSH_ARCHINIT=y

1
configs/twr-k64f120m/scripts/ld.script
View file

@ -55,6 +55,7 @@ MEMORY
}
OUTPUT_ARCH(arm)
EXTERN(_vectors)
ENTRY(_stext)
EXTERN(__flashconfigbytes)
SECTIONS

46
configs/u-blox-c027/nsh/defconfig
View file

@ -1,11 +1,11 @@
# CONFIG_NSH_DISABLE_DATE is not set
# CONFIG_NSH_DISABLE_LOSMART is not set
CONFIG_ARCH_BOARD_U_BLOX_C027=y
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="u-blox-c027"
CONFIG_ARCH_BOARD_U_BLOX_C027=y
CONFIG_ARCH_CHIP_LPC1768=y
CONFIG_ARCH_CHIP_LPC17XX=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_ARCH="arm"
CONFIG_BOARD_INITIALIZE=y
CONFIG_BOARD_LOOPSPERMSEC=8079
CONFIG_BUILTIN=y
@ -15,11 +15,11 @@ CONFIG_DEBUG_SYMBOLS=y
CONFIG_DEV_ZERO=y
CONFIG_DISABLE_ENVIRON=y
CONFIG_ETH0_PHY_DP83848C=y
CONFIG_EXAMPLES_CHAT=y
CONFIG_EXAMPLES_CHAT_PRESET0="\"\" ATE1 OK AT+CMEE=2 OK AT+UPSD=0,0 OK AT+UPSD=0,1,\\\"eseye.com\\\" OK AT+UPSD=0,2,\\\"user\\\" OK AT+UPSD=0,3,\\\"pass\\\" OK AT+UPSD=0,6,1 OK \\c"
CONFIG_EXAMPLES_CHAT_PRESET1="\"\" AT+UPSDA=0,3 OK AT+UPSND=0,8 OK AT+UPSND=0,0 OK \\c"
CONFIG_EXAMPLES_CHAT_PRESET2="\"\" AT+USOCR=6 OK AT+USOCO=0,\\\"195.34.89.241\\\",7 PAUSE 10 OK AT+USORD=0,32 u-blox \\c"
CONFIG_EXAMPLES_CHAT_PRESET3="\"\" AT+USOWR=0,5,\\\"NuttX\\\" PAUSE 10 OK AT+USORD=0,5 NuttX AT+USOCL=0"
CONFIG_EXAMPLES_CHAT=y
CONFIG_EXAMPLES_NSH=y
CONFIG_EXAMPLES_PPPD=y
CONFIG_FAT_LCNAMES=y
@ -28,8 +28,8 @@ CONFIG_FS_FAT=y
CONFIG_FS_PROCFS=y
CONFIG_INTELHEX_BINARY=y
CONFIG_IOB_NBUFFERS=24
CONFIG_LIBC_STRERROR_SHORT=y
CONFIG_LIBC_STRERROR=y
CONFIG_LIBC_STRERROR_SHORT=y
CONFIG_LPC17_ETHERNET=y
CONFIG_LPC17_I2C0=y
CONFIG_LPC17_I2C1=y
@ -40,35 +40,35 @@ CONFIG_LPC17_UART3=y
CONFIG_MAX_TASKS=16
CONFIG_MAX_WDOGPARMS=2
CONFIG_MM_REGIONS=2
CONFIG_MODEM_U_BLOX_DEBUG=y
CONFIG_MODEM_U_BLOX=y
CONFIG_MODEM=y
CONFIG_NET_ARP_SEND=y
CONFIG_NET_BROADCAST=y
CONFIG_NET_EMACRAM_SIZE=7296
CONFIG_NET_HOSTNAME="c027"
CONFIG_NET_ICMP_SOCKET=y
CONFIG_NET_ICMP=y
CONFIG_NET_MAX_LISTENPORTS=8
CONFIG_NET_NRXDESC=6
CONFIG_NET_NTXDESC=6
CONFIG_NET_SOCKOPTS=y
CONFIG_NET_STATISTICS=y
CONFIG_NET_TCP_WRITE_BUFFERS=y
CONFIG_NET_TCP=y
CONFIG_NET_TCPBACKLOG=y
CONFIG_NET_UDP_CHECKSUMS=y
CONFIG_NET_UDP=y
CONFIG_MODEM_U_BLOX=y
CONFIG_MODEM_U_BLOX_DEBUG=y
CONFIG_NET=y
CONFIG_NETDB_DNSCLIENT=y
CONFIG_NETDB_DNSSERVER_NOADDR=y
CONFIG_NETDEV_LATEINIT=y
CONFIG_NETUTILS_DHCPC=y
CONFIG_NETUTILS_PPPD_PAP=y
CONFIG_NETUTILS_PPPD=y
CONFIG_NETUTILS_PPPD_PAP=y
CONFIG_NETUTILS_TELNETD=y
CONFIG_NETUTILS_TFTPC=y
CONFIG_NETUTILS_WEBCLIENT=y
CONFIG_NET_ARP_SEND=y
CONFIG_NET_BROADCAST=y
CONFIG_NET_EMACRAM_SIZE=7296
CONFIG_NET_HOSTNAME="c027"
CONFIG_NET_ICMP=y
CONFIG_NET_ICMP_SOCKET=y
CONFIG_NET_MAX_LISTENPORTS=8
CONFIG_NET_NRXDESC=6
CONFIG_NET_NTXDESC=6
CONFIG_NET_SOCKOPTS=y
CONFIG_NET_STATISTICS=y
CONFIG_NET_TCP=y
CONFIG_NET_TCPBACKLOG=y
CONFIG_NET_TCP_WRITE_BUFFERS=y
CONFIG_NET_UDP=y
CONFIG_NET_UDP_CHECKSUMS=y
CONFIG_NFILE_DESCRIPTORS=8
CONFIG_NFILE_STREAMS=8
CONFIG_NSH_ARCHINIT=y

1
configs/u-blox-c027/scripts/u-blox-c027.ld
View file

@ -47,6 +47,7 @@ MEMORY
}
OUTPUT_ARCH(arm)
EXTERN(_vectors)
ENTRY(_stext)
SECTIONS
{

10
configs/zkit-arm-1769/hello/defconfig
View file

@ -1,9 +1,9 @@
CONFIG_ARCH_BOARD_ZKITARM=y
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="zkit-arm-1769"
CONFIG_ARCH_BOARD_ZKITARM=y
CONFIG_ARCH_CHIP_LPC1768=y
CONFIG_ARCH_CHIP_LPC17XX=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_ARCH="arm"
CONFIG_ARMV7M_OABI_TOOLCHAIN=y
CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y
CONFIG_BOARD_LOOPSPERMSEC=8079
@ -20,14 +20,14 @@ CONFIG_LPC17_UART0=y
CONFIG_MAX_TASKS=16
CONFIG_MAX_WDOGPARMS=2
CONFIG_MM_REGIONS=2
CONFIG_NET=y
CONFIG_NET_EMACRAM_SIZE=15776
CONFIG_NET_ICMP=y
CONFIG_NET_MAX_LISTENPORTS=8
CONFIG_NET_SOCKOPTS=y
CONFIG_NET_TCP_CONNS=16
CONFIG_NET_TCP=y
CONFIG_NET_TCPBACKLOG=y
CONFIG_NET=y
CONFIG_NET_TCP_CONNS=16
CONFIG_NFILE_DESCRIPTORS=8
CONFIG_NFILE_STREAMS=8
CONFIG_NSOCKET_DESCRIPTORS=16
@ -45,6 +45,6 @@ CONFIG_START_YEAR=2013
CONFIG_SYMTAB_ORDEREDBYNAME=y
CONFIG_TASK_NAME_SIZE=0
CONFIG_UART0_SERIAL_CONSOLE=y
CONFIG_USER_ENTRYPOINT="hello_main"
CONFIG_USERMAIN_STACKSIZE=8192
CONFIG_USER_ENTRYPOINT="hello_main"
CONFIG_WDOG_INTRESERVE=1

33
configs/zkit-arm-1769/nsh/defconfig
View file

@ -1,19 +1,18 @@
# CONFIG_MMCSD_HAVE_CARDDETECT is not set
# CONFIG_MMCSD_MMCSUPPORT is not set
# CONFIG_NSH_ARGCAT is not set
# CONFIG_NSH_CMDOPT_DF_H is not set
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
# CONFIG_NSH_CMDPARMS is not set
# CONFIG_NSH_DISABLE_IFCONFIG is not set
# CONFIG_NSH_DISABLE_PS is not set
# CONFIG_SPI_CALLBACK is not set
# CONFIG_SPI_EXCHANGE is not set
CONFIG_ARCH_BOARD_ZKITARM=y
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="zkit-arm-1769"
CONFIG_ARCH_BOARD_ZKITARM=y
CONFIG_ARCH_CHIP_LPC1768=y
CONFIG_ARCH_CHIP_LPC17XX=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_ARCH="arm"
CONFIG_ARMV7M_OABI_TOOLCHAIN=y
CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y
CONFIG_BOARD_LOOPSPERMSEC=8079
@ -28,21 +27,9 @@ CONFIG_LPC17_SPI=y
CONFIG_LPC17_UART0=y
CONFIG_MAX_TASKS=16
CONFIG_MAX_WDOGPARMS=2
CONFIG_MM_REGIONS=2
CONFIG_MMCSD_SPICLOCK=12500000
CONFIG_MMCSD=y
CONFIG_NET_BROADCAST=y
CONFIG_NET_EMACRAM_SIZE=7296
CONFIG_NET_ICMP_SOCKET=y
CONFIG_NET_ICMP=y
CONFIG_NET_MAX_LISTENPORTS=8
CONFIG_NET_NRXDESC=6
CONFIG_NET_NTXDESC=6
CONFIG_NET_SOCKOPTS=y
CONFIG_NET_TCP_SPLIT=y
CONFIG_NET_TCP=y
CONFIG_NET_UDP_CHECKSUMS=y
CONFIG_NET_UDP=y
CONFIG_MMCSD_SPICLOCK=12500000
CONFIG_MM_REGIONS=2
CONFIG_NET=y
CONFIG_NETDB_DNSCLIENT=y
CONFIG_NETDB_DNSSERVER_NOADDR=y
@ -50,6 +37,18 @@ CONFIG_NETUTILS_DHCPC=y
CONFIG_NETUTILS_TELNETD=y
CONFIG_NETUTILS_TFTPC=y
CONFIG_NETUTILS_WEBCLIENT=y
CONFIG_NET_BROADCAST=y
CONFIG_NET_EMACRAM_SIZE=7296
CONFIG_NET_ICMP=y
CONFIG_NET_ICMP_SOCKET=y
CONFIG_NET_MAX_LISTENPORTS=8
CONFIG_NET_NRXDESC=6
CONFIG_NET_NTXDESC=6
CONFIG_NET_SOCKOPTS=y
CONFIG_NET_TCP=y
CONFIG_NET_TCP_SPLIT=y
CONFIG_NET_UDP=y
CONFIG_NET_UDP_CHECKSUMS=y
CONFIG_NFILE_DESCRIPTORS=8
CONFIG_NFILE_STREAMS=8
CONFIG_NSH_ARCHINIT=y

46
configs/zkit-arm-1769/nxhello/defconfig
View file

@ -6,49 +6,37 @@
# CONFIG_NSH_CMDPARMS is not set
# CONFIG_NSH_DISABLE_IFCONFIG is not set
# CONFIG_NSH_DISABLE_PS is not set
# CONFIG_NX_DISABLE_1BPP is not set
# CONFIG_NXTK_DEFAULT_BORDERCOLORS is not set
# CONFIG_NX_DISABLE_1BPP is not set
# CONFIG_SPI_CALLBACK is not set
# CONFIG_SPI_EXCHANGE is not set
CONFIG_ARCH_BOARD_ZKITARM=y
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="zkit-arm-1769"
CONFIG_ARCH_BOARD_ZKITARM=y
CONFIG_ARCH_CHIP_LPC1768=y
CONFIG_ARCH_CHIP_LPC17XX=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_ARCH="arm"
CONFIG_ARMV7M_OABI_TOOLCHAIN=y
CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y
CONFIG_BOARD_LOOPSPERMSEC=8079
CONFIG_ETH0_PHY_DP83848C=y
CONFIG_EXAMPLES_NXHELLO=y
CONFIG_EXAMPLES_NXHELLO_BGCOLOR=0x00
CONFIG_EXAMPLES_NXHELLO_BPP=1
CONFIG_EXAMPLES_NXHELLO_FONTCOLOR=0xFF
CONFIG_EXAMPLES_NXHELLO=y
CONFIG_INTELHEX_BINARY=y
CONFIG_LCD=y
CONFIG_LCD_MAXCONTRAST=255
CONFIG_LCD_ST7567=y
CONFIG_LCD=y
CONFIG_LPC17_ETHERNET=y
CONFIG_LPC17_SSP0=y
CONFIG_LPC17_UART0=y
CONFIG_MAX_TASKS=16
CONFIG_MAX_WDOGPARMS=2
CONFIG_MM_REGIONS=2
CONFIG_MMCSD_SPICLOCK=12500000
CONFIG_MMCSD=y
CONFIG_MMCSD_SPICLOCK=12500000
CONFIG_MM_REGIONS=2
CONFIG_MQ_MAXMSGSIZE=64
CONFIG_NET_BROADCAST=y
CONFIG_NET_EMACRAM_SIZE=7296
CONFIG_NET_ICMP_SOCKET=y
CONFIG_NET_ICMP=y
CONFIG_NET_MAX_LISTENPORTS=8
CONFIG_NET_NRXDESC=6
CONFIG_NET_NTXDESC=6
CONFIG_NET_SOCKOPTS=y
CONFIG_NET_TCP_SPLIT=y
CONFIG_NET_TCP=y
CONFIG_NET_UDP_CHECKSUMS=y
CONFIG_NET_UDP=y
CONFIG_NET=y
CONFIG_NETDB_DNSCLIENT=y
CONFIG_NETDB_DNSSERVER_NOADDR=y
@ -56,6 +44,18 @@ CONFIG_NETUTILS_DHCPC=y
CONFIG_NETUTILS_TELNETD=y
CONFIG_NETUTILS_TFTPC=y
CONFIG_NETUTILS_WEBCLIENT=y
CONFIG_NET_BROADCAST=y
CONFIG_NET_EMACRAM_SIZE=7296
CONFIG_NET_ICMP=y
CONFIG_NET_ICMP_SOCKET=y
CONFIG_NET_MAX_LISTENPORTS=8
CONFIG_NET_NRXDESC=6
CONFIG_NET_NTXDESC=6
CONFIG_NET_SOCKOPTS=y
CONFIG_NET_TCP=y
CONFIG_NET_TCP_SPLIT=y
CONFIG_NET_UDP=y
CONFIG_NET_UDP_CHECKSUMS=y
CONFIG_NFILE_DESCRIPTORS=8
CONFIG_NFILE_STREAMS=8
CONFIG_NSH_ARCHINIT=y
@ -64,14 +64,14 @@ CONFIG_NSH_LIBRARY=y
CONFIG_NSH_LINELEN=64
CONFIG_NSH_NOMAC=y
CONFIG_NSH_READLINE=y
CONFIG_NX_BLOCKING=y
CONFIG_NX_KBD=y
CONFIG_NX_XYINPUT_MOUSE=y
CONFIG_NX=y
CONFIG_NXFONT_SANS23X27=y
CONFIG_NXTK_BORDERCOLOR1=0
CONFIG_NXTK_BORDERCOLOR2=0
CONFIG_NXTK_BORDERCOLOR3=0
CONFIG_NX_BLOCKING=y
CONFIG_NX_KBD=y
CONFIG_NX_XYINPUT_MOUSE=y
CONFIG_PHY_AUTONEG=y
CONFIG_PREALLOC_MQ_MSGS=4
CONFIG_PREALLOC_TIMERS=4
@ -82,8 +82,8 @@ CONFIG_RR_INTERVAL=200
CONFIG_SCHED_HPWORK=y
CONFIG_SCHED_WAITPID=y
CONFIG_SDCLONE_DISABLE=y
CONFIG_SPI_CMDDATA=y
CONFIG_SPI=y
CONFIG_SPI_CMDDATA=y
CONFIG_START_DAY=28
CONFIG_START_MONTH=2
CONFIG_START_YEAR=2013

1
configs/zkit-arm-1769/scripts/ld.script
View file

@ -52,6 +52,7 @@ MEMORY
}
OUTPUT_ARCH(arm)
EXTERN(_vectors)
ENTRY(_stext)
SECTIONS
{

16
configs/zkit-arm-1769/thttpd/defconfig
View file

@ -1,9 +1,9 @@
CONFIG_ARCH_BOARD_ZKITARM=y
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="zkit-arm-1769"
CONFIG_ARCH_BOARD_ZKITARM=y
CONFIG_ARCH_CHIP_LPC1768=y
CONFIG_ARCH_CHIP_LPC17XX=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_ARCH="arm"
CONFIG_ARMV7M_OABI_TOOLCHAIN=y
CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y
CONFIG_BOARD_LOOPSPERMSEC=8079
@ -12,9 +12,9 @@ CONFIG_DISABLE_MQUEUE=y
CONFIG_DISABLE_POSIX_TIMERS=y
CONFIG_DISABLE_PTHREAD=y
CONFIG_ETH0_PHY_DP83848C=y
CONFIG_EXAMPLES_THTTPD=y
CONFIG_EXAMPLES_THTTPD_DRIPADDR=0xac100002
CONFIG_EXAMPLES_THTTPD_NOMAC=y
CONFIG_EXAMPLES_THTTPD=y
CONFIG_FS_ROMFS=y
CONFIG_INTELHEX_BINARY=y
CONFIG_LPC17_ETHERNET=y
@ -22,17 +22,17 @@ CONFIG_LPC17_UART0=y
CONFIG_MAX_TASKS=16
CONFIG_MAX_WDOGPARMS=2
CONFIG_MM_REGIONS=2
CONFIG_NET=y
CONFIG_NETUTILS_NETLIB=y
CONFIG_NETUTILS_THTTPD=y
CONFIG_NET_ICMP=y
CONFIG_NET_MAX_LISTENPORTS=8
CONFIG_NET_NRXDESC=18
CONFIG_NET_NTXDESC=18
CONFIG_NET_SOCKOPTS=y
CONFIG_NET_TCP_CONNS=16
CONFIG_NET_TCP=y
CONFIG_NET_TCPBACKLOG=y
CONFIG_NET=y
CONFIG_NETUTILS_NETLIB=y
CONFIG_NETUTILS_THTTPD=y
CONFIG_NET_TCP_CONNS=16
CONFIG_NFILE_DESCRIPTORS=8
CONFIG_NFILE_STREAMS=8
CONFIG_NSOCKET_DESCRIPTORS=16
@ -56,6 +56,6 @@ CONFIG_THTTPD_CGI_STACKSIZE=1024
CONFIG_THTTPD_IOBUFFERSIZE=1024
CONFIG_THTTPD_IPADDR=0xac100064
CONFIG_UART0_SERIAL_CONSOLE=y
CONFIG_USER_ENTRYPOINT="thttp_main"
CONFIG_USERMAIN_STACKSIZE=8192
CONFIG_USER_ENTRYPOINT="thttp_main"
CONFIG_WDOG_INTRESERVE=1