From b1e6bd158a5461513fc4e294eb8f34b318d2ad7d Mon Sep 17 00:00:00 2001
From: zhuyanlin <zhuyanlin1@xiaomi.com>
Date: Wed, 15 Sep 2021 14:50:27 +0800
Subject: [PATCH] arch:xtensa: remove WSBITS/WBBITS to core.h

Remove WSBITS/WBBITS macro to core.h as may be used by
arch common code.

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
---
 arch/xtensa/include/xtensa/core.h           | 6 ++++++
 arch/xtensa/src/common/xtensa_windowspill.S | 3 +--
 2 files changed, 7 insertions(+), 2 deletions(-)

diff --git a/arch/xtensa/include/xtensa/core.h b/arch/xtensa/include/xtensa/core.h
index bf769b9fca4..01112b9b575 100644
--- a/arch/xtensa/include/xtensa/core.h
+++ b/arch/xtensa/include/xtensa/core.h
@@ -71,6 +71,12 @@
 #  define XCHAL_SEP2                    },{
 #endif
 
+/* WSBITS and WBBITS are the width of the WINDOWSTART and WINDOWBASE
+ * registers
+ */
+#define WSBITS  (XCHAL_NUM_AREGS / 4)      /* width of WINDOWSTART in bits */
+#define WBBITS  (XCHAL_NUM_AREGS_LOG2 - 2) /* width of WINDOWBASE in bits */
+
 /* ISA **********************************************************************/
 
 #if XCHAL_HAVE_BE
diff --git a/arch/xtensa/src/common/xtensa_windowspill.S b/arch/xtensa/src/common/xtensa_windowspill.S
index 9e92ed6e103..f2d3448be5d 100644
--- a/arch/xtensa/src/common/xtensa_windowspill.S
+++ b/arch/xtensa/src/common/xtensa_windowspill.S
@@ -40,6 +40,7 @@
  ****************************************************************************/
 
 #include <arch/chip/core-isa.h>
+#include <arch/xtensa/core.h>
 #include <arch/xtensa/xtensa_specregs.h>
 #include <arch/xtensa/xtensa_corebits.h>
 
@@ -116,8 +117,6 @@ _xtensa_window_spill:
 	ret
 
 #else /* XCHAL_HAVE_WINDOWED */
-#  define WSBITS  (XCHAL_NUM_AREGS / 4)			/* Width of WINDOWSTART register in bits */
-#  define WBBITS  (XCHAL_NUM_AREGS_LOG2 - 2)	/* Width of WINDOWBASE register in bits */
 
 	/*
 	 * Rearrange (rotate) window start bits relative to the current