arch/arm, board/arm: Rename all up_ramvec_* functions to arm_ramvec_*

Summary

The naming standard at https://cwiki.apache.org/confluence/display/NUTTX/Naming+FAQ requires that all MCU-private functions begin with the name of the architecture, not up_.

This PR addresses only these name changes for the ARM-private functions up_ramvec_initialize() and up_ramvec_attch().

Impact

There should be no impact of this change (other that one step toward more consistent naming).

Testing

stm32f4discovery:netnsh
This commit is contained in:
Gregory Nutt 2020-05-01 11:41:16 -06:00 committed by Alan Carvalho de Assis
parent 2476aad5b4
commit b0dbdd7c10
32 changed files with 57 additions and 57 deletions

View file

@ -55,14 +55,14 @@
****************************************************************************/
/****************************************************************************
* Function: up_dumpnvic
* Function: arm_dumpnvic
*
* Description:
* Dump all NVIC and SYSCON registers along with a user message.
*
****************************************************************************/
void up_dumpnvic(FAR const char *msg)
void arm_dumpnvic(FAR const char *msg)
{
#ifdef CONFIG_DEBUG_INFO
irqstate_t flags;

View file

@ -380,7 +380,7 @@ extern "C"
****************************************************************************************************/
/****************************************************************************************************
* Function: up_dumpnvic
* Function: arm_dumpnvic
*
* Description:
* Dump all NVIC and SYSCON registers along with a user message.
@ -388,9 +388,9 @@ extern "C"
****************************************************************************************************/
#ifdef CONFIG_DEBUG_FEATURES
void up_dumpnvic(FAR const char *msg);
void arm_dumpnvic(FAR const char *msg);
#else
# define up_dumpnvic(m)
# define arm_dumpnvic(m)
#endif
#undef EXTERN

View file

@ -43,7 +43,7 @@
void exception_common(void);
/****************************************************************************
* Name: up_ramvec_attach
* Name: arm_ramvec_attach
*
* Description:
* Configure the ram vector table so that IRQ number 'irq' will be
@ -51,7 +51,7 @@ void exception_common(void);
*
****************************************************************************/
int up_ramvec_attach(int irq, up_vector_t vector)
int arm_ramvec_attach(int irq, up_vector_t vector)
{
int ret = -EINVAL;

View file

@ -86,7 +86,7 @@
****************************************************************************/
/* If CONFIG_ARCH_RAMVECTORS is defined, then the ARM logic must provide
* ARM-specific implementations of up_ramvec_initialize(), irq_attach(), and
* ARM-specific implementations of arm_ramvec_initialize(), irq_attach(), and
* irq_dispatch. In this case, it is also assumed that the ARM vector
* table resides in RAM, has the name g_ram_vectors, and has been
* properly positioned and aligned in memory by the linker script.
@ -105,14 +105,14 @@ up_vector_t g_ram_vectors[ARMV7M_VECTAB_SIZE]
****************************************************************************/
/****************************************************************************
* Name: up_ramvec_initialize
* Name: arm_ramvec_initialize
*
* Description:
* Copy vectors to RAM an configure the NVIC to use the RAM vectors.
*
****************************************************************************/
void up_ramvec_initialize(void)
void arm_ramvec_initialize(void)
{
const up_vector_t *src;
up_vector_t *dest;

View file

@ -69,14 +69,14 @@ extern up_vector_t g_ram_vectors[ARMV7M_VECTAB_SIZE]
****************************************************************************/
/****************************************************************************
* Name: up_ramvec_initialize
* Name: arm_ramvec_initialize
*
* Description:
* Copy vectors to RAM an configure the NVIC to use the RAM vectors.
*
****************************************************************************/
void up_ramvec_initialize(void);
void arm_ramvec_initialize(void);
/****************************************************************************
* Name: exception_common
@ -89,7 +89,7 @@ void up_ramvec_initialize(void);
void exception_common(void);
/****************************************************************************
* Name: up_ramvec_attach
* Name: arm_ramvec_attach
*
* Description:
* Configure the ram vector table so that IRQ number 'irq' will be
@ -97,7 +97,7 @@ void exception_common(void);
*
****************************************************************************/
int up_ramvec_attach(int irq, up_vector_t vector);
int arm_ramvec_attach(int irq, up_vector_t vector);
#endif /* CONFIG_ARCH_RAMVECTORS */
#endif /* __ARCH_ARM_SRC_COMMON_ARMV7_M_RAM_VECTORS_H */

View file

@ -319,7 +319,7 @@ void up_irqinitialize(void)
* vector table that requires special initialization.
*/
up_ramvec_initialize();
arm_ramvec_initialize();
#endif
/* Set all interrupts (and exceptions) to the default priority */

View file

@ -334,7 +334,7 @@ void up_irqinitialize(void)
* vector table that requires special initialization.
*/
up_ramvec_initialize();
arm_ramvec_initialize();
#endif
/* Set all interrupts (and exceptions) to the default priority */

View file

@ -429,7 +429,7 @@ void up_irqinitialize(void)
* vector table that requires special initialization.
*/
up_ramvec_initialize();
arm_ramvec_initialize();
#endif
/* Set all interrupts (and exceptions) to the default priority */

View file

@ -369,7 +369,7 @@ void up_irqinitialize(void)
* vector table that requires special initialization.
*/
up_ramvec_initialize();
arm_ramvec_initialize();
#endif
/* Set all interrupts (and exceptions) to the default priority */

View file

@ -493,7 +493,7 @@ void up_irqinitialize(void)
*/
#if defined(CONFIG_ARCH_RAMVECTORS)
up_ramvec_initialize();
arm_ramvec_initialize();
#elif defined(CONFIG_LC823450_DFU)
putreg32((uint32_t)_vectors, NVIC_VECTAB);
#endif

View file

@ -337,12 +337,12 @@ void up_irqinitialize(void)
* vector table that requires special initialization.
*
* But even in this case NVIC_VECTAB has to point to the initial table
* because up_ramvec_initialize() initializes RAM table from table
* because arm_ramvec_initialize() initializes RAM table from table
* pointed by NVIC_VECTAB register.
*/
#ifdef CONFIG_ARCH_RAMVECTORS
up_ramvec_initialize();
arm_ramvec_initialize();
#endif
/* Set all interrupts (and exceptions) to the default priority */

View file

@ -326,7 +326,7 @@ void up_irqinitialize(void)
* vector table that requires special initialization.
*/
up_ramvec_initialize();
arm_ramvec_initialize();
#endif
/* Set all interrupts (and exceptions) to the default priority */

View file

@ -325,7 +325,7 @@ void up_irqinitialize(void)
* vector table that requires special initialization.
*/
up_ramvec_initialize();
arm_ramvec_initialize();
#endif
/* Set all interrupts (and exceptions) to the default priority */

View file

@ -324,7 +324,7 @@ void up_irqinitialize(void)
* vector table that requires special initialization.
*/
up_ramvec_initialize();
arm_ramvec_initialize();
#endif
/* Set all interrupts (and exceptions) to the default priority */

View file

@ -339,7 +339,7 @@ void up_irqinitialize(void)
* vector table that requires special initialization.
*/
up_ramvec_initialize();
arm_ramvec_initialize();
#endif
/* Set all interrupts (and exceptions) to the default priority */

View file

@ -346,7 +346,7 @@ void up_irqinitialize(void)
* vector table that requires special initialization.
*/
up_ramvec_initialize();
arm_ramvec_initialize();
#endif
/* Set all interrupts (and exceptions) to the default priority */

View file

@ -400,7 +400,7 @@ void up_irqinitialize(void)
* vector table that requires special initialization.
*/
up_ramvec_initialize();
arm_ramvec_initialize();
#endif
/* Set all interrupts (and exceptions) to the default priority */

View file

@ -478,7 +478,7 @@ void up_irqinitialize(void)
* vector table that requires special initialization.
*/
up_ramvec_initialize();
arm_ramvec_initialize();
#endif
/* Set all interrupts (and exceptions) to the default priority */

View file

@ -396,7 +396,7 @@ void up_irqinitialize(void)
* vector table that requires special initialization.
*/
up_ramvec_initialize();
arm_ramvec_initialize();
#endif
/* Set all interrupts (and exceptions) to the default priority */

View file

@ -330,7 +330,7 @@ void up_irqinitialize(void)
* vector table that requires special initialization.
*/
up_ramvec_initialize();
arm_ramvec_initialize();
#endif
/* Set all interrupts (and exceptions) to the default priority */

View file

@ -429,7 +429,7 @@ void up_irqinitialize(void)
* vector table that requires special initialization.
*/
up_ramvec_initialize();
arm_ramvec_initialize();
#endif
/* Set all interrupts (and exceptions) to the default priority */

View file

@ -454,7 +454,7 @@ void up_irqinitialize(void)
* vector table that requires special initialization.
*/
up_ramvec_initialize();
arm_ramvec_initialize();
#endif
/* Set all interrupts (and exceptions) to the default priority */

View file

@ -318,7 +318,7 @@ void up_irqinitialize(void)
* vector table that requires special initialization.
*/
up_ramvec_initialize();
arm_ramvec_initialize();
#endif
/* Set all interrupts (and exceptions) to the default priority */

View file

@ -430,7 +430,7 @@ void up_irqinitialize(void)
* vector table that requires special initialization.
*/
up_ramvec_initialize();
arm_ramvec_initialize();
#endif
#ifdef CONFIG_TIVA_RAMVBAR

View file

@ -368,7 +368,7 @@ void up_irqinitialize(void)
* vector table that requires special initialization.
*/
up_ramvec_initialize();
arm_ramvec_initialize();
#endif
/* Set all interrupts (and exceptions) to the default priority */

View file

@ -424,10 +424,10 @@ int highpri_main(int argc, char *argv[])
#if !defined(CONFIG_STM32_ADC1_DMA) || defined(HIGHPRI_HAVE_INJECTED)
/* Attach ADC12 ram vector if no DMA or injected channels support */
ret = up_ramvec_attach(STM32_IRQ_ADC12, adc12_handler);
ret = arm_ramvec_attach(STM32_IRQ_ADC12, adc12_handler);
if (ret < 0)
{
fprintf(stderr, "highpri_main: ERROR: up_ramvec_attach failed: %d\n",
fprintf(stderr, "highpri_main: ERROR: arm_ramvec_attach failed: %d\n",
ret);
ret = EXIT_FAILURE;
goto errout;
@ -450,10 +450,10 @@ int highpri_main(int argc, char *argv[])
#ifdef CONFIG_STM32_ADC1_DMA
/* Attach DMA1 CH1 ram vector if DMA */
ret = up_ramvec_attach(STM32_IRQ_DMA1CH1, dma1ch1_handler);
ret = arm_ramvec_attach(STM32_IRQ_DMA1CH1, dma1ch1_handler);
if (ret < 0)
{
fprintf(stderr, "highpri_main: ERROR: up_ramvec_attach failed: %d\n",
fprintf(stderr, "highpri_main: ERROR: arm_ramvec_attach failed: %d\n",
ret);
ret = EXIT_FAILURE;
goto errout;

View file

@ -460,10 +460,10 @@ int highpri_main(int argc, char *argv[])
#if !defined(CONFIG_STM32_ADC1_DMA) || defined(HIGHPRI_HAVE_INJECTED)
/* Attach ADC12 ram vector if no DMA or injected channels support */
ret = up_ramvec_attach(STM32_IRQ_ADC12, adc12_handler);
ret = arm_ramvec_attach(STM32_IRQ_ADC12, adc12_handler);
if (ret < 0)
{
fprintf(stderr, "highpri_main: ERROR: up_ramvec_attach failed: %d\n",
fprintf(stderr, "highpri_main: ERROR: arm_ramvec_attach failed: %d\n",
ret);
ret = EXIT_FAILURE;
goto errout;
@ -486,10 +486,10 @@ int highpri_main(int argc, char *argv[])
#ifdef CONFIG_STM32_ADC1_DMA
/* Attach DMA1 CH1 ram vector if DMA */
ret = up_ramvec_attach(STM32_IRQ_DMA1CH1, dma1ch1_handler);
ret = arm_ramvec_attach(STM32_IRQ_DMA1CH1, dma1ch1_handler);
if (ret < 0)
{
fprintf(stderr, "highpri_main: ERROR: up_ramvec_attach failed: %d\n",
fprintf(stderr, "highpri_main: ERROR: arm_ramvec_attach failed: %d\n",
ret);
ret = EXIT_FAILURE;
goto errout;

View file

@ -569,10 +569,10 @@ static int spwm_hrtim_setup(FAR struct spwm_s *spwm)
/* Attach HRTIM Master TImer IRQ */
ret = up_ramvec_attach(STM32_IRQ_HRTIMTM, hrtim_master_handler);
ret = arm_ramvec_attach(STM32_IRQ_HRTIMTM, hrtim_master_handler);
if (ret < 0)
{
fprintf(stderr, "spwm_main: ERROR: up_ramvec_attach failed: %d\n",
fprintf(stderr, "spwm_main: ERROR: arm_ramvec_attach failed: %d\n",
ret);
ret = -1;
goto errout;
@ -777,10 +777,10 @@ static int spwm_tim6_setup(FAR struct spwm_s *spwm)
/* Attach TIM6 ram vector */
ret = up_ramvec_attach(STM32_IRQ_TIM6, tim6_handler);
ret = arm_ramvec_attach(STM32_IRQ_TIM6, tim6_handler);
if (ret < 0)
{
printf("ERROR: up_ramvec_attach failed: %d\n", ret);
printf("ERROR: arm_ramvec_attach failed: %d\n", ret);
ret = -1;
goto errout;
}

View file

@ -1107,10 +1107,10 @@ int stm32_smps_setup(void)
/* Attach ADC12 ram vector */
ret = up_ramvec_attach(STM32_IRQ_ADC12, adc12_handler);
ret = arm_ramvec_attach(STM32_IRQ_ADC12, adc12_handler);
if (ret < 0)
{
pwrerr("ERROR: up_ramvec_attach failed: %d\n", ret);
pwrerr("ERROR: arm_ramvec_attach failed: %d\n", ret);
ret = EXIT_FAILURE;
goto errout;
}

View file

@ -409,10 +409,10 @@ int highpri_main(int argc, char *argv[])
#if !defined(CONFIG_STM32_ADC1_DMA) || defined(HIGHPRI_HAVE_INJECTED)
/* Attach ADC ram vector if no DMA or injected channels support */
ret = up_ramvec_attach(STM32_IRQ_ADC, adc_handler);
ret = arm_ramvec_attach(STM32_IRQ_ADC, adc_handler);
if (ret < 0)
{
fprintf(stderr, "highpri_main: ERROR: up_ramvec_attach failed: %d\n",
fprintf(stderr, "highpri_main: ERROR: arm_ramvec_attach failed: %d\n",
ret);
ret = EXIT_FAILURE;
goto errout;
@ -435,10 +435,10 @@ int highpri_main(int argc, char *argv[])
#ifdef CONFIG_STM32_ADC1_DMA
/* Attach DMA2 STREAM0 ram vector if DMA */
ret = up_ramvec_attach(STM32_IRQ_DMA2S0, dma2s0_handler);
ret = arm_ramvec_attach(STM32_IRQ_DMA2S0, dma2s0_handler);
if (ret < 0)
{
fprintf(stderr, "highpri_main: ERROR: up_ramvec_attach failed: %d\n",
fprintf(stderr, "highpri_main: ERROR: arm_ramvec_attach failed: %d\n",
ret);
ret = EXIT_FAILURE;
goto errout;

View file

@ -199,10 +199,10 @@ int highpri_main(int argc, char *argv[])
/* Attach TIM6 ram vector */
ret = up_ramvec_attach(STM32_IRQ_TIM6, tim6_handler);
ret = arm_ramvec_attach(STM32_IRQ_TIM6, tim6_handler);
if (ret < 0)
{
fprintf(stderr, "highpri_main: ERROR: up_ramvec_attach failed: %d\n", ret);
fprintf(stderr, "highpri_main: ERROR: arm_ramvec_attach failed: %d\n", ret);
return EXIT_FAILURE;
}

View file

@ -395,10 +395,10 @@ static int spwm_tim6_setup(FAR struct spwm_s *spwm)
/* Attach TIM6 ram vector */
ret = up_ramvec_attach(STM32L4_IRQ_TIM6, tim6_handler);
ret = arm_ramvec_attach(STM32L4_IRQ_TIM6, tim6_handler);
if (ret < 0)
{
printf("ERROR: up_ramvec_attach failed: %d\n", ret);
printf("ERROR: arm_ramvec_attach failed: %d\n", ret);
ret = -1;
goto errout;
}