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Add SAM3X/3A interrupt vectors
This commit is contained in:
Gregory Nutt
parent
18240b07b6
commit
b089263e1c
7 changed files with 116 additions and 5 deletions
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@ -5054,6 +5054,7 @@
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for SAM4S B and C peripherals (2013-6-26)
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* configs/sam4s-xplained/src/sam_sram.c: Added support for on-board
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1MB SRAM (2013-6-26).
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* arch/arm/src/include/sam34/chip.h and sam3x_irq.h: Add support for
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* arch/arm/include/sam34/chip.h and sam3x_irq.h: Add support for
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SAM3X and SAM3A chips (2013-6-26).
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* arch/arm/src/sam34/chip/sam3x_vectors.h: Add support for SAM3X/3A
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interrupt vectros (2013-6-26).
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@ -89,7 +89,7 @@
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#define SAM_PID_PWM (36) /* Pulse Width Modulation Controller */
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#define SAM_PID_ADC (37) /* ADC Controller */
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#define SAM_PID_DACC (38) /* DAC Controller */
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#define SAM_PID_DMAC (40) /* DMA Controller */
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#define SAM_PID_DMAC (39) /* DMA Controller */
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#define SAM_PID_UOTGHS (40) /* USB OTG High Speed */
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#define SAM_PID_TRNG (41) /* True Random Number Generator */
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#define SAM_PID_EMAC (42) /* Ethernet MAC */
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@ -56,6 +56,8 @@
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#ifdef CONFIG_ARMV7M_CMNVECTOR
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# if defined(CONFIG_ARCH_CHIP_SAM3U)
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# include "chip/sam3u_vectors.h"
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# elif defined(CONFIG_ARCH_CHIP_SAM3X) || defined(CONFIG_ARCH_CHIP_SAM3A)
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# include "chip/sam3x_vectors.h"
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# elif defined(CONFIG_ARCH_CHIP_SAM4L)
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# include "chip/sam4l_vectors.h"
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# elif defined(CONFIG_ARCH_CHIP_SAM4S)
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@ -49,9 +49,9 @@
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#ifdef CONFIG_ARMV7M_CMNVECTOR
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/* Reserve 46 interrupt table entries for I/O interrupts. */
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/* Reserve 30 interrupt table entries for I/O interrupts. */
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# define ARMV7M_PERIPHERAL_INTERRUPTS 46
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# define ARMV7M_PERIPHERAL_INTERRUPTS 30
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#else
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VECTOR(sam_supc, SAM_IRQ_SUPC) /* Vector 16+0: Supply Controller */
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102
arch/arm/src/sam34/chip/sam3x_vectors.h
Normal file
102
arch/arm/src/sam34/chip/sam3x_vectors.h
Normal file
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@ -0,0 +1,102 @@
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/************************************************************************************************
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* arch/arm/src/sam34/chip/sam3x_vectors.h
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*
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* Copyright (C) 2013 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************************/
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/************************************************************************************************
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* Pre-processor Definitions
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************************************************************************************************/
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/* This file is included by sam_vectors.S. It provides the macro VECTOR that
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* supplies ach SAM3U vector in terms of a (lower-case) ISR label and an
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* (upper-case) IRQ number as defined in arch/arm/include/sam/sam3u_irq.h.
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* sam_vectors.S will defined the VECTOR in different ways in order to generate
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* the interrupt vectors and handlers in their final form.
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*/
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/* If the common ARMv7-M vector handling is used, then all it needs is the following
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* definition that provides the number of supported vectors.
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*/
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#ifdef CONFIG_ARMV7M_CMNVECTOR
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/* Reserve 45 interrupt table entries for I/O interrupts. */
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# define ARMV7M_PERIPHERAL_INTERRUPTS 45
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#else
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VECTOR(sam_supc, SAM_IRQ_SUPC) /* Vector 16+0: Supply Controller */
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VECTOR(sam_rstc, SAM_IRQ_RSTC) /* Vector 16+1: Reset Controller */
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VECTOR(sam_rtc, SAM_IRQ_RTC) /* Vector 16+2: Real Time Clock */
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VECTOR(sam_rtt, SAM_IRQ_RTT) /* Vector 16+3: Real Time Timer */
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VECTOR(sam_wdt, SAM_IRQ_WDT) /* Vector 16+4: Watchdog Timer */
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VECTOR(sam_pmc, SAM_IRQ_PMC) /* Vector 16+5: Power Management Controller */
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VECTOR(sam_eefc0, SAM_IRQ_EEFC0) /* Vector 16+6: Enhanced Embedded Flash Controller 0 */
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VECTOR(sam_eefc1, SAM_IRQ_EEFC1) /* Vector 16+7: Enhanced Embedded Flash Controller 1 */
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VECTOR(sam_uart0, SAM_IRQ_UART0) /* Vector 16+8: Universal Asynchronous Receiver Transmitter */
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VECTOR(sam_smc, SAM_IRQ_SMC) /* Vector 16+9: Static Memory Controller */
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VECTOR(sam_sdramc, SAM_IRQ_SDRAMC) /* Vector 16+10: Synchronous Dynamic RAM Controller */
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VECTOR(sam_pioa, SAM_IRQ_PIOA) /* Vector 16+11: Parallel I/O Controller A */
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VECTOR(sam_piob, SAM_IRQ_PIOB) /* Vector 16+12: Parallel I/O Controller B */
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VECTOR(sam_pioc, SAM_IRQ_PIOC) /* Vector 16+13: Parallel I/O Controller C */
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VECTOR(sam_piod, SAM_IRQ_PIOD) /* Vector 16+14: Parallel I/O Controller D */
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VECTOR(sam_pioe, SAM_IRQ_PIOE) /* Vector 16+15: Parallel I/O Controller E */
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VECTOR(sam_piof, SAM_IRQ_PIOF) /* Vector 16+16: Parallel I/O Controller F */
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VECTOR(sam_usart0, SAM_IRQ_USART0) /* Vector 16+17: USART 0 */
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VECTOR(sam_usart1, SAM_IRQ_USART1) /* Vector 16+18: USART 1 */
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VECTOR(sam_usart2, SAM_IRQ_USART2) /* Vector 16+19: USART 2 */
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VECTOR(sam_usart3, SAM_IRQ_USART3) /* Vector 16+20: USART 3 */
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VECTOR(sam_hsmci, SAM_IRQ_HSMCI) /* Vector 16+21: High Speed Multimedia Card Interface */
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VECTOR(sam_twi0, SAM_IRQ_TWI0) /* Vector 16+22: Two-Wire Interface 0 */
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VECTOR(sam_twi1, SAM_IRQ_TWI1) /* Vector 16+23: Two-Wire Interface 1 */
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VECTOR(sam_spi0, SAM_IRQ_SPI0) /* Vector 16+24: Serial Peripheral Interface 0 */
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VECTOR(sam_spi1, SAM_IRQ_SPI1) /* Vector 16+25: Serial Peripheral Interface 1 */
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VECTOR(sam_ssc, SAM_IRQ_SSC) /* Vector 16+26: Synchronous Serial Controller */
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VECTOR(sam_tc0, SAM_IRQ_TC0) /* Vector 16+27: Timer Counter 0 */
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VECTOR(sam_tc1, SAM_IRQ_TC1) /* Vector 16+28: Timer Counter 1 */
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VECTOR(sam_tc2, SAM_IRQ_TC2) /* Vector 16+29: Timer Counter 2 */
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VECTOR(sam_tc3, SAM_IRQ_TC3) /* Vector 16+30: Timer Counter 3 */
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VECTOR(sam_tc4, SAM_IRQ_TC4) /* Vector 16+31: Timer Counter 4 */
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VECTOR(sam_tc5, SAM_IRQ_TC5) /* Vector 16+32: Timer Counter 5 */
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VECTOR(sam_tc6, SAM_IRQ_TC6) /* Vector 16+33: Timer Counter 6 */
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VECTOR(sam_tc7, SAM_IRQ_TC7) /* Vector 16+34: Timer Counter 7 */
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VECTOR(sam_tc8, SAM_IRQ_TC8) /* Vector 16+35: Timer Counter 8 */
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VECTOR(sam_pwm, SAM_IRQ_PWM) /* Vector 16+36: Pulse Width Modulation Controller */
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VECTOR(sam_adc, SAM_IRQ_ADC) /* Vector 16+37: ADC Controller */
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VECTOR(sam_dacc, SAM_IRQ_DACC) /* Vector 16+38: DAC Controller */
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VECTOR(sam_dmac, SAM_IRQ_DMAC) /* Vector 16+39: DMA Controller */
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VECTOR(sam_uotghs, SAM_IRQ_UOTGHS) /* Vector 16+40: USB OTG High Speed */
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VECTOR(sam_trng, SAM_IRQ_TRNG) /* Vector 16+41: True Random Number Generator */
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VECTOR(sam_emac, SAM_IRQ_EMAC) /* Vector 16+42: Ethernet MAC */
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VECTOR(sam_can0, SAM_IRQ_CAN0) /* Vector 16+43: CAN Controller 0 */
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VECTOR(sam_can1, SAM_IRQ_CAN1) /* Vector 16+44: CAN Controller 1 */
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#endif
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@ -45,6 +45,8 @@
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#if defined(CONFIG_ARCH_CHIP_SAM3U)
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# include "chip/sam3u_memorymap.h"
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#elif defined(CONFIG_ARCH_CHIP_SAM3X) || defined(CONFIG_ARCH_CHIP_SAM3A)
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# include "chip/sam3x_memorymap.h"
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#elif defined(CONFIG_ARCH_CHIP_SAM4L)
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# include "chip/sam4l_memorymap.h"
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#elif defined(CONFIG_ARCH_CHIP_SAM4S)
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@ -136,6 +136,8 @@ sam_vectors:
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#if defined(CONFIG_ARCH_CHIP_SAM3U)
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# include "chip/sam3u_vectors.h"
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#elif defined(CONFIG_ARCH_CHIP_SAM3X) || defined(CONFIG_ARCH_CHIP_SAM3A)
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# include "chip/sam3x_vectors.h"
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#elif defined(CONFIG_ARCH_CHIP_SAM4L)
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# include "chip/sam4l_vectors.h"
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#elif defined(CONFIG_ARCH_CHIP_SAM4S)
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@ -173,6 +175,8 @@ handlers:
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#if defined(CONFIG_ARCH_CHIP_SAM3U)
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# include "chip/sam3u_vectors.h"
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#elif defined(CONFIG_ARCH_CHIP_SAM3X) || defined(CONFIG_ARCH_CHIP_SAM3A)
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# include "chip/sam3x_vectors.h"
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#elif defined(CONFIG_ARCH_CHIP_SAM4L)
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# include "chip/sam4l_vectors.h"
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#elif defined(CONFIG_ARCH_CHIP_SAM4S)
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