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Documentation/stm32h5: note that the ICACHE uses the MPU.

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The ICACHE driver now maps the OTP, read-only and EDATA flash areas
non-cacheable with an MPU region.  Say so in the peripheral support
table.

Assisted-by: Claude:claude-opus-5-5
Signed-off-by: Ricardo Maurizio Paul <ricardopaul@geotab.com>
This commit is contained in:
Ricardo Maurizio Paul 2026-10-05 14:54:53 +02:00 • committed by Alan C. Assis
parent dc6e924a95
commit aee40e2348
1 changed files with 1 additions and 1 deletions
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Documentation/platforms/arm/stm32h5/index.rst
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@ -39,7 +39,7 @@ FDCAN Yes
GPDMA Yes
GPIO Yes
I2C Yes
ICACHE Yes
ICACHE Yes Uses the MPU to keep OTP, RO and EDATA flash uncached.
RCC Yes
USART Yes
LPUART Yes