From aead2b2afd34346ce70985e5eb5de5b1af4ab207 Mon Sep 17 00:00:00 2001 From: raiden00pl Date: Mon, 26 Jun 2017 18:26:59 +0200 Subject: [PATCH] stm32f33xxx_rcc.h: fix typo --- arch/arm/src/stm32/chip/stm32f33xxx_rcc.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/src/stm32/chip/stm32f33xxx_rcc.h b/arch/arm/src/stm32/chip/stm32f33xxx_rcc.h index 806b22e0502..20c1f21756a 100644 --- a/arch/arm/src/stm32/chip/stm32f33xxx_rcc.h +++ b/arch/arm/src/stm32/chip/stm32f33xxx_rcc.h @@ -344,7 +344,7 @@ # define RCC_CFGR3_USART1SW_HSI (0 << RCC_CFGR3_USART1SW_SHIFT) /* HSI clock */ #define RCC_CFGR3_I2C1SW (1 << 4) /* Bit 4: I2C1 clock source selection */ #define RCC_CFGR3_TIM1SW (1 << 8) /* Bit 8: TIM1 clock source selection */ -#define RCC_CFGR3_HRTIM1SW (1 << 9) /* Bit 9: HRTIM clock source selection */ +#define RCC_CFGR3_HRTIM1SW (1 << 12) /* Bit 12: HRTIM clock source selection */ #define RCC_CFGR3_USART2SW_SHIFT (16) /* Bits 16-17: USART2 clock source selection */ #define RCC_CFGR3_USART2SW_MASK (3 << RCC_CFGR3_USART2SW_SHIFT) # define RCC_CFGR3_USART2SW_PCLK (0 << RCC_CFGR3_USART2SW_SHIFT) /* PCLK */