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More trailing whilespace removal

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This commit is contained in:
Gregory Nutt 2014-04-13 16:22:22 -06:00
parent fb4fa33cae
commit ab5b37189b
503 changed files with 1312 additions and 1312 deletions
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2
configs/cloudctrl/src/cloudctrl-internal.h
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@ -84,7 +84,7 @@
* 56 PD9 MII_RXD0 Ethernet PHY. Requires CONFIG_STM32_ETH_REMAP
* 57 PD10 MII_RXD1 Ethernet PHY. Requires CONFIG_STM32_ETH_REMAP
*
* The board desdign can support a 50MHz external clock to drive the PHY
* The board desdign can support a 50MHz external clock to drive the PHY
* (U9). However, on my board, U9 is not present.
*
* 67 PA8 MCO DM9161AEP