mirror of
https://github.com/apache/nuttx.git
synced 2026-08-20 13:08:26 +00:00
feat: charge: initialize pump charger sc8551a driver
CHAMPION-25 Change-Id: I32bf77d04fc5c67f52dcc7ec8081a3feb4b08795 Signed-off-by: zhangguoliang <zhangguoliang3@xiaomi.com>
This commit is contained in:
parent
888ea2ae84
commit
a87fbef0f1
6 changed files with 2943 additions and 9 deletions
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@ -374,6 +374,15 @@ config BQ25618
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---help---
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The BQ25618 are battery charger for lithium-ion batteries.
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config SC8551
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bool "SC8551 Battery charger support"
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default n
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select I2C
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select I2C_SC8551
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depends on BATTERY_CHARGER
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---help---
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The SC8551 are battery charger for lithium-ion batteries.
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config MCP73871
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bool "Microchip MCP73871 Battery charger support"
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default n
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@ -401,19 +410,20 @@ config DEBUG_BQ25618
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endif # BQ25618
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if SC8551
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config DEBUG_SC8551
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bool "SC8551 Debug Features"
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default n
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---help---
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Enable SC8551 battery management debug features.
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endif # SC8551
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config BATTERY_GAUGE
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bool "Battery Fuel Gauge support"
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default n
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config CW2218
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bool "CW2218 Battery fuel gauge support"
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default n
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select I2C
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depends on BATTERY_GAUGE
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---help---
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The CW2218 is an ultra-compact, system-side or pack-side fuel gauging
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IC for Lithium-ion based batteries used in wearable and portable devices
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config MAX1704X
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bool "MAX1704X Battery fuel gauge support"
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default n
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@ -459,6 +469,10 @@ config I2C_BQ25618
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bool
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default y if BQ25618
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config I2C_SC8551
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bool
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default y if SC8551
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config I2C_MAX1704X
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bool
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default y if MAX1704X
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@ -99,6 +99,10 @@ ifeq ($(CONFIG_I2C_BQ2429X),y)
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CSRCS += bq2429x.c
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endif
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ifeq ($(CONFIG_I2C_SC8551),y)
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CSRCS += sc8551.c
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endif
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# Add the BQ256XX I2C-based battery charger driver
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ifeq ($(CONFIG_I2C_BQ25618),y)
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1945
drivers/power/sc8551.c
Normal file
1945
drivers/power/sc8551.c
Normal file
File diff suppressed because it is too large
Load diff
147
drivers/power/sc8551.h
Normal file
147
drivers/power/sc8551.h
Normal file
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@ -0,0 +1,147 @@
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/****************************************************************************
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* drivers/power/sc8551.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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#ifndef __INCLUDE_NUTTX_POWER_SC8551_H
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#define __INCLUDE_NUTTX_POWER_SC8551_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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/****************************************************************************
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* Public Data
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****************************************************************************/
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struct sc8551_cfg_s
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{
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bool bat_ovp_disable;
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bool bat_ocp_disable;
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bool bat_ovp_alm_disable;
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bool bat_ocp_alm_disable;
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int bat_ovp_th;
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int bat_ovp_alm_th;
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int bat_ocp_th;
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int bat_ocp_alm_th;
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bool bus_ovp_alm_disable;
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bool bus_ocp_disable;
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bool bus_ocp_alm_disable;
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int bus_ovp_th;
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int bus_ovp_alm_th;
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int bus_ocp_th;
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int bus_ocp_alm_th;
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bool bat_ucp_alm_disable;
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int bat_ucp_alm_th;
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int ac_ovp_th;
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bool bat_therm_disable;
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bool bus_therm_disable;
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bool die_therm_disable;
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int bat_therm_th; /* in % */
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int bus_therm_th; /* in % */
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int die_therm_th; /* in degC */
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int sense_r_mohm;
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};
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struct sc8551_stat_s
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{
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int part_no;
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int revision;
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int mode;
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bool batt_present;
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bool vbus_present;
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bool usb_present;
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bool charge_enabled; /* Register bit status */
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/* ADC reading */
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int vbat_volt;
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int vbus_volt;
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int vout_volt;
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int vac_volt;
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int ibat_curr;
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int ibus_curr;
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int bat_temp;
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int bus_temp;
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int die_temp;
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/* alarm/fault status */
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bool bat_ovp_fault;
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bool bat_ocp_fault;
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bool bus_ovp_fault;
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bool bus_ocp_fault;
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bool bat_ovp_alarm;
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bool bat_ocp_alarm;
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bool bus_ovp_alarm;
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bool bus_ocp_alarm;
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bool bat_ucp_alarm;
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bool bat_therm_alarm;
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bool bus_therm_alarm;
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bool die_therm_alarm;
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bool bat_therm_fault;
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bool bus_therm_fault;
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bool die_therm_fault;
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bool therm_shutdown_flag;
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bool therm_shutdown_stat;
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bool vbat_reg;
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bool ibat_reg;
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int prev_alarm;
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int prev_fault;
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int chg_ma;
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int chg_mv;
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int charge_state;
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};
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typedef enum
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{
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ADC_IBUS,
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ADC_VBUS,
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ADC_VAC,
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ADC_VOUT,
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ADC_VBAT,
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ADC_IBAT,
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ADC_TBUS,
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ADC_TBAT,
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ADC_TDIE,
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ADC_MAX_NUM,
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}ADC_CH;
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#endif
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786
drivers/power/sc8551_reg.h
Normal file
786
drivers/power/sc8551_reg.h
Normal file
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@ -0,0 +1,786 @@
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/****************************************************************************
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* drivers/power/sc8551_reg.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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#ifndef __SC8551_HEADER__
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#define __SC8551_HEADER__
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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#define BAT_OVP_ALARM BIT(7)
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#define BAT_OCP_ALARM BIT(6)
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#define BUS_OVP_ALARM BIT(5)
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#define BUS_OCP_ALARM BIT(4)
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#define BAT_UCP_ALARM BIT(3)
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#define VBUS_INSERT BIT(2)
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#define VBAT_INSERT BIT(1)
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#define ADC_DONE BIT(0)
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#define BAT_OVP_FAULT BIT(7)
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#define BAT_OCP_FAULT BIT(6)
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#define BUS_OVP_FAULT BIT(5)
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#define BUS_OCP_FAULT BIT(4)
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#define TBUS_TBAT_ALARM BIT(3)
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#define TS_BAT_FAULT BIT(2)
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#define TS_BUS_FAULT BIT(1)
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#define TS_DIE_FAULT BIT(0)
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/* below used for comm with other module */
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#define BAT_OVP_FAULT_SHIFT 0
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#define BAT_OCP_FAULT_SHIFT 1
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#define BUS_OVP_FAULT_SHIFT 2
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#define BUS_OCP_FAULT_SHIFT 3
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#define BAT_THERM_FAULT_SHIFT 4
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#define BUS_THERM_FAULT_SHIFT 5
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#define DIE_THERM_FAULT_SHIFT 6
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#define BAT_OVP_FAULT_MASK (1 << BAT_OVP_FAULT_SHIFT)
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#define BAT_OCP_FAULT_MASK (1 << BAT_OCP_FAULT_SHIFT)
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#define BUS_OVP_FAULT_MASK (1 << BUS_OVP_FAULT_SHIFT)
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#define BUS_OCP_FAULT_MASK (1 << BUS_OCP_FAULT_SHIFT)
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#define BAT_THERM_FAULT_MASK (1 << BAT_THERM_FAULT_SHIFT)
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#define BUS_THERM_FAULT_MASK (1 << BUS_THERM_FAULT_SHIFT)
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#define DIE_THERM_FAULT_MASK (1 << DIE_THERM_FAULT_SHIFT)
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#define BAT_OVP_ALARM_SHIFT 0
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#define BAT_OCP_ALARM_SHIFT 1
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#define BUS_OVP_ALARM_SHIFT 2
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#define BUS_OCP_ALARM_SHIFT 3
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#define BAT_THERM_ALARM_SHIFT 4
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#define BUS_THERM_ALARM_SHIFT 5
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#define DIE_THERM_ALARM_SHIFT 6
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#define BAT_UCP_ALARM_SHIFT 7
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#define BAT_OVP_ALARM_MASK (1 << BAT_OVP_ALARM_SHIFT)
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#define BAT_OCP_ALARM_MASK (1 << BAT_OCP_ALARM_SHIFT)
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#define BUS_OVP_ALARM_MASK (1 << BUS_OVP_ALARM_SHIFT)
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#define BUS_OCP_ALARM_MASK (1 << BUS_OCP_ALARM_SHIFT)
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#define BAT_THERM_ALARM_MASK (1 << BAT_THERM_ALARM_SHIFT)
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#define BUS_THERM_ALARM_MASK (1 << BUS_THERM_ALARM_SHIFT)
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#define DIE_THERM_ALARM_MASK (1 << DIE_THERM_ALARM_SHIFT)
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#define BAT_UCP_ALARM_MASK (1 << BAT_UCP_ALARM_SHIFT)
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#define VBAT_REG_STATUS_SHIFT 0
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#define IBAT_REG_STATUS_SHIFT 1
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#define VBAT_REG_STATUS_MASK (1 << VBAT_REG_STATUS_SHIFT)
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#define IBAT_REG_STATUS_MASK (1 << VBAT_REG_STATUS_SHIFT)
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/* Register 00h */
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#define SC8551_REG_00 0x00
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#define SC8551_BAT_OVP_DIS_MASK 0x80
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#define SC8551_BAT_OVP_DIS_SHIFT 7
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#define SC8551_BAT_OVP_ENABLE 0
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#define SC8551_BAT_OVP_DISABLE 1
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#define SC8551_BAT_OVP_MASK 0x3F
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#define SC8551_BAT_OVP_SHIFT 0
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#define SC8551_BAT_OVP_BASE 3500
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#define SC8551_BAT_OVP_LSB 25
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/* Register 01h */
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#define SC8551_REG_01 0x01
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#define SC8551_BAT_OVP_ALM_DIS_MASK 0x80
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#define SC8551_BAT_OVP_ALM_DIS_SHIFT 7
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#define SC8551_BAT_OVP_ALM_ENABLE 0
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#define SC8551_BAT_OVP_ALM_DISABLE 1
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#define SC8551_BAT_OVP_ALM_MASK 0x3F
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#define SC8551_BAT_OVP_ALM_SHIFT 0
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#define SC8551_BAT_OVP_ALM_BASE 3500
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#define SC8551_BAT_OVP_ALM_LSB 25
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/* Register 02h */
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#define SC8551_REG_02 0x02
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#define SC8551_BAT_OCP_DIS_MASK 0x80
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#define SC8551_BAT_OCP_DIS_SHIFT 7
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#define SC8551_BAT_OCP_ENABLE 0
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#define SC8551_BAT_OCP_DISABLE 1
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#define SC8551_BAT_OCP_MASK 0x7F
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#define SC8551_BAT_OCP_SHIFT 0
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#define SC8551_BAT_OCP_BASE 2000
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#define SC8551_BAT_OCP_LSB 100
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/* Register 03h */
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#define SC8551_REG_03 0x03
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#define SC8551_BAT_OCP_ALM_DIS_MASK 0x80
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#define SC8551_BAT_OCP_ALM_DIS_SHIFT 7
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#define SC8551_BAT_OCP_ALM_ENABLE 0
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#define SC8551_BAT_OCP_ALM_DISABLE 1
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#define SC8551_BAT_OCP_ALM_MASK 0x7F
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#define SC8551_BAT_OCP_ALM_SHIFT 0
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#define SC8551_BAT_OCP_ALM_BASE 2000
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#define SC8551_BAT_OCP_ALM_LSB 100
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/* Register 04h */
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#define SC8551_REG_04 0x04
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#define SC8551_BAT_UCP_ALM_DIS_MASK 0x80
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#define SC8551_BAT_UCP_ALM_DIS_SHIFT 7
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#define SC8551_BAT_UCP_ALM_ENABLE 0
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#define SC8551_BAT_UCP_ALM_DISABLE 1
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#define SC8551_BAT_UCP_ALM_MASK 0x7F
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#define SC8551_BAT_UCP_ALM_SHIFT 0
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#define SC8551_BAT_UCP_ALM_BASE 0
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#define SC8551_BAT_UCP_ALM_LSB 50
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/* Register 05h */
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#define SC8551_REG_05 0x05
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#define SC8551_AC_OVP_STAT_MASK 0x80
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#define SC8551_AC_OVP_STAT_SHIFT 7
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#define SC8551_AC_OVP_FLAG_MASK 0x40
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#define SC8551_AC_OVP_FLAG_SHIFT 6
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#define SC8551_AC_OVP_MASK_MASK 0x20
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#define SC8551_AC_OVP_MASK_SHIFT 5
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#define SC8551_VDROP_THRESHOLD_SET_MASK 0x10
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#define SC8551_VDROP_THRESHOLD_SET_SHIFT 4
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#define SC8551_VDROP_THRESHOLD_300MV 0
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#define SC8551_VDROP_THRESHOLD_400MV 1
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#define SC8551_VDROP_DEGLITCH_SET_MASK 0x08
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#define SC8551_VDROP_DEGLITCH_SET_SHIFT 3
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#define SC8551_VDROP_DEGLITCH_8US 0
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#define SC8551_VDROP_DEGLITCH_5MS 1
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#define SC8551_AC_OVP_MASK 0x07
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#define SC8551_AC_OVP_SHIFT 0
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#define SC8551_AC_OVP_BASE 11
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#define SC8551_AC_OVP_LSB 1
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#define SC8551_AC_OVP_6P5V 65
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/* Register 06h */
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#define SC8551_REG_06 0x06
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#define SC8551_VBUS_PD_EN_MASK 0x80
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#define SC8551_VBUS_PD_EN_SHIFT 7
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#define SC8551_VBUS_PD_ENABLE 1
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#define SC8551_VBUS_PD_DISABLE 0
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#define SC8551_BUS_OVP_MASK 0x7F
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#define SC8551_BUS_OVP_SHIFT 0
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#define SC8551_BUS_OVP_BASE 6000
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#define SC8551_BUS_OVP_LSB 50
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/* Register 07h */
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#define SC8551_REG_07 0x07
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#define SC8551_BUS_OVP_ALM_DIS_MASK 0x80
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#define SC8551_BUS_OVP_ALM_DIS_SHIFT 7
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#define SC8551_BUS_OVP_ALM_ENABLE 0
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#define SC8551_BUS_OVP_ALM_DISABLE 1
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#define SC8551_BUS_OVP_ALM_MASK 0x7F
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#define SC8551_BUS_OVP_ALM_SHIFT 0
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#define SC8551_BUS_OVP_ALM_BASE 6000
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#define SC8551_BUS_OVP_ALM_LSB 50
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/* Register 08h */
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#define SC8551_REG_08 0x08
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#define SC8551_BUS_OCP_DIS_MASK 0x80
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#define SC8551_BUS_OCP_DIS_SHIFT 7
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#define SC8551_BUS_OCP_ENABLE 0
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#define SC8551_BUS_OCP_DISABLE 1
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#define SC8551_IBUS_UCP_RISE_FLAG_MASK 0x40
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#define SC8551_IBUS_UCP_RISE_FLAG_SHIFT 6
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#define SC8551_IBUS_UCP_RISE_MASK_MASK 0x20
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#define SC8551_IBUS_UCP_RISE_MASK_SHIFT 5
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#define SC8551_IBUS_UCP_RISE_MASK_ENABLE 1
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#define SC8551_IBUS_UCP_RISE_MASK_DISABLE 0
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#define SC8551_IBUS_UCP_FALL_FLAG_MASK 0x10
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#define SC8551_IBUS_UCP_FALL_FLAG_SHIFT 4
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#define SC8551_BUS_OCP_MASK 0x0F
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#define SC8551_BUS_OCP_SHIFT 0
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#define SC8551_BUS_OCP_BASE 1000
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#define SC8551_BUS_OCP_LSB 250
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/* Register 09h */
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#define SC8551_REG_09 0x09
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#define SC8551_BUS_OCP_ALM_DIS_MASK 0x80
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#define SC8551_BUS_OCP_ALM_DIS_SHIFT 7
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||||
#define SC8551_BUS_OCP_ALM_ENABLE 0
|
||||
#define SC8551_BUS_OCP_ALM_DISABLE 1
|
||||
|
||||
#define SC8551_BUS_OCP_ALM_MASK 0x7F
|
||||
#define SC8551_BUS_OCP_ALM_SHIFT 0
|
||||
#define SC8551_BUS_OCP_ALM_BASE 0
|
||||
#define SC8551_BUS_OCP_ALM_LSB 50
|
||||
|
||||
/* Register 0Ah */
|
||||
#define SC8551_REG_0A 0x0A
|
||||
#define SC8551_TSHUT_FLAG_MASK 0x80
|
||||
#define SC8551_TSHUT_FLAG_SHIFT 7
|
||||
|
||||
#define SC8551_TSHUT_STAT_MASK 0x40
|
||||
#define SC8551_TSHUT_STAT_SHIFT 6
|
||||
|
||||
#define SC8551_VBUS_ERRORLO_STAT_MASK 0x20
|
||||
#define SC8551_VBUS_ERRORLO_STAT_SHIFT 5
|
||||
|
||||
#define SC8551_VBUS_ERRORHI_STAT_MASK 0x10
|
||||
#define SC8551_VBUS_ERRORHI_STAT_SHIFT 4
|
||||
|
||||
#define SC8551_SS_TIMEOUT_FLAG_MASK 0x08
|
||||
#define SC8551_SS_TIMEOUT_FLAG_SHIFT 3
|
||||
|
||||
#define SC8551_CONV_SWITCHING_STAT_MASK 0x04
|
||||
#define SC8551_CONV_SWITCHING_STAT_SHIFT 2
|
||||
|
||||
#define SC8551_CONV_OCP_FLAG_MASK 0x02
|
||||
#define SC8551_CONV_OCP_FLAG_SHIFT 1
|
||||
|
||||
#define SC8551_PIN_DIAG_FALL_FLAG_MASK 0x01
|
||||
#define SC8551_PIN_DIAG_FALL_FLAG_SHIFT 0
|
||||
|
||||
/* Register 0Bh */
|
||||
#define SC8551_REG_0B 0x0B
|
||||
#define SC8551_REG_RST_MASK 0x80
|
||||
#define SC8551_REG_RST_SHIFT 7
|
||||
#define SC8551_REG_RST_ENABLE 1
|
||||
#define SC8551_REG_RST_DISABLE 0
|
||||
|
||||
#define SC8551_FSW_SET_MASK 0x70
|
||||
#define SC8551_FSW_SET_SHIFT 4
|
||||
#define SC8551_FSW_SET_300KHZ 0
|
||||
#define SC8551_FSW_SET_350KHZ 1
|
||||
#define SC8551_FSW_SET_400KHZ 2
|
||||
#define SC8551_FSW_SET_450KHZ 3
|
||||
#define SC8551_FSW_SET_500KHZ 4
|
||||
#define SC8551_FSW_SET_550KHZ 5
|
||||
#define SC8551_FSW_SET_600KHZ 6
|
||||
#define SC8551_FSW_SET_750KHZ 7
|
||||
|
||||
#define SC8551_WD_TIMEOUT_FLAG_MASK 0x08
|
||||
#define SC8551_WD_TIMEOUT_SHIFT 3
|
||||
|
||||
#define SC8551_WATCHDOG_DIS_MASK 0x04
|
||||
#define SC8551_WATCHDOG_DIS_SHIFT 2
|
||||
#define SC8551_WATCHDOG_ENABLE 0
|
||||
#define SC8551_WATCHDOG_DISABLE 1
|
||||
|
||||
#define SC8551_WATCHDOG_MASK 0x03
|
||||
#define SC8551_WATCHDOG_SHIFT 0
|
||||
#define SC8551_WATCHDOG_0P5S 0
|
||||
#define SC8551_WATCHDOG_1S 1
|
||||
#define SC8551_WATCHDOG_5S 2
|
||||
#define SC8551_WATCHDOG_30S 3
|
||||
|
||||
/* Register 0Ch */
|
||||
#define SC8551_REG_0C 0x0C
|
||||
#define SC8551_CHG_EN_MASK 0x80
|
||||
#define SC8551_CHG_EN_SHIFT 7
|
||||
#define SC8551_CHG_ENABLE 1
|
||||
#define SC8551_CHG_DISABLE 0
|
||||
|
||||
#define SC8551_MS_MASK 0x60
|
||||
#define SC8551_MS_SHIFT 5
|
||||
#define SC8551_MS_STANDALONE 0
|
||||
#define SC8551_MS_SLAVE 1
|
||||
#define SC8551_MS_MASTER 2
|
||||
|
||||
#define SC8551_FREQ_SHIFT_MASK 0x18
|
||||
#define SC8551_FREQ_SHIFT_SHIFT 3
|
||||
#define SC8551_FREQ_SHIFT_NORMINAL 0
|
||||
#define SC8551_FREQ_SHIFT_POSITIVE10 1
|
||||
#define SC8551_FREQ_SHIFT_NEGATIVE10 2
|
||||
#define SC8551_FREQ_SHIFT_SPREAD_SPECTRUM 3
|
||||
|
||||
#define SC8551_TSBUS_DIS_MASK 0x04
|
||||
#define SC8551_TSBUS_DIS_SHIFT 2
|
||||
#define SC8551_TSBUS_ENABLE 0
|
||||
#define SC8551_TSBUS_DISABLE 1
|
||||
|
||||
#define SC8551_TSBAT_DIS_MASK 0x02
|
||||
#define SC8551_TSBAT_DIS_SHIFT 1
|
||||
#define SC8551_TSBAT_ENABLE 0
|
||||
#define SC8551_TSBAT_DISABLE 1
|
||||
|
||||
/* Register 0Dh */
|
||||
#define SC8551_REG_0D 0x0D
|
||||
#define SC8551_BAT_OVP_ALM_STAT_MASK 0x80
|
||||
#define SC8551_BAT_OVP_ALM_STAT_SHIFT 7
|
||||
|
||||
#define SC8551_BAT_OCP_ALM_STAT_MASK 0x40
|
||||
#define SC8551_BAT_OCP_ALM_STAT_SHIFT 6
|
||||
|
||||
#define SC8551_BUS_OVP_ALM_STAT_MASK 0x20
|
||||
#define SC8551_BUS_OVP_ALM_STAT_SHIFT 5
|
||||
|
||||
#define SC8551_BUS_OCP_ALM_STAT_MASK 0x10
|
||||
#define SC8551_BUS_OCP_ALM_STAT_SHIFT 4
|
||||
|
||||
#define SC8551_BAT_UCP_ALM_STAT_MASK 0x08
|
||||
#define SC8551_BAT_UCP_ALM_STAT_SHIFT 3
|
||||
|
||||
#define SC8551_ADAPTER_INSERT_STAT_MASK 0x04
|
||||
#define SC8551_ADAPTER_INSERT_STAT_SHIFT 2
|
||||
|
||||
#define SC8551_VBAT_INSERT_STAT_MASK 0x02
|
||||
#define SC8551_VBAT_INSERT_STAT_SHIFT 1
|
||||
|
||||
#define SC8551_ADC_DONE_STAT_MASK 0x01
|
||||
#define SC8551_ADC_DONE_STAT_SHIFT 0
|
||||
#define SC8551_ADC_DONE_STAT_COMPLETE 1
|
||||
#define SC8551_ADC_DONE_STAT_NOTCOMPLETE 0
|
||||
|
||||
/* Register 0Eh */
|
||||
#define SC8551_REG_0E 0x0E
|
||||
#define SC8551_BAT_OVP_ALM_FLAG_MASK 0x80
|
||||
#define SC8551_BAT_OVP_ALM_FLAG_SHIFT 7
|
||||
|
||||
#define SC8551_BAT_OCP_ALM_FLAG_MASK 0x40
|
||||
#define SC8551_BAT_OCP_ALM_FLAG_SHIFT 6
|
||||
|
||||
#define SC8551_BUS_OVP_ALM_FLAG_MASK 0x20
|
||||
#define SC8551_BUS_OVP_ALM_FLAG_SHIFT 5
|
||||
|
||||
#define SC8551_BUS_OCP_ALM_FLAG_MASK 0x10
|
||||
#define SC8551_BUS_OCP_ALM_FLAG_SHIFT 4
|
||||
|
||||
#define SC8551_BAT_UCP_ALM_FLAG_MASK 0x08
|
||||
#define SC8551_BAT_UCP_ALM_FLAG_SHIFT 3
|
||||
|
||||
#define SC8551_ADAPTER_INSERT_FLAG_MASK 0x04
|
||||
#define SC8551_ADAPTER_INSERT_FLAG_SHIFT 2
|
||||
|
||||
#define SC8551_VBAT_INSERT_FLAG_MASK 0x02
|
||||
#define SC8551_VBAT_INSERT_FLAG_SHIFT 1
|
||||
|
||||
#define SC8551_ADC_DONE_FLAG_MASK 0x01
|
||||
#define SC8551_ADC_DONE_FLAG_SHIFT 0
|
||||
#define SC8551_ADC_DONE_FLAG_COMPLETE 1
|
||||
#define SC8551_ADC_DONE_FLAG_NOTCOMPLETE 0
|
||||
|
||||
/* Register 0Fh */
|
||||
#define SC8551_REG_0F 0x0F
|
||||
#define SC8551_BAT_OVP_ALM_MASK_MASK 0x80
|
||||
#define SC8551_BAT_OVP_ALM_MASK_SHIFT 7
|
||||
#define SC8551_BAT_OVP_ALM_MASK_ENABLE 1
|
||||
#define SC8551_BAT_OVP_ALM_MASK_DISABLE 0
|
||||
|
||||
#define SC8551_BAT_OCP_ALM_MASK_MASK 0x40
|
||||
#define SC8551_BAT_OCP_ALM_MASK_SHIFT 6
|
||||
#define SC8551_BAT_OCP_ALM_MASK_ENABLE 1
|
||||
#define SC8551_BAT_OCP_ALM_MASK_DISABLE 0
|
||||
|
||||
#define SC8551_BUS_OVP_ALM_MASK_MASK 0x20
|
||||
#define SC8551_BUS_OVP_ALM_MASK_SHIFT 5
|
||||
#define SC8551_BUS_OVP_ALM_MASK_ENABLE 1
|
||||
#define SC8551_BUS_OVP_ALM_MASK_DISABLE 0
|
||||
|
||||
#define SC8551_BUS_OCP_ALM_MASK_MASK 0x10
|
||||
#define SC8551_BUS_OCP_ALM_MASK_SHIFT 4
|
||||
#define SC8551_BUS_OCP_ALM_MASK_ENABLE 1
|
||||
#define SC8551_BUS_OCP_ALM_MASK_DISABLE 0
|
||||
|
||||
#define SC8551_BAT_UCP_ALM_MASK_MASK 0x08
|
||||
#define SC8551_BAT_UCP_ALM_MASK_SHIFT 3
|
||||
#define SC8551_BAT_UCP_ALM_MASK_ENABLE 1
|
||||
#define SC8551_BAT_UCP_ALM_MASK_DISABLE 0
|
||||
|
||||
#define SC8551_ADAPTER_INSERT_MASK_MASK 0x04
|
||||
#define SC8551_ADAPTER_INSERT_MASK_SHIFT 2
|
||||
#define SC8551_ADAPTER_INSERT_MASK_ENABLE 1
|
||||
#define SC8551_ADAPTER_INSERT_MASK_DISABLE 0
|
||||
|
||||
#define SC8551_VBAT_INSERT_MASK_MASK 0x02
|
||||
#define SC8551_VBAT_INSERT_MASK_SHIFT 1
|
||||
#define SC8551_VBAT_INSERT_MASK_ENABLE 1
|
||||
#define SC8551_VBAT_INSERT_MASK_DISABLE 0
|
||||
|
||||
#define SC8551_ADC_DONE_MASK_MASK 0x01
|
||||
#define SC8551_ADC_DONE_MASK_SHIFT 0
|
||||
#define SC8551_ADC_DONE_MASK_ENABLE 1
|
||||
#define SC8551_ADC_DONE_MASK_DISABLE 0
|
||||
|
||||
/* Register 10h */
|
||||
#define SC8551_REG_10 0x10
|
||||
#define SC8551_BAT_OVP_FLT_STAT_MASK 0x80
|
||||
#define SC8551_BAT_OVP_FLT_STAT_SHIFT 7
|
||||
|
||||
#define SC8551_BAT_OCP_FLT_STAT_MASK 0x40
|
||||
#define SC8551_BAT_OCP_FLT_STAT_SHIFT 6
|
||||
|
||||
#define SC8551_BUS_OVP_FLT_STAT_MASK 0x20
|
||||
#define SC8551_BUS_OVP_FLT_STAT_SHIFT 5
|
||||
|
||||
#define SC8551_BUS_OCP_FLT_STAT_MASK 0x10
|
||||
#define SC8551_BUS_OCP_FLT_STAT_SHIFT 4
|
||||
|
||||
#define SC8551_TSBUS_TSBAT_ALM_STAT_MASK 0x08
|
||||
#define SC8551_TSBUS_TSBAT_ALM_STAT_SHIFT 3
|
||||
|
||||
#define SC8551_TSBAT_FLT_STAT_MASK 0x04
|
||||
#define SC8551_TSBAT_FLT_STAT_SHIFT 2
|
||||
|
||||
#define SC8551_TSBUS_FLT_STAT_MASK 0x02
|
||||
#define SC8551_TSBUS_FLT_STAT_SHIFT 1
|
||||
|
||||
#define SC8551_TDIE_ALM_STAT_MASK 0x01
|
||||
#define SC8551_TDIE_ALM_STAT_SHIFT 0
|
||||
|
||||
/* Register 11h */
|
||||
#define SC8551_REG_11 0x11
|
||||
#define SC8551_BAT_OVP_FLT_FLAG_MASK 0x80
|
||||
#define SC8551_BAT_OVP_FLT_FLAG_SHIFT 7
|
||||
|
||||
#define SC8551_BAT_OCP_FLT_FLAG_MASK 0x40
|
||||
#define SC8551_BAT_OCP_FLT_FLAG_SHIFT 6
|
||||
|
||||
#define SC8551_BUS_OVP_FLT_FLAG_MASK 0x20
|
||||
#define SC8551_BUS_OVP_FLT_FLAG_SHIFT 5
|
||||
|
||||
#define SC8551_BUS_OCP_FLT_FLAG_MASK 0x10
|
||||
#define SC8551_BUS_OCP_FLT_FLAG_SHIFT 4
|
||||
|
||||
#define SC8551_TSBUS_TSBAT_ALM_FLAG_MASK 0x08
|
||||
#define SC8551_TSBUS_TSBAT_ALM_FLAG_SHIFT 3
|
||||
|
||||
#define SC8551_TSBAT_FLT_FLAG_MASK 0x04
|
||||
#define SC8551_TSBAT_FLT_FLAG_SHIFT 2
|
||||
|
||||
#define SC8551_TSBUS_FLT_FLAG_MASK 0x02
|
||||
#define SC8551_TSBUS_FLT_FLAG_SHIFT 1
|
||||
|
||||
#define SC8551_TDIE_ALM_FLAG_MASK 0x01
|
||||
#define SC8551_TDIE_ALM_FLAG_SHIFT 0
|
||||
|
||||
/* Register 12h */
|
||||
#define SC8551_REG_12 0x12
|
||||
#define SC8551_BAT_OVP_FLT_MASK_MASK 0x80
|
||||
#define SC8551_BAT_OVP_FLT_MASK_SHIFT 7
|
||||
#define SC8551_BAT_OVP_FLT_MASK_ENABLE 1
|
||||
#define SC8551_BAT_OVP_FLT_MASK_DISABLE 0
|
||||
|
||||
#define SC8551_BAT_OCP_FLT_MASK_MASK 0x40
|
||||
#define SC8551_BAT_OCP_FLT_MASK_SHIFT 6
|
||||
#define SC8551_BAT_OCP_FLT_MASK_ENABLE 1
|
||||
#define SC8551_BAT_OCP_FLT_MASK_DISABLE 0
|
||||
|
||||
#define SC8551_BUS_OVP_FLT_MASK_MASK 0x20
|
||||
#define SC8551_BUS_OVP_FLT_MASK_SHIFT 5
|
||||
#define SC8551_BUS_OVP_FLT_MASK_ENABLE 1
|
||||
#define SC8551_BUS_OVP_FLT_MASK_DISABLE 0
|
||||
|
||||
#define SC8551_BUS_OCP_FLT_MASK_MASK 0x10
|
||||
#define SC8551_BUS_OCP_FLT_MASK_SHIFT 4
|
||||
#define SC8551_BUS_OCP_FLT_MASK_ENABLE 1
|
||||
#define SC8551_BUS_OCP_FLT_MASK_DISABLE 0
|
||||
|
||||
#define SC8551_TSBUS_TSBAT_ALM_MASK_MASK 0x08
|
||||
#define SC8551_TSBUS_TSBAT_ALM_MASK_SHIFT 3
|
||||
#define SC8551_TSBUS_TSBAT_ALM_MASK_ENABLE 1
|
||||
#define SC8551_TSBUS_TSBAT_ALM_MASK_DISABLE 0
|
||||
|
||||
#define SC8551_TSBAT_FLT_MASK_MASK 0x04
|
||||
#define SC8551_TSBAT_FLT_MASK_SHIFT 2
|
||||
#define SC8551_TSBAT_FLT_MASK_ENABLE 1
|
||||
#define SC8551_TSBAT_FLT_MASK_DISABLE 0
|
||||
|
||||
#define SC8551_TSBUS_FLT_MASK_MASK 0x02
|
||||
#define SC8551_TSBUS_FLT_MASK_SHIFT 1
|
||||
#define SC8551_TSBUS_FLT_MASK_ENABLE 1
|
||||
#define SC8551_TSBUS_FLT_MASK_DISABLE 0
|
||||
|
||||
#define SC8551_TDIE_ALM_MASK_MASK 0x01
|
||||
#define SC8551_TDIE_ALM_MASK_SHIFT 0
|
||||
#define SC8551_TDIE_ALM_MASK_ENABLE 1
|
||||
#define SC8551_TDIE_ALM_MASK_DISABLE 0
|
||||
|
||||
/* Register 13h */
|
||||
#define SC8551_REG_13 0x13
|
||||
#define SC8551_DEV_ID_MASK 0x0F
|
||||
#define SC8551_DEV_ID_SHIFT 0
|
||||
|
||||
/* Register 14h */
|
||||
#define SC8551_REG_14 0x14
|
||||
#define SC8551_ADC_EN_MASK 0x80
|
||||
#define SC8551_ADC_EN_SHIFT 7
|
||||
#define SC8551_ADC_ENABLE 1
|
||||
#define SC8551_ADC_DISABLE 0
|
||||
|
||||
#define SC8551_ADC_RATE_MASK 0x40
|
||||
#define SC8551_ADC_RATE_SHIFT 6
|
||||
#define SC8551_ADC_RATE_CONTINOUS 0
|
||||
#define SC8551_ADC_RATE_ONESHOT 1
|
||||
|
||||
#define SC8551_IBUS_ADC_DIS_MASK 0x01
|
||||
#define SC8551_IBUS_ADC_DIS_SHIFT 0
|
||||
#define SC8551_IBUS_ADC_ENABLE 0
|
||||
#define SC8551_IBUS_ADC_DISABLE 1
|
||||
|
||||
/* Register 15h */
|
||||
#define SC8551_REG_15 0x15
|
||||
#define SC8551_VBUS_ADC_DIS_MASK 0x80
|
||||
#define SC8551_VBUS_ADC_DIS_SHIFT 7
|
||||
#define SC8551_VBUS_ADC_ENABLE 0
|
||||
#define SC8551_VBUS_ADC_DISABLE 1
|
||||
|
||||
#define SC8551_VAC_ADC_DIS_MASK 0x40
|
||||
#define SC8551_VAC_ADC_DIS_SHIFT 6
|
||||
#define SC8551_VAC_ADC_ENABLE 0
|
||||
#define SC8551_VAC_ADC_DISABLE 1
|
||||
|
||||
#define SC8551_VOUT_ADC_DIS_MASK 0x20
|
||||
#define SC8551_VOUT_ADC_DIS_SHIFT 5
|
||||
#define SC8551_VOUT_ADC_ENABLE 0
|
||||
#define SC8551_VOUT_ADC_DISABLE 1
|
||||
|
||||
#define SC8551_VBAT_ADC_DIS_MASK 0x10
|
||||
#define SC8551_VBAT_ADC_DIS_SHIFT 4
|
||||
#define SC8551_VBAT_ADC_ENABLE 0
|
||||
#define SC8551_VBAT_ADC_DISABLE 1
|
||||
|
||||
#define SC8551_IBAT_ADC_DIS_MASK 0x08
|
||||
#define SC8551_IBAT_ADC_DIS_SHIFT 3
|
||||
#define SC8551_IBAT_ADC_ENABLE 0
|
||||
#define SC8551_IBAT_ADC_DISABLE 1
|
||||
|
||||
#define SC8551_TSBUS_ADC_DIS_MASK 0x04
|
||||
#define SC8551_TSBUS_ADC_DIS_SHIFT 2
|
||||
#define SC8551_TSBUS_ADC_ENABLE 0
|
||||
#define SC8551_TSBUS_ADC_DISABLE 1
|
||||
|
||||
#define SC8551_TSBAT_ADC_DIS_MASK 0x02
|
||||
#define SC8551_TSBAT_ADC_DIS_SHIFT 1
|
||||
#define SC8551_TSBAT_ADC_ENABLE 0
|
||||
#define SC8551_TSBAT_ADC_DISABLE 1
|
||||
|
||||
#define SC8551_TDIE_ADC_DIS_MASK 0x01
|
||||
#define SC8551_TDIE_ADC_DIS_SHIFT 0
|
||||
#define SC8551_TDIE_ADC_ENABLE 0
|
||||
#define SC8551_TDIE_ADC_DISABLE 1
|
||||
|
||||
/* Register 16h */
|
||||
#define SC8551_REG_16 0x16
|
||||
#define SC8551_IBUS_POL_H_MASK 0x0F
|
||||
#define SC8551_IBUS_ADC_LSB 1.5625
|
||||
|
||||
/* Register 17h */
|
||||
#define SC8551_REG_17 0x17
|
||||
#define SC8551_IBUS_POL_L_MASK 0xFF
|
||||
|
||||
/* Register 18h */
|
||||
#define SC8551_REG_18 0x18
|
||||
#define SC8551_VBUS_POL_H_MASK 0x0F
|
||||
#define SC8551_VBUS_ADC_LSB 3.75
|
||||
|
||||
/* Register 19h */
|
||||
#define SC8551_REG_19 0x19
|
||||
#define SC8551_VBUS_POL_L_MASK 0xFF
|
||||
|
||||
/* Register 1Ah */
|
||||
#define SC8551_REG_1A 0x1A
|
||||
#define SC8551_VAC_POL_H_MASK 0x0F
|
||||
#define SC8551_VAC_ADC_LSB 5
|
||||
|
||||
/* Register 1Bh */
|
||||
#define SC8551_REG_1B 0x1B
|
||||
#define SC8551_VAC_POL_L_MASK 0xFF
|
||||
|
||||
/* Register 1Ch */
|
||||
#define SC8551_REG_1C 0x1C
|
||||
#define SC8551_VOUT_POL_H_MASK 0x0F
|
||||
#define SC8551_VOUT_ADC_LSB 1.25
|
||||
|
||||
/* Register 1Dh */
|
||||
#define SC8551_REG_1D 0x1D
|
||||
#define SC8551_VOUT_POL_L_MASK 0x0F
|
||||
|
||||
/* Register 1Eh */
|
||||
#define SC8551_REG_1E 0x1E
|
||||
#define SC8551_VBAT_POL_H_MASK 0x0F
|
||||
#define SC8551_VBAT_ADC_LSB 1.25*1.005
|
||||
|
||||
/* Register 1Fh */
|
||||
#define SC8551_REG_1F 0x1F
|
||||
#define SC8551_VBAT_POL_L_MASK 0xFF
|
||||
|
||||
/* Register 20h */
|
||||
#define SC8551_REG_20 0x20
|
||||
#define SC8551_IBAT_POL_H_MASK 0x0F
|
||||
#define SC8551_IBAT_ADC_LSB 3.125
|
||||
|
||||
/* Register 21h */
|
||||
#define SC8551_REG_21 0x21
|
||||
#define SC8551_IBAT_POL_L_MASK 0xFF
|
||||
|
||||
/* Register 22h */
|
||||
#define SC8551_REG_22 0x22
|
||||
#define SC8551_TSBUS_POL_H_MASK 0x03
|
||||
#define SC8551_TSBUS_ADC_LSB 0.09766
|
||||
|
||||
/* Register 23h */
|
||||
#define SC8551_REG_23 0x23
|
||||
#define SC8551_TSBUS_POL_L_MASK 0xFF
|
||||
|
||||
/* Register 24h */
|
||||
#define SC8551_REG_24 0x24
|
||||
#define SC8551_TSBAT_POL_H_MASK 0x03
|
||||
#define SC8551_TSBAT_ADC_LSB 0.09766
|
||||
|
||||
/* Register 25h */
|
||||
#define SC8551_REG_25 0x25
|
||||
#define SC8551_TSBAT_POL_L_MASK 0xFF
|
||||
|
||||
/* Register 26h */
|
||||
#define SC8551_REG_26 0x26
|
||||
#define SC8551_TDIE_POL_H_MASK 0x01
|
||||
#define SC8551_TDIE_ADC_LSB 0.5
|
||||
|
||||
/* Register 27h */
|
||||
#define SC8551_REG_27 0x27
|
||||
#define SC8551_TDIE_POL_L_MASK 0xFF
|
||||
|
||||
/* Register 28h */
|
||||
#define SC8551_REG_28 0x28
|
||||
#define SC8551_TSBUS_FLT1_MASK 0xFF
|
||||
#define SC8551_TSBUS_FLT1_SHIFT 0
|
||||
#define SC8551_TSBUS_FLT1_BASE 0
|
||||
#define SC8551_TSBUS_FLT1_LSB 0.19531
|
||||
|
||||
/* Register 29h */
|
||||
#define SC8551_REG_29 0x29
|
||||
#define SC8551_TSBAT_FLT0_MASK 0xFF
|
||||
#define SC8551_TSBAT_FLT0_SHIFT 0
|
||||
#define SC8551_TSBAT_FLT0_BASE 0
|
||||
#define SC8551_TSBAT_FLT0_LSB 0.19531
|
||||
|
||||
/* Register 2Ah */
|
||||
#define SC8551_REG_2A 0x2A
|
||||
#define SC8551_TDIE_ALM_MASK 0xFF
|
||||
#define SC8551_TDIE_ALM_SHIFT 0
|
||||
#define SC8551_TDIE_ALM_BASE 25
|
||||
#define SC8551_TDIE_ALM_LSB 5 /* careful multiply is used for calc */
|
||||
|
||||
/* Register 2Bh */
|
||||
#define SC8551_REG_2B 0x2B
|
||||
#define SC8551_SS_TIMEOUT_SET_MASK 0xE0
|
||||
#define SC8551_SS_TIMEOUT_SET_SHIFT 5
|
||||
#define SC8551_SS_TIMEOUT_DISABLE 0
|
||||
#define SC8551_SS_TIMEOUT_12P5MS 1
|
||||
#define SC8551_SS_TIMEOUT_25MS 2
|
||||
#define SC8551_SS_TIMEOUT_50MS 3
|
||||
#define SC8551_SS_TIMEOUT_100MS 4
|
||||
#define SC8551_SS_TIMEOUT_400MS 5
|
||||
#define SC8551_SS_TIMEOUT_1500MS 6
|
||||
#define SC8551_SS_TIMEOUT_100000MS 7
|
||||
|
||||
#define SC8551_EN_REGULATION_MASK 0x10
|
||||
#define SC8551_EN_REGULATION_SHIFT 4
|
||||
#define SC8551_EN_REGULATION_ENABLE 1
|
||||
#define SC8551_EN_REGULATION_DISABLE 0
|
||||
|
||||
#define SC8551_VOUT_OVP_DIS_MASK 0x08
|
||||
#define SC8551_VOUT_OVP_DIS_SHIFT 3
|
||||
#define SC8551_VOUT_OVP_ENABLE 1
|
||||
#define SC8551_VOUT_OVP_DISABLE 0
|
||||
|
||||
#define SC8551_IBUS_UCP_RISE_TH_MASK 0x04
|
||||
#define SC8551_IBUS_UCP_RISE_TH_SHIFT 2
|
||||
#define SC8551_IBUS_UCP_RISE_150MA 0
|
||||
#define SC8551_IBUS_UCP_RISE_250MA 1
|
||||
|
||||
#define SC8551_SET_IBAT_SNS_RES_MASK 0x02
|
||||
#define SC8551_SET_IBAT_SNS_RES_SHIFT 1
|
||||
#define SC8551_SET_IBAT_SNS_RES_2MHM 0
|
||||
#define SC8551_SET_IBAT_SNS_RES_5MHM 1
|
||||
|
||||
#define SC8551_VAC_PD_EN_MASK 0x01
|
||||
#define SC8551_VAC_PD_EN_SHIFT 0
|
||||
#define SC8551_VAC_PD_ENABLE 1
|
||||
#define SC8551_VAC_PD_DISABLE 0
|
||||
|
||||
/* Register 2Ch */
|
||||
#define SC8551_REG_2C 0x2C
|
||||
#define SC8551_IBAT_REG_MASK 0xC0
|
||||
#define SC8551_IBAT_REG_SHIFT 6
|
||||
#define SC8551_IBAT_REG_200MA 0
|
||||
#define SC8551_IBAT_REG_300MA 1
|
||||
#define SC8551_IBAT_REG_400MA 2
|
||||
#define SC8551_IBAT_REG_500MA 3
|
||||
#define SC8551_VBAT_REG_MASK 0x30
|
||||
#define SC8551_VBAT_REG_SHIFT 4
|
||||
#define SC8551_VBAT_REG_50MV 0
|
||||
#define SC8551_VBAT_REG_100MV 1
|
||||
#define SC8551_VBAT_REG_150MV 2
|
||||
#define SC8551_VBAT_REG_200MV 3
|
||||
|
||||
#define SC8551_VBAT_REG_ACTIVE_STAT_MASK 0x08
|
||||
#define SC8551_IBAT_REG_ACTIVE_STAT_MASK 0x04
|
||||
#define SC8551_VDROP_OVP_ACTIVE_STAT_MASK 0x02
|
||||
#define SC8551_VOUT_OVP_ACTIVE_STAT_MASK 0x01
|
||||
|
||||
#define SC8551_REG_2D 0x2D
|
||||
#define SC8551_VBAT_REG_ACTIVE_FLAG_MASK 0x80
|
||||
#define SC8551_IBAT_REG_ACTIVE_FLAG_MASK 0x40
|
||||
#define SC8551_VDROP_OVP_FLAG_MASK 0x20
|
||||
#define SC8551_VOUT_OVP_FLAG_MASK 0x10
|
||||
#define SC8551_VBAT_REG_ACTIVE_MASK_MASK 0x08
|
||||
#define SC8551_IBAT_REG_ACTIVE_MASK_MASK 0x04
|
||||
#define SC8551_VDROP_OVP_MASK_MASK 0x02
|
||||
#define SC8551_VOUT_OVP_MASK_MASK 0x01
|
||||
|
||||
#define SC8551_REG_2E 0x2E
|
||||
#define SC8551_IBUS_LOW_DG_MASK 0x08
|
||||
#define SC8551_IBUS_LOW_DG_SHIFT 3
|
||||
#define SC8551_IBUS_LOW_DG_10US 0
|
||||
#define SC8551_IBUS_LOW_DG_5MS 1
|
||||
|
||||
#define SC8551_REG_2F 0x2F
|
||||
#define SC8551_PMID2OUT_UVP_FLAG_MASK 0x08
|
||||
#define SC8551_PMID2OUT_OVP_FLAG_MASK 0x04
|
||||
#define SC8551_PMID2OUT_UVP_STAT_MASK 0x02
|
||||
#define SC8551_PMID2OUT_OVP_STAT_MASK 0x01
|
||||
|
||||
#define SC8551_REG_30 0x30
|
||||
#define SC8551_IBUS_REG_EN_MASK 0x80
|
||||
#define SC8551_IBUS_REG_EN_SHIFT 7
|
||||
#define SC8551_IBUS_REG_ENABLE 1
|
||||
#define SC8551_IBUS_REG_DISABLE 0
|
||||
#define SC8551_IBUS_REG_ACTIVE_STAT_MASK 0x40
|
||||
#define SC8551_IBUS_REG_ACTIVE_FLAG_MASK 0x20
|
||||
#define SC8551_IBUS_REG_ACTIVE_MASK_MASK 0x10
|
||||
#define SC8551_IBUS_REG_ACTIVE_MASK_SHIFT 4
|
||||
#define SC8551_IBUS_REG_ACTIVE_NOT_MASK 0
|
||||
#define SC8551_IBUS_REG_ACTIVE_MASK 1
|
||||
#define SC8551_IBUS_REG_MASK 0x0F
|
||||
#define SC8551_IBUS_REG_SHIFT 0
|
||||
#define SC8551_IBUS_REG_BASE 1000
|
||||
#define SC8551_IBUS_REG_LSB 250
|
||||
|
||||
#define SC8551_REG_31 0x31
|
||||
#define SC8551_CHARGE_MODE_MASK 0x01
|
||||
#define SC8551_CHARGE_MODE_SHIFT 0
|
||||
#define SC8551_CHARGE_MODE_2_1 0
|
||||
#define SC8551_CHARGE_MODE_1_1 1
|
||||
|
||||
#define SC8551_REG_34 0x34
|
||||
#define SC8551_REG_MAX 0x35
|
||||
|
||||
#endif
|
||||
|
|
@ -324,6 +324,44 @@ FAR struct battery_charger_dev_s *bq25618_initialize(
|
|||
int current);
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Name: sc8551_initialize
|
||||
*
|
||||
* Description:
|
||||
* Initialize the SC8551 (pump charger) charger driver and return
|
||||
* an instance of the lower-half interface that may be used with
|
||||
* battery_charger_register().
|
||||
*
|
||||
* This is for:
|
||||
* SC8551
|
||||
*
|
||||
* This driver requires:
|
||||
*
|
||||
* CONFIG_BATTERY_CHARGER - Upper half battery charger driver support
|
||||
* CONFIG_I2C - I2C support
|
||||
* CONFIG_I2C_SC8551 - And the driver must be explicitly selected.
|
||||
*
|
||||
* Input Parameters:
|
||||
* i2c - An instance of the I2C interface to use to communicate with
|
||||
* the SC8551
|
||||
* addr - The I2C address of the SC8551 (Better be 0x66).
|
||||
* frequency - The I2C frequency
|
||||
* current - The input current our power-supply can offer to charger
|
||||
*
|
||||
* Returned Value:
|
||||
* A pointer to the initialized battery driver instance. A NULL pointer
|
||||
* is returned on a failure to initialize the SC8551 lower half.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#if defined(CONFIG_I2C) && defined(CONFIG_I2C_SC8551)
|
||||
|
||||
struct i2c_master_s;
|
||||
FAR struct battery_charger_dev_s *
|
||||
sc8551_initialize(FAR struct i2c_master_s *i2c, uint8_t addr,
|
||||
uint32_t frequency, int current);
|
||||
#endif
|
||||
|
||||
#undef EXTERN
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue