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Misc changes for clean compilation of freedom-kl25z config
This commit is contained in:
Gregory Nutt
parent
5334562196
commit
a5b7e65b20
8 changed files with 27 additions and 219 deletions
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@ -170,6 +170,7 @@ config ARCH_CHIP
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default "dm320" if ARCH_CHIP_DM320
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default "imx" if ARCH_CHIP_IMX
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default "kinetis" if ARCH_CHIP_KINETIS
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default "kl" if ARCH_CHIP_KL
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default "lm" if ARCH_CHIP_LM
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default "lpc17xx" if ARCH_CHIP_LPC17XX
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default "lpc214x" if ARCH_CHIP_LPC214X
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@ -300,6 +301,9 @@ endif
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if ARCH_CHIP_KINETIS
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source arch/arm/src/kinetis/Kconfig
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endif
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if ARCH_CHIP_KL
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source arch/arm/src/kl/Kconfig
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endif
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if ARCH_CHIP_LM
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source arch/arm/src/lm/Kconfig
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endif
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@ -289,6 +289,15 @@ config KL_PIT
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endmenu
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choice
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prompt "SysTick clock source"
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default KL_SYSTICK_CORECLK
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config KL_SYSTICK_CORECLK
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bool "Cortex-M0 core clock"
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endchoice
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comment "Kinetis GPIO Interrupt Configuration"
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config GPIO_IRQ
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@ -45,7 +45,7 @@
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#include "up_arch.h"
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#include "chip.h"
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#include "chip/kl_internal.h"
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#include "kl_internal.h"
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#include "chip/kl_mcg.h"
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#include "chip/kl_sim.h"
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#include "chip/kl_osc.h"
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@ -1,209 +0,0 @@
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/****************************************************************************
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* arch/arm/src/kl/kl_clockconfig.c
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* arch/arm/src/chip/kl_clockconfig.c
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*
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* Copyright (C) 2013 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <arch/board/board.h>
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#include "up_arch.h"
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#include "chip.h"
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#include "chip/kl_internal.h"
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#include "chip/kl_mcg.h"
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#include "chip/kl_sim.h"
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#include "chip/kl_osc.h"
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#include "chip/kl_fmc.h"
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#include "chip/kl_llwu.h"
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#include "chip/kl_pinmux.h"
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/****************************************************************************
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* Private Data
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****************************************************************************/
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/****************************************************************************
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* Public Data
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****************************************************************************/
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Name: kl_portclocks
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*
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* Description:
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* Enable all of the port clocks
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*
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****************************************************************************/
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static inline void kl_portclocks(void)
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{
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uint32_t regval;
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/* Enable all of the port clocks */
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regval = getreg32(KL_SIM_SCGC5);
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regval |= (SIM_SCGC5_PORTA | SIM_SCGC5_PORTB | SIM_SCGC5_PORTC |
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SIM_SCGC5_PORTD | SIM_SCGC5_PORTE);
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putreg32(regval, KL_SIM_SCGC5);
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}
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/****************************************************************************
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* Name: kl_pllconfig
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*
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* Description:
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* Initialize the PLL using the settings in board.h. This assumes that
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* the MCG is in default FLL Engaged Internal (FEI mode) out of reset.
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*
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****************************************************************************/
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void kl_pllconfig(void)
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{
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uint32_t regval32;
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uint8_t regval8;
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/* Enable clock gate to Port A module to enable pin routing (PORTA=1) */
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regval32 = getreg32(KL_SIM_SCGC5);
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regval32 |= SIM_SCGC5_PORTA;
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putreg32(regval32, KL_SIM_SCGC5);
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/* Divide-by-2 for clock 1 and clock 4 (OUTDIV1=1, OUTDIV4=1) */
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regval32 = (SIM_CLKDIV1_OUTDIV1(1) | SIM_CLKDIV1_OUTDIV4(1));
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putreg32(regval32, KL_SIM_CLKDIV1);
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/* System oscillator drives 32 kHz clock for various peripherals (OSC32KSEL=0) */
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regval32 = getreg32(KL_SIM_SOPT1);
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regval32 &= ~(SIM_SOPT1_OSC32KSEL);
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putreg32(regval32, KL_SIM_SOPT1);
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/* Select PLL as a clock source for various peripherals (PLLFLLSEL=1)
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Clock source for TPM counter clock is MCGFLLCLK or MCGPLLCLK/2 */
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regval32 = getreg32(KL_SIM_SOPT2);
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regval32 |= SIM_SOPT2_PLLFLLSEL;
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putreg32(regval32, KL_SIM_SOPT2);
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regval32 = (regval32 & ~(SIM_SOPT2_TPMSRC_OCSERCLK)) | SIM_SOPT2_TPMSRC_MCGCLK;
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putreg32(regval32, KL_SIM_SOPT2);
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/* PORTA_PCR18: ISF=0,MUX=0 */
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/* PORTA_PCR19: ISF=0,MUX=0 */
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regval32 = getreg32(KL_PORTA_PCR18);
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regval32 = ~(PORT_PCR_ISF | PORT_PCR_MUX_ALT7);
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putreg32(regval32, KL_PORTA_PCR18);
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regval32 = getreg32(KL_PORTA_PCR19);
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regval32 = ~(PORT_PCR_ISF | PORT_PCR_MUX_ALT7);
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putreg32(regval32, KL_PORTA_PCR19);
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/* Switch to FBE Mode */
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/* OSC0_CR: ERCLKEN=0,??=0,EREFSTEN=0,??=0,SC2P=0,SC4P=0,SC8P=0,SC16P=0 */
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putreg8(0, KL_OSC_CR);
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/* MCG_C2: LOCRE0=0,??=0,RANGE0=2,HGO0=0,EREFS0=1,LP=0,IRCS=0 */
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regval8 = (MCG_C2_RANGE_VHIGH | MCG_C2_EREFS);
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putreg8(regval8, KL_MCG_C2);
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/* MCG_C1: CLKS=2,FRDIV=3,IREFS=0,IRCLKEN=0,IREFSTEN=0 */
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regval8 = (MCG_C1_CLKS_EXTREF | MCG_C1_FRDIV_R0DIV8);
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putreg8(regval8, KL_MCG_C1);
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/* MCG_C4: DMX32=0,DRST_DRS=0 */
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regval8 = ~(MCG_C4_DMX32 | MCG_C4_DRST_DRS_HIGH);
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putreg8(regval8, KL_MCG_C4);
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/* MCG_C5: ??=0,PLLCLKEN0=0,PLLSTEN0=0,PRDIV0=1 */
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regval8 = MCG_C5_PRDIV(1);
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putreg8(regval8, KL_MCG_C5);
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/* MCG_C6: LOLIE0=0,PLLS=0,CME0=0,VDIV0=0 */
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putreg8(0, KL_MCG_C6);
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/* Check that the source of the FLL reference clock is
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the external reference clock. */
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while((getreg8(KL_MCG_S) & MCG_S_IREFST) != 0)
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;
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/* Wait until external reference */
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while((getreg8(KL_MCG_S) & MCG_S_CLKST_MASK) != 8)
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;
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/* Switch to PBE mode
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Select PLL as MCG source (PLLS=1) */
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putreg8(MCG_C6_PLLS, KL_MCG_C6);
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/* Wait until PLL locked */
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while((getreg8(KL_MCG_S) & MCG_S_LOCK) == 0)
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;
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/* Switch to PEE mode
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Select PLL output (CLKS=0)
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FLL external reference divider (FRDIV=3)
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External reference clock for FLL (IREFS=0) */
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putreg8(MCG_C1_FRDIV_R0DIV8, KL_MCG_C1);
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/* Wait until PLL output */
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while((getreg8(KL_MCG_S) & MCG_S_CLKST_MASK) != 0x0C)
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;
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}
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: kl_clockconfig
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*
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* Description:
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* Called to initialize the Kinetis chip. This does whatever setup is
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* needed to put the MCU in a usable state. This includes the
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* initialization of clocking using the settings in board.h.
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*
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****************************************************************************/
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void kl_clockconfig(void)
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{
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/* Enable all of the port clocks */
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//kl_portclocks();
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/* Configure the PLL based on settings in the board.h file */
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kl_pllconfig();
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/* For debugging, we will normally want to enable the trace clock and/or
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* the FlexBus clock.
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*/
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//kl_traceconfig();
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//kl_fbconfig();
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}
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@ -52,7 +52,7 @@
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#include "up_internal.h"
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#include "kl_config.h"
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#include "chip.h"
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#include "kl_port.h"
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#include "chip/kl_port.h"
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/************************************************************************************
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* Definitions
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@ -48,8 +48,8 @@
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#include "up_arch.h"
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#include "kl_config.h"
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//#include "kl_lowputc.h"
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//#include "chip/kl_internal.h"
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#include "kl_lowputc.h"
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#include "kl_internal.h"
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#include "chip/kl_uart.h"
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#include "chip/kl_sim.h"
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#include "chip/kl_port.h"
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@ -109,7 +109,7 @@ static uint8_t g_sizemap[8] = {1, 4, 8, 16, 32, 64, 128, 0};
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*
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**************************************************************************/
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void kl_lowputc(char ch)
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void kl_lowputc(uint32_t ch)
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{
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#if defined HAVE_UART_DEVICE && defined HAVE_SERIAL_CONSOLE
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#ifdef CONFIG_KL_UARTFIFOS
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@ -62,7 +62,8 @@
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#include "kl_lowputc.h"
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#include "chip.h"
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#include "chip/kl_uart.h"
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//#include "kl_internal.h"
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#include "kl_internal.h"
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/****************************************************************************
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* Pre-processor Definitions
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@ -52,8 +52,8 @@
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#include "kl_config.h"
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#include "kl_lowputc.h"
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//#include "kl_clockconfig.h"
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#include "kl_userspace.h"
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#include "kl_internal.h"
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/****************************************************************************
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* Pre-processor Definitions
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@ -104,8 +104,10 @@ const uint32_t g_idle_topstack = HEAP_BASE;
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void iprintf(const char *string)
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{
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while(*string != NULL)
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kl_lowputc((char) *string++);
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while(*string != '\0')
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{
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kl_lowputc((char) *string++);
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}
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}
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/****************************************************************************
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@ -119,8 +121,9 @@ void iprintf(const char *string)
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void __start(void)
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{
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const uint32_t *src;
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uint32_t *dest, i=0;
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uint32_t *dest;
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volatile unsigned int *SIM_COPC = ((volatile unsigned int *)0x40048100);
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//int i = 0;
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/*acassis: disable SIM_COP*/
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*SIM_COPC = 0;
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