From abc0481a57fc9fd704d6e4dc019a5ed9c4e8928c Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Thu, 12 May 2016 09:47:54 -0600 Subject: [PATCH 1/4] Port for the Nucleo-144 board with the STM32F476ZG MCU. From Kconstantin Berezenko. --- ChangeLog | 3 + configs/Kconfig | 17 +- configs/nucleo-144/Kconfig | 8 + configs/nucleo-144/include/board.h | 356 ++++++++ configs/nucleo-144/nsh/Make.defs | 113 +++ configs/nucleo-144/nsh/defconfig | 908 +++++++++++++++++++ configs/nucleo-144/nsh/setenv.sh | 77 ++ configs/nucleo-144/scripts/flash.ld | 147 +++ configs/nucleo-144/scripts/kernel-space.ld | 109 +++ configs/nucleo-144/scripts/memory.ld | 129 +++ configs/nucleo-144/scripts/user-space.ld | 111 +++ configs/nucleo-144/src/.gitignore | 2 + configs/nucleo-144/src/Makefile | 55 ++ configs/nucleo-144/src/nucleo-144.h | 100 ++ configs/nucleo-144/src/stm32_appinitialize.c | 87 ++ configs/nucleo-144/src/stm32_autoleds.c | 144 +++ configs/nucleo-144/src/stm32_boot.c | 119 +++ configs/nucleo-144/src/stm32_buttons.c | 112 +++ configs/nucleo-144/src/stm32_spi.c | 246 +++++ configs/nucleo-144/src/stm32_userleds.c | 120 +++ 20 files changed, 2962 insertions(+), 1 deletion(-) create mode 100644 configs/nucleo-144/Kconfig create mode 100644 configs/nucleo-144/include/board.h create mode 100644 configs/nucleo-144/nsh/Make.defs create mode 100644 configs/nucleo-144/nsh/defconfig create mode 100644 configs/nucleo-144/nsh/setenv.sh create mode 100644 configs/nucleo-144/scripts/flash.ld create mode 100644 configs/nucleo-144/scripts/kernel-space.ld create mode 100644 configs/nucleo-144/scripts/memory.ld create mode 100644 configs/nucleo-144/scripts/user-space.ld create mode 100644 configs/nucleo-144/src/.gitignore create mode 100644 configs/nucleo-144/src/Makefile create mode 100644 configs/nucleo-144/src/nucleo-144.h create mode 100644 configs/nucleo-144/src/stm32_appinitialize.c create mode 100644 configs/nucleo-144/src/stm32_autoleds.c create mode 100644 configs/nucleo-144/src/stm32_boot.c create mode 100644 configs/nucleo-144/src/stm32_buttons.c create mode 100644 configs/nucleo-144/src/stm32_spi.c create mode 100644 configs/nucleo-144/src/stm32_userleds.c diff --git a/ChangeLog b/ChangeLog index 455ccb8c46c..87f923ce2af 100755 --- a/ChangeLog +++ b/ChangeLog @@ -11718,3 +11718,6 @@ * Several Makefiles: Add .PHONY definitions to prevent 'clean up to date' message weirdness when 'make clean' is done with no .config or Make.defs file (2016-05-10). + * configs/nucleo-144: Basic port for the Nucleo-144 board with the + STM32F746ZG MCU. From Kconstantin Berezenko (2015-05-12). + diff --git a/configs/Kconfig b/configs/Kconfig index 17d7a9ba85c..c2d650557c3 100644 --- a/configs/Kconfig +++ b/configs/Kconfig @@ -647,6 +647,17 @@ config ARCH_BOARD_PIRELLI_DPL10 This directory contains the board support for Pirelli dpl10 phones. The additions were made by Craig Comstock (with help form Alan Carvalho de Assis). +config ARCH_BOARD_NUCLEO_144 + bool "STMicro NUCLEO-144" + depends on ARCH_CHIP_STM32F746 + select ARCH_HAVE_LEDS + select ARCH_HAVE_BUTTONS + select ARCH_HAVE_IRQBUTTONS + ---help--- + STMicro Nucleo-144 development board featuring the STM32F746ZGT6U + MCU. The STM32F746ZGT6U is a 216MHz Cortex-M7 operation with 1024Kb Flash + memory and 300Kb SRAM. + config ARCH_BOARD_NUCLEO_F303RE bool "STM32F303 Nucleo F303RE" depends on ARCH_CHIP_STM32F303RE @@ -963,7 +974,7 @@ config ARCH_BOARD_STM32F746G_DISCO ---help--- STMicro STM32F746G-DISCO development board featuring the STM32F746NGH6 MCU. The STM32F746NGH6 is a 216MHz Cortex-M7 operation with 1024Kb Flash - memory and 300Kb SRAM. + memory and 320Kb SRAM. config ARCH_BOARD_STM32L476VG_DISCO bool "STMicro STM32F746VG-Discovery board" @@ -1363,6 +1374,7 @@ config ARCH_BOARD default "pic32mx7mmb" if ARCH_BOARD_PIC32MX7MMB default "pic32mz-starterkit" if ARCH_BOARD_PIC32MZ_STARTERKIT default "pirelli_dpl10" if ARCH_BOARD_PIRELLI_DPL10 + default "nucleo-144" if ARCH_BOARD_NUCLEO_144 default "nucleo-f303re" if ARCH_BOARD_NUCLEO_F303RE default "nucleo-f4x1re" if ARCH_BOARD_NUCLEO_F401RE || ARCH_BOARD_NUCLEO_F411RE default "nucleo-l476rg" if ARCH_BOARD_NUCLEO_L476RG @@ -1669,6 +1681,9 @@ endif if ARCH_BOARD_PIRELLI_DPL10 source "configs/pirelli_dpl10/Kconfig" endif +if ARCH_BOARD_NUCLEO_144 +source "configs/nucleo-144/Kconfig" +endif if ARCH_BOARD_NUCLEO_F303RE source "configs/nucleo-f303re/Kconfig" endif diff --git a/configs/nucleo-144/Kconfig b/configs/nucleo-144/Kconfig new file mode 100644 index 00000000000..57585efaff0 --- /dev/null +++ b/configs/nucleo-144/Kconfig @@ -0,0 +1,8 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_NUCLEO_144 + +endif # ARCH_BOARD_NUCLEO_144 diff --git a/configs/nucleo-144/include/board.h b/configs/nucleo-144/include/board.h new file mode 100644 index 00000000000..0e9020c0de8 --- /dev/null +++ b/configs/nucleo-144/include/board.h @@ -0,0 +1,356 @@ +/************************************************************************************ + * configs/nucleo-144/include/board.h + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIG_NUCLEO_144_INCLUDE_BOARD_H +#define __CONFIG_NUCLEO_144_INCLUDE_BOARD_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#ifndef __ASSEMBLY__ +# include +#endif + +#include "stm32_rcc.h" +#ifdef CONFIG_STM32F7_SDMMC1 +# include "stm32_sdmmc.h" +#endif + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ +/* The STM32F7 Discovery board provides the following clock sources: + * + * X1: 24 MHz oscillator for USB OTG HS PHY and camera module (daughter board) + * X2: 25 MHz oscillator for STM32F746NGH6 microcontroller and Ethernet PHY. + * X3: 32.768 KHz crystal for STM32F746NGH6 embedded RTC + * + * So we have these clock source available within the STM32 + * + * HSI: 16 MHz RC factory-trimmed + * LSI: 32 KHz RC + * HSE: On-board crystal frequency is 25MHz + * LSE: 32.768 kHz + */ + +#define STM32_BOARD_XTAL 8000000ul + +#define STM32_HSI_FREQUENCY 16000000ul +#define STM32_LSI_FREQUENCY 32000 +#define STM32_HSE_FREQUENCY STM32_BOARD_XTAL +#define STM32_LSE_FREQUENCY 32768 + +/* Main PLL Configuration. + * + * PLL source is HSE = 8,000,000 + * + * PLL_VCO = (STM32_HSE_FREQUENCY / PLLM) * PLLN + * Subject to: + * + * 2 <= PLLM <= 63 + * 192 <= PLLN <= 432 + * 192 MHz <= PLL_VCO <= 432MHz + * + * SYSCLK = PLL_VCO / PLLP + * Subject to + * + * PLLP = {2, 4, 6, 8} + * SYSCLK <= 216 MHz + * + * USB OTG FS, SDMMC and RNG Clock = PLL_VCO / PLLQ + * Subject to + * The USB OTG FS requires a 48 MHz clock to work correctly. The SDMMC + * and the random number generator need a frequency lower than or equal + * to 48 MHz to work correctly. + * + * 2 <= PLLQ <= 15 + */ + +#if defined(CONFIG_STM32F7_USBOTHFS) +/* Highest SYSCLK with USB OTG FS clock = 48 MHz + * + * PLL_VCO = (8,000,000 / 8) * 384 = 384 MHz + * SYSCLK = 384 MHz / 2 = 192 MHz + * USB OTG FS, SDMMC and RNG Clock = 384 MHz / 8 = 48MHz + */ + +#define STM32_PLLCFG_PLLM RCC_PLLCFG_PLLM(8) +#define STM32_PLLCFG_PLLN RCC_PLLCFG_PLLN(384) +#define STM32_PLLCFG_PLLP RCC_PLLCFG_PLLP_2 +#define STM32_PLLCFG_PLLQ RCC_PLLCFG_PLLQ(8) + +#define STM32_VCO_FREQUENCY ((STM32_HSE_FREQUENCY / 8) * 384) +#define STM32_SYSCLK_FREQUENCY (STM32_VCO_FREQUENCY / 2) +#define STM32_OTGFS_FREQUENCY (STM32_VCO_FREQUENCY / 8) + +#elif defined(CONFIG_STM32F7_SDMMC1) || defined(CONFIG_STM32F7_RNG) +/* Highest SYSCLK with USB OTG FS clock <= 48MHz + * + * PLL_VCO = (8,000,000 / 8) * 432 = 432 MHz + * SYSCLK = 432 MHz / 2 = 216 MHz + * USB OTG FS, SDMMC and RNG Clock = 432 MHz / 10 = 43.2 MHz + */ + +#define STM32_PLLCFG_PLLM RCC_PLLCFG_PLLM(8) +#define STM32_PLLCFG_PLLN RCC_PLLCFG_PLLN(432) +#define STM32_PLLCFG_PLLP RCC_PLLCFG_PLLP_2 +#define STM32_PLLCFG_PLLQ RCC_PLLCFG_PLLQ(10) + +#define STM32_VCO_FREQUENCY ((STM32_HSE_FREQUENCY / 8) * 432) +#define STM32_SYSCLK_FREQUENCY (STM32_VCO_FREQUENCY / 2) +#define STM32_OTGFS_FREQUENCY (STM32_VCO_FREQUENCY / 10) + +#else +/* Highest SYSCLK + * + * PLL_VCO = (8,000,000 / 8) * 432 = 432 MHz + * SYSCLK = 432 MHz / 2 = 216 MHz + */ + +#define STM32_PLLCFG_PLLM RCC_PLLCFG_PLLM(8) +#define STM32_PLLCFG_PLLN RCC_PLLCFG_PLLN(432) +#define STM32_PLLCFG_PLLP RCC_PLLCFG_PLLP_2 +#define STM32_PLLCFG_PLLQ RCC_PLLCFG_PLLQ(10) + +#define STM32_VCO_FREQUENCY ((STM32_HSE_FREQUENCY / 8) * 432) +#define STM32_SYSCLK_FREQUENCY (STM32_VCO_FREQUENCY / 2) +#define STM32_OTGFS_FREQUENCY (STM32_VCO_FREQUENCY / 10) +#endif + +/* Several prescalers allow the configuration of the two AHB buses, the + * high-speed APB (APB2) and the low-speed APB (APB1) domains. The maximum + * frequency of the two AHB buses is 216 MHz while the maximum frequency of + * the high-speed APB domains is 108 MHz. The maximum allowed frequency of + * the low-speed APB domain is 54 MHz. + */ + +/* AHB clock (HCLK) is SYSCLK (216 MHz) */ + +#define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK /* HCLK = SYSCLK / 1 */ +#define STM32_HCLK_FREQUENCY STM32_SYSCLK_FREQUENCY +#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* same as above, to satisfy compiler */ + +/* APB1 clock (PCLK1) is HCLK/4 (54 MHz) */ + +#define STM32_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLKd4 /* PCLK1 = HCLK / 4 */ +#define STM32_PCLK1_FREQUENCY (STM32_HCLK_FREQUENCY/4) + +/* Timers driven from APB1 will be twice PCLK1 */ + +#define STM32_APB1_TIM2_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM3_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM4_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM5_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM6_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM7_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM12_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM13_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM14_CLKIN (2*STM32_PCLK1_FREQUENCY) + +/* APB2 clock (PCLK2) is HCLK/2 (108MHz) */ + +#define STM32_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLKd2 /* PCLK2 = HCLK / 2 */ +#define STM32_PCLK2_FREQUENCY (STM32_HCLK_FREQUENCY/2) + +/* Timers driven from APB2 will be twice PCLK2 */ + +#define STM32_APB2_TIM1_CLKIN (2*STM32_PCLK2_FREQUENCY) +#define STM32_APB2_TIM8_CLKIN (2*STM32_PCLK2_FREQUENCY) +#define STM32_APB2_TIM9_CLKIN (2*STM32_PCLK2_FREQUENCY) +#define STM32_APB2_TIM10_CLKIN (2*STM32_PCLK2_FREQUENCY) +#define STM32_APB2_TIM11_CLKIN (2*STM32_PCLK2_FREQUENCY) + +/* FLASH wait states + * + * --------- ---------- ----------- + * VDD MAX SYSCLK WAIT STATES + * --------- ---------- ----------- + * 1.7-2.1 V 180 MHz 8 + * 2.1-2.4 V 216 MHz 9 + * 2.4-2.7 V 216 MHz 8 + * 2.7-3.6 V 216 MHz 7 + * --------- ---------- ----------- + */ + +#define BOARD_FLASH_WAITSTATES 7 + +/* LED definitions ******************************************************************/ +/* The STM32F746G-DISCO board has numerous LEDs but only one, LD1 located near the + * reset button, that can be controlled by software (LD2 is a power indicator, LD3-6 + * indicate USB status, LD7 is controlled by the ST-Link). + * + * LD1 is controlled by PI1 which is also the SPI2_SCK at the Arduino interface. + * One end of LD1 is grounded so a high output on PI1 will illuminate the LED. + * + * If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in any way. + * The following definitions are used to access individual LEDs. + */ + +/* LED index values for use with board_userled() */ + +#define BOARD_LED1 0 +#define BOARD_NLEDS 1 + +#define BOARD_LD1 BOARD_LED1 + +/* LED bits for use with board_userled_all() */ + +#define BOARD_LED1_BIT (1 << BOARD_LED1) + +/* If CONFIG_ARCH_LEDS is defined, the usage by the board port is defined in + * include/board.h and src/stm32_leds.c. The LEDs are used to encode OS-related + * events as follows: + * + * SYMBOL Meaning LD1 + * ------------------- ----------------------- ------ + * LED_STARTED NuttX has been started OFF + * LED_HEAPALLOCATE Heap has been allocated OFF + * LED_IRQSENABLED Interrupts enabled OFF + * LED_STACKCREATED Idle stack created ON + * LED_INIRQ In an interrupt N/C + * LED_SIGNAL In a signal handler N/C + * LED_ASSERTION An assertion failed N/C + * LED_PANIC The system has crashed FLASH + * + * Thus is LD1 is statically on, NuttX has successfully booted and is, + * apparently, running normally. If LD1 is flashing at approximately + * 2Hz, then a fatal error has been detected and the system has halted. + */ + +#define LED_STARTED 0 /* LD1=OFF */ +#define LED_HEAPALLOCATE 0 /* LD1=OFF */ +#define LED_IRQSENABLED 0 /* LD1=OFF */ +#define LED_STACKCREATED 1 /* LD1=ON */ +#define LED_INIRQ 2 /* LD1=no change */ +#define LED_SIGNAL 2 /* LD1=no change */ +#define LED_ASSERTION 2 /* LD1=no change */ +#define LED_PANIC 3 /* LD1=flashing */ + +/* Button definitions ***************************************************************/ +/* The STM32F7 Discovery supports one button: Pushbutton B1, labelled "User", is + * connected to GPIO PI11. A high value will be sensed when the button is depressed. + */ + +#define BUTTON_USER 0 +#define NUM_BUTTONS 1 +#define BUTTON_USER_BIT (1 << BUTTON_USER) + +/* Alternate function pin selections ************************************************/ + +/* USART6: + * + * These configurations assume that you are using a standard Arduio RS-232 shield + * with the serial interface with RX on pin D0 and TX on pin D1: + * + * -------- --------------- + * STM32F7 + * ARDUIONO FUNCTION GPIO + * -- ----- --------- ----- + * DO RX USART6_RX PC7 + * D1 TX USART6_TX PC6 + * -- ----- --------- ----- + */ + +#define GPIO_USART6_RX GPIO_USART6_RX_1 +#define GPIO_USART6_TX GPIO_USART6_TX_1 + +/* The STM32 F7 connects to a SMSC LAN8742A PHY using these pins: + * + * STM32 F7 BOARD LAN8742A + * GPIO SIGNAL PIN NAME + * -------- ------------ ------------- + * PG11 RMII_TX_EN TXEN + * PG13 RMII_TXD0 TXD0 + * PG14 RMII_TXD1 TXD1 + * PC4 RMII_RXD0 RXD0/MODE0 + * PC5 RMII_RXD1 RXD1/MODE1 + * PG2 RMII_RXER RXER/PHYAD0 -- Not used + * PA7 RMII_CRS_DV CRS_DV/MODE2 + * PC1 RMII_MDC MDC + * PA2 RMII_MDIO MDIO + * N/A NRST nRST + * PA1 RMII_REF_CLK nINT/REFCLK0 + * N/A OSC_25M XTAL1/CLKIN + * + * The PHY address is either 0 or 1, depending on the state of PG2 on reset. + * PG2 is not controlled but appears to result in a PHY address of 0. + */ + +#define GPIO_ETH_RMII_TX_EN GPIO_ETH_RMII_TX_EN_2 +#define GPIO_ETH_RMII_TXD0 GPIO_ETH_RMII_TXD0_2 +#define GPIO_ETH_RMII_TXD1 GPIO_ETH_RMII_TXD1_2 + +/************************************************************************************ + * Public Data + ************************************************************************************/ +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_boardinitialize + * + * Description: + * All STM32 architectures must provide the following entry point. This entry point + * is called early in the initialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void stm32_boardinitialize(void); + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIG_NUCLEO_144_INCLUDE_BOARD_H */ diff --git a/configs/nucleo-144/nsh/Make.defs b/configs/nucleo-144/nsh/Make.defs new file mode 100644 index 00000000000..45b3f5f4aee --- /dev/null +++ b/configs/nucleo-144/nsh/Make.defs @@ -0,0 +1,113 @@ +############################################################################ +# configs/nucleo-144/nsh/Make.defs +# +# Copyright (C) 2016 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +LDSCRIPT = flash.ld + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/nucleo-144/nsh/defconfig b/configs/nucleo-144/nsh/defconfig new file mode 100644 index 00000000000..f7fe7e2ebb7 --- /dev/null +++ b/configs/nucleo-144/nsh/defconfig @@ -0,0 +1,908 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +CONFIG_DEBUG_SYMBOLS=y +CONFIG_ARCH_HAVE_CUSTOMOPT=y +CONFIG_DEBUG_NOOPT=y +# CONFIG_DEBUG_CUSTOMOPT is not set +# CONFIG_DEBUG_FULLOPT is not set + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +CONFIG_ARCH_CHIP_STM32F7=y +# CONFIG_ARCH_CHIP_STM32L4 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM4 is not set +CONFIG_ARCH_CORTEXM7=y +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32f7" +# CONFIG_ARM_TOOLCHAIN_IAR is not set +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +CONFIG_ARMV7M_CMNVECTOR=y +# CONFIG_ARMV7M_LAZYFPU is not set +CONFIG_ARCH_HAVE_FPU=y +CONFIG_ARCH_HAVE_DPFPU=y +# CONFIG_ARCH_FPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +CONFIG_ARMV7M_HAVE_ICACHE=y +CONFIG_ARMV7M_HAVE_DCACHE=y +CONFIG_ARMV7M_ICACHE=y +CONFIG_ARMV7M_DCACHE=y +CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y +CONFIG_ARMV7M_HAVE_ITCM=y +CONFIG_ARMV7M_HAVE_DTCM=y +# CONFIG_ARMV7M_ITCM is not set +CONFIG_ARMV7M_DTCM=y +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# STM32 F7 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32F745 is not set +CONFIG_ARCH_CHIP_STM32F746=y +# CONFIG_ARCH_CHIP_STM32F756 is not set +CONFIG_STM32F7_STM32F74XX=y +# CONFIG_STM32F7_STM32F75XX is not set +# CONFIG_STM32F7_FLASH_512KB is not set +CONFIG_STM32F7_FLASH_1024KB=y + +# +# STM32 Peripheral Support +# +CONFIG_STM32F7_HAVE_LTDC=y +# CONFIG_STM32F7_ADC is not set +# CONFIG_STM32F7_CAN is not set +# CONFIG_STM32F7_DAC is not set +# CONFIG_STM32F7_DMA is not set +# CONFIG_STM32F7_I2C is not set +# CONFIG_STM32F7_SAI is not set +# CONFIG_STM32F7_SPI is not set +CONFIG_STM32F7_USART=y +# CONFIG_STM32F7_ADC1 is not set +# CONFIG_STM32F7_ADC2 is not set +# CONFIG_STM32F7_ADC3 is not set +# CONFIG_STM32F7_BKPSRAM is not set +# CONFIG_STM32F7_CAN1 is not set +# CONFIG_STM32F7_CAN2 is not set +# CONFIG_STM32F7_CEC is not set +# CONFIG_STM32F7_CRC is not set +# CONFIG_STM32F7_CRYP is not set +# CONFIG_STM32F7_DMA1 is not set +# CONFIG_STM32F7_DMA2 is not set +# CONFIG_STM32F7_DAC1 is not set +# CONFIG_STM32F7_DAC2 is not set +# CONFIG_STM32F7_DCMI is not set +# CONFIG_STM32F7_ETHMAC is not set +# CONFIG_STM32F7_FSMC is not set +# CONFIG_STM32F7_I2C1 is not set +# CONFIG_STM32F7_I2C2 is not set +# CONFIG_STM32F7_I2C3 is not set +# CONFIG_STM32F7_LPTIM1 is not set +# CONFIG_STM32F7_LTDC is not set +# CONFIG_STM32F7_DMA2D is not set +# CONFIG_STM32F7_OTGFS is not set +# CONFIG_STM32F7_OTGHS is not set +# CONFIG_STM32F7_QUADSPI is not set +# CONFIG_STM32F7_SAI1 is not set +# CONFIG_STM32F7_RNG is not set +# CONFIG_STM32F7_SAI2 is not set +# CONFIG_STM32F7_SDMMC1 is not set +# CONFIG_STM32F7_SPDIFRX is not set +# CONFIG_STM32F7_SPI1 is not set +# CONFIG_STM32F7_SPI2 is not set +# CONFIG_STM32F7_SPI3 is not set +# CONFIG_STM32F7_SPI4 is not set +# CONFIG_STM32F7_SPI5 is not set +# CONFIG_STM32F7_SPI6 is not set +# CONFIG_STM32F7_TIM1 is not set +# CONFIG_STM32F7_TIM2 is not set +# CONFIG_STM32F7_TIM3 is not set +# CONFIG_STM32F7_TIM4 is not set +# CONFIG_STM32F7_TIM5 is not set +# CONFIG_STM32F7_TIM6 is not set +# CONFIG_STM32F7_TIM7 is not set +# CONFIG_STM32F7_TIM8 is not set +# CONFIG_STM32F7_TIM9 is not set +# CONFIG_STM32F7_TIM10 is not set +# CONFIG_STM32F7_TIM11 is not set +# CONFIG_STM32F7_TIM12 is not set +# CONFIG_STM32F7_TIM13 is not set +# CONFIG_STM32F7_TIM14 is not set +# CONFIG_STM32F7_TIM15 is not set +# CONFIG_STM32F7_USART1 is not set +# CONFIG_STM32F7_USART2 is not set +# CONFIG_STM32F7_USART3 is not set +# CONFIG_STM32F7_UART4 is not set +# CONFIG_STM32F7_UART5 is not set +CONFIG_STM32F7_USART6=y +# CONFIG_STM32F7_UART7 is not set +# CONFIG_STM32F7_UART8 is not set +# CONFIG_STM32F7_IWDG is not set +# CONFIG_STM32F7_WWDG is not set +# CONFIG_STM32F7_CUSTOM_CLOCKCONFIG is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +# CONFIG_ARCH_HAVE_RESET is not set +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=43103 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20010000 +CONFIG_RAM_SIZE=245760 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +# CONFIG_ARCH_BOARD_STM32F746G_DISCO is not set +CONFIG_ARCH_BOARD_NUCLEO_144=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="nucleo-144" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +# CONFIG_ARCH_IRQBUTTONS is not set +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2011 +CONFIG_START_MONTH=12 +CONFIG_START_DAY=6 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_HWFEATURES is not set +# CONFIG_SPI_CRCGENERATION is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_ARCH_HAVE_UART is not set +# CONFIG_ARCH_HAVE_UART0 is not set +# CONFIG_ARCH_HAVE_UART1 is not set +# CONFIG_ARCH_HAVE_UART2 is not set +# CONFIG_ARCH_HAVE_UART3 is not set +# CONFIG_ARCH_HAVE_UART4 is not set +# CONFIG_ARCH_HAVE_UART5 is not set +# CONFIG_ARCH_HAVE_UART6 is not set +# CONFIG_ARCH_HAVE_UART7 is not set +# CONFIG_ARCH_HAVE_UART8 is not set +# CONFIG_ARCH_HAVE_SCI0 is not set +# CONFIG_ARCH_HAVE_SCI1 is not set +# CONFIG_ARCH_HAVE_USART0 is not set +# CONFIG_ARCH_HAVE_USART1 is not set +# CONFIG_ARCH_HAVE_USART2 is not set +# CONFIG_ARCH_HAVE_USART3 is not set +# CONFIG_ARCH_HAVE_USART4 is not set +# CONFIG_ARCH_HAVE_USART5 is not set +CONFIG_ARCH_HAVE_USART6=y +# CONFIG_ARCH_HAVE_USART7 is not set +# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_ARCH_HAVE_OTHER_UART is not set + +# +# USART Configuration +# +CONFIG_USART6_ISUART=y +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART6_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART6 Configuration +# +CONFIG_USART6_RXBUFSIZE=256 +CONFIG_USART6_TXBUFSIZE=256 +CONFIG_USART6_BAUD=115200 +CONFIG_USART6_BITS=8 +CONFIG_USART6_PARITY=0 +CONFIG_USART6_2STOP=0 +# CONFIG_USART6_IFLOWCONTROL is not set +# CONFIG_USART6_OFLOWCONTROL is not set +# CONFIG_USART6_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NSH_CXXINITIALIZE is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_ARCHINIT is not set +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/nucleo-144/nsh/setenv.sh b/configs/nucleo-144/nsh/setenv.sh new file mode 100644 index 00000000000..8498950aed9 --- /dev/null +++ b/configs/nucleo-144/nsh/setenv.sh @@ -0,0 +1,77 @@ +#!/bin/bash +# configs/nucleo-144/nsh/setenv.sh +# +# Copyright (C) 2016 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the Atmel GCC +# toolchain under Windows. You will also have to edit this if you install +# this toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atmel/Atmel Toolchain/ARM GCC/Native/4.7.3.99/arm-gnu-toolchain/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +# export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors" +# You can this free toolchain here https://launchpad.net/gcc-arm-embedded +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin" + +# This is the path to the location where I installed the devkitARM toolchain +# You can get this free toolchain from http://devkitpro.org/ or http://sourceforge.net/projects/devkitpro/ +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/devkitARM/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +# export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/nucleo-144/scripts/flash.ld b/configs/nucleo-144/scripts/flash.ld new file mode 100644 index 00000000000..90e589ed8ab --- /dev/null +++ b/configs/nucleo-144/scripts/flash.ld @@ -0,0 +1,147 @@ +/**************************************************************************** + * configs/nucleo-144/scripts/flash.ld + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Modified 11/4/2013 for STM32F429 support + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The STM32F746NGH6 has 1024Kb of main FLASH memory. This FLASH memory can + * be accessed from either the AXIM interface at address 0x0800:0000 or from + * the ITCM interface at address 0x0020:0000. + * + * Additional information, including the option bytes, is available at at + * FLASH at address 0x1ff0:0000 (AXIM) or 0x0010:0000 (ITCM). + * + * In the STM32F746NGH6, two different boot spaces can be selected through + * the BOOT pin and the boot base address programmed in the BOOT_ADD0 and + * BOOT_ADD1 option bytes: + * + * 1) BOOT=0: Boot address defined by user option byte BOOT_ADD0[15:0]. + * ST programmed value: Flash on ITCM at 0x0020:0000 + * 2) BOOT=1: Boot address defined by user option byte BOOT_ADD1[15:0]. + * ST programmed value: System bootloader at 0x0010:0000 + * + * NuttX does not modify these option byes. On the unmodified STM32F746G + * DISCO board, the BOOT0 pin is at ground so by default, the STM32 will boot + * to address 0x0020:0000 in ITCM FLASH. + * + * The STM32F746NGH6 also has 320Kb of data SRAM (in addition to ITCM SRAM). + * SRAM is split up into three blocks: + * + * 1) 64Kb of DTCM SRM beginning at address 0x2000:0000 + * 2) 240Kb of SRAM1 beginning at address 0x2001:0000 + * 3) 16Kb of SRAM2 beginning at address 0x2004:c000 + * + * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000 + * where the code expects to begin execution by jumping to the entry point in + * the 0x0800:0000 address range. + */ + +MEMORY +{ + itcm (rwx) : ORIGIN = 0x00200000, LENGTH = 1024K + flash (rx) : ORIGIN = 0x08000000, LENGTH = 1024K + dtcm (rwx) : ORIGIN = 0x20000000, LENGTH = 64K + sram1 (rwx) : ORIGIN = 0x20010000, LENGTH = 240K + sram2 (rwx) : ORIGIN = 0x2004c000, LENGTH = 16K +} + +OUTPUT_ARCH(arm) +EXTERN(_vectors) +ENTRY(_stext) +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : { + *(.ARM.extab*) + } > flash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > flash + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram1 AT > flash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram1 + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/nucleo-144/scripts/kernel-space.ld b/configs/nucleo-144/scripts/kernel-space.ld new file mode 100644 index 00000000000..166d4f0bbcd --- /dev/null +++ b/configs/nucleo-144/scripts/kernel-space.ld @@ -0,0 +1,109 @@ +/**************************************************************************** + * configs/nucleo-144/scripts/kernel-space.ld + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* NOTE: This depends on the memory.ld script having been included prior to + * this script. + */ + +OUTPUT_ARCH(arm) +ENTRY(_stext) +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > kflash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > kflash + + .ARM.extab : { + *(.ARM.extab*) + } > kflash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > kflash + + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > ksram AT > kflash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > ksram + + /* Stabs debugging sections */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/nucleo-144/scripts/memory.ld b/configs/nucleo-144/scripts/memory.ld new file mode 100644 index 00000000000..2308c38ec87 --- /dev/null +++ b/configs/nucleo-144/scripts/memory.ld @@ -0,0 +1,129 @@ +/**************************************************************************** + * configs/nucleo-144/scripts/memory.ld + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The STM32F746NGH6 has 1024Kb of main FLASH memory. This FLASH memory can + * be accessed from either the AXIM interface at address 0x0800:0000 or from + * the ITCM interface at address 0x0020:0000. + * + * Additional information, including the option bytes, is available at at + * FLASH at address 0x1ff0:0000 (AXIM) or 0x0010:0000 (ITCM). + * + * In the STM32F746NGH6, two different boot spaces can be selected through + * the BOOT pin and the boot base address programmed in the BOOT_ADD0 and + * BOOT_ADD1 option bytes: + * + * 1) BOOT=0: Boot address defined by user option byte BOOT_ADD0[15:0]. + * ST programmed value: Flash on ITCM at 0x0020:0000 + * 2) BOOT=1: Boot address defined by user option byte BOOT_ADD1[15:0]. + * ST programmed value: System bootloader at 0x0010:0000 + * + * NuttX does not modify these option byes. On the unmodified STM32F746G + * DISCO board, the BOOT0 pin is at ground so by default, the STM32 will boot + * to address 0x0020:0000 in ITCM FLASH. + * + * The STM32F746NGH6 also has 320Kb of data SRAM (in addition to ITCM SRAM). + * SRAM is split up into three blocks: + * + * 1) 64Kb of DTCM SRM beginning at address 0x2000:0000 + * 2) 240Kb of SRAM1 beginning at address 0x2001:0000 + * 3) 16Kb of SRAM2 beginning at address 0x2004:c000 + * + * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000 + * where the code expects to begin execution by jumping to the entry point in + * the 0x0800:0000 address range. + * + * For MPU support, the kernel-mode NuttX section is assumed to be 128Kb of + * FLASH and 4Kb of SRAM. That is an excessive amount for the kernel which + * should fit into 64KB and, of course, can be optimized as needed (See + * also configs/stm32f746g-disco/scripts/kernel-space.ld). Allowing the + * additional does permit addition debug instrumentation to be added to the + * kernel space without overflowing the partition. + * + * Alignment of the user space FLASH partition is also a critical factor: + * The user space FLASH partition will be spanned with a single region of + * size 2**n bytes. The alignment of the user-space region must be the same. + * As a consequence, as the user-space increases in size, the alignment + * requirement also increases. + * + * This alignment requirement means that the largest user space FLASH region + * you can have will be 512KB at it would have to be positioned at + * 0x08800000. If you change this address, don't forget to change the + * CONFIG_NUTTX_USERSPACE configuration setting to match and to modify + * the check in kernel/userspace.c. + * + * For the same reasons, the maximum size of the SRAM mapping is limited to + * 4KB. Both of these alignment limitations could be reduced by using + * multiple regions to map the FLASH/SDRAM range or perhaps with some + * clever use of subregions. + * + * A detailed memory map for the 112KB SRAM region is as follows: + * + * 0x20001 0000: Kernel .data region. Typical size: 0.1KB + * ------- ---- Kernel .bss region. Typical size: 1.8KB + * 0x20001 0800: Kernel IDLE thread stack (approximate). Size is + * determined by CONFIG_IDLETHREAD_STACKSIZE and + * adjustments for alignment. Typical is 1KB. + * ------- ---- Padded to 4KB + * 0x20001 1000: User .data region. Size is variable. + * ------- ---- User .bss region Size is variable. + * 0x20001 2000: Beginning of kernel heap. Size determined by + * CONFIG_MM_KERNEL_HEAPSIZE. + * ------- ---- Beginning of user heap. Can vary with other settings. + * 0x20004 c000: End+1 of SRAM1 + */ + +MEMORY +{ + /* ITCM boot address */ + + itcm (rwx) : ORIGIN = 0x00200000, LENGTH = 1024K + + /* 1024KB FLASH */ + + kflash (rx) : ORIGIN = 0x08000000, LENGTH = 128K + uflash (rx) : ORIGIN = 0x08020000, LENGTH = 128K + xflash (rx) : ORIGIN = 0x08040000, LENGTH = 768K + + /* 240KB of contiguous SRAM1 */ + + ksram (rwx) : ORIGIN = 0x20010000, LENGTH = 4K + usram (rwx) : ORIGIN = 0x20011000, LENGTH = 4K + xsram (rwx) : ORIGIN = 0x20012000, LENGTH = 240K - 8K + + /* DTCM SRAM */ + + dtcm (rwx) : ORIGIN = 0x20000000, LENGTH = 64K + sram2 (rwx) : ORIGIN = 0x2004c000, LENGTH = 16K +} diff --git a/configs/nucleo-144/scripts/user-space.ld b/configs/nucleo-144/scripts/user-space.ld new file mode 100644 index 00000000000..871d8e055f8 --- /dev/null +++ b/configs/nucleo-144/scripts/user-space.ld @@ -0,0 +1,111 @@ +/**************************************************************************** + * configs/nucleo-144/scripts/user-space.ld + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* NOTE: This depends on the memory.ld script having been included prior to + * this script. + */ + +OUTPUT_ARCH(arm) +SECTIONS +{ + .userspace : { + *(.userspace) + } > uflash + + .text : { + _stext = ABSOLUTE(.); + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > uflash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > uflash + + .ARM.extab : { + *(.ARM.extab*) + } > uflash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > uflash + + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > usram AT > uflash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > usram + + /* Stabs debugging sections */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/nucleo-144/src/.gitignore b/configs/nucleo-144/src/.gitignore new file mode 100644 index 00000000000..726d936e1e3 --- /dev/null +++ b/configs/nucleo-144/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/nucleo-144/src/Makefile b/configs/nucleo-144/src/Makefile new file mode 100644 index 00000000000..2f742b273bb --- /dev/null +++ b/configs/nucleo-144/src/Makefile @@ -0,0 +1,55 @@ +############################################################################ +# configs/nucleo-144/src/Makefile +# +# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = stm32_boot.c stm32_spi.c + +ifeq ($(CONFIG_ARCH_LEDS),y) +CSRCS += stm32_autoleds.c +else +CSRCS += stm32_userleds.c +endif + +ifeq ($(CONFIG_ARCH_BUTTONS),y) +CSRCS += stm32_buttons.c +endif + +ifeq ($(CONFIG_LIB_BOARDCTL),y) +CSRCS += stm32_appinitialize.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/nucleo-144/src/nucleo-144.h b/configs/nucleo-144/src/nucleo-144.h new file mode 100644 index 00000000000..7628bd120be --- /dev/null +++ b/configs/nucleo-144/src/nucleo-144.h @@ -0,0 +1,100 @@ +/**************************************************************************************************** + * configs/nucleo-144/src/nucleo-144.h + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************************/ + +#ifndef __CONFIGS_NUCLEO_144_SRC_NUCLEO_144_H +#define __CONFIGS_NUCLEO_144_SRC_NUCLEO_144_H + +/**************************************************************************************************** + * Included Files + ****************************************************************************************************/ + +#include +#include +#include + +/**************************************************************************************************** + * Pre-processor Definitions + ****************************************************************************************************/ +/* procfs File System */ + +#ifdef CONFIG_FS_PROCFS +# ifdef CONFIG_NSH_PROC_MOUNTPOINT +# define STM32_PROCFS_MOUNTPOINT CONFIG_NSH_PROC_MOUNTPOINT +# else +# define STM32_PROCFS_MOUNTPOINT "/proc" +# endif +#endif + +/* STM32F736G Discovery GPIOs ***********************************************************************/ +/* The STM32F746G-DISCO board has numerous LEDs but only one, LD1 located near the reset button, that + * can be controlled by software (LD2 is a power indicator, LD3-6 indicate USB status, LD7 is + * controlled by the ST-Link). + * + * LD1 is controlled by PI1 which is also the SPI2_SCK at the Arduino interface. One end of LD1 is + * grounded so a high output on PI1 will illuminate the LED. + */ + +#define GPIO_LD1 (GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_50MHz | GPIO_OUTPUT_CLEAR | \ + GPIO_PORTI | GPIO_PIN1) + +/* Pushbutton B1, labelled "User", is connected to GPIO PI11. A high value will be sensed when the + * button is depressed. Note that the EXTI interrupt is configured. + */ + +#define GPIO_BTN_USER (GPIO_INPUT | GPIO_FLOAT | GPIO_EXTI | GPIO_PORTI | GPIO_PIN11) + +/**************************************************************************************************** + * Public data + ****************************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/**************************************************************************************************** + * Public Functions + ****************************************************************************************************/ + +/**************************************************************************************************** + * Name: stm32_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the stm32f746g-disco board. + * + ****************************************************************************************************/ + +void weak_function stm32_spidev_initialize(void); + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_NUCLEO_144_SRC_NUCLEO_144_H */ + diff --git a/configs/nucleo-144/src/stm32_appinitialize.c b/configs/nucleo-144/src/stm32_appinitialize.c new file mode 100644 index 00000000000..6c80705c3a3 --- /dev/null +++ b/configs/nucleo-144/src/stm32_appinitialize.c @@ -0,0 +1,87 @@ +/**************************************************************************** + * config/nucleo-144/src/stm32_appinitilaize.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include "stm32_ccm.h" +#include "nucleo-144.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform application specific initialization. This function is never + * called directly from application code, but only indirectly via the + * (non-standard) boardctl() interface using the command BOARDIOC_INIT. + * + ****************************************************************************/ + +int board_app_initialize(void) +{ +#ifdef CONFIG_FS_PROCFS + int ret; + +#ifdef CONFIG_STM32_CCM_PROCFS + /* Register the CCM procfs entry. This must be done before the procfs is + * mounted. + */ + + (void)ccm_procfs_register(); +#endif + + /* Mount the procfs file system */ + + ret = mount(NULL, SAMV71_PROCFS_MOUNTPOINT, "procfs", 0, NULL); + if (ret < 0) + { + SYSLOG("ERROR: Failed to mount procfs at %s: %d\n", + SAMV71_PROCFS_MOUNTPOINT, ret); + } +#endif + + return OK; +} diff --git a/configs/nucleo-144/src/stm32_autoleds.c b/configs/nucleo-144/src/stm32_autoleds.c new file mode 100644 index 00000000000..0e7a19d6ad0 --- /dev/null +++ b/configs/nucleo-144/src/stm32_autoleds.c @@ -0,0 +1,144 @@ +/**************************************************************************** + * configs/nucleo-144/src/stm32_autoleds.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#include + +#include "stm32_gpio.h" +#include "nucleo-144.h" + +#ifdef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_autoled_initialize + ****************************************************************************/ + +void board_autoled_initialize(void) +{ + /* Configure the LD1 GPIO for output. Initial state is OFF */ + + stm32_configgpio(GPIO_LD1); +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + bool ledstate = false; + + switch (led) + { + case 0: /* LED_STARTED: NuttX has been started STATUS LED=OFF */ + /* LED_HEAPALLOCATE: Heap has been allocated STATUS LED=OFF */ + /* LED_IRQSENABLED: Interrupts enabled STATUS LED=OFF */ + break; /* Leave ledstate == true to turn OFF */ + + default: + case 2: /* LED_INIRQ: In an interrupt STATUS LED=N/C */ + /* LED_SIGNAL: In a signal handler STATUS LED=N/C */ + /* LED_ASSERTION: An assertion failed STATUS LED=N/C */ + return; /* Return to leave STATUS LED unchanged */ + + case 3: /* LED_PANIC: The system has crashed STATUS LED=FLASH */ + case 1: /* LED_STACKCREATED: Idle stack created STATUS LED=ON */ + ledstate = true; /* Set ledstate == false to turn ON */ + break; + } + + stm32_gpiowrite(GPIO_LD1, ledstate); +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + switch (led) + { + /* These should not happen and are ignored */ + + default: + case 0: /* LED_STARTED: NuttX has been started STATUS LED=OFF */ + /* LED_HEAPALLOCATE: Heap has been allocated STATUS LED=OFF */ + /* LED_IRQSENABLED: Interrupts enabled STATUS LED=OFF */ + case 1: /* LED_STACKCREATED: Idle stack created STATUS LED=ON */ + + /* These result in no-change */ + + case 2: /* LED_INIRQ: In an interrupt STATUS LED=N/C */ + /* LED_SIGNAL: In a signal handler STATUS LED=N/C */ + /* LED_ASSERTION: An assertion failed STATUS LED=N/C */ + return; /* Return to leave STATUS LED unchanged */ + + /* Turn STATUS LED off set driving the output high */ + + case 3: /* LED_PANIC: The system has crashed STATUS LED=FLASH */ + stm32_gpiowrite(GPIO_LD1, false); + break; + } +} + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/configs/nucleo-144/src/stm32_boot.c b/configs/nucleo-144/src/stm32_boot.c new file mode 100644 index 00000000000..6024e76b226 --- /dev/null +++ b/configs/nucleo-144/src/stm32_boot.c @@ -0,0 +1,119 @@ +/************************************************************************************ + * configs/nucleo-144/src/stm32_boot.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include +#include + +#include "up_arch.h" +#include "nucleo-144.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_boardinitialize + * + * Description: + * All STM32 architectures must provide the following entry point. This entry point + * is called early in the initialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void stm32_boardinitialize(void) +{ +#if defined(CONFIG_STM32F7_SPI1) || defined(CONFIG_STM32F7_SPI2) || \ + defined(CONFIG_STM32F7_SPI3) || defined(CONFIG_STM32F7_SPI4) || \ + defined(CONFIG_STM32F7_SPI5) + /* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak function + * stm32_spidev_initialize() has been brought into the link. + */ + + if (stm32_spidev_initialize) + { + stm32_spidev_initialize(); + } +#endif + +#ifdef CONFIG_ARCH_LEDS + /* Configure on-board LEDs if LED support has been selected. */ + + board_autoled_initialize(); +#endif +} + +/************************************************************************************ + * Name: board_initialize + * + * Description: + * If CONFIG_BOARD_INITIALIZE is selected, then an additional initialization call + * will be performed in the boot-up sequence to a function called + * board_initialize(). board_initialize() will be called immediately after + * up_initialize() is called and just before the initial application is started. + * This additional initialization phase may be used, for example, to initialize + * board-specific device drivers. + * + ************************************************************************************/ + +#ifdef CONFIG_BOARD_INITIALIZE +void board_initialize(void) +{ +#if defined(CONFIG_NSH_LIBRARY) && !defined(CONFIG_LIB_BOARDCTL) + /* Perform NSH initialization here instead of from the NSH. This + * alternative NSH initialization is necessary when NSH is ran in user-space + * but the initialization function must run in kernel space. + */ + + (void)board_app_initialize(); +#endif +} +#endif diff --git a/configs/nucleo-144/src/stm32_buttons.c b/configs/nucleo-144/src/stm32_buttons.c new file mode 100644 index 00000000000..0421caeec7e --- /dev/null +++ b/configs/nucleo-144/src/stm32_buttons.c @@ -0,0 +1,112 @@ +/**************************************************************************** + * configs/nucleo-144/src/stm32_buttons.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#include "stm32_gpio.h" +#include "nucleo-144.h" + +#ifdef CONFIG_ARCH_BUTTONS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_button_initialize + * + * Description: + * board_button_initialize() must be called to initialize button resources. + * After that, board_buttons() may be called to collect the current state + * of all buttons or board_button_irq() may be called to register button + * interrupt handlers. + * + ****************************************************************************/ + +void board_button_initialize(void) +{ + stm32_configgpio(GPIO_BTN_USER); +} + +/**************************************************************************** + * Name: board_buttons + ****************************************************************************/ + +uint8_t board_buttons(void) +{ + return stm32_gpioread(GPIO_BTN_USER) ? 1 : 0; +} + +/************************************************************************************ + * Button support. + * + * Description: + * board_button_initialize() must be called to initialize button resources. After + * that, board_buttons() may be called to collect the current state of all + * buttons or board_button_irq() may be called to register button interrupt + * handlers. + * + * After board_button_initialize() has been called, board_buttons() may be called to + * collect the state of all buttons. board_buttons() returns an 8-bit bit set + * with each bit associated with a button. See the BUTTON_*_BIT + * definitions in board.h for the meaning of each bit. + * + * board_button_irq() may be called to register an interrupt handler that will + * be called when a button is depressed or released. The ID value is a + * button enumeration value that uniquely identifies a button resource. See the + * BUTTON_* definitions in board.h for the meaning of enumeration + * value. The previous interrupt handler address is returned (so that it may + * restored, if so desired). + * + ************************************************************************************/ + +#ifdef CONFIG_ARCH_IRQBUTTONS +xcpt_t board_button_irq(int id, xcpt_t irqhandler) +{ +#warning Missing logic +} +#endif +#endif /* CONFIG_ARCH_BUTTONS */ diff --git a/configs/nucleo-144/src/stm32_spi.c b/configs/nucleo-144/src/stm32_spi.c new file mode 100644 index 00000000000..d3b5e9160e5 --- /dev/null +++ b/configs/nucleo-144/src/stm32_spi.c @@ -0,0 +1,246 @@ +/************************************************************************************ + * configs/nucleo-144/src/stm32_spi.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "chip.h" +#include "stm32_spi.h" + +#include "nucleo-144.h" + +#if defined(CONFIG_STM32F7_SPI1) || defined(CONFIG_STM32F7_SPI2) || \ + defined(CONFIG_STM32F7_SPI3) || defined(CONFIG_STM32F7_SPI4) || \ + defined(CONFIG_STM32F7_SPI5) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +#ifdef CONFIG_DEBUG_SPI +# define spidbg lldbg +# ifdef SPI_VERBOSE +# define spivdbg lldbg +# else +# define spivdbg(x...) +# endif +#else +# undef SPI_VERBOSE +# define spidbg(x...) +# define spivdbg(x...) +#endif + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the stm32f746g-disco board. + * + ************************************************************************************/ + +void weak_function stm32_spidev_initialize(void) +{ +} + +/**************************************************************************** + * Name: stm32_spi1/2/3/4/5select and stm32_spi1/2/3/4/5status + * + * Description: + * The external functions, stm32_spi1/2/3select and stm32_spi1/2/3status must be + * provided by board-specific logic. They are implementations of the select + * and status methods of the SPI interface defined by struct spi_ops_s (see + * include/nuttx/spi/spi.h). All other methods (including stm32_spibus_initialize()) + * are provided by common STM32 logic. To use this common SPI logic on your + * board: + * + * 1. Provide logic in stm32_boardinitialize() to configure SPI chip select + * pins. + * 2. Provide stm32_spi1/2/3select() and stm32_spi1/2/3status() functions in your + * board-specific logic. These functions will perform chip selection and + * status operations using GPIOs in the way your board is configured. + * 3. Add a calls to stm32_spibus_initialize() in your low level application + * initialization logic + * 4. The handle returned by stm32_spibus_initialize() may then be used to bind the + * SPI driver to higher level logic (e.g., calling + * mmcsd_spislotinitialize(), for example, will bind the SPI driver to + * the SPI MMC/SD driver). + * + ****************************************************************************/ + +#ifdef CONFIG_STM32F7_SPI1 +void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); +} + +uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} +#endif + +#ifdef CONFIG_STM32F7_SPI2 +void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); +} + +uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} +#endif + +#ifdef CONFIG_STM32F7_SPI3 +void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); +} + +uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} +#endif + +#ifdef CONFIG_STM32F7_SPI4 +void stm32_spi4select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); +} + +uint8_t stm32_spi4status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} +#endif + +#ifdef CONFIG_STM32F7_SPI5 +void stm32_spi5select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); +} + +uint8_t stm32_spi5status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} +#endif + +/**************************************************************************** + * Name: stm32_spi1cmddata + * + * Description: + * Set or clear the SH1101A A0 or SD1306 D/C n bit to select data (true) + * or command (false). This function must be provided by platform-specific + * logic. This is an implementation of the cmddata method of the SPI + * interface defined by struct spi_ops_s (see include/nuttx/spi/spi.h). + * + * Input Parameters: + * + * spi - SPI device that controls the bus the device that requires the CMD/ + * DATA selection. + * devid - If there are multiple devices on the bus, this selects which one + * to select cmd or data. NOTE: This design restricts, for example, + * one one SPI display per SPI bus. + * cmd - true: select command; false: select data + * + * Returned Value: + * None + * + ****************************************************************************/ + +#ifdef CONFIG_SPI_CMDDATA +#ifdef CONFIG_STM32F7_SPI1 +int stm32_spi1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ + return -ENODEV; +} +#endif + +#ifdef CONFIG_STM32F7_SPI2 +int stm32_spi2cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ + return -ENODEV; +} +#endif + +#ifdef CONFIG_STM32F7_SPI3 +int stm32_spi3cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ + return -ENODEV; +} +#endif + +#ifdef CONFIG_STM32F7_SPI4 +int stm32_spi4cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ + return -ENODEV; +} +#endif + +#ifdef CONFIG_STM32F7_SPI5 +int stm32_spi5cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ + return -ENODEV; +} +#endif + +#endif /* CONFIG_SPI_CMDDATA */ +#endif /* CONFIG_STM32F7_SPI1 || ... CONFIG_STM32F7_SPI5 */ diff --git a/configs/nucleo-144/src/stm32_userleds.c b/configs/nucleo-144/src/stm32_userleds.c new file mode 100644 index 00000000000..19146d241de --- /dev/null +++ b/configs/nucleo-144/src/stm32_userleds.c @@ -0,0 +1,120 @@ +/**************************************************************************** + * configs/nucleo-144/src/stm32_userleds.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#include "stm32_gpio.h" +#include "nucleo-144.h" + +#ifndef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG + * with CONFIG_DEBUG_VERBOSE too) + */ + +#ifdef CONFIG_DEBUG_LEDS +# define leddbg lldbg +# define ledvdbg llvdbg +#else +# define leddbg(x...) +# define ledvdbg(x...) +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_userled_initialize + * + * Description: + * If CONFIG_ARCH_LEDS is defined, then NuttX will control the on-board + * LEDs. If CONFIG_ARCH_LEDS is not defined, then the + * board_userled_initialize() is available to initialize the LED from user + * application logic. + * + ****************************************************************************/ + +void board_userled_initialize(void) +{ + stm32_configgpio(GPIO_LD1); +} + +/**************************************************************************** + * Name: board_userled + * + * Description: + * If CONFIG_ARCH_LEDS is defined, then NuttX will control the on-board + * LEDs. If CONFIG_ARCH_LEDS is not defined, then the board_userled() is + * available to control the LED from user application logic. + * + ****************************************************************************/ + +void board_userled(int led, bool ledon) +{ + if (led == BOARD_STATUS_LED) + { + stm32_gpiowrite(GPIO_LD1, !ledon); + } +} + +/**************************************************************************** + * Name: board_userled_all + * + * Description: + * If CONFIG_ARCH_LEDS is defined, then NuttX will control the on-board + * LEDs. If CONFIG_ARCH_LEDS is not defined, then the board_userled_all() is + * available to control the LED from user application logic. NOTE: since + * there is only a single LED on-board, this is function is not very useful. + * + ****************************************************************************/ + +void board_userled_all(uint8_t ledset) +{ + stm32_gpiowrite(GPIO_LD1, (ledset & BOARD_STATUS_LED_BIT) != 0); +} + +#endif /* !CONFIG_ARCH_LEDS */ From d03b0f518886e3eb9536a3cf7f5db4beb4b7b168 Mon Sep 17 00:00:00 2001 From: David Sidrane Date: Thu, 12 May 2016 09:56:32 -0600 Subject: [PATCH 2/4] README.txt file for the nucleo-144 --- configs/nucleo-144/README.txt | 306 ++++++++++++++++++++++++++++++++++ 1 file changed, 306 insertions(+) create mode 100644 configs/nucleo-144/README.txt diff --git a/configs/nucleo-144/README.txt b/configs/nucleo-144/README.txt new file mode 100644 index 00000000000..0eca17d5829 --- /dev/null +++ b/configs/nucleo-144/README.txt @@ -0,0 +1,306 @@ +README +====== + +This README discusses issues unique to NuttX configurations for the ST +Nucleo F746ZG board from ST Micro. See + +http://www.st.com/web/catalog/tools/FM116/CL1620/SC959/SS1532/LN1847/PF261636 + +The Nucleo F746ZG order part number is NUCLEO-F746ZG. It is clumped together +under the STM32 Nucleo-144 board family. This does provide uniformity in the +documentation from ST and should allow us to quickly change configurations +but just cloning this configuration and changing the CPU choice and board +init. Unfortunately for the developer, the CPU specific information must be +extracted from the common information in the documentation. + +Please read the User Manaul UM1727: Getting started with STM32 Nucleo board +software development tools and take note of the Powering options for the +board (6.3 Power supply and power selection) and the Solder bridges based +hardware configuration changes that are configurable (6.11 Solder bridges). + +NUCLEO-F746ZG: + + Microprocessor: STM32F746ZGT6 Core: ARM 32-bit Cortex®-M7 CPU with FPU, + L1-cache: 4KB data cache and 4KB instruction cache, up to + 216 MHz, MPU, and DSP instructions. + Memory: 1024 KB Flash 320KB of SRAM (including 64KB of data TCM RAM) + + 16KB of instruction TCM RAM + 4KB of backup SRAM + ADC: 3×12-bit, 2.4 MSPS ADC: up to 24 channels and 7.2 MSPS in + triple interleaved mode + DMA: 16-stream DMA controllers with FIFOs and burst support + Timers: Up to 18 timers: up to thirteen 16-bit (1x 16-bit lowpower), + two 32-bit timers, 2x watchdogs, SysTick + GPIO: 114 I/O ports with interrupt capability + LCD: LCD-TFT Controllerwith (DMA2D), Parallel interface + I2C: 4 × I2C interfaces (SMBus/PMBus) + U[S]ARTs: 4 USARTs, 4 UARTs (27 Mbit/s, ISO7816 interface, LIN, IrDA, + modem control) + SPI/12Ss: 6/3 (simplex) (up to 50 Mbit/s), 3 with muxed simplex I2S + for audio class accuracy via internal audio PLL or external + clock + QSPI: Dual mode Quad-SPI + SAIs: 2 Serial Audio Interfaces + CAN: 2 X CAN interface + SDMMC interface + SPDIFRX interface + USB: USB 2.0 full-speed device/host/OTG controller with on-chip + PHY + 10/100 Ethernet: MAC with dedicated DMA: supports IEEE 1588v2 hardware, + MII/RMII + Camera Interface: 8/14 Bit + CRC calculation unit + TRG: True random number generator + RTC + +Board features: + + Peripherals: 8 leds, 2 push button (3 LEDs, 1 button) under software + control + Debug: STLINK/V2-1 debugger/programmer Uses a STM32F103CB to + provide a ST-Link for programming, debug similar to the + OpenOcd FTDI function - USB to JTAG front-end. + + Expansion I/F ST Zio an Extended Ardino and Morpho Headers + +See https://developer.mbed.org/platforms/ST-Nucleo-F746ZG form additional information about this board. + +Contents +======== + + - Development Environment + - IDEs + - Basic configuaration & build steps + - Hardware + - Button + - LED + - U[S]ARTs and Serial Consoles + - Configurations + +Development Environment +======================= + + Either Linux or Cygwin on Windows can be used for the development environment. + The source has been built only using the GNU toolchain (see below). Other + toolchains will likely cause problems. + + All testing has been conducted using the GNU toolchain from ARM for Linux. + found here https://launchpad.net/gcc-arm-embedded/4.9/4.9-2015-q3-update/+download/gcc-arm-none-eabi-4_9-2015q3-20150921-linux.tar.bz2 + + If you change the default toolchain, then you may also have to modify the PATH in + the setenv.h file if your make cannot find the tools. + + +IDEs +==== + + NuttX is built using command-line make. It can be used with an IDE, but some + effort will be required to create the project. + + Makefile Build + -------------- + Under Eclipse, it is pretty easy to set up an "empty makefile project" and + simply use the NuttX makefile to build the system. That is almost for free + under Linux. Under Windows, you will need to set up the "Cygwin GCC" empty + makefile project in order to work with Windows (Google for "Eclipse Cygwin" - + there is a lot of help on the internet). + + +Basic configuration & build steps +================================== + + A GNU GCC-based toolchain is assumed. The files */setenv.sh should + be modified to point to the correct path to the Cortex-M7 GCC toolchain (if + different from the default in your PATH variable). + + - Configures nuttx creating .config file in the nuttx directory + $ cd tools && ./configure.sh nucleo-f746zg/nsh && cd .. + - Refreshes the .config file with the latest features addes sice this writting + $ make oldconfig + - Select the features you want in the build. + $ make menuconfig + - Builds Nuttx with the features you selected. + $ make + +Hardware +======== + + GPIO - there are 144 I/O lines on the STM32F746ZGT6 with various pins pined out + on the Nucleo F746ZG + + See https://developer.mbed.org/platforms/ST-Nucleo-F746ZG/ for slick graphic + pinouts. + + Keep in mind that: + 1) The I/O is 3.3 Volt not 5 Volt like on the Arduino products. + 2) The Nucleo-144 board family has 3 pages of Solder Bridges AKA Solder + Blobs (SB) that can alter the factory configuration. We will note SB + in effect but will assume the facitory defualt settings. + + Our main concern is establishing a console and LED utilization for + debugging. Because so many pins can be multiplexed with so many functions, + the above mentioned graphic is super helpful in indentifying a serial port + that will not rob us of another IO feature. Namely Serial Port 8 (UART8) + with TX on PE1 and RX on PE0. Of course if your design has used those + pins you can choose another IO configuration to bring out Serial Port 8 + or choose a completely different U[S]ART to use as the console. + In that Case, You will need to edit the include/board.h to select different + U[S]ART and / or pin selections. + + + Serial + ---- + + SERIAL_RX PE_0 + SERIAL_TX PE_1 + + Buttons + ------- + B1 USER: the user button is connected to the I/O PC13 (Tamper support, SB173 + ON and SB180 OFF) + + LEDs + ---- + The Board provides a 3 user LEDs, LD1-LD3 + LED1 (Green) PB_0 (SB120 ON and SB119 OFF) + LED2 (Blue) PB_7 (SB139 ON) + LED3 (Red) PB_14 (SP118 ON) + + - When the I/O is HIGH value, the LEDs are on. + - When the I/O is LOW, the LEDs are off. + + These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is + defined. In that case, the usage by the board port is defined in + include/board.h and src/stm32_autoleds.c. The LEDs are used to encode OS + related events as follows when the LEDs are available: + + SYMBOL Meaning RED GREEN BLUE + ------------------- ----------------------- ----------- + + LED_STARTED 0 OFF OFF OFF + LED_HEAPALLOCATE 0 OFF OFF OFF + LED_IRQSENABLED 0 OFF OFF OFF + LED_STACKCREATED 1 OFF ON OFF + LED_INIRQ 2 NC NC ON (momentary) + LED_SIGNAL 2 NC NC ON (momentary) + LED_ASSERTION 3 ON NC NC (momentary) + LED_PANIC 4 ON OFF OFF (flashing 2Hz) + +OFF - means that the OS is still initializing. Initialization is very fast so + if you see this at all, it probably means that the system is hanging up + somewhere in the initialization phases. + +GREEN - This means that the OS completed initialization. + +BLUE - Whenever and interrupt or signal handler is entered, the BLUE LED is + illuminated and extinguished when the interrupt or signal handler exits. + +RED - If a recovered assertion occurs, the RED LED will be illuminated + briefly while the assertion is handled. You will probably never see this. + +Flashing RED - In the event of a fatal crash, all other LEDs will be +extinguished and RED LED will FLASH at a 2Hz rate. + + + Thus if the GREEN LED is lit, NuttX has successfully booted and is, + apparently, running normally. If the RED LED is flashing at + approximately 2Hz, then a fatal error has been detected and the system has + halted. + +Serial Consoles +=============== + + USART8 + ------ + Pins and Connectors: + GPIO Connector NAME + RXD: PE0 CN11 pin 64, PE0 + CN10 pin 33, D34 + + TXD: PE1 CN11 pin 61, PE1 + + You must use a 3.3 TTL to RS-232 converter or a USB to 3.3V TTL + + Nucleo 144 FTDI TTL-232R-3V3 + ----------- ------------ + TXD - CN11 pin 64 - RXD - Pin 5 (Yellow) + RXD - CN11 pin 61 - TXD - Pin 4 (Orange) + GND CN11 pin 63 GND Pin 1 (Black) + + *Note you will be reverse RX/TX + + Use make menuconfig to configure USART8 as the console: + + CONFIG_STM32F7_UART8=y + CONFIG_USART8_ISUART=y + CONFIG_USART8_SERIAL_CONSOLE=y + CONFIG_UART8_RXBUFSIZE=256 + CONFIG_UART8_TXBUFSIZE=256 + CONFIG_UART8_BAUD=115200 + CONFIG_UART8_BITS=8 + CONFIG_UART8_PARITY=0 + CONFIG_UART8_2STOP=0 + + Virtual COM Port + ---------------- + Yet another option is to use USART3 and the USB virtual COM port. This + option may be more convenient for long term development, but is painful + to use during board bring-up. + + Solder Bridges. This configuration requires: + + PD8 USART3 TX SB5 ON and SB7 OFF (Default) + PD9 USART3 RX SB6 ON and SB4 OFF (Default) + + Configuring USART3 is the same as given above but add the S and #3. + + Question: What BAUD should be configure to interface with the Virtual + COM port? 115200 8N1? + + Default + ------- + As shipped, SB4 and SB7 are open and SB5 and SB6 closed, so the + virtual COM port is enabled. + + +Configurations +============== + + nsh: + --------- + Configures the NuttShell (nsh) located at apps/examples/nsh for the + Nucleo-144 boards. The Configuration enables the serial interfaces + on UART8. Support for builtin applications is enabled, but in the base + configuration no builtin applications are selected (see NOTES below). + + NOTES: + + 1. This configuration uses the mconf-based configuration tool. To + change this configuration using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. If this is the intall configuration then Execute + 'cd tools && ./configure.sh stm32f746g-disco/nsh && cd ..' + in nuttx/ in order to start configuration process. + Caution: Doing this step more than once will overwrite .config with + the contents of the stm32f746g-disco/nsh/defconfig file. + + c. Execute 'make oldconfig' in nuttx/ in order to refresh the + configuration. + + d. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + e. Save the .config file to reuse it in the future starting at step d. + + 2. By default, this configuration uses the ARM GNU toolchain + for Linux. That can easily be reconfigured, of course. + + CONFIG_HOST_LINUX=y : Builds under Linux + CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y : ARM GNU for Linux + + 3. Although the default console is USART3 (which would correspond to + the Virtual COM port) I have done all testing with the console + device configured for UART8 (see instruction above under "Serial + Consoles). From 61f6915898de8948f65f7edb910797011939ed66 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Thu, 12 May 2016 10:01:43 -0600 Subject: [PATCH 3/4] Update README files --- Documentation/README.html | 4 +++- README.txt | 2 ++ configs/README.txt | 5 +++++ 3 files changed, 10 insertions(+), 1 deletion(-) diff --git a/Documentation/README.html b/Documentation/README.html index ed18b435931..ce2d5eef2a5 100644 --- a/Documentation/README.html +++ b/Documentation/README.html @@ -8,7 +8,7 @@

NuttX README Files

-

Last Updated: April 12, 2016

+

Last Updated: May 12, 2016

@@ -157,6 +157,8 @@ nuttx/ | |- ntosd-dm320/ | | |- doc/README.txt | | `- README.txt + | |- nucleo-144/ + | | `- README.txt | |- nucleo-f4x1re/ | | `- README.txt | |- nutiny-nuc120/ diff --git a/README.txt b/README.txt index cbba0da1d01..ed3d0141f56 100644 --- a/README.txt +++ b/README.txt @@ -1332,6 +1332,8 @@ nuttx/ | |- ntosd-dm320/ | | |- doc/README.txt | | `- README.txt + | |- nucleo-144/ + | | `- README.txt | |- nucleo-f4x1re/ | | `- README.txt | |- nutiny-nuc120/ diff --git a/configs/README.txt b/configs/README.txt index 4df80fa8147..4b1b2017070 100644 --- a/configs/README.txt +++ b/configs/README.txt @@ -392,6 +392,11 @@ configs/ntosd-dm320 STATUS: This port is code complete, verified, and included in the NuttX 0.2.1 release. +configs/nucleo-144 + STMicro Nucleo-144 development board featuring the STM32F746ZGT6U MCU. The + STM32F746ZGT6U is a 216MHz Cortex-M7 operation with 1024Kb Flash memory + and 300Kb SRAM. + configs/nucleo-f4x1re STMicro ST Nucleo F401RE and F411RE boards. See http://mbed.org/platforms/ST-Nucleo-F401RE and From 365df152c57d21ffca5d775dc45b32c907bbb5ff Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Thu, 12 May 2016 12:26:56 -0600 Subject: [PATCH 4/4] Remove TABs and while space from end of line in README file --- configs/nucleo-144/README.txt | 100 +++++++++++++++++----------------- 1 file changed, 50 insertions(+), 50 deletions(-) diff --git a/configs/nucleo-144/README.txt b/configs/nucleo-144/README.txt index 0eca17d5829..b826f78680e 100644 --- a/configs/nucleo-144/README.txt +++ b/configs/nucleo-144/README.txt @@ -5,7 +5,7 @@ This README discusses issues unique to NuttX configurations for the ST Nucleo F746ZG board from ST Micro. See http://www.st.com/web/catalog/tools/FM116/CL1620/SC959/SS1532/LN1847/PF261636 - + The Nucleo F746ZG order part number is NUCLEO-F746ZG. It is clumped together under the STM32 Nucleo-144 board family. This does provide uniformity in the documentation from ST and should allow us to quickly change configurations @@ -25,28 +25,28 @@ NUCLEO-F746ZG: 216 MHz, MPU, and DSP instructions. Memory: 1024 KB Flash 320KB of SRAM (including 64KB of data TCM RAM) + 16KB of instruction TCM RAM + 4KB of backup SRAM - ADC: 3×12-bit, 2.4 MSPS ADC: up to 24 channels and 7.2 MSPS in + ADC: 3×12-bit, 2.4 MSPS ADC: up to 24 channels and 7.2 MSPS in triple interleaved mode DMA: 16-stream DMA controllers with FIFOs and burst support Timers: Up to 18 timers: up to thirteen 16-bit (1x 16-bit lowpower), two 32-bit timers, 2x watchdogs, SysTick GPIO: 114 I/O ports with interrupt capability - LCD: LCD-TFT Controllerwith (DMA2D), Parallel interface + LCD: LCD-TFT Controllerwith (DMA2D), Parallel interface I2C: 4 × I2C interfaces (SMBus/PMBus) U[S]ARTs: 4 USARTs, 4 UARTs (27 Mbit/s, ISO7816 interface, LIN, IrDA, modem control) - SPI/12Ss: 6/3 (simplex) (up to 50 Mbit/s), 3 with muxed simplex I2S - for audio class accuracy via internal audio PLL or external + SPI/12Ss: 6/3 (simplex) (up to 50 Mbit/s), 3 with muxed simplex I2S + for audio class accuracy via internal audio PLL or external clock QSPI: Dual mode Quad-SPI SAIs: 2 Serial Audio Interfaces CAN: 2 X CAN interface SDMMC interface SPDIFRX interface - USB: USB 2.0 full-speed device/host/OTG controller with on-chip + USB: USB 2.0 full-speed device/host/OTG controller with on-chip PHY - 10/100 Ethernet: MAC with dedicated DMA: supports IEEE 1588v2 hardware, - MII/RMII + 10/100 Ethernet: MAC with dedicated DMA: supports IEEE 1588v2 hardware, + MII/RMII Camera Interface: 8/14 Bit CRC calculation unit TRG: True random number generator @@ -54,12 +54,12 @@ NUCLEO-F746ZG: Board features: - Peripherals: 8 leds, 2 push button (3 LEDs, 1 button) under software + Peripherals: 8 leds, 2 push button (3 LEDs, 1 button) under software control - Debug: STLINK/V2-1 debugger/programmer Uses a STM32F103CB to + Debug: STLINK/V2-1 debugger/programmer Uses a STM32F103CB to provide a ST-Link for programming, debug similar to the - OpenOcd FTDI function - USB to JTAG front-end. - + OpenOcd FTDI function - USB to JTAG front-end. + Expansion I/F ST Zio an Extended Ardino and Morpho Headers See https://developer.mbed.org/platforms/ST-Nucleo-F746ZG form additional information about this board. @@ -85,11 +85,11 @@ Development Environment All testing has been conducted using the GNU toolchain from ARM for Linux. found here https://launchpad.net/gcc-arm-embedded/4.9/4.9-2015-q3-update/+download/gcc-arm-none-eabi-4_9-2015q3-20150921-linux.tar.bz2 - + If you change the default toolchain, then you may also have to modify the PATH in the setenv.h file if your make cannot find the tools. - + IDEs ==== @@ -117,25 +117,25 @@ Basic configuration & build steps - Refreshes the .config file with the latest features addes sice this writting $ make oldconfig - Select the features you want in the build. - $ make menuconfig - - Builds Nuttx with the features you selected. - $ make + $ make menuconfig + - Builds Nuttx with the features you selected. + $ make Hardware ======== GPIO - there are 144 I/O lines on the STM32F746ZGT6 with various pins pined out on the Nucleo F746ZG - + See https://developer.mbed.org/platforms/ST-Nucleo-F746ZG/ for slick graphic pinouts. - + Keep in mind that: 1) The I/O is 3.3 Volt not 5 Volt like on the Arduino products. 2) The Nucleo-144 board family has 3 pages of Solder Bridges AKA Solder Blobs (SB) that can alter the factory configuration. We will note SB in effect but will assume the facitory defualt settings. - + Our main concern is establishing a console and LED utilization for debugging. Because so many pins can be multiplexed with so many functions, the above mentioned graphic is super helpful in indentifying a serial port @@ -145,10 +145,10 @@ Hardware or choose a completely different U[S]ART to use as the console. In that Case, You will need to edit the include/board.h to select different U[S]ART and / or pin selections. - - Serial - ---- + + Serial + ------ SERIAL_RX PE_0 SERIAL_TX PE_1 @@ -156,12 +156,12 @@ Hardware Buttons ------- B1 USER: the user button is connected to the I/O PC13 (Tamper support, SB173 - ON and SB180 OFF) + ON and SB180 OFF) LEDs ---- The Board provides a 3 user LEDs, LD1-LD3 - LED1 (Green) PB_0 (SB120 ON and SB119 OFF) + LED1 (Green) PB_0 (SB120 ON and SB119 OFF) LED2 (Blue) PB_7 (SB139 ON) LED3 (Red) PB_14 (SP118 ON) @@ -176,33 +176,33 @@ Hardware SYMBOL Meaning RED GREEN BLUE ------------------- ----------------------- ----------- - LED_STARTED 0 OFF OFF OFF - LED_HEAPALLOCATE 0 OFF OFF OFF - LED_IRQSENABLED 0 OFF OFF OFF - LED_STACKCREATED 1 OFF ON OFF - LED_INIRQ 2 NC NC ON (momentary) - LED_SIGNAL 2 NC NC ON (momentary) - LED_ASSERTION 3 ON NC NC (momentary) - LED_PANIC 4 ON OFF OFF (flashing 2Hz) + LED_STARTED 0 OFF OFF OFF + LED_HEAPALLOCATE 0 OFF OFF OFF + LED_IRQSENABLED 0 OFF OFF OFF + LED_STACKCREATED 1 OFF ON OFF + LED_INIRQ 2 NC NC ON (momentary) + LED_SIGNAL 2 NC NC ON (momentary) + LED_ASSERTION 3 ON NC NC (momentary) + LED_PANIC 4 ON OFF OFF (flashing 2Hz) OFF - means that the OS is still initializing. Initialization is very fast so if you see this at all, it probably means that the system is hanging up somewhere in the initialization phases. GREEN - This means that the OS completed initialization. - + BLUE - Whenever and interrupt or signal handler is entered, the BLUE LED is illuminated and extinguished when the interrupt or signal handler exits. - + RED - If a recovered assertion occurs, the RED LED will be illuminated briefly while the assertion is handled. You will probably never see this. - -Flashing RED - In the event of a fatal crash, all other LEDs will be -extinguished and RED LED will FLASH at a 2Hz rate. - - Thus if the GREEN LED is lit, NuttX has successfully booted and is, - apparently, running normally. If the RED LED is flashing at +Flashing RED - In the event of a fatal crash, all other LEDs will be +extinguished and RED LED will FLASH at a 2Hz rate. + + + Thus if the GREEN LED is lit, NuttX has successfully booted and is, + apparently, running normally. If the RED LED is flashing at approximately 2Hz, then a fatal error has been detected and the system has halted. @@ -214,19 +214,19 @@ Serial Consoles Pins and Connectors: GPIO Connector NAME RXD: PE0 CN11 pin 64, PE0 - CN10 pin 33, D34 + CN10 pin 33, D34 TXD: PE1 CN11 pin 61, PE1 You must use a 3.3 TTL to RS-232 converter or a USB to 3.3V TTL - Nucleo 144 FTDI TTL-232R-3V3 + Nucleo 144 FTDI TTL-232R-3V3 ----------- ------------ TXD - CN11 pin 64 - RXD - Pin 5 (Yellow) RXD - CN11 pin 61 - TXD - Pin 4 (Orange) GND CN11 pin 63 GND Pin 1 (Black) - *Note you will be reverse RX/TX + *Note you will be reverse RX/TX Use make menuconfig to configure USART8 as the console: @@ -248,8 +248,8 @@ Serial Consoles Solder Bridges. This configuration requires: - PD8 USART3 TX SB5 ON and SB7 OFF (Default) - PD9 USART3 RX SB6 ON and SB4 OFF (Default) + PD8 USART3 TX SB5 ON and SB7 OFF (Default) + PD9 USART3 RX SB6 ON and SB4 OFF (Default) Configuring USART3 is the same as given above but add the S and #3. @@ -280,9 +280,9 @@ Configurations a. Build and install the kconfig-mconf tool. See nuttx/README.txt see additional README.txt files in the NuttX tools repository. - b. If this is the intall configuration then Execute - 'cd tools && ./configure.sh stm32f746g-disco/nsh && cd ..' - in nuttx/ in order to start configuration process. + b. If this is the intall configuration then Execute + 'cd tools && ./configure.sh stm32f746g-disco/nsh && cd ..' + in nuttx/ in order to start configuration process. Caution: Doing this step more than once will overwrite .config with the contents of the stm32f746g-disco/nsh/defconfig file. @@ -291,7 +291,7 @@ Configurations d. Execute 'make menuconfig' in nuttx/ in order to start the reconfiguration process. - + e. Save the .config file to reuse it in the future starting at step d. 2. By default, this configuration uses the ARM GNU toolchain