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rv32im: fix typo.

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Signed-off-by: zhongan <zhongan@xiaomi.com>
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zhongan 2020-11-17 14:10:24 +08:00 • committed by Xiang Xiao
parent d4c0786f52
commit 9eae6edfde
1 changed files with 2 additions and 2 deletions
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arch/risc-v/src/rv32im/riscv_schedulesigaction.c
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@ -32,8 +32,8 @@
#include <nuttx/arch.h>
#include "sched/sched.h"
#include "up_internal.h"
#include "up_arch.h"
#include "riscv_internal.h"
#include "riscv_arch.h"
#ifndef CONFIG_DISABLE_SIGNALS