Aksal/nuttx
3
1
Fork 1
mirror of https://github.com/apache/nuttx.git synced 2026-08-16 18:03:19 +00:00
Code Issues Projects Releases Packages Wiki Activity Actions 1

Merged in slorquet/nuttx/mt25q (pull request #501)

Browse source 
Add support for Micron MT25Q series MT25Q128

Approved-by: Gregory Nutt <gnutt@nuttx.org>
This commit is contained in:
Sebastien Lorquet 2017-10-02 18:33:54 +00:00 • committed by Gregory Nutt
parent 6ccb974910
commit 9ea215f2e4
2 changed files with 45 additions and 1 deletions
Download patch file Download diff file Expand all files Collapse all files

8
drivers/mtd/Kconfig
View file

@ -415,7 +415,7 @@ config IS25XP_SPIFREQUENCY
endif # MTD_IS25XP
config MTD_M25P
bool "SPI-based M25P FLASH"
bool "SPI-based M25P/MT25Q FLASH"
default n
select SPI
@ -446,6 +446,12 @@ config M25P_MEMORY_TYPE
memory type for "F" series parts from EON is 0x31. The 4K sector erase size will
automatically be enabled when filesytems that can use it are enabled, such as SMART.
config MT25Q_MEMORY_TYPE
hex "MT25Q memory type ID"
default 0xBA
---help---
The memory type for MT25 "Q" series is 0xBA.
config M25P_SUBSECTOR_ERASE
bool "Sub-Sector Erase"
default n

38
drivers/mtd/m25px.c
View file

@ -86,11 +86,16 @@
# define CONFIG_M25P_MEMORY_TYPE 0x20
#endif
#ifndef CONFIG_MT25Q_MEMORY_TYPE
# define CONFIG_MT25Q_MEMORY_TYPE 0xBA
#endif
/* M25P Registers *******************************************************************/
/* Indentification register values */
#define M25P_MANUFACTURER CONFIG_M25P_MANUFACTURER
#define M25P_MEMORY_TYPE CONFIG_M25P_MEMORY_TYPE
#define MT25Q_MEMORY_TYPE CONFIG_MT25Q_MEMORY_TYPE
#define M25P_RES_ID 0x13
#define M25P_M25P1_CAPACITY 0x11 /* 1 M-bit */
#define M25P_EN25F80_CAPACITY 0x14 /* 8 M-bit */
@ -98,6 +103,7 @@
#define M25P_M25P32_CAPACITY 0x16 /* 32 M-bit */
#define M25P_M25P64_CAPACITY 0x17 /* 64 M-bit */
#define M25P_M25P128_CAPACITY 0x18 /* 128 M-bit */
#define M25P_MT25Q128_CAPACITY 0x18 /* 128 M-bit */
/* M25P1 capacity is 131,072 bytes:
* (4 sectors) * (32,768 bytes per sector)
@ -163,6 +169,17 @@
#define M25P_M25P128_PAGE_SHIFT 8 /* Page size 1 << 8 = 256 */
#define M25P_M25P128_NPAGES 65536
/* MT25Q128 capacity is 16,777,216 bytes:
* (256 sectors) * (65,536 bytes per sector)
* (65536 pages) * (256 bytes per page)
*/
#define M25P_MT25Q128_SECTOR_SHIFT 16 /* Sector size 1 << 16 = 65,536 */
#define M25P_MT25Q128_NSECTORS 256
#define M25P_MT25Q128_PAGE_SHIFT 8 /* Page size 1 << 8 = 256 */
#define M25P_MT25Q128_NPAGES 65536
#define M25P_MT25Q128_SUBSECT_SHIFT 12 /* Sub-Sector size 1 << 12 = 4,096 */
/* Instructions */
/* Command Value N Description Addr Dummy Data */
#define M25P_WREN 0x06 /* 1 Write Enable 0 0 0 */
@ -414,6 +431,27 @@ static inline int m25p_readid(struct m25p_dev_s *priv)
return OK;
}
}
else if (manufacturer == M25P_MANUFACTURER && memory == MT25Q_MEMORY_TYPE)
{
/* Also okay.. is it a FLASH capacity that we understand? */
#ifdef CONFIG_M25P_SUBSECTOR_ERASE
priv->subsectorshift = 0;
#endif
if (capacity == M25P_MT25Q128_CAPACITY)
{
/* Save the FLASH geometry */
priv->sectorshift = M25P_MT25Q128_SECTOR_SHIFT;
priv->nsectors = M25P_MT25Q128_NSECTORS;
priv->pageshift = M25P_MT25Q128_PAGE_SHIFT;
priv->npages = M25P_MT25Q128_NPAGES;
#ifdef CONFIG_M25P_SUBSECTOR_ERASE
priv->subsectorshift = M25P_MT25Q128_SUBSECT_SHIFT;
#endif
return OK;
}
}
return -ENODEV;
}