From 9ac80e45f58e74cf76c30ee16573ffda7c16cd43 Mon Sep 17 00:00:00 2001 From: Juha Niskanen Date: Mon, 14 Aug 2017 06:29:13 -0600 Subject: [PATCH] STM32L4 COMP: input minus pin extended selection --- arch/arm/src/stm32l4/chip/stm32l4_comp.h | 25 +++++++++++++++--- .../arm/src/stm32l4/chip/stm32l4x3xx_pinmap.h | 26 +++++++++++-------- arch/arm/src/stm32l4/stm32l4_comp.c | 8 +++--- arch/arm/src/stm32l4/stm32l4_exti_comp.c | 6 ++--- 4 files changed, 43 insertions(+), 22 deletions(-) diff --git a/arch/arm/src/stm32l4/chip/stm32l4_comp.h b/arch/arm/src/stm32l4/chip/stm32l4_comp.h index a09c6826527..61355abbf3e 100644 --- a/arch/arm/src/stm32l4/chip/stm32l4_comp.h +++ b/arch/arm/src/stm32l4/chip/stm32l4_comp.h @@ -70,10 +70,18 @@ # define COMP_CSR_INMSEL_DAC1 (4 << COMP_CSR_INMSEL_SHIFT) /* DAC Channel1 */ # define COMP_CSR_INMSEL_DAC2 (5 << COMP_CSR_INMSEL_SHIFT) /* DAC Channel2 */ # define COMP_CSR_INMSEL_PIN1 (6 << COMP_CSR_INMSEL_SHIFT) /* Input minus pin 1: COMP1=PB1; COMP2=PB3 */ +#if defined(CONFIG_STM32L4_STM32L4X3) +# define COMP_CSR_INMSEL_INMESEL (7 << COMP_CSR_INMSEL_SHIFT) /* Input minus pin 2: Selected by INMESEL */ +#else # define COMP_CSR_INMSEL_PIN2 (7 << COMP_CSR_INMSEL_SHIFT) /* Input minus pin 2: COMP1=PC4; COMP2=PB7 */ -#define COMP_CSR_INPSEL_MASK (1 << 7) /* Bit 7: Input plus selection bit */ -# define COMP_CSR_INPSEL_PIN1 (0) /* Input plus pin 1: COMP1=PC5; COMP2=PB4 */ -# define COMP_CSR_INPSEL_PIN2 COMP_CSR_INPSEL_MASK /* Input plus pin 1: COMP1=PB2; COMP2=PB6 */ +#endif +#define COMP_CSR_INPSEL_SHIFT (7) /* Bits 7-8: Input plus selection bits */ +#define COMP_CSR_INPSEL_MASK (3 << COMP_CSR_INPSEL_SHIFT) +# define COMP_CSR_INPSEL_PIN1 (0 << COMP_CSR_INPSEL_SHIFT) /* Input plus pin 1: COMP1=PC5; COMP2=PB4 */ +# define COMP_CSR_INPSEL_PIN2 (1 << COMP_CSR_INPSEL_SHIFT) /* Input plus pin 2: COMP1=PB2; COMP2=PB6 */ +#if defined(CONFIG_STM32L4_STM32L4X3) + #define COMP_CSR_INPSEL_PIN3 (2 << COMP_CSR_INPSEL_SHIFT) /* Input plus pin 3: COMP1=PA1; COMP2=PA3 */ +#endif #define COMP2_CSR_WINMODE (1 << 9) /* Bit 9: Windows mode selection bit (COMP2 only) */ # define COMP2_CSR_WINMODE_NOCONN (0) /* Comparator 2 input not connected to Comparator 1 */ # define COMP2_CSR_WINMODE_CONN COMP2_CSR_WINMODE /* Comparator 2 input connected to Comparator 1 */ @@ -98,7 +106,16 @@ /* Bit 21: Reserved */ #define COMP_CSR_BRGEN (1 << 22) /* Bit 22: Scaler bridge enable */ #define COMP_CSR_SCALEN (1 << 23) /* Bit 23: Voltage scaler enable bit */ - /* Bits 24-29: Reserved */ + /* Bit 24: Reserved */ +#if defined(CONFIG_STM32L4_STM32L4X3) +# define COMP_CSR_INMESEL_SHIFT (25) /* Bits 25-26: Input minus extended selection bits */ +# define COMP_CSR_INMESEL_MASK (3 << COMP_CSR_INMESEL_SHIFT) +# define COMP_CSR_INMESEL_PIN2 (0 << COMP_CSR_INMESEL_SHIFT) /* Input minus pin 2: COMP1=PC4; COMP2=PB7 */ +# define COMP_CSR_INMESEL_PIN3 (1 << COMP_CSR_INMESEL_SHIFT) /* Input minus pin 3: COMP1=PA0; COMP2=PA2 */ +# define COMP_CSR_INMESEL_PIN4 (2 << COMP_CSR_INMESEL_SHIFT) /* Input minus pin 4: COMP1=PA4; COMP2=PA4 */ +# define COMP_CSR_INMESEL_PIN5 (3 << COMP_CSR_INMESEL_SHIFT) /* Input minus pin 5: COMP1=PA5; COMP2=PA5 */ +#endif + /* Bits 27-29: Reserved */ #define COMP_CSR_VALUE (1 << 30) /* Bit 30: Comparator output status bit */ #define COMP_CSR_LOCK_MASK (1 << 31) /* Bit 31: CSR register lock bit */ # define COMP_CSR_LOCK_RW (0) diff --git a/arch/arm/src/stm32l4/chip/stm32l4x3xx_pinmap.h b/arch/arm/src/stm32l4/chip/stm32l4x3xx_pinmap.h index 40f4076cd80..6aa74c0080c 100644 --- a/arch/arm/src/stm32l4/chip/stm32l4x3xx_pinmap.h +++ b/arch/arm/src/stm32l4/chip/stm32l4x3xx_pinmap.h @@ -107,24 +107,28 @@ /* Comparators */ -#define GPIO_COMP1_INM_1 (GPIO_ANALOG|GPIO_PORTA|GPIO_PIN0) -#define GPIO_COMP1_INM_2 (GPIO_ANALOG|GPIO_PORTB|GPIO_PIN1) -#define GPIO_COMP1_INM_3 (GPIO_ANALOG|GPIO_PORTC|GPIO_PIN4) -#define GPIO_COMP1_INP_1 (GPIO_ANALOG|GPIO_PORTA|GPIO_PIN1) +#define GPIO_COMP1_INM_1 (GPIO_ANALOG|GPIO_PORTB|GPIO_PIN1) +#define GPIO_COMP1_INM_2 (GPIO_ANALOG|GPIO_PORTC|GPIO_PIN4) +#define GPIO_COMP1_INM_3 (GPIO_ANALOG|GPIO_PORTA|GPIO_PIN0) +#define GPIO_COMP1_INM_4 (GPIO_ANALOG|GPIO_PORTA|GPIO_PIN4) +#define GPIO_COMP1_INM_5 (GPIO_ANALOG|GPIO_PORTA|GPIO_PIN5) +#define GPIO_COMP1_INP_1 (GPIO_ANALOG|GPIO_PORTC|GPIO_PIN5) #define GPIO_COMP1_INP_2 (GPIO_ANALOG|GPIO_PORTB|GPIO_PIN2) -#define GPIO_COMP1_INP_3 (GPIO_ANALOG|GPIO_PORTC|GPIO_PIN5) +#define GPIO_COMP1_INP_3 (GPIO_ANALOG|GPIO_PORTA|GPIO_PIN1) #define GPIO_COMP1_OUT_1 (GPIO_ALT|GPIO_AF6|GPIO_PORTA|GPIO_PIN6) #define GPIO_COMP1_OUT_2 (GPIO_ALT|GPIO_AF6|GPIO_PORTA|GPIO_PIN11) #define GPIO_COMP1_OUT_3 (GPIO_ALT|GPIO_AF12|GPIO_PORTA|GPIO_PIN0) #define GPIO_COMP1_OUT_4 (GPIO_ALT|GPIO_AF12|GPIO_PORTB|GPIO_PIN0) #define GPIO_COMP1_OUT_5 (GPIO_ALT|GPIO_AF12|GPIO_PORTB|GPIO_PIN10) -#define GPIO_COMP2_INM_1 (GPIO_ANALOG|GPIO_PORTA|GPIO_PIN2) -#define GPIO_COMP2_INM_2 (GPIO_ANALOG|GPIO_PORTB|GPIO_PIN3) -#define GPIO_COMP2_INM_3 (GPIO_ANALOG|GPIO_PORTB|GPIO_PIN7) -#define GPIO_COMP2_INP_1 (GPIO_ANALOG|GPIO_PORTA|GPIO_PIN3) -#define GPIO_COMP2_INP_2 (GPIO_ANALOG|GPIO_PORTB|GPIO_PIN4) -#define GPIO_COMP2_INP_3 (GPIO_ANALOG|GPIO_PORTB|GPIO_PIN6) +#define GPIO_COMP2_INM_1 (GPIO_ANALOG|GPIO_PORTB|GPIO_PIN3) +#define GPIO_COMP2_INM_2 (GPIO_ANALOG|GPIO_PORTB|GPIO_PIN7) +#define GPIO_COMP2_INM_3 (GPIO_ANALOG|GPIO_PORTA|GPIO_PIN2) +#define GPIO_COMP2_INM_4 (GPIO_ANALOG|GPIO_PORTA|GPIO_PIN4) +#define GPIO_COMP2_INM_5 (GPIO_ANALOG|GPIO_PORTA|GPIO_PIN5) +#define GPIO_COMP2_INP_1 (GPIO_ANALOG|GPIO_PORTB|GPIO_PIN4) +#define GPIO_COMP2_INP_2 (GPIO_ANALOG|GPIO_PORTB|GPIO_PIN6) +#define GPIO_COMP2_INP_3 (GPIO_ANALOG|GPIO_PORTA|GPIO_PIN3) #define GPIO_COMP2_OUT_1 (GPIO_ALT|GPIO_AF12|GPIO_PORTA|GPIO_PIN2) #define GPIO_COMP2_OUT_2 (GPIO_ALT|GPIO_AF12|GPIO_PORTA|GPIO_PIN7) #define GPIO_COMP2_OUT_3 (GPIO_ALT|GPIO_AF12|GPIO_PORTB|GPIO_PIN5) diff --git a/arch/arm/src/stm32l4/stm32l4_comp.c b/arch/arm/src/stm32l4/stm32l4_comp.c index f5f29fbd850..ba0882b9736 100644 --- a/arch/arm/src/stm32l4/stm32l4_comp.c +++ b/arch/arm/src/stm32l4/stm32l4_comp.c @@ -176,7 +176,7 @@ int stm32l4_compconfig(int cmp, const struct stm32l4_comp_config_s *cfg) #else regval |= COMP_CSR_INMSEL_INMESEL; mask |= COMP_CSR_INMESEL_MASK; - regval |= COMP_CSR_INMSEL_PIN2; + regval |= COMP_CSR_INMESEL_PIN2; #endif break; @@ -185,21 +185,21 @@ int stm32l4_compconfig(int cmp, const struct stm32l4_comp_config_s *cfg) stm32l4_configgpio(cmp == STM32L4_COMP1 ? GPIO_COMP1_INM_3 : GPIO_COMP2_INM_3); regval |= COMP_CSR_INMSEL_INMESEL; mask |= COMP_CSR_INMESEL_MASK; - regval |= COMP_CSR_INMSEL_PIN3; + regval |= COMP_CSR_INMESEL_PIN3; break; case STM32L4_COMP_INM_PIN_4: stm32l4_configgpio(cmp == STM32L4_COMP1 ? GPIO_COMP1_INM_4 : GPIO_COMP2_INM_4); regval |= COMP_CSR_INMSEL_INMESEL; mask |= COMP_CSR_INMESEL_MASK; - regval |= COMP_CSR_INMSEL_PIN4; + regval |= COMP_CSR_INMESEL_PIN4; break; case STM32L4_COMP_INM_PIN_5: stm32l4_configgpio(cmp == STM32L4_COMP1 ? GPIO_COMP1_INM_5 : GPIO_COMP2_INM_5); regval |= COMP_CSR_INMSEL_INMESEL; mask |= COMP_CSR_INMESEL_MASK; - regval |= COMP_CSR_INMSEL_PIN5; + regval |= COMP_CSR_INMESEL_PIN5; break; #endif diff --git a/arch/arm/src/stm32l4/stm32l4_exti_comp.c b/arch/arm/src/stm32l4/stm32l4_exti_comp.c index aaab7ae0da3..7aaa8b2f48d 100644 --- a/arch/arm/src/stm32l4/stm32l4_exti_comp.c +++ b/arch/arm/src/stm32l4/stm32l4_exti_comp.c @@ -82,7 +82,7 @@ static const uint32_t g_comp_lines[STM32L4_COMP_NUM] = * Private Functions ****************************************************************************/ -static int stm32l4_exti_comp_isr(int irq, void *context) +static int stm32l4_exti_comp_isr(int irq, void *context, FAR void *arg) { uint32_t pr; uint32_t ln; @@ -103,8 +103,8 @@ static int stm32l4_exti_comp_isr(int irq, void *context) if (g_comp_handlers[i].callback != NULL) { xcpt_t callback = g_comp_handlers[i].callback; - vid *arg = g_comp_handlers[i].arg; - ret = callback(irq, context, arg); + void *callback_arg = g_comp_handlers[i].arg; + ret = callback(irq, context, callback_arg); } } }