From 99501bba9a9cc86af965fdffbe7172a95fb3ff16 Mon Sep 17 00:00:00 2001
From: Peter van der Perk <peter.vanderperk@nxp.com>
Date: Wed, 28 Jan 2026 11:06:35 +0100
Subject: [PATCH] arch/arm: LPSPI imx9 add support for 2nd CS

If pinconfig are defined for CS1 then configure CS

Signed-off-by: Peter van der Perk <peter.vanderperk@nxp.com>
---
 arch/arm/src/imx9/imx9_lpspi.c | 42 ++++++++++++++++++++++++++++++++++
 1 file changed, 42 insertions(+)

diff --git a/arch/arm/src/imx9/imx9_lpspi.c b/arch/arm/src/imx9/imx9_lpspi.c
index 5177896d941..9063b7078c5 100644
--- a/arch/arm/src/imx9/imx9_lpspi.c
+++ b/arch/arm/src/imx9/imx9_lpspi.c
@@ -1858,6 +1858,12 @@ struct spi_dev_s *imx9_lpspibus_initialize(int bus)
 #ifdef GPIO_LPSPI1_CS
           imx9_config_gpio(GPIO_LPSPI1_CS);
 #endif
+#ifdef MUX_LPSPI1_CS1
+          imx9_iomux_configure(MUX_LPSPI1_CS1);
+#endif
+#ifdef GPIO_LPSPI1_CS1
+          imx9_config_gpio(GPIO_LPSPI1_CS1);
+#endif
 #if defined(GPIO_LPSPI1_DC) && defined(CONFIG_SPI_CMDDATA)
           imx9_iomux_configure(GPIO_LPSPI1_DC);
 #endif
@@ -1887,6 +1893,12 @@ struct spi_dev_s *imx9_lpspibus_initialize(int bus)
 #ifdef GPIO_LPSPI2_CS
           imx9_config_gpio(GPIO_LPSPI2_CS);
 #endif
+#ifdef MUX_LPSPI2_CS1
+          imx9_iomux_configure(MUX_LPSPI2_CS1);
+#endif
+#ifdef GPIO_LPSPI2_CS1
+          imx9_config_gpio(GPIO_LPSPI2_CS1);
+#endif
 #if defined(GPIO_LPSPI2_DC) && defined(CONFIG_SPI_CMDDATA)
           imx9_iomux_configure(GPIO_LPSPI2_DC);
 #endif
@@ -1916,6 +1928,12 @@ struct spi_dev_s *imx9_lpspibus_initialize(int bus)
 #ifdef GPIO_LPSPI3_CS
           imx9_config_gpio(GPIO_LPSPI3_CS);
 #endif
+#ifdef MUX_LPSPI3_CS1
+          imx9_iomux_configure(MUX_LPSPI3_CS1);
+#endif
+#ifdef GPIO_LPSPI3_CS1
+          imx9_config_gpio(GPIO_LPSPI3_CS1);
+#endif
 #if defined(GPIO_LPSPI3_DC) && defined(CONFIG_SPI_CMDDATA)
           imx9_iomux_configure(GPIO_LPSPI3_DC);
 #endif
@@ -1980,6 +1998,12 @@ struct spi_dev_s *imx9_lpspibus_initialize(int bus)
 #ifdef GPIO_LPSPI5_CS
           imx9_config_gpio(GPIO_LPSPI5_CS);
 #endif
+#ifdef MUX_LPSPI5_CS1
+          imx9_iomux_configure(MUX_LPSPI5_CS1);
+#endif
+#ifdef GPIO_LPSPI5_CS1
+          imx9_config_gpio(GPIO_LPSPI5_CS1);
+#endif
 #if defined(GPIO_LPSPI5_DC) && defined(CONFIG_SPI_CMDDATA)
           imx9_iomux_configure(GPIO_LPSPI5_DC);
 #endif
@@ -2009,6 +2033,12 @@ struct spi_dev_s *imx9_lpspibus_initialize(int bus)
 #ifdef GPIO_LPSPI6_CS
           imx9_config_gpio(GPIO_LPSPI6_CS);
 #endif
+#ifdef MUX_LPSPI6_CS1
+          imx9_iomux_configure(MUX_LPSPI6_CS1);
+#endif
+#ifdef GPIO_LPSPI6_CS1
+          imx9_config_gpio(GPIO_LPSPI6_CS1);
+#endif
 #if defined(GPIO_LPSPI6_DC) && defined(CONFIG_SPI_CMDDATA)
           imx9_iomux_configure(GPIO_LPSPI6_DC);
 #endif
@@ -2038,6 +2068,12 @@ struct spi_dev_s *imx9_lpspibus_initialize(int bus)
 #ifdef GPIO_LPSPI7_CS
           imx9_config_gpio(GPIO_LPSPI7_CS);
 #endif
+#ifdef MUX_LPSPI7_CS1
+          imx9_iomux_configure(MUX_LPSPI7_CS1);
+#endif
+#ifdef GPIO_LPSPI7_CS1
+          imx9_config_gpio(GPIO_LPSPI7_CS1);
+#endif
 #if defined(GPIO_LPSPI7_DC) && defined(CONFIG_SPI_CMDDATA)
           imx9_iomux_configure(GPIO_LPSPI7_DC);
 #endif
@@ -2067,6 +2103,12 @@ struct spi_dev_s *imx9_lpspibus_initialize(int bus)
 #ifdef GPIO_LPSPI8_CS
           imx9_config_gpio(GPIO_LPSPI8_CS);
 #endif
+#ifdef MUX_LPSPI8_CS1
+          imx9_iomux_configure(MUX_LPSPI8_CS1);
+#endif
+#ifdef GPIO_LPSPI8_CS1
+          imx9_config_gpio(GPIO_LPSPI8_CS1);
+#endif
 #if defined(GPIO_LPSPI8_DC) && defined(CONFIG_SPI_CMDDATA)
           imx9_iomux_configure(GPIO_LPSPI8_DC);
 #endif