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ziggurat29 2016-05-14 07:42:23 -05:00
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26
ChangeLog
View file

@ -11700,8 +11700,32 @@
dev@ziggurat29.com (2016-05-03).
* Makefile.unix and tools/mkexport.sh: Pass top-level make to the
script to allow -j greater than 1. From David Sidrane (2016-05-04).
* arch/arm/src/stm32, sm32f7, stm32l4: Fix typo in variable name in
* arch/arm/src/stm32, stm32f7, stm32l4: Fix typo in variable name in
serial BREAK logic. Review other serial implementations for similar
naming problems. (2016-05-05).
* arch/arm/src/samv7: Fix typo in MATRIX register definitions. From
Stefan Kolb (2016-05-06).
* arch/arm/src/stm32l4: Problem with resetting backup domain clears
clocking options set up before in *rcc.c use INITS flag to avoid magic
reg value to detect power up reset state of RTC correct a problem
clearing interrupt flags (they weren't) which prevented an alarm from
ever being used more than once per reset cycle. From Dave
dev@ziggurat29.com (2016-05-07).
* arch/arm/src/tiva: Fix a bug of GPIO falling-edge interrupt for tiva.
From Young (2016-05-07).
* drivrs/mtd: Add a driver for SST26F spi/qspi flash devices (SPI mode
only). From Sebastien Lorquet (2016-05-10).
* Several Makefiles: Add .PHONY definitions to prevent 'clean up to date'
message weirdness when 'make clean' is done with no .config or Make.defs
file (2016-05-10).
* include/nuttx/can.h and drivers/can.c: Improve CAN error reporting.
From Frank Benkert (2016-05-11).
* fs/Kconfig: Allow CONFIG_FS_WRITABLE to be manually selectable
(2016-05-11).
* Various file: Search for places where a stray semicolon following an
if condition cause the if body to be executed unconditionally. Fixes
in all SAM DMA logic, unionfs, OS signalling logic,
* configs/nucleo-144: Basic port for the Nucleo-144 board with the
STM32F746ZG MCU. From Kconstantin Berezenko (2015-05-12).
* arch/arm-src/armv7-a: Complete re-design of logic to initialize each
CPUn, n > 0, when CONFIG_SMP=y (2016-05-13).

38
Documentation/NuttxPortingGuide.html
View file

@ -12,7 +12,7 @@
<h1><big><font color="#3c34ec">
<i>NuttX RTOS Porting Guide</i>
</font></big></h1>
<p>Last Updated: March 28, 2016</p>
<p>Last Updated: May 12, 2016</p>
</td>
</tr>
</table>
@ -154,9 +154,8 @@
<a href="#uptestset">4.7.1 <code>up_testset()</code></a><br>
<a href="#upcpuindex">4.7.2 <code>up_cpu_index()</code></a><br>
<a href="#upcpustart">4.7.3 <code>up_cpu_start()</code></a><br>
<a href="#upcpuinitialize">4.7.4 <code>up_cpu_initialize()</code></a><br>
<a href="#upcpupause">4.7.5 <code>up_cpu_pause()</code></a><br>
<a href="#upcpuresume">4.7.6 <code>up_cpu_resume()</code></a>
<a href="#upcpupause">4.7.4 <code>up_cpu_pause()</code></a><br>
<a href="#upcpuresume">4.7.5 <code>up_cpu_resume()</code></a>
</ul>
<a href="#exports">4.8 APIs Exported by NuttX to Architecture-Specific Logic</a>
<ul>
@ -3722,34 +3721,7 @@ int up_cpu_start(int cpu);
</p>
</ul>
<h3><a name="upcpuinitialize">4.7.4 <code>up_cpu_initialize()</code></a></h3>
<p><b>Function Prototype</b>:<p>
<ul><pre>
#include &lt;nuttx/arch.h&gt;
#ifdef CONFIG_SMP
int up_cpu_initialize(void);
#endif
</pre></ul>
<p><b>Description</b>:</p>
<ul>
<p>
After the CPU has been started (via <code>up_cpu_start()</code>) the system will call back into the architecture-specific code with this function on the thread of execution of the newly started CPU.
This gives the architecture-specific a chance to perform ny initial, CPU-specific initialize on that thread.
</p>
</ul>
<p><b>Input Parameters</b>:</p>
<ul>
None
</ul>
<p><b>Returned Value</b>:</p>
<ul>
<p>
Zero (<code>OK</code>) is returned on success; a negated <code>errno</code> value on failure.
</p>
</ul>
<h3><a name="upcpupause">4.7.5 <code>up_cpu_pause()</code></a></h3>
<h3><a name="upcpupause">4.7.4 <code>up_cpu_pause()</code></a></h3>
<p><b>Function Prototype</b>:<p>
<ul><pre>
#include &lt;nuttx/arch.h&gt;
@ -3781,7 +3753,7 @@ int up_cpu_pause(int cpu);
</p>
</ul>
<h3><a name="upcpuresume">4.7.6 <code>up_cpu_resume()</code></a></h3>
<h3><a name="upcpuresume">4.7.5 <code>up_cpu_resume()</code></a></h3>
<p><b>Function Prototype</b>:<p>
<ul><pre>
#include &lt;nuttx/arch.h&gt;

4
Documentation/README.html
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@ -8,7 +8,7 @@
<tr align="center" bgcolor="#e4e4e4">
<td>
<h1><big><font color="#3c34ec"><i>NuttX README Files</i></font></big></h1>
<p>Last Updated: April 12, 2016</p>
<p>Last Updated: May 12, 2016</p>
</td>
</tr>
</table>
@ -157,6 +157,8 @@ nuttx/
| |- ntosd-dm320/
| | |- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/ntosd-dm320/doc/README.txt" target="_blank">doc/README.txt</a>
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/ntosd-dm320/README.txt" target="_blank"><b><i>README.txt</i></b></a>
| |- nucleo-144/
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/nucleo-144/README.txt" target="_blank"><b><i>README.txt</i></b></a>
| |- nucleo-f4x1re/
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/nucleo-f4x1re/README.txt" target="_blank"><b><i>README.txt</i></b></a>
| |- nutiny-nuc120/

10
Kconfig
View file

@ -574,16 +574,6 @@ config DEBUG_INPUT
this debug option is board-specific and may not be available for
some boards.
config DEBUG_DISCRETE
bool "Discrete I/O Debug Output"
default n
depends on DISCRETE_IO
---help---
Enable low level debug SYSLOG output from the discrete I/O device
drivers such as LEDs and I/O expanders (disabled by default).
Support for this debug option is board-specific and may not be
available for some boards.
config DEBUG_ANALOG
bool "Analog Device Debug Output"
default n

2
README.txt
View file

@ -1332,6 +1332,8 @@ nuttx/
| |- ntosd-dm320/
| | |- doc/README.txt
| | `- README.txt
| |- nucleo-144/
| | `- README.txt
| |- nucleo-f4x1re/
| | `- README.txt
| |- nutiny-nuc120/

4
arch/arm/src/a1x/a1x_boot.c
View file

@ -289,7 +289,7 @@ static void a1x_copyvectorblock(void)
****************************************************************************/
/****************************************************************************
* Name: up_boot
* Name: arm_boot
*
* Description:
* Complete boot operations started in arm_head.S
@ -305,7 +305,7 @@ static void a1x_copyvectorblock(void)
*
****************************************************************************/
void up_boot(void)
void arm_boot(void)
{
#ifndef CONFIG_ARCH_ROMPGTABLE
/* __start provided the basic MMU mappings for SRAM. Now provide mappings

2
arch/arm/src/arm/up_head.S
View file

@ -609,7 +609,7 @@ __start:
/* Perform early C-level, platform-specific initialization */
bl up_boot
bl arm_boot
#ifdef CONFIG_STACK_COLORATION
/* Write a known value to the IDLE thread stack to support stack

2
arch/arm/src/arm/up_pginitialize.c
View file

@ -88,7 +88,7 @@ void up_pginitialize(void)
{
/* None needed at present. This file is just retained in case the need
* arises in the future. Nothing calls up_pginitialize() now. If needed,
* if should be called early in up_boot.c to assure that all paging is
* if should be called early in arm_boot.c to assure that all paging is
* ready.
*/
}

492
arch/arm/src/armv7-a/arm_cpuhead.S Normal file
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@ -0,0 +1,492 @@
/****************************************************************************
* arch/arm/src/armv7-a/arm_cpuhead.S
*
* Copyright (C) 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <arch/board/board.h>
#include "arm.h"
#include "cp15.h"
#include "sctlr.h"
#include "mmu.h"
#include "smp.h"
#include "chip.h"
#include "up_internal.h"
.file "arm_cpuhead.S"
/**********************************************************************************
* Configuration
**********************************************************************************/
/* Hard-coded options */
#undef CPU_ALIGNMENT_TRAP
#undef CPU_CACHE_ROUND_ROBIN
#undef CPU_DCACHE_DISABLE
#undef CPU_ICACHE_DISABLE
#undef CPU_AFE_ENABLE
/* Check for the identity mapping: For this configuration, this would be
* the case where the virtual beginning of RAM is the same as the physical
* beginning of RAM.
*/
#if !defined(CONFIG_RAM_START) || !defined(CONFIG_RAM_VSTART)
# error "CONFIG_RAM_START or CONFIG_RAM_VSTART is not defined"
#endif
#if CONFIG_RAM_START == CONFIG_RAM_VSTART
# define CONFIG_IDENTITY_TEXTMAP 1
#endif
/****************************************************************************
* .text
****************************************************************************/
.text
/****************************************************************************
* Name: __cpu[n]_start
*
* Description:
* Boot functions for each CPU (other than CPU0). These functions set up
* the ARM operating mode, the initial stack, and configure co-processor
* registers. At the end of the boot, arm_cpu_boot() is called.
*
* These functions are provided by the common ARMv7-A logic.
*
* Input parameters:
* None
*
* Returned Value:
* Do not return.
*
****************************************************************************/
#if CONFIG_SMP_NCPUS > 1
.global __cpu1_start
.type __cpu1_start, #function
__cpu1_start:
/* Set up the stack pointer and the CPU index */
ldr sp, .Lcpu1_stackpointer
mov r5, #1
/* Then branch to the common startup logic (PC-relative) */
b .Lcpu_start
.Lcpu1_stackpointer:
.long .Lcpu1_stacktop
.size __cpu1_start, .-__cpu1_start
#if CONFIG_SMP_NCPUS > 2
.global __cpu2_start
.type __cpu2_start, #function
__cpu2_start:
/* Set up the stack pointer and the CPU index */
ldr sp, .Lcpu2_stackpointer
mov r5, #2
/* Then branch to the common startup logic (PC-relative) */
b .Lcpu_start
.Lcpu2_stackpointer:
.long .Lcpu2_stacktop
.size __cpu2_start, .-__cpu2_start
#if CONFIG_SMP_NCPUS > 3
.global __cpu3_start
.type __cpu3_start, #function
__cpu3_start:
/* Set up the stack pointer and the CPU index */
ldr sp, .Lcpu3_stackpointer
mov r5, #3
/* Then branch to the common startup logic (PC-relative) */
b .Lcpu_start
.Lcpu3_stackpointer:
.long .Lcpu3_stacktop
.size __cpu3_start, .-__cpu3_start
#if CONFIG_SMP_NCPUS > 4
# error This logic needs to extended for CONFIG_SMP_NCPUS > 4
#endif /* CONFIG_SMP_NCPUS > 4 */
#endif /* CONFIG_SMP_NCPUS > 3 */
#endif /* CONFIG_SMP_NCPUS > 2 */
#endif /* CONFIG_SMP_NCPUS > 1 */
/****************************************************************************
* Name: .Lcpu_start
*
* Description:
* Common CPUn startup logic (n > 0)
*
* On input:
* SP = Set to top of CPU IDLE stack (virtual)
* R5 = CPU number
*
****************************************************************************/
.type .Lcpu_start, #function
.Lcpu_start:
/* Make sure that we are in SVC mode with IRQs and FIQs disabled */
mov r0, #(PSR_MODE_SVC | PSR_I_BIT | PSR_F_BIT)
msr cpsr_c, r0
/* The MMU and caches should be disabled */
mrc CP15_SCTLR(r0)
bic r0, r0, #(SCTLR_M | SCTLR_C)
bic r0, r0, #(SCTLR_I)
mcr CP15_SCTLR(r0)
/* Invalidate caches and TLBs.
*
* NOTE: "The ARMv7 Virtual Memory System Architecture (VMSA) does not
* support a CP15 operation to invalidate the entire data cache. ...
* In normal usage the only time the entire data cache has to be
* invalidated is on reset."
*
* The instruction cache is virtually indexed and physically tagged but
* the data cache is physically indexed and physically tagged. So it
* should not be an issue if the system comes up with a dirty Dcache;
* the ICache, however, must be invalidated.
*/
mov r0, #0
mcr CP15_TLBIALL(r0,c7) /* Invalidate the entire unified TLB */
mcr CP15_TLBIALL(r0,c6)
mcr CP15_TLBIALL(r0,c5)
mcr CP15_BPIALL(r0) /* Invalidate entire branch prediction array */
mcr CP15_ICIALLU(r0) /* Invalidate I-cache */
/* Load the page table address.
*
* NOTES:
* - Here we assume that the page table address is aligned to at least
* least a 16KB boundary (bits 0-13 are zero). No masking is provided
* to protect against an unaligned page table address.
* - The ARMv7-A has two page table address registers, TTBR0 and 1.
* Only TTBR0 is used in this implementation but both are initialized.
*/
ldr r1, .LCppgtable /* r1=phys. page table */
orr r1, r1, #(TTBR0_RGN_WBWA | TTBR0_IRGN0) /* Select cache properties */
mcr CP15_TTBR0(r1)
mcr CP15_TTBR1(r1)
/* Set the TTB control register (TTBCR) to indicate that we are using
* TTBR0. r0 still holds the value of zero.
*
* N : 0=Selects TTBR0 and 16KB page table size indexed by VA[31:20]
* PD0 : 0=Perform translation table walks using TTBR0
* PD1 : 0=Perform translation table walks using TTBR1 (but it is disabled)
* EAE : 0=Use 32-bit translation system
*/
mcr CP15_TTBCR(r0)
/* Enable the MMU and caches
* lr = Resume at .Lcpu_vstart with the MMU enabled
*/
ldr lr, .LCcpu_vstart /* Abs. virtual address */
/* Configure the domain access register (see mmu.h). Only domain 0 is
* supported and it uses the permissions in the TLB.
*/
mov r0, #DACR_CLIENT(0)
mcr CP15_DACR(r0) /* Set domain access register */
/* Configure the system control register (see sctrl.h) */
mrc CP15_SCTLR(r0) /* Get control register */
/* Clear bits to reset values. This is only necessary in situations like, for
* example, we get here via a bootloader and the control register is in some
* unknown state.
*
* SCTLR_M Bit 0: Enable the MMU
* SCTLR_A Bit 1: Strict alignment disabled (reset value)
* SCTLR_C Bit 2: DCache disabled (reset value)
*
* SCTLR_SW Bit 10: SWP/SWPB not enabled (reset value)
* SCTLR_I Bit 12: ICache disabled (reset value)
* SCTLR_V Bit 13: Assume low vectors (reset value)
* SCTLR_RR Bit 14: The Cortex-A5 processor only supports a fixed random
* replacement strategy.
* SCTLR_HA Bit 17: Not supported by A5
*
* SCTLR_EE Bit 25: 0=Little endian (reset value).
* SCTLR_TRE Bit 28: No memory region remapping (reset value)
* SCTLR_AFE Bit 29: Full, legacy access permissions behavior (reset value).
* SCTLR_TE Bit 30: All exceptions handled in ARM state (reset value).
*/
bic r0, r0, #(SCTLR_A | SCTLR_C)
bic r0, r0, #(SCTLR_SW | SCTLR_I | SCTLR_V | SCTLR_RR | SCTLR_HA)
bic r0, r0, #(SCTLR_EE | SCTLR_TRE | SCTLR_AFE | SCTLR_TE)
/* Set bits to enable the MMU
*
* SCTLR_M Bit 0: Enable the MMU
* SCTLR_Z Bit 11: Program flow prediction control always enabled on A5
*/
orr r0, r0, #(SCTLR_M)
#ifndef CONFIG_ARCH_CORTEXA5
orr r0, r0, #(SCTLR_Z)
#endif
#ifndef CONFIG_ARCH_LOWVECTORS
/* Position vectors to 0xffff0000 if so configured.
*
* SCTLR_V Bit 13: High vectors
*/
orr r0, r0, #(SCTLR_V)
#endif
#if defined(CPU_CACHE_ROUND_ROBIN) && !defined(CONFIG_ARCH_CORTEXA5)
/* Round Robin cache replacement
*
* SCTLR_RR Bit 14: The Cortex-A5 processor only supports a fixed random
* replacement strategy.
*/
orr r0, r0, #(SCTLR_RR)
#endif
#ifndef CPU_DCACHE_DISABLE
/* Dcache enable
*
* SCTLR_C Bit 2: DCache enable
*/
orr r0, r0, #(SCTLR_C)
#endif
#ifndef CPU_ICACHE_DISABLE
/* Icache enable
*
* SCTLR_I Bit 12: ICache enable
*/
orr r0, r0, #(SCTLR_I)
#endif
#ifdef CPU_ALIGNMENT_TRAP
/* Alignment abort enable
*
* SCTLR_A Bit 1: Strict alignment enabled
*/
orr r0, r0, #(SCTLR_A)
#endif
#ifdef CONFIG_ENDIAN_BIG
/* Big endian mode
*
* SCTLR_EE Bit 25: 1=Big endian.
*/
orr r0, r0, #(SCTLR_EE)
#endif
#ifdef CPU_AFE_ENABLE
/* AP[0:2] Permissions model
*
* SCTLR_AFE Bit 29: Full, legacy access permissions behavior (reset value).
*
* When AFE=1, the page table AP[0] is used as an access flag and AP[2:1]
* control. When AFE=0, AP[2:0] control access permissions.
*/
orr r0, r0, #(SCTLR_AFE)
#endif
/* Then write the configured control register */
mcr CP15_SCTLR(r0) /* Write control reg */
.rept 12 /* Cortex A8 wants lots of NOPs here */
nop
.endr
/* And "jump" to .Lcpu_vstart in the newly mapped virtual address space */
mov pc, lr
/****************************************************************************
* PC_Relative Data
****************************************************************************/
/* The physical base address of the page table */
.type .LCppgtable, %object
.LCppgtable:
.long PGTABLE_BASE_PADDR /* Physical start of page table */
.size .LCppgtable, . -.LCppgtable
/* The virtual start address of the second phase boot logic */
.type .LCcpu_vstart, %object
.LCcpu_vstart:
.long .Lcpu_vstart
.size .LCcpu_vstart, . -.LCcpu_vstart
.size .Lcpu_start, .-.Lcpu_start
/****************************************************************************
* Name: .Lcpu_vstart
*
* Description:
* Continue initialization after the MMU has been enabled.
*
* The following is executed after the MMU has been enabled. This uses
* absolute addresses; this is not position independent.
*
* On input:
* SP = Set to top of CPU IDLE stack (virtual)
* R5 = CPU number
*
****************************************************************************/
.align 8
.globl arm_cpu_boot
.type .Lcpu_vstart, %function
.Lcpu_vstart:
#ifdef CONFIG_STACK_COLORATION
/* Write a known value to the IDLE thread stack to support stack
* monitoring logic
*/
adr r3, .Lstkinit
ldmia r3, {r0, r1, r2} /* R0 = start of IDLE stack; R1 = Size of stack; R2 = coloration */
1: /* Top of the loop */
sub r1, r1, #1 /* R1 = Number of words remaining */
cmp r1, #0 /* Check (nwords == 0) */
str r2, [r0], #4 /* Save stack color word, increment stack address */
bne 1b /* Bottom of the loop */
#endif
/* Branch to continue C level CPU initialization */
mov fp, #0 /* Clear framepointer */
mov lr, #0 /* LR = return address (none) */
mov r0, r5 /* Input parameter = CPU index */
b arm_cpu_boot /* Branch to C level CPU initialization */
.size .Lcpu_vstart, .-.Lcpu_vstart
/***************************************************************************
* Text-section constants
***************************************************************************/
/* Text-section constants: */
#ifdef CONFIG_STACK_COLORATION
.type .Lstkinit, %object
.Lstkinit:
.long SMP_STACK_WORDS
.long STACK_COLOR /* Stack coloration word */
.size .Lstkinit, . -.Lstkinit
#endif
/***************************************************************************
* .noinit section data
***************************************************************************/
.section .noinit, "aw"
#if CONFIG_SMP_NCPUS > 1
.align 8
.globl g_cpu1_idlestack
.type g_cpu1_idlestack, object
g_cpu1_idlestack:
.space SMP_STACK_SIZE
.Lcpu1_stacktop:
.size g_cpu1_idlestack, .Lcpu1_stacktop-g_cpu1_idlestack
#if CONFIG_SMP_NCPUS > 2
.align 8
.globl g_cpu2_idlestack
.type g_cpu2_idlestack, object
g_cpu2_idlestack:
.space SMP_STACK_SIZE
.Lcpu2_stacktop:
.size g_cpu2_idlestack, .Lcpu2_stacktop-g_cpu2_idlestack
#if CONFIG_SMP_NCPUS > 3
.align 8
.globl g_cpu3_idlestack
.type g_cpu3_idlestack, object
g_cpu3_idlestack:
.space SMP_STACK_SIZE
.Lcpu3_stacktop:
.size g_cpu3_idlestack, .Lcpu3_stacktop-g_cpu3_idlestack
#if CONFIG_SMP_NCPUS > 4
# error This logic needs to extended for CONFIG_SMP_NCPUS > 4
#endif /* CONFIG_SMP_NCPUS > 4 */
#endif /* CONFIG_SMP_NCPUS > 3 */
#endif /* CONFIG_SMP_NCPUS > 2 */
#endif /* CONFIG_SMP_NCPUS > 1 */
.end

145
arch/arm/src/armv7-a/arm_cpuidlestack.c Normal file
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@ -0,0 +1,145 @@
/****************************************************************************
* arch/arm/src/armv7-a/arm_cpuidlestack.c
*
* Copyright (C) 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <nuttx/arch.h>
#include <nuttx/sched.h>
#include "smp.h"
#include "up_internal.h"
#if defined(CONFIG_SMP) && CONFIG_SMP_NCPUS > 1
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Stack alignment macros */
#define STACK_ISALIGNED(a) ((uintptr_t)(a) & ~SMP_STACK_MASK)
/****************************************************************************
* Private Data
****************************************************************************/
static FAR const uint32_t *g_cpu_stackalloc[CONFIG_SMP_NCPUS] =
{
0
, g_cpu1_idlestack
#if CONFIG_SMP_NCPUS > 2
, g_cpu2_idlestack
#if CONFIG_SMP_NCPUS > 3
, g_cpu3_idlestack
#endif /* CONFIG_SMP_NCPUS > 3 */
#endif /* CONFIG_SMP_NCPUS > 2 */
};
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: up_cpu_idlestack
*
* Description:
* Allocate a stack for the CPU[n] IDLE task (n > 0) if appropriate and
* setup up stack-related information in the IDLE task's TCB. This
* function is always called before up_cpu_start(). This function is
* only called for the CPU's initial IDLE task; up_create_task is used for
* all normal tasks, pthreads, and kernel threads for all CPUs.
*
* The initial IDLE task is a special case because the CPUs can be started
* in different wans in different environments:
*
* 1. The CPU may already have been started and waiting in a low power
* state for up_cpu_start(). In this case, the IDLE thread's stack
* has already been allocated and is already in use. Here
* up_cpu_idlestack() only has to provide information about the
* already allocated stack.
*
* 2. The CPU may be disabled but started when up_cpu_start() is called.
* In this case, a new stack will need to be created for the IDLE
* thread and this function is then equivalent to:
*
* return up_create_stack(tcb, stack_size, TCB_FLAG_TTYPE_KERNEL);
*
* The following TCB fields must be initialized by this function:
*
* - adj_stack_size: Stack size after adjustment for hardware, processor,
* etc. This value is retained only for debug purposes.
* - stack_alloc_ptr: Pointer to allocated stack
* - adj_stack_ptr: Adjusted stack_alloc_ptr for HW. The initial value of
* the stack pointer.
*
* Inputs:
* - cpu: CPU index that indicates which CPU the IDLE task is
* being created for.
* - tcb: The TCB of new CPU IDLE task
* - stack_size: The requested stack size for the IDLE task. At least
* this much must be allocated. This should be
* CONFIG_SMP_STACK_SIZE.
*
****************************************************************************/
int up_cpu_idlestack(int cpu, FAR struct tcb_s *tcb, size_t stack_size)
{
uintptr_t stack_alloc;
uintptr_t top_of_stack;
DEBUGASSERT(cpu > 0 && cpu < CONFIG_SMP_NCPUS && tcb != NULL &&
stack_size <= SMP_STACK_SIZE);
/* Get the top of the stack */
stack_alloc = (uintptr_t)g_cpu_stackalloc[cpu];
DEBUGASSERT(stack_alloc != 0 && STACK_ISALIGNED(stack_alloc));
top_of_stack = stack_alloc + SMP_STACK_TOP;
tcb->adj_stack_size = SMP_STACK_SIZE;
tcb->stack_alloc_ptr = (FAR uint32_t *)stack_alloc;
tcb->adj_stack_ptr = (FAR uint32_t *)top_of_stack;
return OK;
}
#endif /* CONFIG_SMP && CONFIG_SMP_NCPUS > 1 */

8
arch/arm/src/armv7-a/arm_head.S
View file

@ -630,18 +630,18 @@ __start:
#ifndef CONFIG_BOOT_SDRAM_DATA
/* Initialize .bss and .data ONLY if .bss and .data lie in SRAM that is
* ready to use. Other memory, such as SDRAM, must be initialized before
* it can be used. up_boot() will perform that memory initialization and
* .bss and .data can be initialized after up_boot() returns.
* it can be used. arm_boot() will perform that memory initialization and
* .bss and .data can be initialized after arm_boot() returns.
*/
bl arm_data_initialize
#endif
/* Perform early C-level, platform-specific initialization. Logic
* within up_boot() must configure SDRAM and call arm_ram_initailize.
* within arm_boot() must configure SDRAM and call arm_ram_initailize.
*/
bl up_boot
bl arm_boot
#ifdef CONFIG_STACK_COLORATION
/* Write a known value to the IDLE thread stack to support stack

12
arch/arm/src/armv7-a/arm_pghead.S
View file

@ -650,8 +650,8 @@ __start:
/* Initialize .bss and .data ONLY if .bss and .data lie in SRAM that is
* ready to use. Other memory, such as SDRAM, must be initialized before
* it can be used. up_boot() will perform that memory initialization and
* .bss and .data can be initialized after up_boot() returns.
* it can be used. arm_boot() will perform that memory initialization and
* .bss and .data can be initialized after arm_boot() returns.
*/
/* Set up the stack pointer and clear the frame pointer */
@ -662,18 +662,18 @@ __start:
#ifndef CONFIG_BOOT_SDRAM_DATA
/* Initialize .bss and .data ONLY if .bss and .data lie in SRAM that is
* ready to use. Other memory, such as SDRAM, must be initialized before
* it can be used. up_boot() will perform that memory initialization and
* .bss and .data can be initialized after up_boot() returns.
* it can be used. arm_boot() will perform that memory initialization and
* .bss and .data can be initialized after arm_boot() returns.
*/
bl arm_data_initialize
#endif
/* Perform early C-level, platform-specific initialization. Logic
* within up_boot() must configure SDRAM and call arm_ram_initailize.
* within arm_boot() must configure SDRAM and call arm_ram_initailize.
*/
bl up_boot
bl arm_boot
#ifdef CONFIG_STACK_COLORATION
/* Write a known value to the IDLE thread stack to support stack

2
arch/arm/src/armv7-a/arm_pginitialize.c
View file

@ -88,7 +88,7 @@ void up_pginitialize(void)
{
/* None needed at present. This file is just retained in case the need
* arises in the future. Nothing calls up_pginitialize() now. If needed,
* if should be called early in up_boot.c to assure that all paging is
* if should be called early in arm_boot.c to assure that all paging is
* ready.
*/
}

145
arch/arm/src/armv7-a/smp.h Normal file
View file

@ -0,0 +1,145 @@
/****************************************************************************
* arch/arm/src/armv7-a/smp.h
* Common ARM support for SMP on multi-core CPUs.
*
* Copyright (C) 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_ARMV7_A_SMP_H
#define __ARCH_ARM_SRC_ARMV7_A_SMP_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#ifdef CONFIG_SMP
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* ARM requires at least a 4-byte stack alignment. For use with EABI and
* floating point, the stack must be aligned to 8-byte addresses. We will
* always use the EABI stack alignment
*/
#define SMP_STACK_ALIGNMENT 8
#define SMP_STACK_MASK 7
#define SMP_STACK_SIZE ((CONFIG_SMP_IDLETHREAD_STACKSIZE + 7) & ~7)
#define SMP_STACK_WORDS (SMP_STACK_SIZE >> 2)
#define SMP_STACK_TOP (SMP_STACK_SIZE - 8)
/****************************************************************************
* Public Data
****************************************************************************/
#ifndef __ASSEMBLY__
#if CONFIG_SMP_NCPUS > 1
extern uint32_t g_cpu1_idlestack[SMP_STACK_WORDS];
#if CONFIG_SMP_NCPUS > 2
extern uint32_t g_cpu2_idlestack[SMP_STACK_WORDS];
#if CONFIG_SMP_NCPUS > 3
extern uint32_t g_cpu3_idlestack[SMP_STACK_WORDS];
#if CONFIG_SMP_NCPUS > 4
# error This logic needs to extended for CONFIG_SMP_NCPUS > 4
#endif /* CONFIG_SMP_NCPUS > 4 */
#endif /* CONFIG_SMP_NCPUS > 3 */
#endif /* CONFIG_SMP_NCPUS > 2 */
#endif /* CONFIG_SMP_NCPUS > 1 */
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
/****************************************************************************
* Name: __cpu[n]_start
*
* Description:
* Boot functions for each CPU (other than CPU0). These functions set up
* the ARM operating mode, the initial stack, and configure co-processor
* registers. At the end of the boot, arm_cpu_boot() is called.
*
* These functions are provided by the common ARMv7-A logic.
*
* Input parameters:
* None
*
* Returned Value:
* Do not return.
*
****************************************************************************/
#if CONFIG_SMP_NCPUS > 1
void __cpu1_start(void);
#endif
#if CONFIG_SMP_NCPUS > 2
void __cpu2_start(void);
#endif
#if CONFIG_SMP_NCPUS > 3
void __cpu3_start(void);
#endif
#if CONFIG_SMP_NCPUS > 4
# error This logic needs to extended for CONFIG_SMP_NCPUS > 4
#endif
/****************************************************************************
* Name: arm_cpu_boot
*
* Description:
* Continues the C-level initialization started by the assembly language
* __cpu[n]_start function. At a minimum, this function needs to initialize
* interrupt handling and, perhaps, wait on WFI for arm_cpu_start() to
* issue an SGI.
*
* This function must be provided by the each ARMv7-A MCU and implement
* MCU-specific initialization logic.
*
* Input parameters:
* cpu - The CPU index. This is the same value that would be obtained by
* calling up_cpu_index();
*
* Returned Value:
* Does not return.
*
****************************************************************************/
void arm_cpu_boot(int cpu);
#endif /* __ASSEMBLY__ */
#endif /* CONFIG_SMP */
#endif /* __ARCH_ARM_SRC_ARMV7_A_SMP_H */

2
arch/arm/src/common/up_internal.h
View file

@ -331,7 +331,7 @@ EXTERN uint32_t _eramfuncs; /* Copy destination end address in RAM */
/* Low level initialization provided by board-level logic ******************/
void up_boot(void);
void arm_boot(void);
/* Context switching */

2
arch/arm/src/dm320/dm320_boot.c
View file

@ -202,7 +202,7 @@ static void up_copyvectorblock(void)
* Public Functions
************************************************************************************/
void up_boot(void)
void arm_boot(void)
{
/* __start provided the basic MMU mappings for SDRAM. Now provide mappings for all
* IO regions (Including the vector region).

2
arch/arm/src/imx1/imx_boot.c
View file

@ -195,7 +195,7 @@ static void up_copyvectorblock(void)
* Public Functions
************************************************************************************/
void up_boot(void)
void arm_boot(void)
{
/* __start provided the basic MMU mappings for SDRAM. Now provide mappings for all
* IO regions (Including the vector region).

7
arch/arm/src/imx6/Make.defs
View file

@ -49,6 +49,9 @@ ifeq ($(CONFIG_PAGING),y)
CMN_ASRCS = arm_pghead.S
else
CMN_ASRCS = arm_head.S
ifeq ($(CONFIG_SMP),y)
CMN_ASRCS += arm_cpuhead.S
endif
endif
# Common assembly language files
@ -77,7 +80,7 @@ CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_syscall.c
CMN_CSRCS += arm_unblocktask.c arm_undefinedinsn.c
ifeq ($(CONFIG_SMP),y)
CMN_CSRCS += arm_cpuindex.c arm_cpustart.c arm_cpupause.c
CMN_CSRCS += arm_cpuindex.c arm_cpustart.c arm_cpupause.c arm_cpuidlestack.c
endif
ifeq ($(CONFIG_DEBUG_IRQ),y)
@ -145,5 +148,5 @@ CHIP_CSRCS += imx_timerisr.c imx_gpio.c imx_iomuxc.c
CHIP_CSRCS += imx_serial.c imx_lowputc.c
ifeq ($(CONFIG_SMP),y)
CHIP_CSRCS += imx_cpuinit.c
CHIP_CSRCS += imx_cpuboot.c
endif

212
arch/arm/src/imx6/chip/imx_src.h Normal file
View file

@ -0,0 +1,212 @@
/****************************************************************************************************
* arch/arm/src/imx6/imx_src.h
*
* Copyright (C) 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Reference:
* "i.MX 6Dual/6Quad ApplicationsProcessor Reference Manual," Document Number
* IMX6DQRM, Rev. 3, 07/2015, FreeScale.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************************************/
#ifndef __ARCH_ARM_SRC_IMX6_CHIP_IMX_SRC_H
#define __ARCH_ARM_SRC_IMX6_CHIP_IMX_SRC_H
/****************************************************************************************************
* Included Files
****************************************************************************************************/
#include <nuttx/config.h>
#include <chip/imx_memorymap.h>
/****************************************************************************************************
* Pre-processor Definitions
****************************************************************************************************/
/* SRC Register Offsets *****************************************************************************/
#define IMX_SRC_SCR_OFFSET 0x0000 /* SRC Control Register */
#define IMX_SRC_SBMR1_OFFSET 0x0004 /* SRC Boot Mode Register 1 */
#define IMX_SRC_SRSR_OFFSET 0x0008 /* SRC Reset Status Register */
#define IMX_SRC_SISR_OFFSET 0x0014 /* SRC Interrupt Status Register */
#define IMX_SRC_SIMR_OFFSET 0x0018 /* SRC Interrupt Mask Register */
#define IMX_SRC_SBMR2_OFFSET 0x001c /* SRC Boot Mode Register 2 */
#define IMX_SRC_GPR1_OFFSET 0x0020 /* SRC General Purpose Register 1 */
#define IMX_SRC_GPR2_OFFSET 0x0024 /* SRC General Purpose Register 2 */
#define IMX_SRC_GPR3_OFFSET 0x0028 /* SRC General Purpose Register 3 */
#define IMX_SRC_GPR4_OFFSET 0x002c /* SRC General Purpose Register 4 */
#define IMX_SRC_GPR5_OFFSET 0x0030 /* SRC General Purpose Register 5 */
#define IMX_SRC_GPR6_OFFSET 0x0034 /* SRC General Purpose Register 6 */
#define IMX_SRC_GPR7_OFFSET 0x0038 /* SRC General Purpose Register 7 */
#define IMX_SRC_GPR8_OFFSET 0x003c /* SRC General Purpose Register 8 */
#define IMX_SRC_GPR9_OFFSET 0x0040 /* SRC General Purpose Register 9 */
#define IMX_SRC_GPR10_OFFSET 0x0044 /* SRC General Purpose Register 10 */
/* SRC Register Addresses ***************************************************************************/
#define IMX_SRC_SCR (IMX_SRC_VBASE+IMX_SRC_SCR_OFFSET)
#define IMX_SRC_SBMR1 (IMX_SRC_VBASE+IMX_SRC_SBMR1_OFFSET)
#define IMX_SRC_SRSR (IMX_SRC_VBASE+IMX_SRC_SRSR_OFFSET)
#define IMX_SRC_SISR (IMX_SRC_VBASE+IMX_SRC_SISR_OFFSET)
#define IMX_SRC_SIMR (IMX_SRC_VBASE+IMX_SRC_SIMR_OFFSET)
#define IMX_SRC_SBMR2 (IMX_SRC_VBASE+IMX_SRC_SBMR2_OFFSET)
#define IMX_SRC_GPR1 (IMX_SRC_VBASE+IMX_SRC_GPR1_OFFSET)
#define IMX_SRC_GPR2 (IMX_SRC_VBASE+IMX_SRC_GPR2_OFFSET)
#define IMX_SRC_GPR3 (IMX_SRC_VBASE+IMX_SRC_GPR3_OFFSET)
#define IMX_SRC_GPR4 (IMX_SRC_VBASE+IMX_SRC_GPR4_OFFSET)
#define IMX_SRC_GPR5 (IMX_SRC_VBASE+IMX_SRC_GPR5_OFFSET)
#define IMX_SRC_GPR6 (IMX_SRC_VBASE+IMX_SRC_GPR6_OFFSET)
#define IMX_SRC_GPR7 (IMX_SRC_VBASE+IMX_SRC_GPR7_OFFSET)
#define IMX_SRC_GPR8 (IMX_SRC_VBASE+IMX_SRC_GPR8_OFFSET)
#define IMX_SRC_GPR9 (IMX_SRC_VBASE+IMX_SRC_GPR9_OFFSET)
#define IMX_SRC_GPR10 (IMX_SRC_VBASE+IMX_SRC_GPR10_OFFSET)
/* SRC Register Bit Definitions *********************************************************************/
/* SRC Control Register: Reset value 0x00000521 */
#define SRC_SCR_WARM_RESET_ENABLE (1 << 0) /* Bit 0: WARM reset enable bit */
#define SRC_SCR_SW_GPU_RST (1 << 1) /* Bit 1: Software reset for GPU */
#define SRC_SCR_SW_VPU_RST (1 << 2) /* Bit 2: Software reset for VPU */
#define SRC_SCR_SW_IPU1_RST (1 << 3) /* Bit 3: Software reset for IPU1 */
#define SRC_SCR_SW_OPEN_VG_RST (1 << 4) /* Bit 4: Software reset for open_vg */
#define SRC_SCR_WARM_RST_BYPASS_COUNT_SHIFT (5) /* Bits 5-6: XTALI cycles before bypassing the MMDC ack */
#define SRC_SCR_WARM_RST_BYPASS_COUNT_MASK (3 << SRC_SCR_WARM_RST_BYPASS_COUNT_SHIFT)
# define SRC_SCR_WARM_RST_BYPASS_COUNT_NONE (0 << SRC_SCR_WARM_RST_BYPASS_COUNT_SHIFT) /* Counter not used */
# define SRC_SCR_WARM_RST_BYPASS_COUNT_16 (1 << SRC_SCR_WARM_RST_BYPASS_COUNT_SHIFT) /* 16 XTALI cycles before WARM to COLD reset */
# define SRC_SCR_WARM_RST_BYPASS_COUNT_32 (2 << SRC_SCR_WARM_RST_BYPASS_COUNT_SHIFT) /* 32 XTALI cycles before WARM to COLD reset */
# define SRC_SCR_WARM_RST_BYPASS_COUNT_64 (3 << SRC_SCR_WARM_RST_BYPASS_COUNT_SHIFT) /* 64 XTALI cycles before WARM to COLD reset */
#define SRC_SCR_MASK_WDOG_RST_SHIFT (7) /* Bits 7-10: Mask wdog_rst_b source */
#define SRC_SCR_MASK_WDOG_RST_MASK (15 << SRC_SCR_MASK_WDOG_RST_SHIFT)
# define SRC_SCR_MASK_WDOG_RST_MASKED (15 << SRC_SCR_MASK_WDOG_RST_SHIFT) /* wdog_rst_b is masked */
# define SRC_SCR_MASK_WDOG_RST_UNMASKED (15 << SRC_SCR_MASK_WDOG_RST_SHIFT) /* wdog_rst_b is not masked */
#define SRC_SCR_EIM_RST (1 << 11) /* Bit 11: EIM reset is needed in order to reconfigure the eim chip select */
#define SRC_SCR_SW_IPU2_RST (1 << 12) /* Bit 12: Software reset for ipu2 */
#define SRC_SCR_CORE0_RST (1 << 13) /* Bit 13: Software reset for core0 */
#define SRC_SCR_CORE1_RST (1 << 14) /* Bit 14: Software reset for core1 */
#define SRC_SCR_CORE2_RST (1 << 15) /* Bit 15: Software reset for core2 */
#define SRC_SCR_CORE3_RST (1 << 16) /* Bit 16: Software reset for core3 */
#define SRC_SCR_CORE0_DBG_RST (1 << 17) /* Bit 17: Software reset for core0 debug */
#define SRC_SCR_CORE1_DBG_RST (1 << 18) /* Bit 18: Software reset for core1 debug */
#define SRC_SCR_CORE2_DBG_RST (1 << 19) /* Bit 19: Software reset for core2 debug */
#define SRC_SCR_CORE3_DBG_RST (1 << 20) /* Bit 20: Software reset for core3 debug */
#define SRC_SCR_CORES_DBG_RST (1 << 21) /* Bit 21: Software reset for debug of arm platform */
#define SRC_SCR_CORE1_ENABLE (1 << 22) /* Bit 22: core1 enable */
#define SRC_SCR_CORE2_ENABLE (1 << 23) /* Bit 23: core2 enable */
#define SRC_SCR_CORE3_ENABLE (1 << 24) /* Bit 24: core3 enable */
#define SRC_SCR_DBG_RST_MSK_PG (1 << 25) /* Bit 25: No debug resets after core power gating event */
/* Bits 26-31: Reserved */
/* SRC Boot Mode Register 1 */
#define SRC_SBMR1_BOOT_CFG1_SHIFT (0) /* Bits 0-7: Refer to fusemap */
#define SRC_SBMR1_BOOT_CFG1_MASK (0xff << SRC_SBMR1_BOOT_CFG1_SHIFT)
# define SRC_SBMR1_BOOT_CFG1(n) ((uint32_t)(n) << SRC_SBMR1_BOOT_CFG1_SHIFT)
#define SRC_SBMR1_BOOT_CFG2_SHIFT (8) /* Bits 8-15: Refer to fusemap */
#define SRC_SBMR1_BOOT_CFG2_MASK (0xff << SRC_SBMR1_BOOT_CFG2_SHIFT)
# define SRC_SBMR1_BOOT_CFG2(n) ((uint32_t)(n) << SRC_SBMR1_BOOT_CFG2_SHIFT)
#define SRC_SBMR1_BOOT_CFG3_SHIFT (16) /* Bits 16-23: Refer to fusemap */
#define SRC_SBMR1_BOOT_CFG3_MASK (0xff << SRC_SBMR1_BOOT_CFG3_SHIFT)
# define SRC_SBMR1_BOOT_CFG3(n) ((uint32_t)(n) << SRC_SBMR1_BOOT_CFG3_SHIFT)
#define SRC_SBMR1_BOOT_CFG4_SHIFT (24) /* Bits 24-31: Refer to fusemap */
#define SRC_SBMR1_BOOT_CFG4_MASK (0xff << SRC_SBMR1_BOOT_CFG4_SHIFT)
# define SRC_SBMR1_BOOT_CFG4(n) ((uint32_t)(n) << SRC_SBMR1_BOOT_CFG4_SHIFT)
/* SRC Reset Status Register */
#define SRC_SRSR_IPP_RESET (1 << 0) /* Bit 0: Reset result of ipp_reset_b pin (Power-up sequence) */
/* Bit 1: Reserved */
#define SRC_SRSR_CSU_RESET (1 << 2) /* Bit 2: Reset result of the csu_reset_b input */
#define SRC_SRSR_IPP_USER_RESET (1 << 3) /* Bit 3: Reset result of ipp_user_reset_b qualified reset */
#define SRC_SRSR_WDOG_RST (1 << 4) /* Bit 4: IC Watchdog Time-out reset */
#define SRC_SRSR_JTAG_RST (1 << 5) /* Bit 5: HIGH - Z JTAG reset */
#define SRC_SRSR_JTAG_SW_RST (1 << 6) /* Bit 6: JTAG software reset */
/* Bits 7-15: Reserved */
#define SRC_SRSR_WARM_BOOT (1 << 16) /* Bit 16: WARM boot indication shows that WARM boot was initiated by software */
/* Bits 17-31: Reserved */
/* SRC Interrupt Status Register */
#define SRC_SISR_GPU_PASSED_RESET (1 << 0) /* Bit 0: GPU passed software reset and is ready */
#define SRC_SISR_VPU_PASSED_RESET (1 << 1) /* Bit 1: VPU passed software reset and is ready */
#define SRC_SISR_IPU1_PASSED_RESET (1 << 2) /* Bit 2: ipu passed software reset and is ready */
#define SRC_SISR_OPEN_VG_PASSED_RESET (1 << 3) /* Bit 3: open_vg passed software reset and is ready */
#define SRC_SISR_IPU2_PASSED_RESET (1 << 4) /* Bit 4: ipu2 passed software reset and is ready */
#define SRC_SISR_CORE0_WDOG_RST_REQ (1 << 5) /* Bit 5: WDOG reset request from core0 */
#define SRC_SISR_CORE1_WDOG_RST_REQ (1 << 6) /* Bit 6: WDOG reset request from core1 */
#define SRC_SISR_CORE2_WDOG_RST_REQ (1 << 7) /* Bit 7: WDOG reset request from core2 */
#define SRC_SISR_CORE3_WDOG_RST_REQ (1 << 8) /* Bit 8: WDOG reset request from core3 */
/* Bits 9-31: Reserved */
/* SRC Interrupt Mask Register */
#define SRC_SIMR_
#define SRC_SIMR_GPU_PASSED_RESET (1 << 0) /* Bit 0: Mask GPU passed software reset interrupt */
#define SRC_SIMR_VPU_PASSED_RESET (1 << 1) /* Bit 1: Mask VPU passed software reset interrupt */
#define SRC_SIMR_IPU1_PASSED_RESET (1 << 2) /* Bit 2: Mask ipu passed software reset interrupt */
#define SRC_SIMR_OPEN_VG_PASSED_RESET (1 << 3) /* Bit 3: Mask open_vg passed software reset interrupt */
#define SRC_SIMR_IPU2_PASSED_RESET (1 << 4) /* Bit 4: Mask ipu2 passed software reset interrupt */
/* Bits 5-31: Reserved */
/* SRC Boot Mode Register 2 */
#define SRC_SBMR2_SEC_CONFIG_SHIFT (0) /* Bits 0-1: State of the SECONFIG fuses */
/* Bit 2: Reserved */
#define SRC_SBMR2_DIR_BT_DIS (1 << 3) /* Bit 3: State of the DIR_BT_DIS fuse */
#define SRC_SBMR2_BT_FUSE_SEL (1 << 4) /* Bit 4: State of the BT_FUSE_SEL fuse */
/* Bits 5-23: Reserved */
#define SRC_SBMR2_BMOD_SHIFT (24) /* Bits 24-25: Latched state of the BOOT_MODE1 and BOOT_MODE0 */
#define SRC_SBMR2_BMOD_MASK (3 << SRC_SBMR2_BMOD_SHIFT)
/* Bits 26-31: Reserved */
/* SRC General Purpose Register 1: 32-bit PERSISTENT_ENTRY0: core0 entry function for waking-up from low power mode */
/* SRC General Purpose Register 2: 32-bit PERSISTENT_ARG0: core0 entry function argument */
/* SRC General Purpose Register 3: 32-bit PERSISTENT_ENTRY1: core1 entry function for waking-up from low power mode */
/* SRC General Purpose Register 4: 32-bit PERSISTENT_ARG1: core1 entry function argument */
/* SRC General Purpose Register 5: 32-bit PERSISTENT_ENTRY2: core2 entry function for waking-up from low power mode */
/* SRC General Purpose Register 6: 32-bit PERSISTENT_ARG2: core1 entry function argument */
/* SRC General Purpose Register 7: 32-bit PERSISTENT_ENTRY3: core3 entry function for waking-up from low power mode */
/* SRC General Purpose Register 8: 32-bit PERSISTENT_ARG3: core3 entry function argument */
/* SRC General Purpose Register 9: Reserved */
/* SRC General Purpose Register 10 */
#define SRC_GPR10_RW1_SHIFT (0) /* Bits 0-24: General purpose R/W bits */
#define SRC_GPR10_RW1_MASK (0x01ffffff << SRC_GPR10_RW1_SHIFT)
# define SRC_GPR10_RW1(n) ((uint32_t)(n) << SRC_GPR10_RW1_SHIFT)
#define SRC_GPR10_CORE1_ERROR_STATUS (1 << 25) /* Bit 25: core1 error status bit */
#define SRC_GPR10_CORE2_ERROR_STATUS (1 << 26) /* Bit 26: core2 error status bit */
#define SRC_GPR10_CORE3_ERROR_STATUS (1 << 27) /* Bit 27: core3 error status bit */
#define SRC_GPR10_RW2_SHIFT (28) /* Bits 28-31: General purpose R/W bits */
#define SRC_GPR10_RW2_MASK (15 << SRC_GPR10_RW2_SHIFT)
# define SRC_GPR10_RW2(n) ((uint32_t)(n) << SRC_GPR10_RW2_SHIFT)
#endif /* __ARCH_ARM_SRC_IMX6_CHIP_IMX_SRC_H */

21
arch/arm/src/imx6/imx_boot.c
View file

@ -309,7 +309,7 @@ static void imx_copyvectorblock(void)
#ifndef CONFIG_IMX6_WDT
static inline void imx_wdtdisable(void)
{
# warning REVISIT WDT initialization
/* REVISIT: WDT initialization */
}
#else
# define imx_wdtdisable()
@ -320,7 +320,7 @@ static inline void imx_wdtdisable(void)
****************************************************************************/
/****************************************************************************
* Name: up_boot
* Name: arm_boot
*
* Description:
* Complete boot operations started in arm_head.S
@ -386,7 +386,7 @@ static inline void imx_wdtdisable(void)
*
****************************************************************************/
void up_boot(void)
void arm_boot(void)
{
#ifdef CONFIG_ARCH_RAMFUNCS
const uint32_t *src;
@ -400,6 +400,13 @@ void up_boot(void)
imx_setupmappings();
imx_lowputc('A');
/* Make sure that all other CPUs are in the disabled state. This is a
* formality because the other CPUs are actually running then we have
* probably already crashed.
*/
imx_cpu_disable();
/* Provide a special mapping for the OCRAM interrupt vector positioned in
* high memory.
*/
@ -498,5 +505,13 @@ void up_boot(void)
imx_earlyserialinit();
imx_lowputc('M');
#endif
/* Now we can enable all other CPUs. The enabled CPUs will start execution
* at __cpuN_start and, after very low-level CPU initialzation has been
* performed, will branch to arm_cpu_boot() (see arch/arm/src/armv7-a/smp.h)
*/
imx_cpu_enable();
imx_lowputc('N');
imx_lowputc('\n');
}

57
arch/arm/src/imx6/imx_boot.h
View file

@ -51,23 +51,11 @@
#include "chip.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Public Types
****************************************************************************/
/****************************************************************************
* Inline Functions
* Public Function Prototypes
****************************************************************************/
#ifndef __ASSEMBLY__
/****************************************************************************
* Public Data
****************************************************************************/
#undef EXTERN
#if defined(__cplusplus)
#define EXTERN extern "C"
@ -78,9 +66,50 @@ extern "C"
#endif
/****************************************************************************
* Public Function Prototypes
* Name: imx_cpu_disable
*
* Description:
* Called from CPU0 to make sure that all other CPUs are in the disabled
* state. This is a formality because the other CPUs are actually running
* then we have probably already crashed.
*
* Input Parameters:
* None
*
* Returned Value:
* None
*
****************************************************************************/
#ifdef CONFIG_SMP
void imx_cpu_disable(void);
#else
# define imx_cpu_disable()
#endif
/****************************************************************************
* Name: imx_cpu_enable
*
* Description:
* Called from CPU0 to enable all other CPUs. The enabled CPUs will start
* execution at __cpuN_start and, after very low-level CPU initialzation
* has been performed, will branch to arm_cpu_boot()
* (see arch/arm/src/armv7-a/smp.h)
*
* Input Parameters:
* None
*
* Returned Value:
* None
*
****************************************************************************/
#ifdef CONFIG_SMP
void imx_cpu_enable(void);
#else
# define imx_cpu_enable()
#endif
/****************************************************************************
* Name: imx_board_initialize
*

302
arch/arm/src/imx6/imx_cpuboot.c Normal file
View file

@ -0,0 +1,302 @@
/****************************************************************************
* arch/arm/src/imx6/imx_cpuboot.c
*
* Copyright (C) 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <assert.h>
#include <nuttx/arch.h>
#include <arch/irq.h>
#include "up_arch.h"
#include "up_internal.h"
#include "chip/imx_src.h"
#include "sctlr.h"
#include "smp.h"
#include "gic.h"
#ifdef CONFIG_SMP
/****************************************************************************
* Private Types
****************************************************************************/
typedef CODE void (*cpu_start_t)(void);
/****************************************************************************
* Private Data
****************************************************************************/
#if 0 /* Not used */
static const uint32_t g_cpu_reset[CONFIG_SMP_NCPUS] =
{
0,
#if CONFIG_SMP_NCPUS > 1
SRC_SCR_CORE1_RST,
#endif
#if CONFIG_SMP_NCPUS > 2
SRC_SCR_CORE2_RST,
#endif
#if CONFIG_SMP_NCPUS > 3
SRC_SCR_CORE3_RST
#endif
};
#endif
static const uint32_t g_cpu_ctrl[CONFIG_SMP_NCPUS] =
{
0,
#if CONFIG_SMP_NCPUS > 1
SRC_SCR_CORE1_ENABLE,
#endif
#if CONFIG_SMP_NCPUS > 2
SRC_SCR_CORE2_ENABLE,
#endif
#if CONFIG_SMP_NCPUS > 3
SRC_SCR_CORE3_ENABLE
#endif
};
static const uintptr_t g_cpu_gpr[CONFIG_SMP_NCPUS] =
{
0,
#if CONFIG_SMP_NCPUS > 1
IMX_SRC_GPR3,
#endif
#if CONFIG_SMP_NCPUS > 2
IMX_SRC_GPR5,
#endif
#if CONFIG_SMP_NCPUS > 3
IMX_SRC_GPR7
#endif
};
static const cpu_start_t g_cpu_boot[CONFIG_SMP_NCPUS] =
{
0,
#if CONFIG_SMP_NCPUS > 1
__cpu1_start,
#endif
#if CONFIG_SMP_NCPUS > 2
__cpu2_start,
#endif
#if CONFIG_SMP_NCPUS > 3
__cpu3_start
#endif
};
/****************************************************************************
* Public Data
****************************************************************************/
/* Symbols defined via the linker script */
extern uint32_t _vector_start; /* Beginning of vector block */
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: imx_cpu_reset
*
* Description:
* CPUn software reset
*
****************************************************************************/
#if 0 /* Not used */
static void imx_cpu_reset(int cpu)
{
uint32_t regval;
regval = getreg32(IMX_SRC_SCR);
regval |= g_cpu_reset[cpu];
putreg32(regval, IMX_SRC_SCR);
}
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: imx_cpu_disable
*
* Description:
* Called from CPU0 to make sure that all other CPUs are in the disabled
* state. This is a formality because the other CPUs are actually running
* then we have probably already crashed.
*
* Input Parameters:
* None
*
* Returned Value:
* None
*
****************************************************************************/
void imx_cpu_disable(void)
{
uint32_t regval;
uint32_t cpumask;
cpumask = 0;
#if CONFIG_SMP_NCPUS > 1
cpumask |= SRC_SCR_CORE1_ENABLE;
#endif
#if CONFIG_SMP_NCPUS > 2
cpumask |= SRC_SCR_CORE2_ENABLE;
#endif
#if CONFIG_SMP_NCPUS > 3
cpumask |= SRC_SCR_CORE3_ENABLE;
#endif
regval = getreg32(IMX_SRC_SCR);
regval &= ~cpumask;
putreg32(regval, IMX_SRC_SCR);
}
/****************************************************************************
* Name: imx_cpu_enable
*
* Description:
* Called from CPU0 to enable all other CPUs. The enabled CPUs will start
* execution at __cpuN_start and, after very low-level CPU initialzation
* has been performed, will branch to arm_cpu_boot()
* (see arch/arm/src/armv7-a/smp.h)
*
* Input Parameters:
* None
*
* Returned Value:
* None
*
****************************************************************************/
void imx_cpu_enable(void)
{
cpu_start_t bootaddr;
uintptr_t regaddr;
uint32_t regval;
int cpu;
for (cpu = 1; cpu < CONFIG_SMP_NCPUS; cpu++)
{
/* Set the start up address */
regaddr = g_cpu_gpr[cpu];
bootaddr = g_cpu_boot[cpu];
putreg32((uint32_t)bootaddr, regaddr);
/* Then enable the CPU */
regval = getreg32(IMX_SRC_SCR);
regval |= g_cpu_ctrl[cpu];
putreg32(regval, IMX_SRC_SCR);
}
}
/****************************************************************************
* Name: arm_cpu_boot
*
* Description:
* Continues the C-level initialization started by the assembly language
* __cpu[n]_start function. At a minimum, this function needs to initialize
* interrupt handling and, perhaps, wait on WFI for arm_cpu_start() to
* issue an SGI.
*
* This function must be provided by the each ARMv7-A MCU and implement
* MCU-specific initialization logic.
*
* Input parameters:
* cpu - The CPU index. This is the same value that would be obtained by
* calling up_cpu_index();
*
* Returned Value:
* Does not return.
*
****************************************************************************/
void arm_cpu_boot(int cpu)
{
/* Initialize the Generic Interrupt Controller (GIC) for CPUn (n != 0) */
arm_gic_initialize();
#ifdef CONFIG_ARCH_LOWVECTORS
/* If CONFIG_ARCH_LOWVECTORS is defined, then the vectors located at the
* beginning of the .text region must appear at address at the address
* specified in the VBAR. There are two ways to accomplish this:
*
* 1. By explicitly mapping the beginning of .text region with a page
* table entry so that the virtual address zero maps to the beginning
* of the .text region. VBAR == 0x0000:0000.
*
* 2. Set the Cortex-A5 VBAR register so that the vector table address
* is moved to a location other than 0x0000:0000.
*
* The second method is used by this logic.
*/
/* Set the VBAR register to the address of the vector table */
DEBUGASSERT((((uintptr_t)&_vector_start) & ~VBAR_MASK) == 0);
cp15_wrvbar((uint32_t)&_vector_start);
#endif /* CONFIG_ARCH_LOWVECTORS */
#ifndef CONFIG_SUPPRESS_INTERRUPTS
/* And finally, enable interrupts */
(void)up_irq_enable();
#endif
/* The next thing that we expect to happen is for logic running on CPU0
* to call up_cpu_start() which generate an SGI and a context switch to
* the configured NuttX IDLE task.
*/
for (; ; )
{
asm("WFI");
}
}
#endif /* CONFIG_SMP */

2
arch/arm/src/lpc31xx/lpc31.h
View file

@ -154,7 +154,7 @@ static inline void gpio_outputhigh(uint32_t ioconfig, uint32_t bit)
* Name: lpc31_lowsetup
*
* Description:
* Called early in up_boot. Performs chip-common low level initialization.
* Called early in arm_boot. Performs chip-common low level initialization.
*
************************************************************************************/

4
arch/arm/src/lpc31xx/lpc31_boot.c
View file

@ -333,14 +333,14 @@ static void up_copyvectorblock(void)
************************************************************************************/
/************************************************************************************
* Name: up_boot
* Name: arm_boot
*
* Description:
* Complete boot operations started in up_head.S
*
************************************************************************************/
void up_boot(void)
void arm_boot(void)
{
/* __start provided the basic MMU mappings for SRAM. Now provide mappings for all
* IO regions (Including the vector region).

2
arch/arm/src/lpc31xx/lpc31_lowputc.c
View file

@ -271,7 +271,7 @@ static inline void up_configbaud(void)
* Name: lpc31_lowsetup
*
* Description:
* Called early in up_boot. Performs chip-common low level initialization.
* Called early in arm_boot. Performs chip-common low level initialization.
*
****************************************************************************/

4
arch/arm/src/sam34/sam_dmac.c
View file

@ -1554,7 +1554,7 @@ int sam_dmatxsetup(DMA_HANDLE handle, uint32_t paddr, uint32_t maddr, size_t nby
/* Set up the maximum size transfer */
ret = sam_txbuffer(dmach, paddr, maddr, maxtransfer);
if (ret == OK);
if (ret == OK)
{
/* Decrement the number of bytes left to transfer */
@ -1622,7 +1622,7 @@ int sam_dmarxsetup(DMA_HANDLE handle, uint32_t paddr, uint32_t maddr, size_t nby
/* Set up the maximum size transfer */
ret = sam_rxbuffer(dmach, paddr, maddr, maxtransfer);
if (ret == OK);
if (ret == OK)
{
/* Decrement the number of bytes left to transfer */

4
arch/arm/src/sama5/sam_boot.c
View file

@ -338,7 +338,7 @@ static inline void sam_wdtdisable(void)
****************************************************************************/
/****************************************************************************
* Name: up_boot
* Name: arm_boot
*
* Description:
* Complete boot operations started in arm_head.S
@ -407,7 +407,7 @@ static inline void sam_wdtdisable(void)
*
****************************************************************************/
void up_boot(void)
void arm_boot(void)
{
#ifdef CONFIG_ARCH_RAMFUNCS
const uint32_t *src;

4
arch/arm/src/sama5/sam_dmac.c
View file

@ -2159,7 +2159,7 @@ int sam_dmatxsetup(DMA_HANDLE handle, uint32_t paddr, uint32_t maddr,
/* Set up the maximum size transfer */
ret = sam_txbuffer(dmach, paddr, maddr, maxtransfer);
if (ret == OK);
if (ret == OK)
{
/* Decrement the number of bytes left to transfer */
@ -2238,7 +2238,7 @@ int sam_dmarxsetup(DMA_HANDLE handle, uint32_t paddr, uint32_t maddr,
/* Set up the maximum size transfer */
ret = sam_rxbuffer(dmach, paddr, maddr, maxtransfer);
if (ret == OK);
if (ret == OK)
{
/* Decrement the number of bytes left to transfer */

4
arch/arm/src/sama5/sam_xdmac.c
View file

@ -2205,7 +2205,7 @@ int sam_dmatxsetup(DMA_HANDLE handle, uint32_t paddr, uint32_t maddr,
/* Set up the maximum size transfer */
ret = sam_txbuffer(xdmach, paddr, maddr, maxtransfer);
if (ret == OK);
if (ret == OK)
{
/* Decrement the number of bytes left to transfer */
@ -2284,7 +2284,7 @@ int sam_dmarxsetup(DMA_HANDLE handle, uint32_t paddr, uint32_t maddr,
/* Set up the maximum size transfer */
ret = sam_rxbuffer(xdmach, paddr, maddr, maxtransfer);
if (ret == OK);
if (ret == OK)
{
/* Decrement the number of bytes left to transfer */

4
arch/arm/src/samdl/sam_dmac.c
View file

@ -986,7 +986,7 @@ int sam_dmatxsetup(DMA_HANDLE handle, uint32_t paddr, uint32_t maddr,
/* Set up the maximum size transfer */
ret = sam_txbuffer(dmach, paddr, maddr, maxtransfer);
if (ret == OK);
if (ret == OK)
{
/* Decrement the number of bytes left to transfer */
@ -1060,7 +1060,7 @@ int sam_dmarxsetup(DMA_HANDLE handle, uint32_t paddr, uint32_t maddr,
/* Set up the maximum size transfer */
ret = sam_rxbuffer(dmach, paddr, maddr, maxtransfer);
if (ret == OK);
if (ret == OK)
{
/* Decrement the number of bytes left to transfer */

2
arch/arm/src/samv7/Kconfig
View file

@ -26,7 +26,7 @@ config ARCH_CHIP_SAME70Q21
select ARCH_CHIP_SAME70Q
config ARCH_CHIP_SAME70N19
bool "SAME70N10"
bool "SAME70N19"
select ARCH_CHIP_SAME70N
config ARCH_CHIP_SAME70N20

4
arch/arm/src/samv7/sam_xdmac.c
View file

@ -1809,7 +1809,7 @@ int sam_dmatxsetup(DMA_HANDLE handle, uint32_t paddr, uint32_t maddr,
/* Set up the maximum size transfer */
ret = sam_txbuffer(xdmach, paddr, maddr, maxtransfer);
if (ret == OK);
if (ret == OK)
{
/* Decrement the number of bytes left to transfer */
@ -1888,7 +1888,7 @@ int sam_dmarxsetup(DMA_HANDLE handle, uint32_t paddr, uint32_t maddr,
/* Set up the maximum size transfer */
ret = sam_rxbuffer(xdmach, paddr, maddr, maxtransfer);
if (ret == OK);
if (ret == OK)
{
/* Decrement the number of bytes left to transfer */

17
arch/arm/src/stm32/stm32_tim.c
View file

@ -516,7 +516,8 @@ static int stm32_tim_setmode(FAR struct stm32_tim_dev_s *dev, stm32_tim_mode_t m
val |= ATIM_CR1_OPM;
break;
default: return ERROR;
default:
return ERROR;
}
stm32_tim_reload_counter(dev);
@ -548,7 +549,10 @@ static int stm32_tim_setchannel(FAR struct stm32_tim_dev_s *dev, uint8_t channel
/* Further we use range as 0..3; if channel=0 it will also overflow here */
if (--channel > 4) return ERROR;
if (--channel > 4)
{
return ERROR;
}
/* Assume that channel is disabled and polarity is active high */
@ -699,7 +703,8 @@ static int stm32_tim_setchannel(FAR struct stm32_tim_dev_s *dev, uint8_t channel
stm32_tim_gpioconfig(GPIO_TIM4_CH4OUT, mode);
break;
#endif
default: return ERROR;
default:
return ERROR;
}
break;
#endif
@ -727,7 +732,8 @@ static int stm32_tim_setchannel(FAR struct stm32_tim_dev_s *dev, uint8_t channel
stm32_tim_gpioconfig(GPIO_TIM5_CH4OUT, mode);
break;
#endif
default: return ERROR;
default:
return ERROR;
}
break;
#endif
@ -753,7 +759,8 @@ static int stm32_tim_setchannel(FAR struct stm32_tim_dev_s *dev, uint8_t channel
case 3:
stm32_tim_gpioconfig(GPIO_TIM1_CH4OUT, mode); break;
#endif
default: return ERROR;
default:
return ERROR;
}
break;
#endif

1
arch/avr/src/common/up_internal.h
View file

@ -134,7 +134,6 @@ extern uint32_t _ebss; /* End+1 of .bss */
/* Defined in files with the same name as the function */
void up_boot(void);
void up_irqinitialize(void);
#ifdef CONFIG_ARCH_DMA
void weak_function up_dmainitialize(void);

4
arch/hc/src/common/up_internal.h
View file

@ -157,10 +157,6 @@ extern uint32_t g_intstackbase;
* Public Functions
****************************************************************************/
/* Start-up functions */
void up_boot(void);
/* Context switching functions */
void up_copystate(uint8_t *dest, uint8_t *src);

2
arch/mips/src/pic32mx/pic32mx.h
View file

@ -234,7 +234,7 @@ void pic32mx_uartconfigure(uintptr_t uart_base, uint32_t baudrate,
*
* Description:
* This function must be provided by the board-specific logic in the directory
* configs/<board-name>/up_boot.c.
* configs/<board-name>/pic32_boot.c.
*
************************************************************************************/

1
arch/sh/src/common/up_internal.h
View file

@ -155,7 +155,6 @@ extern uint32_t g_idle_topstack;
/* Defined in files with the same name as the function */
void up_boot(void);
void up_copystate(uint32_t *dest, uint32_t *src);
void up_dataabort(uint32_t *regs);
void up_decodeirq(uint32_t *regs);

2
arch/sh/src/m16c/m16c_serial.c
View file

@ -492,7 +492,7 @@ static inline void up_waittxready(struct up_dev_s *priv)
{
/* Check the TI bit in the CI register. 1=Transmit buffer empty */
if ((up_serialin(priv, M16C_UART_C1) & UART_C1_TI) != 0);
if ((up_serialin(priv, M16C_UART_C1) & UART_C1_TI) != 0)
{
/* The transmit buffer is empty... return */
break;

2
arch/sim/src/Makefile
View file

@ -70,7 +70,7 @@ ifeq ($(CONFIG_SPINLOCK),y)
endif
ifeq ($(CONFIG_SMP),y)
CSRCS += up_smpsignal.c up_smphook.c
CSRCS += up_smpsignal.c up_smphook.c up_cpuidlestack.c
HOSTSRCS += up_simsmp.c
endif

108
arch/sim/src/up_cpuidlestack.c Normal file
View file

@ -0,0 +1,108 @@
/****************************************************************************
* arch/sim/src/up_cpuidlestack.c
*
* Copyright (C) 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <nuttx/arch.h>
#include <nuttx/sched.h>
#include "up_internal.h"
#ifdef CONFIG_SMP
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: up_cpu_idlestack
*
* Description:
* Allocate a stack for the CPU[n] IDLE task (n > 0) if appropriate and
* setup up stack-related information in the IDLE task's TCB. This
* function is always called before up_cpu_start(). This function is
* only called for the CPU's initial IDLE task; up_create_task is used for
* all normal tasks, pthreads, and kernel threads for all CPUs.
*
* The initial IDLE task is a special case because the CPUs can be started
* in different wans in different environments:
*
* 1. The CPU may already have been started and waiting in a low power
* state for up_cpu_start(). In this case, the IDLE thread's stack
* has already been allocated and is already in use. Here
* up_cpu_idlestack() only has to provide information about the
* already allocated stack.
*
* 2. The CPU may be disabled but started when up_cpu_start() is called.
* In this case, a new stack will need to be created for the IDLE
* thread and this function is then equivalent to:
*
* return up_create_stack(tcb, stack_size, TCB_FLAG_TTYPE_KERNEL);
*
* The following TCB fields must be initialized by this function:
*
* - adj_stack_size: Stack size after adjustment for hardware, processor,
* etc. This value is retained only for debug purposes.
* - stack_alloc_ptr: Pointer to allocated stack
* - adj_stack_ptr: Adjusted stack_alloc_ptr for HW. The initial value of
* the stack pointer.
*
* Inputs:
* - cpu: CPU index that indicates which CPU the IDLE task is
* being created for.
* - tcb: The TCB of new CPU IDLE task
* - stack_size: The requested stack size for the IDLE task. At least
* this much must be allocated. This should be
* CONFIG_SMP_IDLETHREAD_STACKSIZE.
*
****************************************************************************/
int up_cpu_idlestack(int cpu, FAR struct tcb_s *tcb, size_t stack_size)
{
/* REVISIT: I don't think anything is needed here */
tcb->adj_stack_size = stack_size;
tcb->stack_alloc_ptr = NULL;
tcb->adj_stack_ptr = NULL;
return OK;
}
#endif /* CONFIG_SMP */

23
arch/sim/src/up_smphook.c
View file

@ -51,29 +51,6 @@
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: up_cpu_initialize
*
* Description:
* After the CPU has been started (via up_cpu_start()) the system will
* call back into the architecture-specific code with this function on the
* thread of execution of the newly started CPU. This gives the
* architecture-specific a chance to perform ny initial, CPU-specific
* initialize on that thread.
*
* Input Parameters:
* None
*
* Returned Value:
* Zero on success; a negated errno value on failure.
*
****************************************************************************/
int up_cpu_initialize(void)
{
return OK;
}
/****************************************************************************
* Name: sim_smp_hook
*

1
arch/x86/src/common/up_internal.h
View file

@ -192,7 +192,6 @@ void x86_boardinitialize(void);
/* Defined in files with the same name as the function */
void up_boot(void);
void up_copystate(uint32_t *dest, uint32_t *src);
void up_savestate(uint32_t *regs);
void up_decodeirq(uint32_t *regs);

1
audio/Makefile
View file

@ -62,6 +62,7 @@ OBJS = $(AOBJS) $(COBJS)
BIN = libaudio$(LIBEXT)
all: $(BIN)
.PHONY: depend clean distclean
$(AOBJS): %$(OBJEXT): %.S
$(call ASSEMBLE, $<, $@)

3
binfmt/Makefile
View file

@ -1,7 +1,7 @@
############################################################################
# nxflat/Makefile
#
# Copyright (C) 2007-2009, 2012-2015 Gregory Nutt. All rights reserved.
# Copyright (C) 2007-2009, 2012-2016 Gregory Nutt. All rights reserved.
# Author: Gregory Nutt <gnutt@nuttx.org>
#
# Redistribution and use in source and binary forms, with or without
@ -80,6 +80,7 @@ BINFMT_OBJS = $(BINFMT_AOBJS) $(BINFMT_COBJS)
BIN = libbinfmt$(LIBEXT)
all: $(BIN)
.PHONY: depend clean distclean
$(BINFMT_AOBJS): %$(OBJEXT): %.S
$(call ASSEMBLE, $<, $@)

17
configs/Kconfig
View file

@ -647,6 +647,17 @@ config ARCH_BOARD_PIRELLI_DPL10
This directory contains the board support for Pirelli dpl10 phones. The
additions were made by Craig Comstock (with help form Alan Carvalho de Assis).
config ARCH_BOARD_NUCLEO_144
bool "STMicro NUCLEO-144"
depends on ARCH_CHIP_STM32F746
select ARCH_HAVE_LEDS
select ARCH_HAVE_BUTTONS
select ARCH_HAVE_IRQBUTTONS
---help---
STMicro Nucleo-144 development board featuring the STM32F746ZGT6U
MCU. The STM32F746ZGT6U is a 216MHz Cortex-M7 operation with 1024Kb Flash
memory and 300Kb SRAM.
config ARCH_BOARD_NUCLEO_F303RE
bool "STM32F303 Nucleo F303RE"
depends on ARCH_CHIP_STM32F303RE
@ -963,7 +974,7 @@ config ARCH_BOARD_STM32F746G_DISCO
---help---
STMicro STM32F746G-DISCO development board featuring the STM32F746NGH6
MCU. The STM32F746NGH6 is a 216MHz Cortex-M7 operation with 1024Kb Flash
memory and 300Kb SRAM.
memory and 320Kb SRAM.
config ARCH_BOARD_STM32L476VG_DISCO
bool "STMicro STM32F746VG-Discovery board"
@ -1363,6 +1374,7 @@ config ARCH_BOARD
default "pic32mx7mmb" if ARCH_BOARD_PIC32MX7MMB
default "pic32mz-starterkit" if ARCH_BOARD_PIC32MZ_STARTERKIT
default "pirelli_dpl10" if ARCH_BOARD_PIRELLI_DPL10
default "nucleo-144" if ARCH_BOARD_NUCLEO_144
default "nucleo-f303re" if ARCH_BOARD_NUCLEO_F303RE
default "nucleo-f4x1re" if ARCH_BOARD_NUCLEO_F401RE || ARCH_BOARD_NUCLEO_F411RE
default "nucleo-l476rg" if ARCH_BOARD_NUCLEO_L476RG
@ -1669,6 +1681,9 @@ endif
if ARCH_BOARD_PIRELLI_DPL10
source "configs/pirelli_dpl10/Kconfig"
endif
if ARCH_BOARD_NUCLEO_144
source "configs/nucleo-144/Kconfig"
endif
if ARCH_BOARD_NUCLEO_F303RE
source "configs/nucleo-f303re/Kconfig"
endif

5
configs/Makefile
View file

@ -1,7 +1,7 @@
############################################################################
# configs/Makefile
#
# Copyright (C) 2015 Gregory Nutt. All rights reserved.
# Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
# Author: Gregory Nutt <gnutt@nuttx.org>
#
# Redistribution and use in source and binary forms, with or without
@ -58,6 +58,7 @@ OBJS = $(AOBJS) $(COBJS)
BIN = libconfigs$(LIBEXT)
all: $(BIN)
.PHONY: depend clean distclean
$(AOBJS): %$(OBJEXT): %.S
$(call ASSEMBLE, $<, $@)
@ -84,4 +85,4 @@ distclean: clean
$(call DELFILE, Make.dep)
$(call DELFILE, .depend)
-include Make.dep
-include Make.dep

5
configs/README.txt
View file

@ -392,6 +392,11 @@ configs/ntosd-dm320
STATUS: This port is code complete, verified, and included in the
NuttX 0.2.1 release.
configs/nucleo-144
STMicro Nucleo-144 development board featuring the STM32F746ZGT6U MCU. The
STM32F746ZGT6U is a 216MHz Cortex-M7 operation with 1024Kb Flash memory
and 300Kb SRAM.
configs/nucleo-f4x1re
STMicro ST Nucleo F401RE and F411RE boards. See
http://mbed.org/platforms/ST-Nucleo-F401RE and

6
configs/ea3131/locked/mklocked.sh
View file

@ -140,9 +140,9 @@ fi
# consequence, the 1-time initialization code takes up precious memory
# in the locked memory region.
#
# up_boot is a low-level initialization function called by __start:
# arm_boot is a low-level initialization function called by __start:
echo "EXTERN(up_boot)" >>ld-locked.inc
echo "EXTERN(arm_boot)" >>ld-locked.inc
# All of the initialization functions that are called by os_start up to
# the point where the page fill worker thread is started must also be
@ -150,7 +150,7 @@ echo "EXTERN(up_boot)" >>ld-locked.inc
answer=$(checkzero CONFIG_TASK_NAME_SIZE)
if [ "$answer" = n ]; then
echo "EXTERN(up_boot)" >>ld-locked.inc
echo "EXTERN(arm_boot)" >>ld-locked.inc
fi
echo "EXTERN(dq_addfirst)" >>ld-locked.inc

3
configs/freedom-kl25z/src/kl_boardinitialize.c
View file

@ -1,6 +1,5 @@
/************************************************************************************
* configs/freedom-kl25z/src/up_boot.c
* arch/arm/src/board/up_boot.c
* configs/freedom-kl25z/src/kl_boardinitialize.c
*
* Copyright (C) 2013 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>

2
configs/freedom-kl26z/src/kl_boardinitialize.c
View file

@ -1,5 +1,5 @@
/************************************************************************************
* configs/freedom-kl26z/src/up_boot.c
* configs/freedom-kl26z/src/kl_boardinitialize.c
*
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>

4
configs/mirtoo/README.txt
View file

@ -530,7 +530,7 @@ UART Usage
When mounted on the DTX1-4000L EV-kit1 board, serial output is avaiable through
an FT230X device via the FUNC0 and FUNC1 module outputs. If CONFIG_PIC32MX_UART2
is enabled, the src/up_boot will configure the UART2 pins as follows:
is enabled, the src/pic32_boot will configure the UART2 pins as follows:
---------- ------ ----- ------ -------------------------
BOARD MODULE PIN SIGNAL NOTES
@ -542,7 +542,7 @@ UART Usage
for UART2 if you are also debugging with the ICD3. In that case, you may need
to switch to UART1.
If CONFIG_PIC32MX_UART1 is enabled, the src/up_boot will configure the UART
If CONFIG_PIC32MX_UART1 is enabled, the src/pic32_boot will configure the UART
pins as follows. This will support communictions (via an external RS-232
driver) through X3 pins 4 and 5:

4
configs/mirtoo/src/pic32_boot.c
View file

@ -70,7 +70,7 @@
* Description:
* When mounted on the DTX1-4000L EV-kit1 board, serial output is avaiable through
* an FT230X device via the FUNC0 and FUNC1 module outputs. If CONFIG_PIC32MX_UART2
* is enabled, the src/up_boot will configure the UART2 pins as follows.
* is enabled, the src/pic32_boot will configure the UART2 pins as follows.
*
* ---------- ------ ----- ------ -------------------------
* BOARD OUTPUT PIN SIGNAL NOTES
@ -78,7 +78,7 @@
* FT230X RXD FUNC0 RPB11 U2RX UART2 RX (Also PGEC2)
* FT230X TXD FUNC1 RPB10 U2TX UART2 TX (Also PGED2)
*
* If CONFIG_PIC32MX_UART1 is enabled, the src/up_boot will configure the UART
* If CONFIG_PIC32MX_UART1 is enabled, the src/pic32_boot will configure the UART
* pins as follows. This will support communictions (via an external RS-232
* driver) through X3 pins 4 and 5:
*

8
configs/nucleo-144/Kconfig Normal file
View file

@ -0,0 +1,8 @@
#
# For a description of the syntax of this configuration file,
# see the file kconfig-language.txt in the NuttX tools repository.
#
if ARCH_BOARD_NUCLEO_144
endif # ARCH_BOARD_NUCLEO_144

306
configs/nucleo-144/README.txt Normal file
View file

@ -0,0 +1,306 @@
README
======
This README discusses issues unique to NuttX configurations for the ST
Nucleo F746ZG board from ST Micro. See
http://www.st.com/web/catalog/tools/FM116/CL1620/SC959/SS1532/LN1847/PF261636
The Nucleo F746ZG order part number is NUCLEO-F746ZG. It is clumped together
under the STM32 Nucleo-144 board family. This does provide uniformity in the
documentation from ST and should allow us to quickly change configurations
but just cloning this configuration and changing the CPU choice and board
init. Unfortunately for the developer, the CPU specific information must be
extracted from the common information in the documentation.
Please read the User Manaul UM1727: Getting started with STM32 Nucleo board
software development tools and take note of the Powering options for the
board (6.3 Power supply and power selection) and the Solder bridges based
hardware configuration changes that are configurable (6.11 Solder bridges).
NUCLEO-F746ZG:
Microprocessor: STM32F746ZGT6 Core: ARM 32-bit Cortex®-M7 CPU with FPU,
L1-cache: 4KB data cache and 4KB instruction cache, up to
216 MHz, MPU, and DSP instructions.
Memory: 1024 KB Flash 320KB of SRAM (including 64KB of data TCM RAM)
+ 16KB of instruction TCM RAM + 4KB of backup SRAM
ADC: 3×12-bit, 2.4 MSPS ADC: up to 24 channels and 7.2 MSPS in
triple interleaved mode
DMA: 16-stream DMA controllers with FIFOs and burst support
Timers: Up to 18 timers: up to thirteen 16-bit (1x 16-bit lowpower),
two 32-bit timers, 2x watchdogs, SysTick
GPIO: 114 I/O ports with interrupt capability
LCD: LCD-TFT Controllerwith (DMA2D), Parallel interface
I2C: 4 × I2C interfaces (SMBus/PMBus)
U[S]ARTs: 4 USARTs, 4 UARTs (27 Mbit/s, ISO7816 interface, LIN, IrDA,
modem control)
SPI/12Ss: 6/3 (simplex) (up to 50 Mbit/s), 3 with muxed simplex I2S
for audio class accuracy via internal audio PLL or external
clock
QSPI: Dual mode Quad-SPI
SAIs: 2 Serial Audio Interfaces
CAN: 2 X CAN interface
SDMMC interface
SPDIFRX interface
USB: USB 2.0 full-speed device/host/OTG controller with on-chip
PHY
10/100 Ethernet: MAC with dedicated DMA: supports IEEE 1588v2 hardware,
MII/RMII
Camera Interface: 8/14 Bit
CRC calculation unit
TRG: True random number generator
RTC
Board features:
Peripherals: 8 leds, 2 push button (3 LEDs, 1 button) under software
control
Debug: STLINK/V2-1 debugger/programmer Uses a STM32F103CB to
provide a ST-Link for programming, debug similar to the
OpenOcd FTDI function - USB to JTAG front-end.
Expansion I/F ST Zio an Extended Ardino and Morpho Headers
See https://developer.mbed.org/platforms/ST-Nucleo-F746ZG form additional information about this board.
Contents
========
- Development Environment
- IDEs
- Basic configuaration & build steps
- Hardware
- Button
- LED
- U[S]ARTs and Serial Consoles
- Configurations
Development Environment
=======================
Either Linux or Cygwin on Windows can be used for the development environment.
The source has been built only using the GNU toolchain (see below). Other
toolchains will likely cause problems.
All testing has been conducted using the GNU toolchain from ARM for Linux.
found here https://launchpad.net/gcc-arm-embedded/4.9/4.9-2015-q3-update/+download/gcc-arm-none-eabi-4_9-2015q3-20150921-linux.tar.bz2
If you change the default toolchain, then you may also have to modify the PATH in
the setenv.h file if your make cannot find the tools.
IDEs
====
NuttX is built using command-line make. It can be used with an IDE, but some
effort will be required to create the project.
Makefile Build
--------------
Under Eclipse, it is pretty easy to set up an "empty makefile project" and
simply use the NuttX makefile to build the system. That is almost for free
under Linux. Under Windows, you will need to set up the "Cygwin GCC" empty
makefile project in order to work with Windows (Google for "Eclipse Cygwin" -
there is a lot of help on the internet).
Basic configuration & build steps
==================================
A GNU GCC-based toolchain is assumed. The files */setenv.sh should
be modified to point to the correct path to the Cortex-M7 GCC toolchain (if
different from the default in your PATH variable).
- Configures nuttx creating .config file in the nuttx directory
$ cd tools && ./configure.sh nucleo-f746zg/nsh && cd ..
- Refreshes the .config file with the latest features addes sice this writting
$ make oldconfig
- Select the features you want in the build.
$ make menuconfig
- Builds Nuttx with the features you selected.
$ make
Hardware
========
GPIO - there are 144 I/O lines on the STM32F746ZGT6 with various pins pined out
on the Nucleo F746ZG
See https://developer.mbed.org/platforms/ST-Nucleo-F746ZG/ for slick graphic
pinouts.
Keep in mind that:
1) The I/O is 3.3 Volt not 5 Volt like on the Arduino products.
2) The Nucleo-144 board family has 3 pages of Solder Bridges AKA Solder
Blobs (SB) that can alter the factory configuration. We will note SB
in effect but will assume the facitory defualt settings.
Our main concern is establishing a console and LED utilization for
debugging. Because so many pins can be multiplexed with so many functions,
the above mentioned graphic is super helpful in indentifying a serial port
that will not rob us of another IO feature. Namely Serial Port 8 (UART8)
with TX on PE1 and RX on PE0. Of course if your design has used those
pins you can choose another IO configuration to bring out Serial Port 8
or choose a completely different U[S]ART to use as the console.
In that Case, You will need to edit the include/board.h to select different
U[S]ART and / or pin selections.
Serial
------
SERIAL_RX PE_0
SERIAL_TX PE_1
Buttons
-------
B1 USER: the user button is connected to the I/O PC13 (Tamper support, SB173
ON and SB180 OFF)
LEDs
----
The Board provides a 3 user LEDs, LD1-LD3
LED1 (Green) PB_0 (SB120 ON and SB119 OFF)
LED2 (Blue) PB_7 (SB139 ON)
LED3 (Red) PB_14 (SP118 ON)
- When the I/O is HIGH value, the LEDs are on.
- When the I/O is LOW, the LEDs are off.
These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is
defined. In that case, the usage by the board port is defined in
include/board.h and src/stm32_autoleds.c. The LEDs are used to encode OS
related events as follows when the LEDs are available:
SYMBOL Meaning RED GREEN BLUE
------------------- ----------------------- -----------
LED_STARTED 0 OFF OFF OFF
LED_HEAPALLOCATE 0 OFF OFF OFF
LED_IRQSENABLED 0 OFF OFF OFF
LED_STACKCREATED 1 OFF ON OFF
LED_INIRQ 2 NC NC ON (momentary)
LED_SIGNAL 2 NC NC ON (momentary)
LED_ASSERTION 3 ON NC NC (momentary)
LED_PANIC 4 ON OFF OFF (flashing 2Hz)
OFF - means that the OS is still initializing. Initialization is very fast so
if you see this at all, it probably means that the system is hanging up
somewhere in the initialization phases.
GREEN - This means that the OS completed initialization.
BLUE - Whenever and interrupt or signal handler is entered, the BLUE LED is
illuminated and extinguished when the interrupt or signal handler exits.
RED - If a recovered assertion occurs, the RED LED will be illuminated
briefly while the assertion is handled. You will probably never see this.
Flashing RED - In the event of a fatal crash, all other LEDs will be
extinguished and RED LED will FLASH at a 2Hz rate.
Thus if the GREEN LED is lit, NuttX has successfully booted and is,
apparently, running normally. If the RED LED is flashing at
approximately 2Hz, then a fatal error has been detected and the system has
halted.
Serial Consoles
===============
USART8
------
Pins and Connectors:
GPIO Connector NAME
RXD: PE0 CN11 pin 64, PE0
CN10 pin 33, D34
TXD: PE1 CN11 pin 61, PE1
You must use a 3.3 TTL to RS-232 converter or a USB to 3.3V TTL
Nucleo 144 FTDI TTL-232R-3V3
----------- ------------
TXD - CN11 pin 64 - RXD - Pin 5 (Yellow)
RXD - CN11 pin 61 - TXD - Pin 4 (Orange)
GND CN11 pin 63 GND Pin 1 (Black)
*Note you will be reverse RX/TX
Use make menuconfig to configure USART8 as the console:
CONFIG_STM32F7_UART8=y
CONFIG_USART8_ISUART=y
CONFIG_USART8_SERIAL_CONSOLE=y
CONFIG_UART8_RXBUFSIZE=256
CONFIG_UART8_TXBUFSIZE=256
CONFIG_UART8_BAUD=115200
CONFIG_UART8_BITS=8
CONFIG_UART8_PARITY=0
CONFIG_UART8_2STOP=0
Virtual COM Port
----------------
Yet another option is to use USART3 and the USB virtual COM port. This
option may be more convenient for long term development, but is painful
to use during board bring-up.
Solder Bridges. This configuration requires:
PD8 USART3 TX SB5 ON and SB7 OFF (Default)
PD9 USART3 RX SB6 ON and SB4 OFF (Default)
Configuring USART3 is the same as given above but add the S and #3.
Question: What BAUD should be configure to interface with the Virtual
COM port? 115200 8N1?
Default
-------
As shipped, SB4 and SB7 are open and SB5 and SB6 closed, so the
virtual COM port is enabled.
Configurations
==============
nsh:
---------
Configures the NuttShell (nsh) located at apps/examples/nsh for the
Nucleo-144 boards. The Configuration enables the serial interfaces
on UART8. Support for builtin applications is enabled, but in the base
configuration no builtin applications are selected (see NOTES below).
NOTES:
1. This configuration uses the mconf-based configuration tool. To
change this configuration using that tool, you should:
a. Build and install the kconfig-mconf tool. See nuttx/README.txt
see additional README.txt files in the NuttX tools repository.
b. If this is the intall configuration then Execute
'cd tools && ./configure.sh stm32f746g-disco/nsh && cd ..'
in nuttx/ in order to start configuration process.
Caution: Doing this step more than once will overwrite .config with
the contents of the stm32f746g-disco/nsh/defconfig file.
c. Execute 'make oldconfig' in nuttx/ in order to refresh the
configuration.
d. Execute 'make menuconfig' in nuttx/ in order to start the
reconfiguration process.
e. Save the .config file to reuse it in the future starting at step d.
2. By default, this configuration uses the ARM GNU toolchain
for Linux. That can easily be reconfigured, of course.
CONFIG_HOST_LINUX=y : Builds under Linux
CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y : ARM GNU for Linux
3. Although the default console is USART3 (which would correspond to
the Virtual COM port) I have done all testing with the console
device configured for UART8 (see instruction above under "Serial
Consoles).

356
configs/nucleo-144/include/board.h Normal file
View file

@ -0,0 +1,356 @@
/************************************************************************************
* configs/nucleo-144/include/board.h
*
* Copyright (C) 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
#ifndef __CONFIG_NUCLEO_144_INCLUDE_BOARD_H
#define __CONFIG_NUCLEO_144_INCLUDE_BOARD_H
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#ifndef __ASSEMBLY__
# include <stdint.h>
#endif
#include "stm32_rcc.h"
#ifdef CONFIG_STM32F7_SDMMC1
# include "stm32_sdmmc.h"
#endif
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/* Clocking *************************************************************************/
/* The STM32F7 Discovery board provides the following clock sources:
*
* X1: 24 MHz oscillator for USB OTG HS PHY and camera module (daughter board)
* X2: 25 MHz oscillator for STM32F746NGH6 microcontroller and Ethernet PHY.
* X3: 32.768 KHz crystal for STM32F746NGH6 embedded RTC
*
* So we have these clock source available within the STM32
*
* HSI: 16 MHz RC factory-trimmed
* LSI: 32 KHz RC
* HSE: On-board crystal frequency is 25MHz
* LSE: 32.768 kHz
*/
#define STM32_BOARD_XTAL 8000000ul
#define STM32_HSI_FREQUENCY 16000000ul
#define STM32_LSI_FREQUENCY 32000
#define STM32_HSE_FREQUENCY STM32_BOARD_XTAL
#define STM32_LSE_FREQUENCY 32768
/* Main PLL Configuration.
*
* PLL source is HSE = 8,000,000
*
* PLL_VCO = (STM32_HSE_FREQUENCY / PLLM) * PLLN
* Subject to:
*
* 2 <= PLLM <= 63
* 192 <= PLLN <= 432
* 192 MHz <= PLL_VCO <= 432MHz
*
* SYSCLK = PLL_VCO / PLLP
* Subject to
*
* PLLP = {2, 4, 6, 8}
* SYSCLK <= 216 MHz
*
* USB OTG FS, SDMMC and RNG Clock = PLL_VCO / PLLQ
* Subject to
* The USB OTG FS requires a 48 MHz clock to work correctly. The SDMMC
* and the random number generator need a frequency lower than or equal
* to 48 MHz to work correctly.
*
* 2 <= PLLQ <= 15
*/
#if defined(CONFIG_STM32F7_USBOTHFS)
/* Highest SYSCLK with USB OTG FS clock = 48 MHz
*
* PLL_VCO = (8,000,000 / 8) * 384 = 384 MHz
* SYSCLK = 384 MHz / 2 = 192 MHz
* USB OTG FS, SDMMC and RNG Clock = 384 MHz / 8 = 48MHz
*/
#define STM32_PLLCFG_PLLM RCC_PLLCFG_PLLM(8)
#define STM32_PLLCFG_PLLN RCC_PLLCFG_PLLN(384)
#define STM32_PLLCFG_PLLP RCC_PLLCFG_PLLP_2
#define STM32_PLLCFG_PLLQ RCC_PLLCFG_PLLQ(8)
#define STM32_VCO_FREQUENCY ((STM32_HSE_FREQUENCY / 8) * 384)
#define STM32_SYSCLK_FREQUENCY (STM32_VCO_FREQUENCY / 2)
#define STM32_OTGFS_FREQUENCY (STM32_VCO_FREQUENCY / 8)
#elif defined(CONFIG_STM32F7_SDMMC1) || defined(CONFIG_STM32F7_RNG)
/* Highest SYSCLK with USB OTG FS clock <= 48MHz
*
* PLL_VCO = (8,000,000 / 8) * 432 = 432 MHz
* SYSCLK = 432 MHz / 2 = 216 MHz
* USB OTG FS, SDMMC and RNG Clock = 432 MHz / 10 = 43.2 MHz
*/
#define STM32_PLLCFG_PLLM RCC_PLLCFG_PLLM(8)
#define STM32_PLLCFG_PLLN RCC_PLLCFG_PLLN(432)
#define STM32_PLLCFG_PLLP RCC_PLLCFG_PLLP_2
#define STM32_PLLCFG_PLLQ RCC_PLLCFG_PLLQ(10)
#define STM32_VCO_FREQUENCY ((STM32_HSE_FREQUENCY / 8) * 432)
#define STM32_SYSCLK_FREQUENCY (STM32_VCO_FREQUENCY / 2)
#define STM32_OTGFS_FREQUENCY (STM32_VCO_FREQUENCY / 10)
#else
/* Highest SYSCLK
*
* PLL_VCO = (8,000,000 / 8) * 432 = 432 MHz
* SYSCLK = 432 MHz / 2 = 216 MHz
*/
#define STM32_PLLCFG_PLLM RCC_PLLCFG_PLLM(8)
#define STM32_PLLCFG_PLLN RCC_PLLCFG_PLLN(432)
#define STM32_PLLCFG_PLLP RCC_PLLCFG_PLLP_2
#define STM32_PLLCFG_PLLQ RCC_PLLCFG_PLLQ(10)
#define STM32_VCO_FREQUENCY ((STM32_HSE_FREQUENCY / 8) * 432)
#define STM32_SYSCLK_FREQUENCY (STM32_VCO_FREQUENCY / 2)
#define STM32_OTGFS_FREQUENCY (STM32_VCO_FREQUENCY / 10)
#endif
/* Several prescalers allow the configuration of the two AHB buses, the
* high-speed APB (APB2) and the low-speed APB (APB1) domains. The maximum
* frequency of the two AHB buses is 216 MHz while the maximum frequency of
* the high-speed APB domains is 108 MHz. The maximum allowed frequency of
* the low-speed APB domain is 54 MHz.
*/
/* AHB clock (HCLK) is SYSCLK (216 MHz) */
#define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK /* HCLK = SYSCLK / 1 */
#define STM32_HCLK_FREQUENCY STM32_SYSCLK_FREQUENCY
#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* same as above, to satisfy compiler */
/* APB1 clock (PCLK1) is HCLK/4 (54 MHz) */
#define STM32_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLKd4 /* PCLK1 = HCLK / 4 */
#define STM32_PCLK1_FREQUENCY (STM32_HCLK_FREQUENCY/4)
/* Timers driven from APB1 will be twice PCLK1 */
#define STM32_APB1_TIM2_CLKIN (2*STM32_PCLK1_FREQUENCY)
#define STM32_APB1_TIM3_CLKIN (2*STM32_PCLK1_FREQUENCY)
#define STM32_APB1_TIM4_CLKIN (2*STM32_PCLK1_FREQUENCY)
#define STM32_APB1_TIM5_CLKIN (2*STM32_PCLK1_FREQUENCY)
#define STM32_APB1_TIM6_CLKIN (2*STM32_PCLK1_FREQUENCY)
#define STM32_APB1_TIM7_CLKIN (2*STM32_PCLK1_FREQUENCY)
#define STM32_APB1_TIM12_CLKIN (2*STM32_PCLK1_FREQUENCY)
#define STM32_APB1_TIM13_CLKIN (2*STM32_PCLK1_FREQUENCY)
#define STM32_APB1_TIM14_CLKIN (2*STM32_PCLK1_FREQUENCY)
/* APB2 clock (PCLK2) is HCLK/2 (108MHz) */
#define STM32_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLKd2 /* PCLK2 = HCLK / 2 */
#define STM32_PCLK2_FREQUENCY (STM32_HCLK_FREQUENCY/2)
/* Timers driven from APB2 will be twice PCLK2 */
#define STM32_APB2_TIM1_CLKIN (2*STM32_PCLK2_FREQUENCY)
#define STM32_APB2_TIM8_CLKIN (2*STM32_PCLK2_FREQUENCY)
#define STM32_APB2_TIM9_CLKIN (2*STM32_PCLK2_FREQUENCY)
#define STM32_APB2_TIM10_CLKIN (2*STM32_PCLK2_FREQUENCY)
#define STM32_APB2_TIM11_CLKIN (2*STM32_PCLK2_FREQUENCY)
/* FLASH wait states
*
* --------- ---------- -----------
* VDD MAX SYSCLK WAIT STATES
* --------- ---------- -----------
* 1.7-2.1 V 180 MHz 8
* 2.1-2.4 V 216 MHz 9
* 2.4-2.7 V 216 MHz 8
* 2.7-3.6 V 216 MHz 7
* --------- ---------- -----------
*/
#define BOARD_FLASH_WAITSTATES 7
/* LED definitions ******************************************************************/
/* The STM32F746G-DISCO board has numerous LEDs but only one, LD1 located near the
* reset button, that can be controlled by software (LD2 is a power indicator, LD3-6
* indicate USB status, LD7 is controlled by the ST-Link).
*
* LD1 is controlled by PI1 which is also the SPI2_SCK at the Arduino interface.
* One end of LD1 is grounded so a high output on PI1 will illuminate the LED.
*
* If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in any way.
* The following definitions are used to access individual LEDs.
*/
/* LED index values for use with board_userled() */
#define BOARD_LED1 0
#define BOARD_NLEDS 1
#define BOARD_LD1 BOARD_LED1
/* LED bits for use with board_userled_all() */
#define BOARD_LED1_BIT (1 << BOARD_LED1)
/* If CONFIG_ARCH_LEDS is defined, the usage by the board port is defined in
* include/board.h and src/stm32_leds.c. The LEDs are used to encode OS-related
* events as follows:
*
* SYMBOL Meaning LD1
* ------------------- ----------------------- ------
* LED_STARTED NuttX has been started OFF
* LED_HEAPALLOCATE Heap has been allocated OFF
* LED_IRQSENABLED Interrupts enabled OFF
* LED_STACKCREATED Idle stack created ON
* LED_INIRQ In an interrupt N/C
* LED_SIGNAL In a signal handler N/C
* LED_ASSERTION An assertion failed N/C
* LED_PANIC The system has crashed FLASH
*
* Thus is LD1 is statically on, NuttX has successfully booted and is,
* apparently, running normally. If LD1 is flashing at approximately
* 2Hz, then a fatal error has been detected and the system has halted.
*/
#define LED_STARTED 0 /* LD1=OFF */
#define LED_HEAPALLOCATE 0 /* LD1=OFF */
#define LED_IRQSENABLED 0 /* LD1=OFF */
#define LED_STACKCREATED 1 /* LD1=ON */
#define LED_INIRQ 2 /* LD1=no change */
#define LED_SIGNAL 2 /* LD1=no change */
#define LED_ASSERTION 2 /* LD1=no change */
#define LED_PANIC 3 /* LD1=flashing */
/* Button definitions ***************************************************************/
/* The STM32F7 Discovery supports one button: Pushbutton B1, labelled "User", is
* connected to GPIO PI11. A high value will be sensed when the button is depressed.
*/
#define BUTTON_USER 0
#define NUM_BUTTONS 1
#define BUTTON_USER_BIT (1 << BUTTON_USER)
/* Alternate function pin selections ************************************************/
/* USART6:
*
* These configurations assume that you are using a standard Arduio RS-232 shield
* with the serial interface with RX on pin D0 and TX on pin D1:
*
* -------- ---------------
* STM32F7
* ARDUIONO FUNCTION GPIO
* -- ----- --------- -----
* DO RX USART6_RX PC7
* D1 TX USART6_TX PC6
* -- ----- --------- -----
*/
#define GPIO_USART6_RX GPIO_USART6_RX_1
#define GPIO_USART6_TX GPIO_USART6_TX_1
/* The STM32 F7 connects to a SMSC LAN8742A PHY using these pins:
*
* STM32 F7 BOARD LAN8742A
* GPIO SIGNAL PIN NAME
* -------- ------------ -------------
* PG11 RMII_TX_EN TXEN
* PG13 RMII_TXD0 TXD0
* PG14 RMII_TXD1 TXD1
* PC4 RMII_RXD0 RXD0/MODE0
* PC5 RMII_RXD1 RXD1/MODE1
* PG2 RMII_RXER RXER/PHYAD0 -- Not used
* PA7 RMII_CRS_DV CRS_DV/MODE2
* PC1 RMII_MDC MDC
* PA2 RMII_MDIO MDIO
* N/A NRST nRST
* PA1 RMII_REF_CLK nINT/REFCLK0
* N/A OSC_25M XTAL1/CLKIN
*
* The PHY address is either 0 or 1, depending on the state of PG2 on reset.
* PG2 is not controlled but appears to result in a PHY address of 0.
*/
#define GPIO_ETH_RMII_TX_EN GPIO_ETH_RMII_TX_EN_2
#define GPIO_ETH_RMII_TXD0 GPIO_ETH_RMII_TXD0_2
#define GPIO_ETH_RMII_TXD1 GPIO_ETH_RMII_TXD1_2
/************************************************************************************
* Public Data
************************************************************************************/
#ifndef __ASSEMBLY__
#undef EXTERN
#if defined(__cplusplus)
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
/************************************************************************************
* Public Function Prototypes
************************************************************************************/
/************************************************************************************
* Name: stm32_boardinitialize
*
* Description:
* All STM32 architectures must provide the following entry point. This entry point
* is called early in the initialization -- after all memory has been configured
* and mapped but before any devices have been initialized.
*
************************************************************************************/
void stm32_boardinitialize(void);
#undef EXTERN
#if defined(__cplusplus)
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* __CONFIG_NUCLEO_144_INCLUDE_BOARD_H */

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############################################################################
# configs/nucleo-144/nsh/Make.defs
#
# Copyright (C) 2016 Gregory Nutt. All rights reserved.
# Author: Gregory Nutt <gnutt@nuttx.org>
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# 1. Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in
# the documentation and/or other materials provided with the
# distribution.
# 3. Neither the name NuttX nor the names of its contributors may be
# used to endorse or promote products derived from this software
# without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
############################################################################
include ${TOPDIR}/.config
include ${TOPDIR}/tools/Config.mk
include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs
LDSCRIPT = flash.ld
ifeq ($(WINTOOL),y)
# Windows-native toolchains
DIRLINK = $(TOPDIR)/tools/copydir.sh
DIRUNLINK = $(TOPDIR)/tools/unlink.sh
MKDEP = $(TOPDIR)/tools/mkwindeps.sh
ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}"
ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}"
ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}"
else
# Linux/Cygwin-native toolchain
MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)
endif
CC = $(CROSSDEV)gcc
CXX = $(CROSSDEV)g++
CPP = $(CROSSDEV)gcc -E
LD = $(CROSSDEV)ld
AR = $(ARCROSSDEV)ar rcs
NM = $(ARCROSSDEV)nm
OBJCOPY = $(CROSSDEV)objcopy
OBJDUMP = $(CROSSDEV)objdump
ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'}
ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1}
ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
ARCHOPTIMIZATION = -g
endif
ifneq ($(CONFIG_DEBUG_NOOPT),y)
ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
endif
ARCHCFLAGS = -fno-builtin
ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
ARCHWARNINGSXX = -Wall -Wshadow -Wundef
ARCHDEFINES =
ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES)
AFLAGS = $(CFLAGS) -D__ASSEMBLY__
NXFLATLDFLAGS1 = -r -d -warn-common
NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
LDNXFLATFLAGS = -e main -s 2048
ASMEXT = .S
OBJEXT = .o
LIBEXT = .a
EXEEXT =
ifneq ($(CROSSDEV),arm-nuttx-elf-)
LDFLAGS += -nostartfiles -nodefaultlibs
endif
ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
LDFLAGS += -g
endif
HOSTCC = gcc
HOSTINCLUDES = -I.
HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe
HOSTLDFLAGS =

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#
# Automatically generated file; DO NOT EDIT.
# Nuttx/ Configuration
#
#
# Build Setup
#
# CONFIG_EXPERIMENTAL is not set
# CONFIG_DEFAULT_SMALL is not set
CONFIG_HOST_LINUX=y
# CONFIG_HOST_OSX is not set
# CONFIG_HOST_WINDOWS is not set
# CONFIG_HOST_OTHER is not set
#
# Build Configuration
#
CONFIG_APPS_DIR="../apps"
CONFIG_BUILD_FLAT=y
# CONFIG_BUILD_2PASS is not set
#
# Binary Output Formats
#
# CONFIG_RRLOAD_BINARY is not set
CONFIG_INTELHEX_BINARY=y
# CONFIG_MOTOROLA_SREC is not set
CONFIG_RAW_BINARY=y
# CONFIG_UBOOT_UIMAGE is not set
#
# Customize Header Files
#
# CONFIG_ARCH_STDINT_H is not set
# CONFIG_ARCH_STDBOOL_H is not set
# CONFIG_ARCH_MATH_H is not set
# CONFIG_ARCH_FLOAT_H is not set
# CONFIG_ARCH_STDARG_H is not set
# CONFIG_ARCH_DEBUG_H is not set
#
# Debug Options
#
# CONFIG_DEBUG is not set
CONFIG_ARCH_HAVE_HEAPCHECK=y
CONFIG_ARCH_HAVE_STACKCHECK=y
# CONFIG_STACK_COLORATION is not set
CONFIG_DEBUG_SYMBOLS=y
CONFIG_ARCH_HAVE_CUSTOMOPT=y
CONFIG_DEBUG_NOOPT=y
# CONFIG_DEBUG_CUSTOMOPT is not set
# CONFIG_DEBUG_FULLOPT is not set
#
# System Type
#
CONFIG_ARCH_ARM=y
# CONFIG_ARCH_AVR is not set
# CONFIG_ARCH_HC is not set
# CONFIG_ARCH_MIPS is not set
# CONFIG_ARCH_RGMP is not set
# CONFIG_ARCH_SH is not set
# CONFIG_ARCH_SIM is not set
# CONFIG_ARCH_X86 is not set
# CONFIG_ARCH_Z16 is not set
# CONFIG_ARCH_Z80 is not set
CONFIG_ARCH="arm"
#
# ARM Options
#
# CONFIG_ARCH_CHIP_A1X is not set
# CONFIG_ARCH_CHIP_C5471 is not set
# CONFIG_ARCH_CHIP_CALYPSO is not set
# CONFIG_ARCH_CHIP_DM320 is not set
# CONFIG_ARCH_CHIP_EFM32 is not set
# CONFIG_ARCH_CHIP_IMX1 is not set
# CONFIG_ARCH_CHIP_IMX6 is not set
# CONFIG_ARCH_CHIP_KINETIS is not set
# CONFIG_ARCH_CHIP_KL is not set
# CONFIG_ARCH_CHIP_LM is not set
# CONFIG_ARCH_CHIP_TIVA is not set
# CONFIG_ARCH_CHIP_LPC11XX is not set
# CONFIG_ARCH_CHIP_LPC17XX is not set
# CONFIG_ARCH_CHIP_LPC214X is not set
# CONFIG_ARCH_CHIP_LPC2378 is not set
# CONFIG_ARCH_CHIP_LPC31XX is not set
# CONFIG_ARCH_CHIP_LPC43XX is not set
# CONFIG_ARCH_CHIP_NUC1XX is not set
# CONFIG_ARCH_CHIP_SAMA5 is not set
# CONFIG_ARCH_CHIP_SAMD is not set
# CONFIG_ARCH_CHIP_SAML is not set
# CONFIG_ARCH_CHIP_SAM34 is not set
# CONFIG_ARCH_CHIP_SAMV7 is not set
# CONFIG_ARCH_CHIP_STM32 is not set
CONFIG_ARCH_CHIP_STM32F7=y
# CONFIG_ARCH_CHIP_STM32L4 is not set
# CONFIG_ARCH_CHIP_STR71X is not set
# CONFIG_ARCH_CHIP_TMS570 is not set
# CONFIG_ARCH_CHIP_MOXART is not set
# CONFIG_ARCH_ARM7TDMI is not set
# CONFIG_ARCH_ARM926EJS is not set
# CONFIG_ARCH_ARM920T is not set
# CONFIG_ARCH_CORTEXM0 is not set
# CONFIG_ARCH_CORTEXM3 is not set
# CONFIG_ARCH_CORTEXM4 is not set
CONFIG_ARCH_CORTEXM7=y
# CONFIG_ARCH_CORTEXA5 is not set
# CONFIG_ARCH_CORTEXA8 is not set
# CONFIG_ARCH_CORTEXA9 is not set
# CONFIG_ARCH_CORTEXR4 is not set
# CONFIG_ARCH_CORTEXR4F is not set
# CONFIG_ARCH_CORTEXR5 is not set
# CONFIG_ARCH_CORTEX5F is not set
# CONFIG_ARCH_CORTEXR7 is not set
# CONFIG_ARCH_CORTEXR7F is not set
CONFIG_ARCH_FAMILY="armv7-m"
CONFIG_ARCH_CHIP="stm32f7"
# CONFIG_ARM_TOOLCHAIN_IAR is not set
CONFIG_ARM_TOOLCHAIN_GNU=y
# CONFIG_ARMV7M_USEBASEPRI is not set
CONFIG_ARCH_HAVE_CMNVECTOR=y
CONFIG_ARMV7M_CMNVECTOR=y
# CONFIG_ARMV7M_LAZYFPU is not set
CONFIG_ARCH_HAVE_FPU=y
CONFIG_ARCH_HAVE_DPFPU=y
# CONFIG_ARCH_FPU is not set
# CONFIG_ARCH_HAVE_TRUSTZONE is not set
CONFIG_ARM_HAVE_MPU_UNIFIED=y
# CONFIG_ARM_MPU is not set
#
# ARMV7M Configuration Options
#
CONFIG_ARMV7M_HAVE_ICACHE=y
CONFIG_ARMV7M_HAVE_DCACHE=y
CONFIG_ARMV7M_ICACHE=y
CONFIG_ARMV7M_DCACHE=y
CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y
CONFIG_ARMV7M_HAVE_ITCM=y
CONFIG_ARMV7M_HAVE_DTCM=y
# CONFIG_ARMV7M_ITCM is not set
CONFIG_ARMV7M_DTCM=y
# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y
CONFIG_ARMV7M_HAVE_STACKCHECK=y
# CONFIG_ARMV7M_STACKCHECK is not set
# CONFIG_ARMV7M_ITMSYSLOG is not set
# CONFIG_SERIAL_TERMIOS is not set
#
# STM32 F7 Configuration Options
#
# CONFIG_ARCH_CHIP_STM32F745 is not set
CONFIG_ARCH_CHIP_STM32F746=y
# CONFIG_ARCH_CHIP_STM32F756 is not set
CONFIG_STM32F7_STM32F74XX=y
# CONFIG_STM32F7_STM32F75XX is not set
# CONFIG_STM32F7_FLASH_512KB is not set
CONFIG_STM32F7_FLASH_1024KB=y
#
# STM32 Peripheral Support
#
CONFIG_STM32F7_HAVE_LTDC=y
# CONFIG_STM32F7_ADC is not set
# CONFIG_STM32F7_CAN is not set
# CONFIG_STM32F7_DAC is not set
# CONFIG_STM32F7_DMA is not set
# CONFIG_STM32F7_I2C is not set
# CONFIG_STM32F7_SAI is not set
# CONFIG_STM32F7_SPI is not set
CONFIG_STM32F7_USART=y
# CONFIG_STM32F7_ADC1 is not set
# CONFIG_STM32F7_ADC2 is not set
# CONFIG_STM32F7_ADC3 is not set
# CONFIG_STM32F7_BKPSRAM is not set
# CONFIG_STM32F7_CAN1 is not set
# CONFIG_STM32F7_CAN2 is not set
# CONFIG_STM32F7_CEC is not set
# CONFIG_STM32F7_CRC is not set
# CONFIG_STM32F7_CRYP is not set
# CONFIG_STM32F7_DMA1 is not set
# CONFIG_STM32F7_DMA2 is not set
# CONFIG_STM32F7_DAC1 is not set
# CONFIG_STM32F7_DAC2 is not set
# CONFIG_STM32F7_DCMI is not set
# CONFIG_STM32F7_ETHMAC is not set
# CONFIG_STM32F7_FSMC is not set
# CONFIG_STM32F7_I2C1 is not set
# CONFIG_STM32F7_I2C2 is not set
# CONFIG_STM32F7_I2C3 is not set
# CONFIG_STM32F7_LPTIM1 is not set
# CONFIG_STM32F7_LTDC is not set
# CONFIG_STM32F7_DMA2D is not set
# CONFIG_STM32F7_OTGFS is not set
# CONFIG_STM32F7_OTGHS is not set
# CONFIG_STM32F7_QUADSPI is not set
# CONFIG_STM32F7_SAI1 is not set
# CONFIG_STM32F7_RNG is not set
# CONFIG_STM32F7_SAI2 is not set
# CONFIG_STM32F7_SDMMC1 is not set
# CONFIG_STM32F7_SPDIFRX is not set
# CONFIG_STM32F7_SPI1 is not set
# CONFIG_STM32F7_SPI2 is not set
# CONFIG_STM32F7_SPI3 is not set
# CONFIG_STM32F7_SPI4 is not set
# CONFIG_STM32F7_SPI5 is not set
# CONFIG_STM32F7_SPI6 is not set
# CONFIG_STM32F7_TIM1 is not set
# CONFIG_STM32F7_TIM2 is not set
# CONFIG_STM32F7_TIM3 is not set
# CONFIG_STM32F7_TIM4 is not set
# CONFIG_STM32F7_TIM5 is not set
# CONFIG_STM32F7_TIM6 is not set
# CONFIG_STM32F7_TIM7 is not set
# CONFIG_STM32F7_TIM8 is not set
# CONFIG_STM32F7_TIM9 is not set
# CONFIG_STM32F7_TIM10 is not set
# CONFIG_STM32F7_TIM11 is not set
# CONFIG_STM32F7_TIM12 is not set
# CONFIG_STM32F7_TIM13 is not set
# CONFIG_STM32F7_TIM14 is not set
# CONFIG_STM32F7_TIM15 is not set
# CONFIG_STM32F7_USART1 is not set
# CONFIG_STM32F7_USART2 is not set
# CONFIG_STM32F7_USART3 is not set
# CONFIG_STM32F7_UART4 is not set
# CONFIG_STM32F7_UART5 is not set
CONFIG_STM32F7_USART6=y
# CONFIG_STM32F7_UART7 is not set
# CONFIG_STM32F7_UART8 is not set
# CONFIG_STM32F7_IWDG is not set
# CONFIG_STM32F7_WWDG is not set
# CONFIG_STM32F7_CUSTOM_CLOCKCONFIG is not set
#
# Architecture Options
#
# CONFIG_ARCH_NOINTC is not set
# CONFIG_ARCH_VECNOTIRQ is not set
# CONFIG_ARCH_DMA is not set
CONFIG_ARCH_HAVE_IRQPRIO=y
# CONFIG_ARCH_L2CACHE is not set
# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
# CONFIG_ARCH_HAVE_ADDRENV is not set
# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
# CONFIG_ARCH_HAVE_MULTICPU is not set
CONFIG_ARCH_HAVE_VFORK=y
# CONFIG_ARCH_HAVE_MMU is not set
CONFIG_ARCH_HAVE_MPU=y
# CONFIG_ARCH_NAND_HWECC is not set
# CONFIG_ARCH_HAVE_EXTCLK is not set
# CONFIG_ARCH_HAVE_POWEROFF is not set
# CONFIG_ARCH_HAVE_RESET is not set
# CONFIG_ARCH_USE_MPU is not set
# CONFIG_ARCH_IRQPRIO is not set
CONFIG_ARCH_STACKDUMP=y
# CONFIG_ENDIAN_BIG is not set
# CONFIG_ARCH_IDLE_CUSTOM is not set
# CONFIG_ARCH_HAVE_RAMFUNCS is not set
CONFIG_ARCH_HAVE_RAMVECTORS=y
# CONFIG_ARCH_RAMVECTORS is not set
#
# Board Settings
#
CONFIG_BOARD_LOOPSPERMSEC=43103
# CONFIG_ARCH_CALIBRATION is not set
#
# Interrupt options
#
CONFIG_ARCH_HAVE_INTERRUPTSTACK=y
CONFIG_ARCH_INTERRUPTSTACK=0
CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y
# CONFIG_ARCH_HIPRI_INTERRUPT is not set
#
# Boot options
#
# CONFIG_BOOT_RUNFROMEXTSRAM is not set
CONFIG_BOOT_RUNFROMFLASH=y
# CONFIG_BOOT_RUNFROMISRAM is not set
# CONFIG_BOOT_RUNFROMSDRAM is not set
# CONFIG_BOOT_COPYTORAM is not set
#
# Boot Memory Configuration
#
CONFIG_RAM_START=0x20010000
CONFIG_RAM_SIZE=245760
# CONFIG_ARCH_HAVE_SDRAM is not set
#
# Board Selection
#
# CONFIG_ARCH_BOARD_STM32F746G_DISCO is not set
CONFIG_ARCH_BOARD_NUCLEO_144=y
# CONFIG_ARCH_BOARD_CUSTOM is not set
CONFIG_ARCH_BOARD="nucleo-144"
#
# Common Board Options
#
CONFIG_ARCH_HAVE_LEDS=y
CONFIG_ARCH_LEDS=y
CONFIG_ARCH_HAVE_BUTTONS=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_HAVE_IRQBUTTONS=y
# CONFIG_ARCH_IRQBUTTONS is not set
CONFIG_NSH_MMCSDMINOR=0
#
# Board-Specific Options
#
# CONFIG_LIB_BOARDCTL is not set
#
# RTOS Features
#
CONFIG_DISABLE_OS_API=y
# CONFIG_DISABLE_POSIX_TIMERS is not set
# CONFIG_DISABLE_PTHREAD is not set
# CONFIG_DISABLE_SIGNALS is not set
# CONFIG_DISABLE_MQUEUE is not set
# CONFIG_DISABLE_ENVIRON is not set
#
# Clocks and Timers
#
CONFIG_USEC_PER_TICK=10000
# CONFIG_SYSTEM_TIME64 is not set
# CONFIG_CLOCK_MONOTONIC is not set
# CONFIG_JULIAN_TIME is not set
CONFIG_START_YEAR=2011
CONFIG_START_MONTH=12
CONFIG_START_DAY=6
CONFIG_MAX_WDOGPARMS=2
CONFIG_PREALLOC_WDOGS=4
CONFIG_WDOG_INTRESERVE=0
CONFIG_PREALLOC_TIMERS=4
#
# Tasks and Scheduling
#
# CONFIG_INIT_NONE is not set
CONFIG_INIT_ENTRYPOINT=y
# CONFIG_INIT_FILEPATH is not set
CONFIG_USER_ENTRYPOINT="nsh_main"
CONFIG_RR_INTERVAL=200
# CONFIG_SCHED_SPORADIC is not set
CONFIG_TASK_NAME_SIZE=0
CONFIG_MAX_TASKS=16
# CONFIG_SCHED_HAVE_PARENT is not set
CONFIG_SCHED_WAITPID=y
#
# Pthread Options
#
# CONFIG_MUTEX_TYPES is not set
CONFIG_NPTHREAD_KEYS=4
#
# Performance Monitoring
#
# CONFIG_SCHED_CPULOAD is not set
# CONFIG_SCHED_INSTRUMENTATION is not set
#
# Files and I/O
#
CONFIG_DEV_CONSOLE=y
# CONFIG_FDCLONE_DISABLE is not set
# CONFIG_FDCLONE_STDIO is not set
CONFIG_SDCLONE_DISABLE=y
CONFIG_NFILE_DESCRIPTORS=8
CONFIG_NFILE_STREAMS=8
CONFIG_NAME_MAX=32
# CONFIG_PRIORITY_INHERITANCE is not set
#
# RTOS hooks
#
# CONFIG_BOARD_INITIALIZE is not set
# CONFIG_SCHED_STARTHOOK is not set
# CONFIG_SCHED_ATEXIT is not set
# CONFIG_SCHED_ONEXIT is not set
#
# Signal Numbers
#
CONFIG_SIG_SIGUSR1=1
CONFIG_SIG_SIGUSR2=2
CONFIG_SIG_SIGALARM=3
CONFIG_SIG_SIGCONDTIMEDOUT=16
#
# POSIX Message Queue Options
#
CONFIG_PREALLOC_MQ_MSGS=4
CONFIG_MQ_MAXMSGSIZE=32
# CONFIG_MODULE is not set
#
# Work queue support
#
# CONFIG_SCHED_WORKQUEUE is not set
# CONFIG_SCHED_HPWORK is not set
# CONFIG_SCHED_LPWORK is not set
#
# Stack and heap information
#
CONFIG_IDLETHREAD_STACKSIZE=1024
CONFIG_USERMAIN_STACKSIZE=2048
CONFIG_PTHREAD_STACK_MIN=256
CONFIG_PTHREAD_STACK_DEFAULT=2048
# CONFIG_LIB_SYSCALL is not set
#
# Device Drivers
#
CONFIG_DISABLE_POLL=y
CONFIG_DEV_NULL=y
# CONFIG_DEV_ZERO is not set
# CONFIG_DEV_LOOP is not set
#
# Buffering
#
# CONFIG_DRVR_WRITEBUFFER is not set
# CONFIG_DRVR_READAHEAD is not set
# CONFIG_RAMDISK is not set
# CONFIG_CAN is not set
# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
# CONFIG_PWM is not set
CONFIG_ARCH_HAVE_I2CRESET=y
# CONFIG_I2C is not set
CONFIG_SPI=y
# CONFIG_SPI_SLAVE is not set
CONFIG_SPI_EXCHANGE=y
# CONFIG_SPI_CMDDATA is not set
# CONFIG_SPI_CALLBACK is not set
# CONFIG_SPI_BITBANG is not set
# CONFIG_SPI_HWFEATURES is not set
# CONFIG_SPI_CRCGENERATION is not set
# CONFIG_I2S is not set
#
# Timer Driver Support
#
# CONFIG_TIMER is not set
# CONFIG_RTC is not set
# CONFIG_WATCHDOG is not set
# CONFIG_ANALOG is not set
# CONFIG_AUDIO_DEVICES is not set
# CONFIG_VIDEO_DEVICES is not set
# CONFIG_BCH is not set
# CONFIG_INPUT is not set
# CONFIG_IOEXPANDER is not set
# CONFIG_LCD is not set
#
# LED Support
#
# CONFIG_USERLED is not set
# CONFIG_RGBLED is not set
# CONFIG_PCA9635PW is not set
# CONFIG_MMCSD is not set
# CONFIG_MODEM is not set
# CONFIG_MTD is not set
# CONFIG_EEPROM is not set
# CONFIG_PIPES is not set
# CONFIG_PM is not set
# CONFIG_POWER is not set
# CONFIG_SENSORS is not set
# CONFIG_SERCOMM_CONSOLE is not set
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
# CONFIG_ARCH_HAVE_UART is not set
# CONFIG_ARCH_HAVE_UART0 is not set
# CONFIG_ARCH_HAVE_UART1 is not set
# CONFIG_ARCH_HAVE_UART2 is not set
# CONFIG_ARCH_HAVE_UART3 is not set
# CONFIG_ARCH_HAVE_UART4 is not set
# CONFIG_ARCH_HAVE_UART5 is not set
# CONFIG_ARCH_HAVE_UART6 is not set
# CONFIG_ARCH_HAVE_UART7 is not set
# CONFIG_ARCH_HAVE_UART8 is not set
# CONFIG_ARCH_HAVE_SCI0 is not set
# CONFIG_ARCH_HAVE_SCI1 is not set
# CONFIG_ARCH_HAVE_USART0 is not set
# CONFIG_ARCH_HAVE_USART1 is not set
# CONFIG_ARCH_HAVE_USART2 is not set
# CONFIG_ARCH_HAVE_USART3 is not set
# CONFIG_ARCH_HAVE_USART4 is not set
# CONFIG_ARCH_HAVE_USART5 is not set
CONFIG_ARCH_HAVE_USART6=y
# CONFIG_ARCH_HAVE_USART7 is not set
# CONFIG_ARCH_HAVE_USART8 is not set
# CONFIG_ARCH_HAVE_OTHER_UART is not set
#
# USART Configuration
#
CONFIG_USART6_ISUART=y
CONFIG_MCU_SERIAL=y
CONFIG_STANDARD_SERIAL=y
# CONFIG_SERIAL_IFLOWCONTROL is not set
# CONFIG_SERIAL_OFLOWCONTROL is not set
# CONFIG_SERIAL_DMA is not set
CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
CONFIG_USART6_SERIAL_CONSOLE=y
# CONFIG_OTHER_SERIAL_CONSOLE is not set
# CONFIG_NO_SERIAL_CONSOLE is not set
#
# USART6 Configuration
#
CONFIG_USART6_RXBUFSIZE=256
CONFIG_USART6_TXBUFSIZE=256
CONFIG_USART6_BAUD=115200
CONFIG_USART6_BITS=8
CONFIG_USART6_PARITY=0
CONFIG_USART6_2STOP=0
# CONFIG_USART6_IFLOWCONTROL is not set
# CONFIG_USART6_OFLOWCONTROL is not set
# CONFIG_USART6_DMA is not set
# CONFIG_USBDEV is not set
# CONFIG_USBHOST is not set
# CONFIG_DRIVERS_WIRELESS is not set
#
# System Logging Device Options
#
#
# System Logging
#
# CONFIG_RAMLOG is not set
# CONFIG_SYSLOG_CONSOLE is not set
#
# Networking Support
#
# CONFIG_ARCH_HAVE_NET is not set
# CONFIG_ARCH_HAVE_PHY is not set
# CONFIG_NET is not set
#
# Crypto API
#
# CONFIG_CRYPTO is not set
#
# File Systems
#
#
# File system configuration
#
# CONFIG_DISABLE_MOUNTPOINT is not set
# CONFIG_FS_AUTOMOUNTER is not set
# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
# CONFIG_FS_READABLE is not set
# CONFIG_FS_WRITABLE is not set
# CONFIG_FS_NAMED_SEMAPHORES is not set
CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
# CONFIG_FS_RAMMAP is not set
# CONFIG_FS_FAT is not set
# CONFIG_FS_NXFFS is not set
# CONFIG_FS_ROMFS is not set
# CONFIG_FS_TMPFS is not set
# CONFIG_FS_SMARTFS is not set
# CONFIG_FS_BINFS is not set
# CONFIG_FS_PROCFS is not set
# CONFIG_FS_UNIONFS is not set
#
# System Logging
#
# CONFIG_SYSLOG is not set
# CONFIG_SYSLOG_TIMESTAMP is not set
#
# Graphics Support
#
# CONFIG_NX is not set
#
# Memory Management
#
# CONFIG_MM_SMALL is not set
CONFIG_MM_REGIONS=2
# CONFIG_ARCH_HAVE_HEAP2 is not set
# CONFIG_GRAN is not set
#
# Audio Support
#
# CONFIG_AUDIO is not set
#
# Wireless Support
#
#
# Binary Loader
#
# CONFIG_BINFMT_DISABLE is not set
# CONFIG_BINFMT_EXEPATH is not set
# CONFIG_NXFLAT is not set
# CONFIG_ELF is not set
CONFIG_BUILTIN=y
# CONFIG_PIC is not set
# CONFIG_SYMTAB_ORDEREDBYNAME is not set
#
# Library Routines
#
#
# Standard C Library Options
#
CONFIG_STDIO_BUFFER_SIZE=64
CONFIG_STDIO_LINEBUFFER=y
CONFIG_NUNGET_CHARS=2
CONFIG_LIB_HOMEDIR="/"
# CONFIG_LIBM is not set
# CONFIG_NOPRINTF_FIELDWIDTH is not set
# CONFIG_LIBC_FLOATINGPOINT is not set
CONFIG_LIBC_LONG_LONG=y
# CONFIG_LIBC_IOCTL_VARIADIC is not set
CONFIG_LIB_RAND_ORDER=1
# CONFIG_EOL_IS_CR is not set
# CONFIG_EOL_IS_LF is not set
# CONFIG_EOL_IS_BOTH_CRLF is not set
CONFIG_EOL_IS_EITHER_CRLF=y
# CONFIG_LIBC_EXECFUNCS is not set
CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024
CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
# CONFIG_LIBC_STRERROR is not set
# CONFIG_LIBC_PERROR_STDOUT is not set
CONFIG_ARCH_LOWPUTC=y
# CONFIG_LIBC_LOCALTIME is not set
# CONFIG_TIME_EXTENDED is not set
CONFIG_LIB_SENDFILE_BUFSIZE=512
# CONFIG_ARCH_ROMGETC is not set
# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
CONFIG_ARCH_HAVE_TLS=y
# CONFIG_TLS is not set
# CONFIG_LIBC_NETDB is not set
#
# Non-standard Library Support
#
# CONFIG_LIB_KBDCODEC is not set
# CONFIG_LIB_SLCDCODEC is not set
#
# Basic CXX Support
#
# CONFIG_C99_BOOL8 is not set
CONFIG_HAVE_CXX=y
CONFIG_HAVE_CXXINITIALIZE=y
# CONFIG_CXX_NEWLONG is not set
#
# uClibc++ Standard C++ Library
#
# CONFIG_UCLIBCXX is not set
#
# Application Configuration
#
#
# Built-In Applications
#
CONFIG_BUILTIN_PROXY_STACKSIZE=1024
#
# CAN Utilities
#
#
# Examples
#
# CONFIG_EXAMPLES_BUTTONS is not set
# CONFIG_EXAMPLES_CHAT is not set
# CONFIG_EXAMPLES_CONFIGDATA is not set
# CONFIG_EXAMPLES_CPUHOG is not set
# CONFIG_EXAMPLES_CXXTEST is not set
# CONFIG_EXAMPLES_DHCPD is not set
# CONFIG_EXAMPLES_ELF is not set
# CONFIG_EXAMPLES_FTPC is not set
# CONFIG_EXAMPLES_FTPD is not set
# CONFIG_EXAMPLES_HELLO is not set
# CONFIG_EXAMPLES_HELLOXX is not set
# CONFIG_EXAMPLES_JSON is not set
# CONFIG_EXAMPLES_HIDKBD is not set
# CONFIG_EXAMPLES_KEYPADTEST is not set
# CONFIG_EXAMPLES_IGMP is not set
# CONFIG_EXAMPLES_MEDIA is not set
# CONFIG_EXAMPLES_MM is not set
# CONFIG_EXAMPLES_MODBUS is not set
# CONFIG_EXAMPLES_MOUNT is not set
# CONFIG_EXAMPLES_NRF24L01TERM is not set
CONFIG_EXAMPLES_NSH=y
# CONFIG_EXAMPLES_NSH_CXXINITIALIZE is not set
# CONFIG_EXAMPLES_NULL is not set
# CONFIG_EXAMPLES_NX is not set
# CONFIG_EXAMPLES_NXTERM is not set
# CONFIG_EXAMPLES_NXFFS is not set
# CONFIG_EXAMPLES_NXHELLO is not set
# CONFIG_EXAMPLES_NXIMAGE is not set
# CONFIG_EXAMPLES_NXLINES is not set
# CONFIG_EXAMPLES_NXTEXT is not set
# CONFIG_EXAMPLES_OSTEST is not set
# CONFIG_EXAMPLES_PCA9635 is not set
# CONFIG_EXAMPLES_PIPE is not set
# CONFIG_EXAMPLES_PPPD is not set
# CONFIG_EXAMPLES_POSIXSPAWN is not set
# CONFIG_EXAMPLES_RGBLED is not set
# CONFIG_EXAMPLES_RGMP is not set
# CONFIG_EXAMPLES_SENDMAIL is not set
# CONFIG_EXAMPLES_SERIALBLASTER is not set
# CONFIG_EXAMPLES_SERIALRX is not set
# CONFIG_EXAMPLES_SERLOOP is not set
# CONFIG_EXAMPLES_SLCD is not set
# CONFIG_EXAMPLES_SMART_TEST is not set
# CONFIG_EXAMPLES_SMART is not set
# CONFIG_EXAMPLES_SMP is not set
# CONFIG_EXAMPLES_TCPECHO is not set
# CONFIG_EXAMPLES_TELNETD is not set
# CONFIG_EXAMPLES_TIFF is not set
# CONFIG_EXAMPLES_TOUCHSCREEN is not set
# CONFIG_EXAMPLES_WEBSERVER is not set
# CONFIG_EXAMPLES_USBTERM is not set
# CONFIG_EXAMPLES_WATCHDOG is not set
#
# File System Utilities
#
# CONFIG_FSUTILS_INIFILE is not set
#
# GPS Utilities
#
# CONFIG_GPSUTILS_MINMEA_LIB is not set
#
# Graphics Support
#
# CONFIG_TIFF is not set
# CONFIG_GRAPHICS_TRAVELER is not set
#
# Interpreters
#
# CONFIG_INTERPRETERS_FICL is not set
# CONFIG_INTERPRETERS_PCODE is not set
# CONFIG_INTERPRETERS_MICROPYTHON is not set
#
# FreeModBus
#
# CONFIG_MODBUS is not set
#
# Network Utilities
#
# CONFIG_NETUTILS_CODECS is not set
# CONFIG_NETUTILS_FTPC is not set
# CONFIG_NETUTILS_JSON is not set
# CONFIG_NETUTILS_SMTP is not set
#
# NSH Library
#
CONFIG_NSH_LIBRARY=y
# CONFIG_NSH_MOTD is not set
#
# Command Line Configuration
#
CONFIG_NSH_READLINE=y
# CONFIG_NSH_CLE is not set
CONFIG_NSH_LINELEN=64
# CONFIG_NSH_DISABLE_SEMICOLON is not set
CONFIG_NSH_CMDPARMS=y
CONFIG_NSH_MAXARGUMENTS=6
CONFIG_NSH_ARGCAT=y
CONFIG_NSH_NESTDEPTH=3
# CONFIG_NSH_DISABLEBG is not set
CONFIG_NSH_BUILTIN_APPS=y
#
# Disable Individual commands
#
# CONFIG_NSH_DISABLE_ADDROUTE is not set
# CONFIG_NSH_DISABLE_BASENAME is not set
# CONFIG_NSH_DISABLE_CAT is not set
# CONFIG_NSH_DISABLE_CD is not set
# CONFIG_NSH_DISABLE_CP is not set
# CONFIG_NSH_DISABLE_CMP is not set
CONFIG_NSH_DISABLE_DATE=y
# CONFIG_NSH_DISABLE_DD is not set
# CONFIG_NSH_DISABLE_DF is not set
# CONFIG_NSH_DISABLE_DELROUTE is not set
# CONFIG_NSH_DISABLE_DIRNAME is not set
# CONFIG_NSH_DISABLE_ECHO is not set
# CONFIG_NSH_DISABLE_EXEC is not set
# CONFIG_NSH_DISABLE_EXIT is not set
# CONFIG_NSH_DISABLE_FREE is not set
# CONFIG_NSH_DISABLE_GET is not set
# CONFIG_NSH_DISABLE_HELP is not set
# CONFIG_NSH_DISABLE_HEXDUMP is not set
# CONFIG_NSH_DISABLE_IFCONFIG is not set
CONFIG_NSH_DISABLE_IFUPDOWN=y
# CONFIG_NSH_DISABLE_KILL is not set
# CONFIG_NSH_DISABLE_LOSETUP is not set
CONFIG_NSH_DISABLE_LOSMART=y
# CONFIG_NSH_DISABLE_LS is not set
# CONFIG_NSH_DISABLE_MB is not set
# CONFIG_NSH_DISABLE_MKDIR is not set
# CONFIG_NSH_DISABLE_MKFIFO is not set
# CONFIG_NSH_DISABLE_MKRD is not set
# CONFIG_NSH_DISABLE_MH is not set
# CONFIG_NSH_DISABLE_MOUNT is not set
# CONFIG_NSH_DISABLE_MV is not set
# CONFIG_NSH_DISABLE_MW is not set
# CONFIG_NSH_DISABLE_PS is not set
# CONFIG_NSH_DISABLE_PUT is not set
# CONFIG_NSH_DISABLE_PWD is not set
# CONFIG_NSH_DISABLE_RM is not set
# CONFIG_NSH_DISABLE_RMDIR is not set
# CONFIG_NSH_DISABLE_SET is not set
# CONFIG_NSH_DISABLE_SH is not set
# CONFIG_NSH_DISABLE_SLEEP is not set
# CONFIG_NSH_DISABLE_TIME is not set
# CONFIG_NSH_DISABLE_TEST is not set
# CONFIG_NSH_DISABLE_UMOUNT is not set
# CONFIG_NSH_DISABLE_UNAME is not set
# CONFIG_NSH_DISABLE_UNSET is not set
# CONFIG_NSH_DISABLE_USLEEP is not set
# CONFIG_NSH_DISABLE_WGET is not set
# CONFIG_NSH_DISABLE_XD is not set
#
# Configure Command Options
#
CONFIG_NSH_CMDOPT_DF_H=y
CONFIG_NSH_CODECS_BUFSIZE=128
CONFIG_NSH_CMDOPT_HEXDUMP=y
CONFIG_NSH_FILEIOSIZE=512
#
# Scripting Support
#
# CONFIG_NSH_DISABLESCRIPT is not set
# CONFIG_NSH_DISABLE_ITEF is not set
# CONFIG_NSH_DISABLE_LOOPS is not set
#
# Console Configuration
#
CONFIG_NSH_CONSOLE=y
# CONFIG_NSH_ALTCONDEV is not set
# CONFIG_NSH_ARCHINIT is not set
# CONFIG_NSH_LOGIN is not set
# CONFIG_NSH_CONSOLE_LOGIN is not set
#
# NxWidgets/NxWM
#
#
# Platform-specific Support
#
# CONFIG_PLATFORM_CONFIGDATA is not set
#
# System Libraries and NSH Add-Ons
#
# CONFIG_SYSTEM_FREE is not set
# CONFIG_SYSTEM_CLE is not set
# CONFIG_SYSTEM_CUTERM is not set
# CONFIG_SYSTEM_INSTALL is not set
# CONFIG_SYSTEM_HEX2BIN is not set
# CONFIG_SYSTEM_HEXED is not set
# CONFIG_SYSTEM_RAMTEST is not set
CONFIG_READLINE_HAVE_EXTMATCH=y
CONFIG_SYSTEM_READLINE=y
CONFIG_READLINE_ECHO=y
# CONFIG_READLINE_TABCOMPLETION is not set
# CONFIG_READLINE_CMD_HISTORY is not set
# CONFIG_SYSTEM_SUDOKU is not set
# CONFIG_SYSTEM_VI is not set
# CONFIG_SYSTEM_UBLOXMODEM is not set
# CONFIG_SYSTEM_ZMODEM is not set

77
configs/nucleo-144/nsh/setenv.sh Normal file
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@ -0,0 +1,77 @@
#!/bin/bash
# configs/nucleo-144/nsh/setenv.sh
#
# Copyright (C) 2016 Gregory Nutt. All rights reserved.
# Author: Gregory Nutt <gnutt@nuttx.org>
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# 1. Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in
# the documentation and/or other materials provided with the
# distribution.
# 3. Neither the name NuttX nor the names of its contributors may be
# used to endorse or promote products derived from this software
# without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
if [ "$_" = "$0" ] ; then
echo "You must source this script, not run it!" 1>&2
exit 1
fi
WD=`pwd`
if [ ! -x "setenv.sh" ]; then
echo "This script must be executed from the top-level NuttX build directory"
exit 1
fi
if [ -z "${PATH_ORIG}" ]; then
export PATH_ORIG="${PATH}"
fi
# This is the Cygwin path to the location where I installed the Atmel GCC
# toolchain under Windows. You will also have to edit this if you install
# this toolchain in any other location
#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atmel/Atmel Toolchain/ARM GCC/Native/4.7.3.99/arm-gnu-toolchain/bin"
# This is the Cygwin path to the location where I installed the CodeSourcery
# toolchain under windows. You will also have to edit this if you install
# the CodeSourcery toolchain in any other location
#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin"
#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
# export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors"
# You can this free toolchain here https://launchpad.net/gcc-arm-embedded
export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin"
# This is the path to the location where I installed the devkitARM toolchain
# You can get this free toolchain from http://devkitpro.org/ or http://sourceforge.net/projects/devkitpro/
#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/devkitARM/bin"
# This is the Cygwin path to the location where I build the buildroot
# toolchain.
# export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin"
# Add the path to the toolchain to the PATH varialble
export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}"
echo "PATH : ${PATH}"

147
configs/nucleo-144/scripts/flash.ld Normal file
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@ -0,0 +1,147 @@
/****************************************************************************
* configs/nucleo-144/scripts/flash.ld
*
* Copyright (C) 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Modified 11/4/2013 for STM32F429 support
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/* The STM32F746NGH6 has 1024Kb of main FLASH memory. This FLASH memory can
* be accessed from either the AXIM interface at address 0x0800:0000 or from
* the ITCM interface at address 0x0020:0000.
*
* Additional information, including the option bytes, is available at at
* FLASH at address 0x1ff0:0000 (AXIM) or 0x0010:0000 (ITCM).
*
* In the STM32F746NGH6, two different boot spaces can be selected through
* the BOOT pin and the boot base address programmed in the BOOT_ADD0 and
* BOOT_ADD1 option bytes:
*
* 1) BOOT=0: Boot address defined by user option byte BOOT_ADD0[15:0].
* ST programmed value: Flash on ITCM at 0x0020:0000
* 2) BOOT=1: Boot address defined by user option byte BOOT_ADD1[15:0].
* ST programmed value: System bootloader at 0x0010:0000
*
* NuttX does not modify these option byes. On the unmodified STM32F746G
* DISCO board, the BOOT0 pin is at ground so by default, the STM32 will boot
* to address 0x0020:0000 in ITCM FLASH.
*
* The STM32F746NGH6 also has 320Kb of data SRAM (in addition to ITCM SRAM).
* SRAM is split up into three blocks:
*
* 1) 64Kb of DTCM SRM beginning at address 0x2000:0000
* 2) 240Kb of SRAM1 beginning at address 0x2001:0000
* 3) 16Kb of SRAM2 beginning at address 0x2004:c000
*
* When booting from FLASH, FLASH memory is aliased to address 0x0000:0000
* where the code expects to begin execution by jumping to the entry point in
* the 0x0800:0000 address range.
*/
MEMORY
{
itcm (rwx) : ORIGIN = 0x00200000, LENGTH = 1024K
flash (rx) : ORIGIN = 0x08000000, LENGTH = 1024K
dtcm (rwx) : ORIGIN = 0x20000000, LENGTH = 64K
sram1 (rwx) : ORIGIN = 0x20010000, LENGTH = 240K
sram2 (rwx) : ORIGIN = 0x2004c000, LENGTH = 16K
}
OUTPUT_ARCH(arm)
EXTERN(_vectors)
ENTRY(_stext)
SECTIONS
{
.text : {
_stext = ABSOLUTE(.);
*(.vectors)
*(.text .text.*)
*(.fixup)
*(.gnu.warning)
*(.rodata .rodata.*)
*(.gnu.linkonce.t.*)
*(.glue_7)
*(.glue_7t)
*(.got)
*(.gcc_except_table)
*(.gnu.linkonce.r.*)
_etext = ABSOLUTE(.);
} > flash
.init_section : {
_sinit = ABSOLUTE(.);
*(.init_array .init_array.*)
_einit = ABSOLUTE(.);
} > flash
.ARM.extab : {
*(.ARM.extab*)
} > flash
__exidx_start = ABSOLUTE(.);
.ARM.exidx : {
*(.ARM.exidx*)
} > flash
__exidx_end = ABSOLUTE(.);
_eronly = ABSOLUTE(.);
.data : {
_sdata = ABSOLUTE(.);
*(.data .data.*)
*(.gnu.linkonce.d.*)
CONSTRUCTORS
_edata = ABSOLUTE(.);
} > sram1 AT > flash
.bss : {
_sbss = ABSOLUTE(.);
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
_ebss = ABSOLUTE(.);
} > sram1
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_info 0 : { *(.debug_info) }
.debug_line 0 : { *(.debug_line) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_aranges 0 : { *(.debug_aranges) }
}

109
configs/nucleo-144/scripts/kernel-space.ld Normal file
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@ -0,0 +1,109 @@
/****************************************************************************
* configs/nucleo-144/scripts/kernel-space.ld
*
* Copyright (C) 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/* NOTE: This depends on the memory.ld script having been included prior to
* this script.
*/
OUTPUT_ARCH(arm)
ENTRY(_stext)
SECTIONS
{
.text : {
_stext = ABSOLUTE(.);
*(.vectors)
*(.text .text.*)
*(.fixup)
*(.gnu.warning)
*(.rodata .rodata.*)
*(.gnu.linkonce.t.*)
*(.glue_7)
*(.glue_7t)
*(.got)
*(.gcc_except_table)
*(.gnu.linkonce.r.*)
_etext = ABSOLUTE(.);
} > kflash
.init_section : {
_sinit = ABSOLUTE(.);
*(.init_array .init_array.*)
_einit = ABSOLUTE(.);
} > kflash
.ARM.extab : {
*(.ARM.extab*)
} > kflash
__exidx_start = ABSOLUTE(.);
.ARM.exidx : {
*(.ARM.exidx*)
} > kflash
__exidx_end = ABSOLUTE(.);
_eronly = ABSOLUTE(.);
.data : {
_sdata = ABSOLUTE(.);
*(.data .data.*)
*(.gnu.linkonce.d.*)
CONSTRUCTORS
_edata = ABSOLUTE(.);
} > ksram AT > kflash
.bss : {
_sbss = ABSOLUTE(.);
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
_ebss = ABSOLUTE(.);
} > ksram
/* Stabs debugging sections */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_info 0 : { *(.debug_info) }
.debug_line 0 : { *(.debug_line) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_aranges 0 : { *(.debug_aranges) }
}

129
configs/nucleo-144/scripts/memory.ld Normal file
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@ -0,0 +1,129 @@
/****************************************************************************
* configs/nucleo-144/scripts/memory.ld
*
* Copyright (C) 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/* The STM32F746NGH6 has 1024Kb of main FLASH memory. This FLASH memory can
* be accessed from either the AXIM interface at address 0x0800:0000 or from
* the ITCM interface at address 0x0020:0000.
*
* Additional information, including the option bytes, is available at at
* FLASH at address 0x1ff0:0000 (AXIM) or 0x0010:0000 (ITCM).
*
* In the STM32F746NGH6, two different boot spaces can be selected through
* the BOOT pin and the boot base address programmed in the BOOT_ADD0 and
* BOOT_ADD1 option bytes:
*
* 1) BOOT=0: Boot address defined by user option byte BOOT_ADD0[15:0].
* ST programmed value: Flash on ITCM at 0x0020:0000
* 2) BOOT=1: Boot address defined by user option byte BOOT_ADD1[15:0].
* ST programmed value: System bootloader at 0x0010:0000
*
* NuttX does not modify these option byes. On the unmodified STM32F746G
* DISCO board, the BOOT0 pin is at ground so by default, the STM32 will boot
* to address 0x0020:0000 in ITCM FLASH.
*
* The STM32F746NGH6 also has 320Kb of data SRAM (in addition to ITCM SRAM).
* SRAM is split up into three blocks:
*
* 1) 64Kb of DTCM SRM beginning at address 0x2000:0000
* 2) 240Kb of SRAM1 beginning at address 0x2001:0000
* 3) 16Kb of SRAM2 beginning at address 0x2004:c000
*
* When booting from FLASH, FLASH memory is aliased to address 0x0000:0000
* where the code expects to begin execution by jumping to the entry point in
* the 0x0800:0000 address range.
*
* For MPU support, the kernel-mode NuttX section is assumed to be 128Kb of
* FLASH and 4Kb of SRAM. That is an excessive amount for the kernel which
* should fit into 64KB and, of course, can be optimized as needed (See
* also configs/stm32f746g-disco/scripts/kernel-space.ld). Allowing the
* additional does permit addition debug instrumentation to be added to the
* kernel space without overflowing the partition.
*
* Alignment of the user space FLASH partition is also a critical factor:
* The user space FLASH partition will be spanned with a single region of
* size 2**n bytes. The alignment of the user-space region must be the same.
* As a consequence, as the user-space increases in size, the alignment
* requirement also increases.
*
* This alignment requirement means that the largest user space FLASH region
* you can have will be 512KB at it would have to be positioned at
* 0x08800000. If you change this address, don't forget to change the
* CONFIG_NUTTX_USERSPACE configuration setting to match and to modify
* the check in kernel/userspace.c.
*
* For the same reasons, the maximum size of the SRAM mapping is limited to
* 4KB. Both of these alignment limitations could be reduced by using
* multiple regions to map the FLASH/SDRAM range or perhaps with some
* clever use of subregions.
*
* A detailed memory map for the 112KB SRAM region is as follows:
*
* 0x20001 0000: Kernel .data region. Typical size: 0.1KB
* ------- ---- Kernel .bss region. Typical size: 1.8KB
* 0x20001 0800: Kernel IDLE thread stack (approximate). Size is
* determined by CONFIG_IDLETHREAD_STACKSIZE and
* adjustments for alignment. Typical is 1KB.
* ------- ---- Padded to 4KB
* 0x20001 1000: User .data region. Size is variable.
* ------- ---- User .bss region Size is variable.
* 0x20001 2000: Beginning of kernel heap. Size determined by
* CONFIG_MM_KERNEL_HEAPSIZE.
* ------- ---- Beginning of user heap. Can vary with other settings.
* 0x20004 c000: End+1 of SRAM1
*/
MEMORY
{
/* ITCM boot address */
itcm (rwx) : ORIGIN = 0x00200000, LENGTH = 1024K
/* 1024KB FLASH */
kflash (rx) : ORIGIN = 0x08000000, LENGTH = 128K
uflash (rx) : ORIGIN = 0x08020000, LENGTH = 128K
xflash (rx) : ORIGIN = 0x08040000, LENGTH = 768K
/* 240KB of contiguous SRAM1 */
ksram (rwx) : ORIGIN = 0x20010000, LENGTH = 4K
usram (rwx) : ORIGIN = 0x20011000, LENGTH = 4K
xsram (rwx) : ORIGIN = 0x20012000, LENGTH = 240K - 8K
/* DTCM SRAM */
dtcm (rwx) : ORIGIN = 0x20000000, LENGTH = 64K
sram2 (rwx) : ORIGIN = 0x2004c000, LENGTH = 16K
}

111
configs/nucleo-144/scripts/user-space.ld Normal file
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@ -0,0 +1,111 @@
/****************************************************************************
* configs/nucleo-144/scripts/user-space.ld
*
* Copyright (C) 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/* NOTE: This depends on the memory.ld script having been included prior to
* this script.
*/
OUTPUT_ARCH(arm)
SECTIONS
{
.userspace : {
*(.userspace)
} > uflash
.text : {
_stext = ABSOLUTE(.);
*(.text .text.*)
*(.fixup)
*(.gnu.warning)
*(.rodata .rodata.*)
*(.gnu.linkonce.t.*)
*(.glue_7)
*(.glue_7t)
*(.got)
*(.gcc_except_table)
*(.gnu.linkonce.r.*)
_etext = ABSOLUTE(.);
} > uflash
.init_section : {
_sinit = ABSOLUTE(.);
*(.init_array .init_array.*)
_einit = ABSOLUTE(.);
} > uflash
.ARM.extab : {
*(.ARM.extab*)
} > uflash
__exidx_start = ABSOLUTE(.);
.ARM.exidx : {
*(.ARM.exidx*)
} > uflash
__exidx_end = ABSOLUTE(.);
_eronly = ABSOLUTE(.);
.data : {
_sdata = ABSOLUTE(.);
*(.data .data.*)
*(.gnu.linkonce.d.*)
CONSTRUCTORS
_edata = ABSOLUTE(.);
} > usram AT > uflash
.bss : {
_sbss = ABSOLUTE(.);
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
_ebss = ABSOLUTE(.);
} > usram
/* Stabs debugging sections */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_info 0 : { *(.debug_info) }
.debug_line 0 : { *(.debug_line) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_aranges 0 : { *(.debug_aranges) }
}

2
configs/nucleo-144/src/.gitignore vendored Normal file
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@ -0,0 +1,2 @@
/.depend
/Make.dep

55
configs/nucleo-144/src/Makefile Normal file
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@ -0,0 +1,55 @@
############################################################################
# configs/nucleo-144/src/Makefile
#
# Copyright (C) 2015 Gregory Nutt. All rights reserved.
# Author: Gregory Nutt <gnutt@nuttx.org>
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# 1. Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in
# the documentation and/or other materials provided with the
# distribution.
# 3. Neither the name NuttX nor the names of its contributors may be
# used to endorse or promote products derived from this software
# without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
############################################################################
-include $(TOPDIR)/Make.defs
ASRCS =
CSRCS = stm32_boot.c stm32_spi.c
ifeq ($(CONFIG_ARCH_LEDS),y)
CSRCS += stm32_autoleds.c
else
CSRCS += stm32_userleds.c
endif
ifeq ($(CONFIG_ARCH_BUTTONS),y)
CSRCS += stm32_buttons.c
endif
ifeq ($(CONFIG_LIB_BOARDCTL),y)
CSRCS += stm32_appinitialize.c
endif
include $(TOPDIR)/configs/Board.mk

100
configs/nucleo-144/src/nucleo-144.h Normal file
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@ -0,0 +1,100 @@
/****************************************************************************************************
* configs/nucleo-144/src/nucleo-144.h
*
* Copyright (C) 2016 Gregory Nutt. All rights reserved.
* Authors: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************************************/
#ifndef __CONFIGS_NUCLEO_144_SRC_NUCLEO_144_H
#define __CONFIGS_NUCLEO_144_SRC_NUCLEO_144_H
/****************************************************************************************************
* Included Files
****************************************************************************************************/
#include <nuttx/config.h>
#include <nuttx/compiler.h>
#include <stdint.h>
/****************************************************************************************************
* Pre-processor Definitions
****************************************************************************************************/
/* procfs File System */
#ifdef CONFIG_FS_PROCFS
# ifdef CONFIG_NSH_PROC_MOUNTPOINT
# define STM32_PROCFS_MOUNTPOINT CONFIG_NSH_PROC_MOUNTPOINT
# else
# define STM32_PROCFS_MOUNTPOINT "/proc"
# endif
#endif
/* STM32F736G Discovery GPIOs ***********************************************************************/
/* The STM32F746G-DISCO board has numerous LEDs but only one, LD1 located near the reset button, that
* can be controlled by software (LD2 is a power indicator, LD3-6 indicate USB status, LD7 is
* controlled by the ST-Link).
*
* LD1 is controlled by PI1 which is also the SPI2_SCK at the Arduino interface. One end of LD1 is
* grounded so a high output on PI1 will illuminate the LED.
*/
#define GPIO_LD1 (GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_50MHz | GPIO_OUTPUT_CLEAR | \
GPIO_PORTI | GPIO_PIN1)
/* Pushbutton B1, labelled "User", is connected to GPIO PI11. A high value will be sensed when the
* button is depressed. Note that the EXTI interrupt is configured.
*/
#define GPIO_BTN_USER (GPIO_INPUT | GPIO_FLOAT | GPIO_EXTI | GPIO_PORTI | GPIO_PIN11)
/****************************************************************************************************
* Public data
****************************************************************************************************/
#ifndef __ASSEMBLY__
/****************************************************************************************************
* Public Functions
****************************************************************************************************/
/****************************************************************************************************
* Name: stm32_spidev_initialize
*
* Description:
* Called to configure SPI chip select GPIO pins for the stm32f746g-disco board.
*
****************************************************************************************************/
void weak_function stm32_spidev_initialize(void);
#endif /* __ASSEMBLY__ */
#endif /* __CONFIGS_NUCLEO_144_SRC_NUCLEO_144_H */

53
arch/arm/src/imx6/imx_cpuinit.c → configs/nucleo-144/src/stm32_appinitialize.c
View file

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/imx6/imx_clockconfig.c
* config/nucleo-144/src/stm32_appinitilaize.c
*
* Copyright (C) 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -39,40 +39,49 @@
#include <nuttx/config.h>
#include <nuttx/arch.h>
#include "stm32_ccm.h"
#include "nucleo-144.h"
#include "gic.h"
#ifdef CONFIG_SMP
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: up_cpu_initialize
* Name: board_app_initialize
*
* Description:
* After the CPU has been started (via up_cpu_start()) the system will
* call back into the architecture-specific code with this function on the
* thread of execution of the newly started CPU. This gives the
* architecture-specific a chance to perform ny initial, CPU-specific
* initialize on that thread.
*
* Input Parameters:
* None
*
* Returned Value:
* Zero on success; a negated errno value on failure.
* Perform application specific initialization. This function is never
* called directly from application code, but only indirectly via the
* (non-standard) boardctl() interface using the command BOARDIOC_INIT.
*
****************************************************************************/
int up_cpu_initialize(void)
int board_app_initialize(void)
{
/* Initialize the Generic Interrupt Controller (GIC) for CPUn (n != 0) */
#ifdef CONFIG_FS_PROCFS
int ret;
#ifdef CONFIG_STM32_CCM_PROCFS
/* Register the CCM procfs entry. This must be done before the procfs is
* mounted.
*/
(void)ccm_procfs_register();
#endif
/* Mount the procfs file system */
ret = mount(NULL, SAMV71_PROCFS_MOUNTPOINT, "procfs", 0, NULL);
if (ret < 0)
{
SYSLOG("ERROR: Failed to mount procfs at %s: %d\n",
SAMV71_PROCFS_MOUNTPOINT, ret);
}
#endif
arm_gic_initialize();
return OK;
}
#endif /* CONFIG_SMP */

144
configs/nucleo-144/src/stm32_autoleds.c Normal file
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@ -0,0 +1,144 @@
/****************************************************************************
* configs/nucleo-144/src/stm32_autoleds.c
*
* Copyright (C) 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdbool.h>
#include <debug.h>
#include <nuttx/board.h>
#include "stm32_gpio.h"
#include "nucleo-144.h"
#ifdef CONFIG_ARCH_LEDS
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
* with CONFIG_DEBUG_VERBOSE too)
*/
#ifdef CONFIG_DEBUG_LEDS
# define leddbg lldbg
# define ledvdbg llvdbg
#else
# define leddbg(x...)
# define ledvdbg(x...)
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_autoled_initialize
****************************************************************************/
void board_autoled_initialize(void)
{
/* Configure the LD1 GPIO for output. Initial state is OFF */
stm32_configgpio(GPIO_LD1);
}
/****************************************************************************
* Name: board_autoled_on
****************************************************************************/
void board_autoled_on(int led)
{
bool ledstate = false;
switch (led)
{
case 0: /* LED_STARTED: NuttX has been started STATUS LED=OFF */
/* LED_HEAPALLOCATE: Heap has been allocated STATUS LED=OFF */
/* LED_IRQSENABLED: Interrupts enabled STATUS LED=OFF */
break; /* Leave ledstate == true to turn OFF */
default:
case 2: /* LED_INIRQ: In an interrupt STATUS LED=N/C */
/* LED_SIGNAL: In a signal handler STATUS LED=N/C */
/* LED_ASSERTION: An assertion failed STATUS LED=N/C */
return; /* Return to leave STATUS LED unchanged */
case 3: /* LED_PANIC: The system has crashed STATUS LED=FLASH */
case 1: /* LED_STACKCREATED: Idle stack created STATUS LED=ON */
ledstate = true; /* Set ledstate == false to turn ON */
break;
}
stm32_gpiowrite(GPIO_LD1, ledstate);
}
/****************************************************************************
* Name: board_autoled_off
****************************************************************************/
void board_autoled_off(int led)
{
switch (led)
{
/* These should not happen and are ignored */
default:
case 0: /* LED_STARTED: NuttX has been started STATUS LED=OFF */
/* LED_HEAPALLOCATE: Heap has been allocated STATUS LED=OFF */
/* LED_IRQSENABLED: Interrupts enabled STATUS LED=OFF */
case 1: /* LED_STACKCREATED: Idle stack created STATUS LED=ON */
/* These result in no-change */
case 2: /* LED_INIRQ: In an interrupt STATUS LED=N/C */
/* LED_SIGNAL: In a signal handler STATUS LED=N/C */
/* LED_ASSERTION: An assertion failed STATUS LED=N/C */
return; /* Return to leave STATUS LED unchanged */
/* Turn STATUS LED off set driving the output high */
case 3: /* LED_PANIC: The system has crashed STATUS LED=FLASH */
stm32_gpiowrite(GPIO_LD1, false);
break;
}
}
#endif /* CONFIG_ARCH_LEDS */

119
configs/nucleo-144/src/stm32_boot.c Normal file
View file

@ -0,0 +1,119 @@
/************************************************************************************
* configs/nucleo-144/src/stm32_boot.c
*
* Copyright (C) 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#include <debug.h>
#include <nuttx/board.h>
#include <arch/board/board.h>
#include "up_arch.h"
#include "nucleo-144.h"
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/************************************************************************************
* Private Functions
************************************************************************************/
/************************************************************************************
* Public Functions
************************************************************************************/
/************************************************************************************
* Name: stm32_boardinitialize
*
* Description:
* All STM32 architectures must provide the following entry point. This entry point
* is called early in the initialization -- after all memory has been configured
* and mapped but before any devices have been initialized.
*
************************************************************************************/
void stm32_boardinitialize(void)
{
#if defined(CONFIG_STM32F7_SPI1) || defined(CONFIG_STM32F7_SPI2) || \
defined(CONFIG_STM32F7_SPI3) || defined(CONFIG_STM32F7_SPI4) || \
defined(CONFIG_STM32F7_SPI5)
/* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak function
* stm32_spidev_initialize() has been brought into the link.
*/
if (stm32_spidev_initialize)
{
stm32_spidev_initialize();
}
#endif
#ifdef CONFIG_ARCH_LEDS
/* Configure on-board LEDs if LED support has been selected. */
board_autoled_initialize();
#endif
}
/************************************************************************************
* Name: board_initialize
*
* Description:
* If CONFIG_BOARD_INITIALIZE is selected, then an additional initialization call
* will be performed in the boot-up sequence to a function called
* board_initialize(). board_initialize() will be called immediately after
* up_initialize() is called and just before the initial application is started.
* This additional initialization phase may be used, for example, to initialize
* board-specific device drivers.
*
************************************************************************************/
#ifdef CONFIG_BOARD_INITIALIZE
void board_initialize(void)
{
#if defined(CONFIG_NSH_LIBRARY) && !defined(CONFIG_LIB_BOARDCTL)
/* Perform NSH initialization here instead of from the NSH. This
* alternative NSH initialization is necessary when NSH is ran in user-space
* but the initialization function must run in kernel space.
*/
(void)board_app_initialize();
#endif
}
#endif

112
configs/nucleo-144/src/stm32_buttons.c Normal file
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@ -0,0 +1,112 @@
/****************************************************************************
* configs/nucleo-144/src/stm32_buttons.c
*
* Copyright (C) 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/irq.h>
#include <nuttx/board.h>
#include "stm32_gpio.h"
#include "nucleo-144.h"
#ifdef CONFIG_ARCH_BUTTONS
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_button_initialize
*
* Description:
* board_button_initialize() must be called to initialize button resources.
* After that, board_buttons() may be called to collect the current state
* of all buttons or board_button_irq() may be called to register button
* interrupt handlers.
*
****************************************************************************/
void board_button_initialize(void)
{
stm32_configgpio(GPIO_BTN_USER);
}
/****************************************************************************
* Name: board_buttons
****************************************************************************/
uint8_t board_buttons(void)
{
return stm32_gpioread(GPIO_BTN_USER) ? 1 : 0;
}
/************************************************************************************
* Button support.
*
* Description:
* board_button_initialize() must be called to initialize button resources. After
* that, board_buttons() may be called to collect the current state of all
* buttons or board_button_irq() may be called to register button interrupt
* handlers.
*
* After board_button_initialize() has been called, board_buttons() may be called to
* collect the state of all buttons. board_buttons() returns an 8-bit bit set
* with each bit associated with a button. See the BUTTON_*_BIT
* definitions in board.h for the meaning of each bit.
*
* board_button_irq() may be called to register an interrupt handler that will
* be called when a button is depressed or released. The ID value is a
* button enumeration value that uniquely identifies a button resource. See the
* BUTTON_* definitions in board.h for the meaning of enumeration
* value. The previous interrupt handler address is returned (so that it may
* restored, if so desired).
*
************************************************************************************/
#ifdef CONFIG_ARCH_IRQBUTTONS
xcpt_t board_button_irq(int id, xcpt_t irqhandler)
{
#warning Missing logic
}
#endif
#endif /* CONFIG_ARCH_BUTTONS */

246
configs/nucleo-144/src/stm32_spi.c Normal file
View file

@ -0,0 +1,246 @@
/************************************************************************************
* configs/nucleo-144/src/stm32_spi.c
*
* Copyright (C) 2016 Gregory Nutt. All rights reserved.
* Authors: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <stdbool.h>
#include <errno.h>
#include <debug.h>
#include <nuttx/spi/spi.h>
#include <arch/board/board.h>
#include "up_arch.h"
#include "chip.h"
#include "stm32_spi.h"
#include "nucleo-144.h"
#if defined(CONFIG_STM32F7_SPI1) || defined(CONFIG_STM32F7_SPI2) || \
defined(CONFIG_STM32F7_SPI3) || defined(CONFIG_STM32F7_SPI4) || \
defined(CONFIG_STM32F7_SPI5)
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
#ifdef CONFIG_DEBUG_SPI
# define spidbg lldbg
# ifdef SPI_VERBOSE
# define spivdbg lldbg
# else
# define spivdbg(x...)
# endif
#else
# undef SPI_VERBOSE
# define spidbg(x...)
# define spivdbg(x...)
#endif
/************************************************************************************
* Private Data
************************************************************************************/
/************************************************************************************
* Private Functions
************************************************************************************/
/************************************************************************************
* Public Functions
************************************************************************************/
/************************************************************************************
* Name: stm32_spidev_initialize
*
* Description:
* Called to configure SPI chip select GPIO pins for the stm32f746g-disco board.
*
************************************************************************************/
void weak_function stm32_spidev_initialize(void)
{
}
/****************************************************************************
* Name: stm32_spi1/2/3/4/5select and stm32_spi1/2/3/4/5status
*
* Description:
* The external functions, stm32_spi1/2/3select and stm32_spi1/2/3status must be
* provided by board-specific logic. They are implementations of the select
* and status methods of the SPI interface defined by struct spi_ops_s (see
* include/nuttx/spi/spi.h). All other methods (including stm32_spibus_initialize())
* are provided by common STM32 logic. To use this common SPI logic on your
* board:
*
* 1. Provide logic in stm32_boardinitialize() to configure SPI chip select
* pins.
* 2. Provide stm32_spi1/2/3select() and stm32_spi1/2/3status() functions in your
* board-specific logic. These functions will perform chip selection and
* status operations using GPIOs in the way your board is configured.
* 3. Add a calls to stm32_spibus_initialize() in your low level application
* initialization logic
* 4. The handle returned by stm32_spibus_initialize() may then be used to bind the
* SPI driver to higher level logic (e.g., calling
* mmcsd_spislotinitialize(), for example, will bind the SPI driver to
* the SPI MMC/SD driver).
*
****************************************************************************/
#ifdef CONFIG_STM32F7_SPI1
void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
{
spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
}
uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
{
return 0;
}
#endif
#ifdef CONFIG_STM32F7_SPI2
void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
{
spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
}
uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
{
return 0;
}
#endif
#ifdef CONFIG_STM32F7_SPI3
void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
{
spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
}
uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
{
return 0;
}
#endif
#ifdef CONFIG_STM32F7_SPI4
void stm32_spi4select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
{
spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
}
uint8_t stm32_spi4status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
{
return 0;
}
#endif
#ifdef CONFIG_STM32F7_SPI5
void stm32_spi5select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
{
spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
}
uint8_t stm32_spi5status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
{
return 0;
}
#endif
/****************************************************************************
* Name: stm32_spi1cmddata
*
* Description:
* Set or clear the SH1101A A0 or SD1306 D/C n bit to select data (true)
* or command (false). This function must be provided by platform-specific
* logic. This is an implementation of the cmddata method of the SPI
* interface defined by struct spi_ops_s (see include/nuttx/spi/spi.h).
*
* Input Parameters:
*
* spi - SPI device that controls the bus the device that requires the CMD/
* DATA selection.
* devid - If there are multiple devices on the bus, this selects which one
* to select cmd or data. NOTE: This design restricts, for example,
* one one SPI display per SPI bus.
* cmd - true: select command; false: select data
*
* Returned Value:
* None
*
****************************************************************************/
#ifdef CONFIG_SPI_CMDDATA
#ifdef CONFIG_STM32F7_SPI1
int stm32_spi1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd)
{
return -ENODEV;
}
#endif
#ifdef CONFIG_STM32F7_SPI2
int stm32_spi2cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd)
{
return -ENODEV;
}
#endif
#ifdef CONFIG_STM32F7_SPI3
int stm32_spi3cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd)
{
return -ENODEV;
}
#endif
#ifdef CONFIG_STM32F7_SPI4
int stm32_spi4cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd)
{
return -ENODEV;
}
#endif
#ifdef CONFIG_STM32F7_SPI5
int stm32_spi5cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd)
{
return -ENODEV;
}
#endif
#endif /* CONFIG_SPI_CMDDATA */
#endif /* CONFIG_STM32F7_SPI1 || ... CONFIG_STM32F7_SPI5 */

120
configs/nucleo-144/src/stm32_userleds.c Normal file
View file

@ -0,0 +1,120 @@
/****************************************************************************
* configs/nucleo-144/src/stm32_userleds.c
*
* Copyright (C) 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdbool.h>
#include <debug.h>
#include "stm32_gpio.h"
#include "nucleo-144.h"
#ifndef CONFIG_ARCH_LEDS
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
* with CONFIG_DEBUG_VERBOSE too)
*/
#ifdef CONFIG_DEBUG_LEDS
# define leddbg lldbg
# define ledvdbg llvdbg
#else
# define leddbg(x...)
# define ledvdbg(x...)
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_userled_initialize
*
* Description:
* If CONFIG_ARCH_LEDS is defined, then NuttX will control the on-board
* LEDs. If CONFIG_ARCH_LEDS is not defined, then the
* board_userled_initialize() is available to initialize the LED from user
* application logic.
*
****************************************************************************/
void board_userled_initialize(void)
{
stm32_configgpio(GPIO_LD1);
}
/****************************************************************************
* Name: board_userled
*
* Description:
* If CONFIG_ARCH_LEDS is defined, then NuttX will control the on-board
* LEDs. If CONFIG_ARCH_LEDS is not defined, then the board_userled() is
* available to control the LED from user application logic.
*
****************************************************************************/
void board_userled(int led, bool ledon)
{
if (led == BOARD_STATUS_LED)
{
stm32_gpiowrite(GPIO_LD1, !ledon);
}
}
/****************************************************************************
* Name: board_userled_all
*
* Description:
* If CONFIG_ARCH_LEDS is defined, then NuttX will control the on-board
* LEDs. If CONFIG_ARCH_LEDS is not defined, then the board_userled_all() is
* available to control the LED from user application logic. NOTE: since
* there is only a single LED on-board, this is function is not very useful.
*
****************************************************************************/
void board_userled_all(uint8_t ledset)
{
stm32_gpiowrite(GPIO_LD1, (ledset & BOARD_STATUS_LED_BIT) != 0);
}
#endif /* !CONFIG_ARCH_LEDS */

3
configs/nutiny-nuc120/src/nuc_boardinitialize.c
View file

@ -1,6 +1,5 @@
/************************************************************************************
* configs/nutiny-nuc120/src/up_boot.c
* arch/arm/src/board/up_boot.c
* configs/nutiny-nuc120/src/nuc_boardinitialize.c
*
* Copyright (C) 2013 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>

10
configs/pcduino-a10/nsh/pcduino-140107.patch
View file

@ -2,7 +2,7 @@ diff --git a/nuttx/arch/arm/src/a1x/a1x_boot.c b/nuttx/arch/arm/src/a1x/a1x_boot
index 3cc6323..ad42790 100644
--- a/nuttx/arch/arm/src/a1x/a1x_boot.c
+++ b/nuttx/arch/arm/src/a1x/a1x_boot.c
@@ -312,12 +312,14 @@ void up_boot(void)
@@ -312,12 +312,14 @@ void arm_boot(void)
* for all IO regions (Including the vector region).
*/
@ -17,7 +17,7 @@ index 3cc6323..ad42790 100644
a1x_vectormapping();
#endif /* CONFIG_ARCH_ROMPGTABLE */
@@ -326,16 +328,19 @@ void up_boot(void)
@@ -326,16 +328,19 @@ void arm_boot(void)
* arm_vector.S
*/
@ -37,7 +37,7 @@ index 3cc6323..ad42790 100644
a1x_lowsetup();
/* Perform early serial initialization if we are going to use the serial
@@ -343,6 +348,7 @@ void up_boot(void)
@@ -343,6 +348,7 @@ void arm_boot(void)
*/
#ifdef USE_EARLYSERIALINIT
@ -45,7 +45,7 @@ index 3cc6323..ad42790 100644
up_earlyserialinit();
#endif
@@ -353,6 +359,7 @@ void up_boot(void)
@@ -353,6 +359,7 @@ void arm_boot(void)
*/
#ifdef CONFIG_BUILD_PROTECTED
@ -53,7 +53,7 @@ index 3cc6323..ad42790 100644
a1x_userspace();
#endif
@@ -362,5 +369,7 @@ void up_boot(void)
@@ -362,5 +369,7 @@ void arm_boot(void)
* - Configuration of board specific resources (PIOs, LEDs, etc).
*/

27
configs/pcduino-a10/scripts/sdram.ld
View file

@ -1,7 +1,7 @@
/****************************************************************************
* configs/pcduino-a10/scripts/sdram.ld
*
* Copyright (C) 2013 Gregory Nutt. All rights reserved.
* Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -49,7 +49,8 @@ ENTRY(_stext)
SECTIONS
{
.text : {
.text :
{
_stext = ABSOLUTE(.);
*(.vectors)
*(.text .text.*)
@ -67,13 +68,15 @@ SECTIONS
_etext = ABSOLUTE(.);
} > sdram
.init_section : {
.init_section :
{
_sinit = ABSOLUTE(.);
*(.init_array .init_array.*)
_einit = ABSOLUTE(.);
} > sdram
.ARM.extab : {
.ARM.extab :
{
*(.ARM.extab*)
} > sdram
@ -86,7 +89,8 @@ SECTIONS
} > sdram
PROVIDE_HIDDEN (__exidx_end = .);
.data : {
.data :
{
_sdata = ABSOLUTE(.);
*(.data .data.*)
*(.gnu.linkonce.d.*)
@ -94,7 +98,8 @@ SECTIONS
_edata = ABSOLUTE(.);
} > sdram
.bss : {
.bss :
{
_sbss = ABSOLUTE(.);
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
@ -102,7 +107,17 @@ SECTIONS
_ebss = ABSOLUTE(.);
} > sdram
/* Uninitialized data */
.noinit :
{
_snoinit = ABSOLUTE(.);
*(.noinit*)
_enoinit = ABSOLUTE(.);
} > sdram
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }

24
configs/sabre-6quad/scripts/dramboot.ld
View file

@ -55,7 +55,8 @@ ENTRY(_stext)
SECTIONS
{
.text : {
.text :
{
_stext = ABSOLUTE(.);
*(.vectors)
*(.text .text.*)
@ -73,13 +74,15 @@ SECTIONS
_etext = ABSOLUTE(.);
} > ddr3
.init_section : {
.init_section :
{
_sinit = ABSOLUTE(.);
*(.init_array .init_array.*)
_einit = ABSOLUTE(.);
} > ddr3
.ARM.extab : {
.ARM.extab :
{
*(.ARM.extab*)
} > ddr3
@ -92,7 +95,10 @@ SECTIONS
} > ddr3
PROVIDE_HIDDEN (__exidx_end = .);
.data : {
/* Uninitialized data */
.data :
{
_sdata = ABSOLUTE(.);
*(.data .data.*)
*(.gnu.linkonce.d.*)
@ -100,7 +106,8 @@ SECTIONS
_edata = ABSOLUTE(.);
} > ddr3
.bss : {
.bss :
{
_sbss = ABSOLUTE(.);
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
@ -108,6 +115,13 @@ SECTIONS
_ebss = ABSOLUTE(.);
} > ddr3
.noinit :
{
_snoinit = ABSOLUTE(.);
*(.noinit*)
_enoinit = ABSOLUTE(.);
} > ddr3
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }

27
configs/sama5d2-xult/scripts/dramboot.ld
View file

@ -1,7 +1,7 @@
/****************************************************************************
* configs/sama5d2-xult/scripts/dramboot.ld
*
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
* Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -54,7 +54,8 @@ ENTRY(_stext)
SECTIONS
{
.text : {
.text :
{
_stext = ABSOLUTE(.);
*(.vectors)
*(.text .text.*)
@ -72,13 +73,15 @@ SECTIONS
_etext = ABSOLUTE(.);
} > sdram
.init_section : {
.init_section :
{
_sinit = ABSOLUTE(.);
*(.init_array .init_array.*)
_einit = ABSOLUTE(.);
} > sdram
.ARM.extab : {
.ARM.extab :
{
*(.ARM.extab*)
} > sdram
@ -91,7 +94,8 @@ SECTIONS
} > sdram
PROVIDE_HIDDEN (__exidx_end = .);
.data : {
.data :
{
_sdata = ABSOLUTE(.);
*(.data .data.*)
*(.gnu.linkonce.d.*)
@ -99,7 +103,8 @@ SECTIONS
_edata = ABSOLUTE(.);
} > sdram
.bss : {
.bss :
{
_sbss = ABSOLUTE(.);
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
@ -107,7 +112,17 @@ SECTIONS
_ebss = ABSOLUTE(.);
} > sdram
/* Uninitialized data */
.noinit :
{
_snoinit = ABSOLUTE(.);
*(.noinit*)
_enoinit = ABSOLUTE(.);
} > sdram
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }

11
configs/sama5d2-xult/scripts/gnu-elf.ld
View file

@ -1,7 +1,7 @@
/****************************************************************************
* configs/sama5d2-xult/scripts/gnu-elf.ld
*
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
* Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -76,6 +76,15 @@ SECTIONS
_edata = . ;
}
/* Uninitialized data */
.noinit :
{
_snoinit = . ;
*(.noinit*)
_enoinit = . ;
}
/* C++ support. For each global and static local C++ object,
* GCC creates a small subroutine to construct the object. Pointers
* to these routines (not the routines themselves) are stored as

24
configs/sama5d2-xult/scripts/isram.ld
View file

@ -1,7 +1,7 @@
/****************************************************************************
* configs/sama5d2-xult/scripts/isram.ld
*
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
* Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -51,7 +51,8 @@ ENTRY(_stext)
SECTIONS
{
.text : {
.text :
{
_stext = ABSOLUTE(.);
*(.vectors)
*(.text .text.*)
@ -69,7 +70,8 @@ SECTIONS
_etext = ABSOLUTE(.);
} > isram
.init_section : {
.init_section :
{
_sinit = ABSOLUTE(.);
*(.init_array .init_array.*)
_einit = ABSOLUTE(.);
@ -88,7 +90,8 @@ SECTIONS
} > isram
PROVIDE_HIDDEN (__exidx_end = .);
.data : {
.data :
{
_sdata = ABSOLUTE(.);
*(.data .data.*)
*(.gnu.linkonce.d.*)
@ -96,7 +99,8 @@ SECTIONS
_edata = ABSOLUTE(.);
} > isram
.bss : {
.bss :
{
_sbss = ABSOLUTE(.);
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
@ -104,7 +108,17 @@ SECTIONS
_ebss = ABSOLUTE(.);
} > isram
/* Uninitialized data */
.noinit :
{
_snoinit = ABSOLUTE(.);
*(.noinit*)
_enoinit = ABSOLUTE(.);
} > isram
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }

27
configs/sama5d2-xult/scripts/uboot.ld
View file

@ -1,7 +1,7 @@
/****************************************************************************
* configs/sama5d2-xult/scripts/uboot.ld
*
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
* Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -55,7 +55,8 @@ ENTRY(_stext)
SECTIONS
{
.text : {
.text :
{
_stext = ABSOLUTE(.);
*(.vectors)
*(.text .text.*)
@ -73,13 +74,15 @@ SECTIONS
_etext = ABSOLUTE(.);
} > sdram
.init_section : {
.init_section :
{
_sinit = ABSOLUTE(.);
*(.init_array .init_array.*)
_einit = ABSOLUTE(.);
} > sdram
.ARM.extab : {
.ARM.extab :
{
*(.ARM.extab*)
} > sdram
@ -92,7 +95,8 @@ SECTIONS
} > sdram
PROVIDE_HIDDEN (__exidx_end = .);
.data : {
.data :
{
_sdata = ABSOLUTE(.);
*(.data .data.*)
*(.gnu.linkonce.d.*)
@ -100,7 +104,8 @@ SECTIONS
_edata = ABSOLUTE(.);
} > sdram
.bss : {
.bss :
{
_sbss = ABSOLUTE(.);
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
@ -108,7 +113,17 @@ SECTIONS
_ebss = ABSOLUTE(.);
} > sdram
/* Uninitialized data */
.noinit :
{
_snoinit = ABSOLUTE(.);
*(.noinit*)
_enoinit = ABSOLUTE(.);
} > sdram
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }

27
configs/sama5d3-xplained/scripts/ddram.ld
View file

@ -1,7 +1,7 @@
/****************************************************************************
* configs/sama5d3-xplained/scripts/ddram.ld
*
* Copyright (C) 2014 Gregory Nutt. All rights reserved.
* Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -55,7 +55,8 @@ ENTRY(_stext)
SECTIONS
{
.text : {
.text :
{
_stext = ABSOLUTE(.);
*(.vectors)
*(.text .text.*)
@ -73,13 +74,15 @@ SECTIONS
_etext = ABSOLUTE(.);
} > sdram
.init_section : {
.init_section :
{
_sinit = ABSOLUTE(.);
*(.init_array .init_array.*)
_einit = ABSOLUTE(.);
} > sdram
.ARM.extab : {
.ARM.extab :
{
*(.ARM.extab*)
} > sdram
@ -92,7 +95,8 @@ SECTIONS
} > sdram
PROVIDE_HIDDEN (__exidx_end = .);
.data : {
.data :
{
_sdata = ABSOLUTE(.);
*(.data .data.*)
*(.gnu.linkonce.d.*)
@ -100,7 +104,8 @@ SECTIONS
_edata = ABSOLUTE(.);
} > sdram
.bss : {
.bss :
{
_sbss = ABSOLUTE(.);
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
@ -108,7 +113,17 @@ SECTIONS
_ebss = ABSOLUTE(.);
} > sdram
/* Uninitialized data */
.noinit :
{
_snoinit = ABSOLUTE(.);
*(.noinit*)
_enoinit = ABSOLUTE(.);
} > sdram
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }

11
configs/sama5d3-xplained/scripts/gnu-elf.ld
View file

@ -1,7 +1,7 @@
/****************************************************************************
* configs/sama5d3-xplained/scripts/gnu-elf.ld
*
* Copyright (C) 2014 Gregory Nutt. All rights reserved.
* Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -76,6 +76,15 @@ SECTIONS
_edata = . ;
}
/* Uninitialized data */
.noinit :
{
_snoinit = . ;
*(.noinit*)
_enoinit = . ;
}
/* C++ support. For each global and static local C++ object,
* GCC creates a small subroutine to construct the object. Pointers
* to these routines (not the routines themselves) are stored as

27
configs/sama5d3-xplained/scripts/isram.ld
View file

@ -1,7 +1,7 @@
/****************************************************************************
* configs/sama5d3-xplained/scripts/isram.ld
*
* Copyright (C) 2014 Gregory Nutt. All rights reserved.
* Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -51,7 +51,8 @@ ENTRY(_stext)
SECTIONS
{
.text : {
.text :
{
_stext = ABSOLUTE(.);
*(.vectors)
*(.text .text.*)
@ -69,13 +70,15 @@ SECTIONS
_etext = ABSOLUTE(.);
} > isram
.init_section : {
.init_section :
{
_sinit = ABSOLUTE(.);
*(.init_array .init_array.*)
_einit = ABSOLUTE(.);
} > isram
.ARM.extab : {
.ARM.extab :
{
*(.ARM.extab*)
} > isram
@ -88,7 +91,8 @@ SECTIONS
} > isram
PROVIDE_HIDDEN (__exidx_end = .);
.data : {
.data :
{
_sdata = ABSOLUTE(.);
*(.data .data.*)
*(.gnu.linkonce.d.*)
@ -96,7 +100,8 @@ SECTIONS
_edata = ABSOLUTE(.);
} > isram
.bss : {
.bss :
{
_sbss = ABSOLUTE(.);
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
@ -104,7 +109,17 @@ SECTIONS
_ebss = ABSOLUTE(.);
} > isram
/* Uninitialized data */
.noinit :
{
_snoinit = ABSOLUTE(.);
*(.noinit*)
_enoinit = ABSOLUTE(.);
} > isram
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }

27
configs/sama5d3x-ek/scripts/ddram.ld
View file

@ -1,7 +1,7 @@
/****************************************************************************
* configs/sama5d3x-ek/scripts/ddram.ld
*
* Copyright (C) 2013-2014 Gregory Nutt. All rights reserved.
* Copyright (C) 2013-2014, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -55,7 +55,8 @@ ENTRY(_stext)
SECTIONS
{
.text : {
.text :
{
_stext = ABSOLUTE(.);
*(.vectors)
*(.text .text.*)
@ -73,13 +74,15 @@ SECTIONS
_etext = ABSOLUTE(.);
} > sdram
.init_section : {
.init_section :
{
_sinit = ABSOLUTE(.);
*(.init_array .init_array.*)
_einit = ABSOLUTE(.);
} > sdram
.ARM.extab : {
.ARM.extab :
{
*(.ARM.extab*)
} > sdram
@ -92,7 +95,8 @@ SECTIONS
} > sdram
PROVIDE_HIDDEN (__exidx_end = .);
.data : {
.data :
{
_sdata = ABSOLUTE(.);
*(.data .data.*)
*(.gnu.linkonce.d.*)
@ -100,7 +104,8 @@ SECTIONS
_edata = ABSOLUTE(.);
} > sdram
.bss : {
.bss :
{
_sbss = ABSOLUTE(.);
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
@ -108,7 +113,17 @@ SECTIONS
_ebss = ABSOLUTE(.);
} > sdram
/* Uninitialized data */
.noinit :
{
_snoinit = ABSOLUTE(.);
*(.noinit*)
_enoinit = ABSOLUTE(.);
} > sdram
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }

11
configs/sama5d3x-ek/scripts/gnu-elf.ld
View file

@ -1,7 +1,7 @@
/****************************************************************************
* configs/sama5d3x-ek/scripts/gnu-elf.ld
*
* Copyright (C) 2014 Gregory Nutt. All rights reserved.
* Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -76,6 +76,15 @@ SECTIONS
_edata = . ;
}
/* Uninitialized data */
.noinit :
{
_snoinit = . ;
*(.noinit*)
_enoinit = . ;
}
/* C++ support. For each global and static local C++ object,
* GCC creates a small subroutine to construct the object. Pointers
* to these routines (not the routines themselves) are stored as

27
configs/sama5d3x-ek/scripts/isram.ld
View file

@ -1,7 +1,7 @@
/****************************************************************************
* configs/sama5d3x-ek/scripts/isram.ld
*
* Copyright (C) 2013 Gregory Nutt. All rights reserved.
* Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -51,7 +51,8 @@ ENTRY(_stext)
SECTIONS
{
.text : {
.text :
{
_stext = ABSOLUTE(.);
*(.vectors)
*(.text .text.*)
@ -69,13 +70,15 @@ SECTIONS
_etext = ABSOLUTE(.);
} > isram
.init_section : {
.init_section :
{
_sinit = ABSOLUTE(.);
*(.init_array .init_array.*)
_einit = ABSOLUTE(.);
} > isram
.ARM.extab : {
.ARM.extab :
{
*(.ARM.extab*)
} > isram
@ -88,7 +91,8 @@ SECTIONS
} > isram
PROVIDE_HIDDEN (__exidx_end = .);
.data : {
.data :
{
_sdata = ABSOLUTE(.);
*(.data .data.*)
*(.gnu.linkonce.d.*)
@ -96,7 +100,8 @@ SECTIONS
_edata = ABSOLUTE(.);
} > isram
.bss : {
.bss :
{
_sbss = ABSOLUTE(.);
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
@ -104,7 +109,17 @@ SECTIONS
_ebss = ABSOLUTE(.);
} > isram
/* Uninitialized data */
.noinit :
{
_snoinit = ABSOLUTE(.);
*(.noinit*)
_enoinit = ABSOLUTE(.);
} > isram
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }

27
configs/sama5d3x-ek/scripts/nor-ddram.ld
View file

@ -1,7 +1,7 @@
/****************************************************************************
* configs/sama5d3x-ek/scripts/nor-ddram.ld
*
* Copyright (C) 2014 Gregory Nutt. All rights reserved.
* Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -60,7 +60,8 @@ ENTRY(_stext)
SECTIONS
{
.text : {
.text :
{
_stext = ABSOLUTE(.);
*(.vectors)
*(.text .text.*)
@ -78,13 +79,15 @@ SECTIONS
_etext = ABSOLUTE(.);
} > norflash
.init_section : {
.init_section :
{
_sinit = ABSOLUTE(.);
*(.init_array .init_array.*)
_einit = ABSOLUTE(.);
} > norflash
.ARM.extab : {
.ARM.extab :
{
*(.ARM.extab*)
} > norflash
@ -97,7 +100,8 @@ SECTIONS
} > norflash
PROVIDE_HIDDEN (__exidx_end = .);
.data : {
.data :
{
_sdata = ABSOLUTE(.);
*(.data .data.*)
*(.gnu.linkonce.d.*)
@ -107,7 +111,8 @@ SECTIONS
_eronly = LOADADDR(.data);
.bss : {
.bss :
{
_sbss = ABSOLUTE(.);
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
@ -115,7 +120,17 @@ SECTIONS
_ebss = ABSOLUTE(.);
} > sdram
/* Uninitialized data */
.noinit :
{
_snoinit = ABSOLUTE(.);
*(.noinit*)
_enoinit = ABSOLUTE(.);
} > sdram
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }

30
configs/sama5d3x-ek/scripts/nor-isram.ld
View file

@ -1,7 +1,7 @@
/****************************************************************************
* configs/sama5d3x-ek/scripts/nor-isram.ld
*
* Copyright (C) 2013-2014 Gregory Nutt. All rights reserved.
* Copyright (C) 2013-2014, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -56,7 +56,8 @@ ENTRY(_stext)
SECTIONS
{
.text : {
.text :
{
_stext = ABSOLUTE(.);
*(.vectors)
*(.text .text.*)
@ -74,13 +75,15 @@ SECTIONS
_etext = ABSOLUTE(.);
} > norflash
.init_section : {
.init_section :
{
_sinit = ABSOLUTE(.);
*(.init_array .init_array.*)
_einit = ABSOLUTE(.);
} > norflash
.ARM.extab : {
.ARM.extab :
{
*(.ARM.extab*)
} > norflash
@ -93,7 +96,8 @@ SECTIONS
} > norflash
PROVIDE_HIDDEN (__exidx_end = .);
.data : {
.data :
{
_sdata = ABSOLUTE(.);
*(.data .data.*)
*(.gnu.linkonce.d.*)
@ -103,7 +107,8 @@ SECTIONS
_eronly = LOADADDR(.data);
.bss : {
.bss :
{
_sbss = ABSOLUTE(.);
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
@ -111,7 +116,8 @@ SECTIONS
_ebss = ABSOLUTE(.);
} > isram
.ramfunc ALIGN(4): {
.ramfunc ALIGN(4):
{
_sramfuncs = ABSOLUTE(.);
*(.ramfunc .ramfunc.*)
_eramfuncs = ABSOLUTE(.);
@ -119,7 +125,17 @@ SECTIONS
_framfuncs = LOADADDR(.ramfunc);
/* Uninitialized data */
.noinit :
{
_snoinit = ABSOLUTE(.);
*(.noinit*)
_enoinit = ABSOLUTE(.);
} > isram
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }

30
configs/sama5d3x-ek/scripts/pg-sram.ld
View file

@ -1,7 +1,7 @@
/****************************************************************************
* configs/sama5d3x-ek/scripts/pg-isram.ld
*
* Copyright (C) 2013 Gregory Nutt. All rights reserved.
* Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -79,7 +79,8 @@ ENTRY(_stext)
SECTIONS
{
.locked : {
.locked :
{
_slocked = ABSOLUTE(.);
*(.vectors)
up_head.o locked.r (.text .text.*)
@ -95,7 +96,8 @@ SECTIONS
_elocked = ABSOLUTE(.);
} >locked
.init_section : {
.init_section :
{
_sinit = ABSOLUTE(.);
*(.init_array .init_array.*)
_einit = ABSOLUTE(.);
@ -110,7 +112,8 @@ SECTIONS
} > isram
PROVIDE_HIDDEN (__exidx_end = .);
.paged : {
.paged :
{
_spaged = ABSOLUTE(.);
*(.text .text.*)
*(.fixup)
@ -127,7 +130,8 @@ SECTIONS
_epaged = ABSOLUTE(.);
} > paged
.data : {
.data :
{
_sdata = ABSOLUTE(.);
*(.data .data.*)
*(.gnu.linkonce.d.*)
@ -135,14 +139,26 @@ SECTIONS
_edata = ABSOLUTE(.);
} > data AT > locked
.bss : {
.bss :
{
_sbss = ABSOLUTE(.);
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
_ebss = ABSOLUTE(.);
} > data
/* Stabs debugging sections. */
/* Uninitialized data */
.noinit :
{
_snoinit = ABSOLUTE(.);
*(.noinit*)
_enoinit = ABSOLUTE(.);
} > data
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }

27
configs/sama5d4-ek/scripts/dramboot.ld
View file

@ -1,7 +1,7 @@
/****************************************************************************
* configs/sama5d4-ek/scripts/dramboot.ld
*
* Copyright (C) 2014 Gregory Nutt. All rights reserved.
* Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -54,7 +54,8 @@ ENTRY(_stext)
SECTIONS
{
.text : {
.text :
{
_stext = ABSOLUTE(.);
*(.vectors)
*(.text .text.*)
@ -72,13 +73,15 @@ SECTIONS
_etext = ABSOLUTE(.);
} > sdram
.init_section : {
.init_section :
{
_sinit = ABSOLUTE(.);
*(.init_array .init_array.*)
_einit = ABSOLUTE(.);
} > sdram
.ARM.extab : {
.ARM.extab :
{
*(.ARM.extab*)
} > sdram
@ -91,7 +94,8 @@ SECTIONS
} > sdram
PROVIDE_HIDDEN (__exidx_end = .);
.data : {
.data :
{
_sdata = ABSOLUTE(.);
*(.data .data.*)
*(.gnu.linkonce.d.*)
@ -99,7 +103,8 @@ SECTIONS
_edata = ABSOLUTE(.);
} > sdram
.bss : {
.bss :
{
_sbss = ABSOLUTE(.);
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
@ -107,7 +112,17 @@ SECTIONS
_ebss = ABSOLUTE(.);
} > sdram
/* Uninitialized data */
.noinit :
{
_snoinit = ABSOLUTE(.);
*(.noinit*)
_enoinit = ABSOLUTE(.);
} > sdram
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }

11
configs/sama5d4-ek/scripts/gnu-elf.ld
View file

@ -1,7 +1,7 @@
/****************************************************************************
* configs/sama5d4-ek/scripts/gnu-elf.ld
*
* Copyright (C) 2014 Gregory Nutt. All rights reserved.
* Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -76,6 +76,15 @@ SECTIONS
_edata = . ;
}
/* Uninitialized data */
.noinit :
{
_snoinit = . ;
*(.noinit*)
_enoinit = . ;
}
/* C++ support. For each global and static local C++ object,
* GCC creates a small subroutine to construct the object. Pointers
* to these routines (not the routines themselves) are stored as

27
configs/sama5d4-ek/scripts/isram.ld
View file

@ -1,7 +1,7 @@
/****************************************************************************
* configs/sama5d4-ek/scripts/isram.ld
*
* Copyright (C) 2014 Gregory Nutt. All rights reserved.
* Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -51,7 +51,8 @@ ENTRY(_stext)
SECTIONS
{
.text : {
.text :
{
_stext = ABSOLUTE(.);
*(.vectors)
*(.text .text.*)
@ -69,13 +70,15 @@ SECTIONS
_etext = ABSOLUTE(.);
} > isram
.init_section : {
.init_section :
{
_sinit = ABSOLUTE(.);
*(.init_array .init_array.*)
_einit = ABSOLUTE(.);
} > isram
.ARM.extab : {
.ARM.extab :
{
*(.ARM.extab*)
} > isram
@ -88,7 +91,8 @@ SECTIONS
} > isram
PROVIDE_HIDDEN (__exidx_end = .);
.data : {
.data :
{
_sdata = ABSOLUTE(.);
*(.data .data.*)
*(.gnu.linkonce.d.*)
@ -96,7 +100,8 @@ SECTIONS
_edata = ABSOLUTE(.);
} > isram
.bss : {
.bss :
{
_sbss = ABSOLUTE(.);
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
@ -104,7 +109,17 @@ SECTIONS
_ebss = ABSOLUTE(.);
} > isram
/* Uninitialized data */
.noinit :
{
_snoinit = ABSOLUTE(.);
*(.noinit*)
_enoinit = ABSOLUTE(.);
} > isram
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }

27
configs/sama5d4-ek/scripts/uboot.ld
View file

@ -1,7 +1,7 @@
/****************************************************************************
* configs/sama5d4-ek/scripts/uboot.ld
*
* Copyright (C) 2014 Gregory Nutt. All rights reserved.
* Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -55,7 +55,8 @@ ENTRY(_stext)
SECTIONS
{
.text : {
.text :
{
_stext = ABSOLUTE(.);
*(.vectors)
*(.text .text.*)
@ -73,13 +74,15 @@ SECTIONS
_etext = ABSOLUTE(.);
} > sdram
.init_section : {
.init_section :
{
_sinit = ABSOLUTE(.);
*(.init_array .init_array.*)
_einit = ABSOLUTE(.);
} > sdram
.ARM.extab : {
.ARM.extab :
{
*(.ARM.extab*)
} > sdram
@ -92,7 +95,8 @@ SECTIONS
} > sdram
PROVIDE_HIDDEN (__exidx_end = .);
.data : {
.data :
{
_sdata = ABSOLUTE(.);
*(.data .data.*)
*(.gnu.linkonce.d.*)
@ -100,7 +104,8 @@ SECTIONS
_edata = ABSOLUTE(.);
} > sdram
.bss : {
.bss :
{
_sbss = ABSOLUTE(.);
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
@ -108,7 +113,17 @@ SECTIONS
_ebss = ABSOLUTE(.);
} > sdram
/* Uninitialized data */
.noinit :
{
_snoinit = ABSOLUTE(.);
*(.noinit*)
_enoinit = ABSOLUTE(.);
} > sdram
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }

2
configs/samv71-xult/src/sam_boot.c
View file

@ -103,7 +103,7 @@ void sam_boardinitialize(void)
#ifdef CONFIG_SAMV7_SDRAMC
/* Configure SDRAM if it has been enabled in the NuttX configuration.
* Here we assume, of course, that we are not running out SDRAM.
* Here we assume, of course, that we are not running out of SDRAM.
*/
sam_sdram_config();

2
configs/stm32ldiscovery/src/stm32_boot.c
View file

@ -1,5 +1,5 @@
/************************************************************************************
* configs/stm32ldiscovery/src/up_boot.c
* configs/stm32ldiscovery/src/stm32_boot.c
*
* Copyright (C) 2013, 2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>

2
configs/teensy-lc/src/kl_boardinitialize.c
View file

@ -1,5 +1,5 @@
/************************************************************************************
* configs/teensy-lc/src/up_boot.c
* configs/teensy-lc/src/kl_boardinitialize.c
*
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>

3
crypto/Makefile
View file

@ -1,7 +1,7 @@
############################################################################
# crypto/Makefile
#
# Copyright (C) 2007, 2008, 2011-2014 Gregory Nutt. All rights reserved.
# Copyright (C) 2007, 2008, 2011-2014, 2016 Gregory Nutt. All rights reserved.
# Author: Gregory Nutt <gnutt@nuttx.org>
#
# Redistribution and use in source and binary forms, with or without
@ -70,6 +70,7 @@ OBJS = $(AOBJS) $(COBJS)
BIN = libcrypto$(LIBEXT)
all: $(BIN)
.PHONY: depend clean distclean
$(AOBJS): %$(OBJEXT): %.S
$(call ASSEMBLE, $<, $@)

3
drivers/Makefile
View file

@ -1,7 +1,7 @@
############################################################################
# drivers/Makefile
#
# Copyright (C) 2007-2014 Gregory Nutt. All rights reserved.
# Copyright (C) 2007-2014, 2016 Gregory Nutt. All rights reserved.
# Author: Gregory Nutt <gnutt@nuttx.org>
#
# Redistribution and use in source and binary forms, with or without
@ -108,6 +108,7 @@ OBJS = $(AOBJS) $(COBJS)
BIN = libdrivers$(LIBEXT)
all: $(BIN)
.PHONY: depend clean distclean
$(AOBJS): %$(OBJEXT): %.S
$(call ASSEMBLE, $<, $@)

50
drivers/can.c
View file

@ -522,6 +522,44 @@ static ssize_t can_read(FAR struct file *filep, FAR char *buffer,
/* Interrupts must be disabled while accessing the cd_recv FIFO */
flags = enter_critical_section();
#ifdef CONFIG_CAN_ERRORS
/* Check for internal errors */
if (dev->cd_error != 0)
{
FAR struct can_msg_s *msg;
/* Detected an internal driver error. Generate a
* CAN_ERROR_MESSAGE
*/
if (buflen < CAN_MSGLEN(CAN_ERROR_DLC))
{
goto return_with_irqdisabled;
}
msg = (FAR struct can_msg_s *)buffer;
msg->cm_hdr.ch_id = CAN_ERROR_INTERNAL;
msg->cm_hdr.ch_dlc = CAN_ERROR_DLC;
msg->cm_hdr.ch_rtr = 0;
msg->cm_hdr.ch_error = 1;
#ifdef CONFIG_CAN_EXTID
msg->cm_hdr.ch_extid = 0;
#endif
msg->cm_hdr.ch_unused = 0;
memset(&(msg->cm_data), 0, CAN_ERROR_DLC);
msg->cm_data[5] = dev->cd_error;
/* Reset the error flag */
dev->cd_error = 0;
ret = CAN_MSGLEN(CAN_ERROR_DLC);
goto return_with_irqdisabled;
}
#endif /* CONFIG_CAN_ERRORS */
while (dev->cd_recv.rx_head == dev->cd_recv.rx_tail)
{
/* The receive FIFO is empty -- was non-blocking mode selected? */
@ -540,6 +578,7 @@ static ssize_t can_read(FAR struct file *filep, FAR char *buffer,
ret = sem_wait(&dev->cd_recv.rx_sem);
}
while (ret >= 0 && dev->cd_recv.rx_head == dev->cd_recv.rx_tail);
dev->cd_nrxwaiters--;
if (ret < 0)
@ -927,6 +966,9 @@ int can_register(FAR const char *path, FAR struct can_dev_s *dev)
dev->cd_ntxwaiters = 0;
dev->cd_nrxwaiters = 0;
dev->cd_npendrtr = 0;
#ifdef CONFIG_CAN_ERRORS
dev->cd_error = 0;
#endif
sem_init(&dev->cd_xmit.tx_sem, 0, 0);
sem_init(&dev->cd_recv.rx_sem, 0, 0);
@ -1073,6 +1115,14 @@ int can_receive(FAR struct can_dev_s *dev, FAR struct can_hdr_s *hdr,
err = OK;
}
#ifdef CONFIG_CAN_ERRORS
else
{
/* Report rx overflow error */
dev->cd_error |= CAN_ERROR5_RXOVERFLOW;
}
#endif
return err;
}

4
drivers/leds/userled_upper.c
View file

@ -63,10 +63,10 @@
#ifndef CONFIG_DEBUG
# undef CONFIG_DEBUG_VERBOSE
# undef CONFIG_DEBUG_DISCRETE
# undef CONFIG_DEBUG_LEDS
#endif
#ifdef CONFIG_DEBUG_DISCRETE
#ifdef CONFIG_DEBUG_LEDS
# define ddbg lldbg
# ifdef CONFIG_DEBUG_VERBOSE
# define dvdbg lldbg

33
drivers/mtd/Kconfig
View file

@ -783,6 +783,39 @@ config SST25XX_MEMORY_TYPE
endif # MTD_SST25XX
config MTD_SST26
bool "SPI/QSPI-based SST26XX FLASHes (16,32,64-MBit)"
default n
select SPI
---help---
These part are also different from SST25 and SST25XX, they support both SPI and QSPI.
if MTD_SST26
config SST26_SPIMODE
int "SST26 (Q)SPI Mode"
default 0
config SST26_SPIFREQUENCY
int "SST26 (Q)SPI Frequency"
default 64000000
config SST26_MANUFACTURER
hex "Manufacturers ID"
default 0xBF
---help---
Various manufacturers may have produced the parts. 0xBF is the manufacturer ID
for the parts manufactured by SST.
config SST26_MEMORY_TYPE
hex "Memory type ID"
default 0x26
---help---
The memory type for SST26VF0xx series is 0x26, but this can be modified if needed
to support compatible devices from different manufacturers.
endif # MTD_SST26
config MTD_SST39FV
bool "SST39FV NOR FLASH"
default n

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